| 1 | /* Semantic operand instances for or1k. |
| 2 | |
| 3 | THIS FILE IS MACHINE GENERATED WITH CGEN. |
| 4 | |
| 5 | Copyright (C) 1996-2015 Free Software Foundation, Inc. |
| 6 | |
| 7 | This file is part of the GNU Binutils and/or GDB, the GNU debugger. |
| 8 | |
| 9 | This file is free software; you can redistribute it and/or modify |
| 10 | it under the terms of the GNU General Public License as published by |
| 11 | the Free Software Foundation; either version 3, or (at your option) |
| 12 | any later version. |
| 13 | |
| 14 | It is distributed in the hope that it will be useful, but WITHOUT |
| 15 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 16 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
| 17 | License for more details. |
| 18 | |
| 19 | You should have received a copy of the GNU General Public License along |
| 20 | with this program; if not, write to the Free Software Foundation, Inc., |
| 21 | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. |
| 22 | |
| 23 | */ |
| 24 | |
| 25 | #include "sysdep.h" |
| 26 | #include "ansidecl.h" |
| 27 | #include "bfd.h" |
| 28 | #include "symcat.h" |
| 29 | #include "or1k-desc.h" |
| 30 | #include "or1k-opc.h" |
| 31 | |
| 32 | /* Operand references. */ |
| 33 | |
| 34 | #define OP_ENT(op) OR1K_OPERAND_##op |
| 35 | #define INPUT CGEN_OPINST_INPUT |
| 36 | #define OUTPUT CGEN_OPINST_OUTPUT |
| 37 | #define END CGEN_OPINST_END |
| 38 | #define COND_REF CGEN_OPINST_COND_REF |
| 39 | |
| 40 | static const CGEN_OPINST sfmt_empty_ops[] ATTRIBUTE_UNUSED = { |
| 41 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 42 | }; |
| 43 | |
| 44 | static const CGEN_OPINST sfmt_l_j_ops[] ATTRIBUTE_UNUSED = { |
| 45 | { INPUT, "disp26", HW_H_IADDR, CGEN_MODE_UDI, OP_ENT (DISP26), 0, 0 }, |
| 46 | { INPUT, "sys_cpucfgr_nd", HW_H_SYS_CPUCFGR_ND, CGEN_MODE_UDI, 0, 0, 0 }, |
| 47 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 }, |
| 48 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 49 | }; |
| 50 | |
| 51 | static const CGEN_OPINST sfmt_l_jal_ops[] ATTRIBUTE_UNUSED = { |
| 52 | { INPUT, "disp26", HW_H_IADDR, CGEN_MODE_UDI, OP_ENT (DISP26), 0, 0 }, |
| 53 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 }, |
| 54 | { INPUT, "sys_cpucfgr_nd", HW_H_SYS_CPUCFGR_ND, CGEN_MODE_UDI, 0, 0, 0 }, |
| 55 | { OUTPUT, "h_gpr_UDI_9", HW_H_GPR, CGEN_MODE_UDI, 0, 9, 0 }, |
| 56 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 }, |
| 57 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 58 | }; |
| 59 | |
| 60 | static const CGEN_OPINST sfmt_l_jr_ops[] ATTRIBUTE_UNUSED = { |
| 61 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, |
| 62 | { INPUT, "sys_cpucfgr_nd", HW_H_SYS_CPUCFGR_ND, CGEN_MODE_UDI, 0, 0, 0 }, |
| 63 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 }, |
| 64 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 65 | }; |
| 66 | |
| 67 | static const CGEN_OPINST sfmt_l_jalr_ops[] ATTRIBUTE_UNUSED = { |
| 68 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 }, |
| 69 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, |
| 70 | { INPUT, "sys_cpucfgr_nd", HW_H_SYS_CPUCFGR_ND, CGEN_MODE_UDI, 0, 0, 0 }, |
| 71 | { OUTPUT, "h_gpr_UDI_9", HW_H_GPR, CGEN_MODE_UDI, 0, 9, 0 }, |
| 72 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 }, |
| 73 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 74 | }; |
| 75 | |
| 76 | static const CGEN_OPINST sfmt_l_bnf_ops[] ATTRIBUTE_UNUSED = { |
| 77 | { INPUT, "disp26", HW_H_IADDR, CGEN_MODE_UDI, OP_ENT (DISP26), 0, COND_REF }, |
| 78 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, |
| 79 | { INPUT, "sys_cpucfgr_nd", HW_H_SYS_CPUCFGR_ND, CGEN_MODE_UDI, 0, 0, COND_REF }, |
| 80 | { INPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 }, |
| 81 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, |
| 82 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 83 | }; |
| 84 | |
| 85 | static const CGEN_OPINST sfmt_l_trap_ops[] ATTRIBUTE_UNUSED = { |
| 86 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 }, |
| 87 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 88 | }; |
| 89 | |
| 90 | static const CGEN_OPINST sfmt_l_msync_ops[] ATTRIBUTE_UNUSED = { |
| 91 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 92 | }; |
| 93 | |
| 94 | static const CGEN_OPINST sfmt_l_nop_imm_ops[] ATTRIBUTE_UNUSED = { |
| 95 | { INPUT, "uimm16", HW_H_UIMM16, CGEN_MODE_UINT, OP_ENT (UIMM16), 0, 0 }, |
| 96 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 97 | }; |
| 98 | |
| 99 | static const CGEN_OPINST sfmt_l_movhi_ops[] ATTRIBUTE_UNUSED = { |
| 100 | { INPUT, "uimm16", HW_H_UIMM16, CGEN_MODE_UINT, OP_ENT (UIMM16), 0, 0 }, |
| 101 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 102 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 103 | }; |
| 104 | |
| 105 | static const CGEN_OPINST sfmt_l_macrc_ops[] ATTRIBUTE_UNUSED = { |
| 106 | { INPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 }, |
| 107 | { OUTPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 }, |
| 108 | { OUTPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 }, |
| 109 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 110 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 111 | }; |
| 112 | |
| 113 | static const CGEN_OPINST sfmt_l_mfspr_ops[] ATTRIBUTE_UNUSED = { |
| 114 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 115 | { INPUT, "uimm16", HW_H_UIMM16, CGEN_MODE_UINT, OP_ENT (UIMM16), 0, 0 }, |
| 116 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 117 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 118 | }; |
| 119 | |
| 120 | static const CGEN_OPINST sfmt_l_mtspr_ops[] ATTRIBUTE_UNUSED = { |
| 121 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 122 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, |
| 123 | { INPUT, "uimm16_split", HW_H_UIMM16, CGEN_MODE_UINT, OP_ENT (UIMM16_SPLIT), 0, 0 }, |
| 124 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 125 | }; |
| 126 | |
| 127 | static const CGEN_OPINST sfmt_l_lwz_ops[] ATTRIBUTE_UNUSED = { |
| 128 | { INPUT, "h_memory_USI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_4", HW_H_MEMORY, CGEN_MODE_USI, 0, 0, 0 }, |
| 129 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 130 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, |
| 131 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 132 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 133 | }; |
| 134 | |
| 135 | static const CGEN_OPINST sfmt_l_lws_ops[] ATTRIBUTE_UNUSED = { |
| 136 | { INPUT, "h_memory_SI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_4", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 }, |
| 137 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 138 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, |
| 139 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 140 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 141 | }; |
| 142 | |
| 143 | static const CGEN_OPINST sfmt_l_lwa_ops[] ATTRIBUTE_UNUSED = { |
| 144 | { INPUT, "h_memory_USI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_4", HW_H_MEMORY, CGEN_MODE_USI, 0, 0, 0 }, |
| 145 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 146 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, |
| 147 | { OUTPUT, "atomic_address", HW_H_ATOMIC_ADDRESS, CGEN_MODE_SI, 0, 0, 0 }, |
| 148 | { OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, 0 }, |
| 149 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 150 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 151 | }; |
| 152 | |
| 153 | static const CGEN_OPINST sfmt_l_lbz_ops[] ATTRIBUTE_UNUSED = { |
| 154 | { INPUT, "h_memory_UQI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_1", HW_H_MEMORY, CGEN_MODE_UQI, 0, 0, 0 }, |
| 155 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 156 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, |
| 157 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 158 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 159 | }; |
| 160 | |
| 161 | static const CGEN_OPINST sfmt_l_lbs_ops[] ATTRIBUTE_UNUSED = { |
| 162 | { INPUT, "h_memory_QI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_1", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 }, |
| 163 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 164 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, |
| 165 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 166 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 167 | }; |
| 168 | |
| 169 | static const CGEN_OPINST sfmt_l_lhz_ops[] ATTRIBUTE_UNUSED = { |
| 170 | { INPUT, "h_memory_UHI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_2", HW_H_MEMORY, CGEN_MODE_UHI, 0, 0, 0 }, |
| 171 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 172 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, |
| 173 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 174 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 175 | }; |
| 176 | |
| 177 | static const CGEN_OPINST sfmt_l_lhs_ops[] ATTRIBUTE_UNUSED = { |
| 178 | { INPUT, "h_memory_HI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_2", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 }, |
| 179 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 180 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, |
| 181 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 182 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 183 | }; |
| 184 | |
| 185 | static const CGEN_OPINST sfmt_l_sw_ops[] ATTRIBUTE_UNUSED = { |
| 186 | { INPUT, "atomic_address", HW_H_ATOMIC_ADDRESS, CGEN_MODE_SI, 0, 0, 0 }, |
| 187 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 188 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, |
| 189 | { INPUT, "simm16_split", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16_SPLIT), 0, 0 }, |
| 190 | { OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, COND_REF }, |
| 191 | { OUTPUT, "h_memory_USI_addr", HW_H_MEMORY, CGEN_MODE_USI, 0, 0, 0 }, |
| 192 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 193 | }; |
| 194 | |
| 195 | static const CGEN_OPINST sfmt_l_sb_ops[] ATTRIBUTE_UNUSED = { |
| 196 | { INPUT, "atomic_address", HW_H_ATOMIC_ADDRESS, CGEN_MODE_SI, 0, 0, 0 }, |
| 197 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 198 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, |
| 199 | { INPUT, "simm16_split", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16_SPLIT), 0, 0 }, |
| 200 | { OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, COND_REF }, |
| 201 | { OUTPUT, "h_memory_UQI_addr", HW_H_MEMORY, CGEN_MODE_UQI, 0, 0, 0 }, |
| 202 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 203 | }; |
| 204 | |
| 205 | static const CGEN_OPINST sfmt_l_sh_ops[] ATTRIBUTE_UNUSED = { |
| 206 | { INPUT, "atomic_address", HW_H_ATOMIC_ADDRESS, CGEN_MODE_SI, 0, 0, 0 }, |
| 207 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 208 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, |
| 209 | { INPUT, "simm16_split", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16_SPLIT), 0, 0 }, |
| 210 | { OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, COND_REF }, |
| 211 | { OUTPUT, "h_memory_UHI_addr", HW_H_MEMORY, CGEN_MODE_UHI, 0, 0, 0 }, |
| 212 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 213 | }; |
| 214 | |
| 215 | static const CGEN_OPINST sfmt_l_swa_ops[] ATTRIBUTE_UNUSED = { |
| 216 | { INPUT, "atomic_address", HW_H_ATOMIC_ADDRESS, CGEN_MODE_SI, 0, 0, 0 }, |
| 217 | { INPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, 0 }, |
| 218 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 219 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, COND_REF }, |
| 220 | { INPUT, "simm16_split", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16_SPLIT), 0, 0 }, |
| 221 | { INPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 }, |
| 222 | { OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, 0 }, |
| 223 | { OUTPUT, "h_memory_USI_addr", HW_H_MEMORY, CGEN_MODE_USI, 0, 0, COND_REF }, |
| 224 | { OUTPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 }, |
| 225 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 226 | }; |
| 227 | |
| 228 | static const CGEN_OPINST sfmt_l_sll_ops[] ATTRIBUTE_UNUSED = { |
| 229 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 230 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, |
| 231 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 232 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 233 | }; |
| 234 | |
| 235 | static const CGEN_OPINST sfmt_l_slli_ops[] ATTRIBUTE_UNUSED = { |
| 236 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 237 | { INPUT, "uimm6", HW_H_UIMM6, CGEN_MODE_UINT, OP_ENT (UIMM6), 0, 0 }, |
| 238 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 239 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 240 | }; |
| 241 | |
| 242 | static const CGEN_OPINST sfmt_l_and_ops[] ATTRIBUTE_UNUSED = { |
| 243 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 244 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, |
| 245 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 246 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 247 | }; |
| 248 | |
| 249 | static const CGEN_OPINST sfmt_l_add_ops[] ATTRIBUTE_UNUSED = { |
| 250 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, |
| 251 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 252 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, |
| 253 | { INPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, |
| 254 | { INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 }, |
| 255 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 256 | { OUTPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 }, |
| 257 | { OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, |
| 258 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 259 | }; |
| 260 | |
| 261 | static const CGEN_OPINST sfmt_l_addc_ops[] ATTRIBUTE_UNUSED = { |
| 262 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, |
| 263 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 264 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, |
| 265 | { INPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 }, |
| 266 | { INPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, |
| 267 | { INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 }, |
| 268 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 269 | { OUTPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 }, |
| 270 | { OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, |
| 271 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 272 | }; |
| 273 | |
| 274 | static const CGEN_OPINST sfmt_l_div_ops[] ATTRIBUTE_UNUSED = { |
| 275 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, |
| 276 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, COND_REF }, |
| 277 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, |
| 278 | { INPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 }, |
| 279 | { INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 }, |
| 280 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, COND_REF }, |
| 281 | { OUTPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, COND_REF }, |
| 282 | { OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, |
| 283 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 284 | }; |
| 285 | |
| 286 | static const CGEN_OPINST sfmt_l_ff1_ops[] ATTRIBUTE_UNUSED = { |
| 287 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 288 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 289 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 290 | }; |
| 291 | |
| 292 | static const CGEN_OPINST sfmt_l_xori_ops[] ATTRIBUTE_UNUSED = { |
| 293 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 294 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, |
| 295 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 296 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 297 | }; |
| 298 | |
| 299 | static const CGEN_OPINST sfmt_l_addi_ops[] ATTRIBUTE_UNUSED = { |
| 300 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, |
| 301 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 302 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, |
| 303 | { INPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, |
| 304 | { INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 }, |
| 305 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 306 | { OUTPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 }, |
| 307 | { OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, |
| 308 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 309 | }; |
| 310 | |
| 311 | static const CGEN_OPINST sfmt_l_addic_ops[] ATTRIBUTE_UNUSED = { |
| 312 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, |
| 313 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 314 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, |
| 315 | { INPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 }, |
| 316 | { INPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, |
| 317 | { INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 }, |
| 318 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 319 | { OUTPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 }, |
| 320 | { OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, |
| 321 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 322 | }; |
| 323 | |
| 324 | static const CGEN_OPINST sfmt_l_exths_ops[] ATTRIBUTE_UNUSED = { |
| 325 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 326 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 327 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 328 | }; |
| 329 | |
| 330 | static const CGEN_OPINST sfmt_l_cmov_ops[] ATTRIBUTE_UNUSED = { |
| 331 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, COND_REF }, |
| 332 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, COND_REF }, |
| 333 | { INPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 }, |
| 334 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, COND_REF }, |
| 335 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 336 | }; |
| 337 | |
| 338 | static const CGEN_OPINST sfmt_l_sfgts_ops[] ATTRIBUTE_UNUSED = { |
| 339 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 340 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, |
| 341 | { OUTPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 }, |
| 342 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 343 | }; |
| 344 | |
| 345 | static const CGEN_OPINST sfmt_l_sfgtsi_ops[] ATTRIBUTE_UNUSED = { |
| 346 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 347 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, |
| 348 | { OUTPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 }, |
| 349 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 350 | }; |
| 351 | |
| 352 | static const CGEN_OPINST sfmt_l_mac_ops[] ATTRIBUTE_UNUSED = { |
| 353 | { INPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 }, |
| 354 | { INPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 }, |
| 355 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 356 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, |
| 357 | { OUTPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 }, |
| 358 | { OUTPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 }, |
| 359 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 360 | }; |
| 361 | |
| 362 | static const CGEN_OPINST sfmt_l_maci_ops[] ATTRIBUTE_UNUSED = { |
| 363 | { INPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 }, |
| 364 | { INPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 }, |
| 365 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 366 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, |
| 367 | { OUTPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 }, |
| 368 | { OUTPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 }, |
| 369 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 370 | }; |
| 371 | |
| 372 | static const CGEN_OPINST sfmt_lf_add_s_ops[] ATTRIBUTE_UNUSED = { |
| 373 | { INPUT, "rASF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RASF), 0, 0 }, |
| 374 | { INPUT, "rBSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RBSF), 0, 0 }, |
| 375 | { OUTPUT, "rDSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RDSF), 0, 0 }, |
| 376 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 377 | }; |
| 378 | |
| 379 | static const CGEN_OPINST sfmt_lf_add_d_ops[] ATTRIBUTE_UNUSED = { |
| 380 | { INPUT, "rADF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RADF), 0, 0 }, |
| 381 | { INPUT, "rBDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RBDF), 0, 0 }, |
| 382 | { OUTPUT, "rDDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RDDF), 0, 0 }, |
| 383 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 384 | }; |
| 385 | |
| 386 | static const CGEN_OPINST sfmt_lf_itof_s_ops[] ATTRIBUTE_UNUSED = { |
| 387 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 388 | { INPUT, "sys_fpcsr_rm", HW_H_SYS_FPCSR_RM, CGEN_MODE_UDI, 0, 0, 0 }, |
| 389 | { OUTPUT, "rDSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RDSF), 0, 0 }, |
| 390 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 391 | }; |
| 392 | |
| 393 | static const CGEN_OPINST sfmt_lf_itof_d_ops[] ATTRIBUTE_UNUSED = { |
| 394 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
| 395 | { INPUT, "sys_fpcsr_rm", HW_H_SYS_FPCSR_RM, CGEN_MODE_UDI, 0, 0, 0 }, |
| 396 | { OUTPUT, "rDDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RDDF), 0, 0 }, |
| 397 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 398 | }; |
| 399 | |
| 400 | static const CGEN_OPINST sfmt_lf_ftoi_s_ops[] ATTRIBUTE_UNUSED = { |
| 401 | { INPUT, "rASF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RASF), 0, 0 }, |
| 402 | { INPUT, "sys_fpcsr_rm", HW_H_SYS_FPCSR_RM, CGEN_MODE_UDI, 0, 0, 0 }, |
| 403 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 404 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 405 | }; |
| 406 | |
| 407 | static const CGEN_OPINST sfmt_lf_ftoi_d_ops[] ATTRIBUTE_UNUSED = { |
| 408 | { INPUT, "rADF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RADF), 0, 0 }, |
| 409 | { INPUT, "sys_fpcsr_rm", HW_H_SYS_FPCSR_RM, CGEN_MODE_UDI, 0, 0, 0 }, |
| 410 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
| 411 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 412 | }; |
| 413 | |
| 414 | static const CGEN_OPINST sfmt_lf_eq_s_ops[] ATTRIBUTE_UNUSED = { |
| 415 | { INPUT, "rASF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RASF), 0, 0 }, |
| 416 | { INPUT, "rBSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RBSF), 0, 0 }, |
| 417 | { OUTPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 }, |
| 418 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 419 | }; |
| 420 | |
| 421 | static const CGEN_OPINST sfmt_lf_eq_d_ops[] ATTRIBUTE_UNUSED = { |
| 422 | { INPUT, "rADF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RADF), 0, 0 }, |
| 423 | { INPUT, "rBDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RBDF), 0, 0 }, |
| 424 | { OUTPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 }, |
| 425 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 426 | }; |
| 427 | |
| 428 | static const CGEN_OPINST sfmt_lf_madd_s_ops[] ATTRIBUTE_UNUSED = { |
| 429 | { INPUT, "rASF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RASF), 0, 0 }, |
| 430 | { INPUT, "rBSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RBSF), 0, 0 }, |
| 431 | { INPUT, "rDSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RDSF), 0, 0 }, |
| 432 | { OUTPUT, "rDSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RDSF), 0, 0 }, |
| 433 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 434 | }; |
| 435 | |
| 436 | static const CGEN_OPINST sfmt_lf_madd_d_ops[] ATTRIBUTE_UNUSED = { |
| 437 | { INPUT, "rADF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RADF), 0, 0 }, |
| 438 | { INPUT, "rBDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RBDF), 0, 0 }, |
| 439 | { INPUT, "rDDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RDDF), 0, 0 }, |
| 440 | { OUTPUT, "rDDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RDDF), 0, 0 }, |
| 441 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 442 | }; |
| 443 | |
| 444 | #undef OP_ENT |
| 445 | #undef INPUT |
| 446 | #undef OUTPUT |
| 447 | #undef END |
| 448 | #undef COND_REF |
| 449 | |
| 450 | /* Operand instance lookup table. */ |
| 451 | |
| 452 | static const CGEN_OPINST *or1k_cgen_opinst_table[MAX_INSNS] = { |
| 453 | 0, |
| 454 | & sfmt_l_j_ops[0], |
| 455 | & sfmt_l_jal_ops[0], |
| 456 | & sfmt_l_jr_ops[0], |
| 457 | & sfmt_l_jalr_ops[0], |
| 458 | & sfmt_l_bnf_ops[0], |
| 459 | & sfmt_l_bnf_ops[0], |
| 460 | & sfmt_l_trap_ops[0], |
| 461 | & sfmt_l_trap_ops[0], |
| 462 | & sfmt_l_msync_ops[0], |
| 463 | & sfmt_l_msync_ops[0], |
| 464 | & sfmt_l_msync_ops[0], |
| 465 | & sfmt_l_msync_ops[0], |
| 466 | & sfmt_l_nop_imm_ops[0], |
| 467 | & sfmt_l_msync_ops[0], |
| 468 | & sfmt_l_movhi_ops[0], |
| 469 | & sfmt_l_macrc_ops[0], |
| 470 | & sfmt_l_mfspr_ops[0], |
| 471 | & sfmt_l_mtspr_ops[0], |
| 472 | & sfmt_l_lwz_ops[0], |
| 473 | & sfmt_l_lws_ops[0], |
| 474 | & sfmt_l_lwa_ops[0], |
| 475 | & sfmt_l_lbz_ops[0], |
| 476 | & sfmt_l_lbs_ops[0], |
| 477 | & sfmt_l_lhz_ops[0], |
| 478 | & sfmt_l_lhs_ops[0], |
| 479 | & sfmt_l_sw_ops[0], |
| 480 | & sfmt_l_sb_ops[0], |
| 481 | & sfmt_l_sh_ops[0], |
| 482 | & sfmt_l_swa_ops[0], |
| 483 | & sfmt_l_sll_ops[0], |
| 484 | & sfmt_l_slli_ops[0], |
| 485 | & sfmt_l_sll_ops[0], |
| 486 | & sfmt_l_slli_ops[0], |
| 487 | & sfmt_l_sll_ops[0], |
| 488 | & sfmt_l_slli_ops[0], |
| 489 | & sfmt_l_sll_ops[0], |
| 490 | & sfmt_l_slli_ops[0], |
| 491 | & sfmt_l_and_ops[0], |
| 492 | & sfmt_l_and_ops[0], |
| 493 | & sfmt_l_and_ops[0], |
| 494 | & sfmt_l_add_ops[0], |
| 495 | & sfmt_l_add_ops[0], |
| 496 | & sfmt_l_addc_ops[0], |
| 497 | & sfmt_l_add_ops[0], |
| 498 | & sfmt_l_add_ops[0], |
| 499 | & sfmt_l_div_ops[0], |
| 500 | & sfmt_l_div_ops[0], |
| 501 | & sfmt_l_ff1_ops[0], |
| 502 | & sfmt_l_ff1_ops[0], |
| 503 | & sfmt_l_mfspr_ops[0], |
| 504 | & sfmt_l_mfspr_ops[0], |
| 505 | & sfmt_l_xori_ops[0], |
| 506 | & sfmt_l_addi_ops[0], |
| 507 | & sfmt_l_addic_ops[0], |
| 508 | & sfmt_l_addi_ops[0], |
| 509 | & sfmt_l_exths_ops[0], |
| 510 | & sfmt_l_exths_ops[0], |
| 511 | & sfmt_l_exths_ops[0], |
| 512 | & sfmt_l_exths_ops[0], |
| 513 | & sfmt_l_exths_ops[0], |
| 514 | & sfmt_l_exths_ops[0], |
| 515 | & sfmt_l_cmov_ops[0], |
| 516 | & sfmt_l_sfgts_ops[0], |
| 517 | & sfmt_l_sfgtsi_ops[0], |
| 518 | & sfmt_l_sfgts_ops[0], |
| 519 | & sfmt_l_sfgtsi_ops[0], |
| 520 | & sfmt_l_sfgts_ops[0], |
| 521 | & sfmt_l_sfgtsi_ops[0], |
| 522 | & sfmt_l_sfgts_ops[0], |
| 523 | & sfmt_l_sfgtsi_ops[0], |
| 524 | & sfmt_l_sfgts_ops[0], |
| 525 | & sfmt_l_sfgtsi_ops[0], |
| 526 | & sfmt_l_sfgts_ops[0], |
| 527 | & sfmt_l_sfgtsi_ops[0], |
| 528 | & sfmt_l_sfgts_ops[0], |
| 529 | & sfmt_l_sfgtsi_ops[0], |
| 530 | & sfmt_l_sfgts_ops[0], |
| 531 | & sfmt_l_sfgtsi_ops[0], |
| 532 | & sfmt_l_sfgts_ops[0], |
| 533 | & sfmt_l_sfgtsi_ops[0], |
| 534 | & sfmt_l_sfgts_ops[0], |
| 535 | & sfmt_l_sfgtsi_ops[0], |
| 536 | & sfmt_l_mac_ops[0], |
| 537 | & sfmt_l_mac_ops[0], |
| 538 | & sfmt_l_maci_ops[0], |
| 539 | & sfmt_l_msync_ops[0], |
| 540 | & sfmt_l_msync_ops[0], |
| 541 | & sfmt_l_msync_ops[0], |
| 542 | & sfmt_l_msync_ops[0], |
| 543 | & sfmt_l_msync_ops[0], |
| 544 | & sfmt_l_msync_ops[0], |
| 545 | & sfmt_l_msync_ops[0], |
| 546 | & sfmt_l_msync_ops[0], |
| 547 | & sfmt_lf_add_s_ops[0], |
| 548 | & sfmt_lf_add_d_ops[0], |
| 549 | & sfmt_lf_add_s_ops[0], |
| 550 | & sfmt_lf_add_d_ops[0], |
| 551 | & sfmt_lf_add_s_ops[0], |
| 552 | & sfmt_lf_add_d_ops[0], |
| 553 | & sfmt_lf_add_s_ops[0], |
| 554 | & sfmt_lf_add_d_ops[0], |
| 555 | & sfmt_lf_add_s_ops[0], |
| 556 | & sfmt_lf_add_d_ops[0], |
| 557 | & sfmt_lf_itof_s_ops[0], |
| 558 | & sfmt_lf_itof_d_ops[0], |
| 559 | & sfmt_lf_ftoi_s_ops[0], |
| 560 | & sfmt_lf_ftoi_d_ops[0], |
| 561 | & sfmt_lf_eq_s_ops[0], |
| 562 | & sfmt_lf_eq_d_ops[0], |
| 563 | & sfmt_lf_eq_s_ops[0], |
| 564 | & sfmt_lf_eq_d_ops[0], |
| 565 | & sfmt_lf_eq_s_ops[0], |
| 566 | & sfmt_lf_eq_d_ops[0], |
| 567 | & sfmt_lf_eq_s_ops[0], |
| 568 | & sfmt_lf_eq_d_ops[0], |
| 569 | & sfmt_lf_eq_s_ops[0], |
| 570 | & sfmt_lf_eq_d_ops[0], |
| 571 | & sfmt_lf_eq_s_ops[0], |
| 572 | & sfmt_lf_eq_d_ops[0], |
| 573 | & sfmt_lf_madd_s_ops[0], |
| 574 | & sfmt_lf_madd_d_ops[0], |
| 575 | & sfmt_l_msync_ops[0], |
| 576 | & sfmt_l_msync_ops[0], |
| 577 | }; |
| 578 | |
| 579 | /* Function to call before using the operand instance table. */ |
| 580 | |
| 581 | void |
| 582 | or1k_cgen_init_opinst_table (cd) |
| 583 | CGEN_CPU_DESC cd; |
| 584 | { |
| 585 | int i; |
| 586 | const CGEN_OPINST **oi = & or1k_cgen_opinst_table[0]; |
| 587 | CGEN_INSN *insns = (CGEN_INSN *) cd->insn_table.init_entries; |
| 588 | for (i = 0; i < MAX_INSNS; ++i) |
| 589 | insns[i].opinst = oi[i]; |
| 590 | } |