| 1 | /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ |
| 2 | /* Instruction opcode table for xstormy16. |
| 3 | |
| 4 | THIS FILE IS MACHINE GENERATED WITH CGEN. |
| 5 | |
| 6 | Copyright (C) 1996-2019 Free Software Foundation, Inc. |
| 7 | |
| 8 | This file is part of the GNU Binutils and/or GDB, the GNU debugger. |
| 9 | |
| 10 | This file is free software; you can redistribute it and/or modify |
| 11 | it under the terms of the GNU General Public License as published by |
| 12 | the Free Software Foundation; either version 3, or (at your option) |
| 13 | any later version. |
| 14 | |
| 15 | It is distributed in the hope that it will be useful, but WITHOUT |
| 16 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 17 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
| 18 | License for more details. |
| 19 | |
| 20 | You should have received a copy of the GNU General Public License along |
| 21 | with this program; if not, write to the Free Software Foundation, Inc., |
| 22 | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. |
| 23 | |
| 24 | */ |
| 25 | |
| 26 | #include "sysdep.h" |
| 27 | #include "ansidecl.h" |
| 28 | #include "bfd.h" |
| 29 | #include "symcat.h" |
| 30 | #include "xstormy16-desc.h" |
| 31 | #include "xstormy16-opc.h" |
| 32 | #include "libiberty.h" |
| 33 | |
| 34 | /* The hash functions are recorded here to help keep assembler code out of |
| 35 | the disassembler and vice versa. */ |
| 36 | |
| 37 | static int asm_hash_insn_p (const CGEN_INSN *); |
| 38 | static unsigned int asm_hash_insn (const char *); |
| 39 | static int dis_hash_insn_p (const CGEN_INSN *); |
| 40 | static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT); |
| 41 | |
| 42 | /* Instruction formats. */ |
| 43 | |
| 44 | #define F(f) & xstormy16_cgen_ifld_table[XSTORMY16_##f] |
| 45 | static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = { |
| 46 | 0, 0, 0x0, { { 0 } } |
| 47 | }; |
| 48 | |
| 49 | static const CGEN_IFMT ifmt_movlmemimm ATTRIBUTE_UNUSED = { |
| 50 | 32, 32, 0xfe000000, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_LMEM8) }, { F (F_IMM16) }, { 0 } } |
| 51 | }; |
| 52 | |
| 53 | static const CGEN_IFMT ifmt_movhmemimm ATTRIBUTE_UNUSED = { |
| 54 | 32, 32, 0xfe000000, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_HMEM8) }, { F (F_IMM16) }, { 0 } } |
| 55 | }; |
| 56 | |
| 57 | static const CGEN_IFMT ifmt_movlgrmem ATTRIBUTE_UNUSED = { |
| 58 | 16, 16, 0xf000, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_LMEM8) }, { 0 } } |
| 59 | }; |
| 60 | |
| 61 | static const CGEN_IFMT ifmt_movhgrmem ATTRIBUTE_UNUSED = { |
| 62 | 16, 16, 0xf000, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_HMEM8) }, { 0 } } |
| 63 | }; |
| 64 | |
| 65 | static const CGEN_IFMT ifmt_movgrgri ATTRIBUTE_UNUSED = { |
| 66 | 16, 16, 0xfe08, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_RS) }, { F (F_OP4M) }, { F (F_RDM) }, { 0 } } |
| 67 | }; |
| 68 | |
| 69 | static const CGEN_IFMT ifmt_movgrgrii ATTRIBUTE_UNUSED = { |
| 70 | 32, 32, 0xfe08f000, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_RS) }, { F (F_OP4M) }, { F (F_RDM) }, { F (F_OP5) }, { F (F_IMM12) }, { 0 } } |
| 71 | }; |
| 72 | |
| 73 | static const CGEN_IFMT ifmt_movgrgr ATTRIBUTE_UNUSED = { |
| 74 | 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RS) }, { F (F_RD) }, { 0 } } |
| 75 | }; |
| 76 | |
| 77 | static const CGEN_IFMT ifmt_movwimm8 ATTRIBUTE_UNUSED = { |
| 78 | 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_IMM8) }, { 0 } } |
| 79 | }; |
| 80 | |
| 81 | static const CGEN_IFMT ifmt_movwgrimm8 ATTRIBUTE_UNUSED = { |
| 82 | 16, 16, 0xf100, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_IMM8) }, { 0 } } |
| 83 | }; |
| 84 | |
| 85 | static const CGEN_IFMT ifmt_movwgrimm16 ATTRIBUTE_UNUSED = { |
| 86 | 32, 32, 0xfff00000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RD) }, { F (F_IMM16) }, { 0 } } |
| 87 | }; |
| 88 | |
| 89 | static const CGEN_IFMT ifmt_movlowgr ATTRIBUTE_UNUSED = { |
| 90 | 16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RD) }, { 0 } } |
| 91 | }; |
| 92 | |
| 93 | static const CGEN_IFMT ifmt_movfgrgrii ATTRIBUTE_UNUSED = { |
| 94 | 32, 32, 0xfe088000, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_RS) }, { F (F_OP4M) }, { F (F_RDM) }, { F (F_OP5A) }, { F (F_RB) }, { F (F_IMM12) }, { 0 } } |
| 95 | }; |
| 96 | |
| 97 | static const CGEN_IFMT ifmt_addgrimm4 ATTRIBUTE_UNUSED = { |
| 98 | 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_IMM4) }, { F (F_RD) }, { 0 } } |
| 99 | }; |
| 100 | |
| 101 | static const CGEN_IFMT ifmt_incgrimm2 ATTRIBUTE_UNUSED = { |
| 102 | 16, 16, 0xffc0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3A) }, { F (F_IMM2) }, { F (F_RD) }, { 0 } } |
| 103 | }; |
| 104 | |
| 105 | static const CGEN_IFMT ifmt_set1lmemimm ATTRIBUTE_UNUSED = { |
| 106 | 16, 16, 0xf100, { { F (F_OP1) }, { F (F_IMM3) }, { F (F_OP2M) }, { F (F_LMEM8) }, { 0 } } |
| 107 | }; |
| 108 | |
| 109 | static const CGEN_IFMT ifmt_set1hmemimm ATTRIBUTE_UNUSED = { |
| 110 | 16, 16, 0xf100, { { F (F_OP1) }, { F (F_IMM3) }, { F (F_OP2M) }, { F (F_HMEM8) }, { 0 } } |
| 111 | }; |
| 112 | |
| 113 | static const CGEN_IFMT ifmt_bccgrgr ATTRIBUTE_UNUSED = { |
| 114 | 32, 32, 0xff000000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RS) }, { F (F_RD) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } } |
| 115 | }; |
| 116 | |
| 117 | static const CGEN_IFMT ifmt_bccgrimm8 ATTRIBUTE_UNUSED = { |
| 118 | 32, 32, 0xf1000000, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_IMM8) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } } |
| 119 | }; |
| 120 | |
| 121 | static const CGEN_IFMT ifmt_bccimm16 ATTRIBUTE_UNUSED = { |
| 122 | 32, 32, 0xf0000000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REL8_4) }, { F (F_IMM16) }, { 0 } } |
| 123 | }; |
| 124 | |
| 125 | static const CGEN_IFMT ifmt_bngrimm4 ATTRIBUTE_UNUSED = { |
| 126 | 32, 32, 0xff00f000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_IMM4) }, { F (F_RD) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } } |
| 127 | }; |
| 128 | |
| 129 | static const CGEN_IFMT ifmt_bngrgr ATTRIBUTE_UNUSED = { |
| 130 | 32, 32, 0xff00f000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RS) }, { F (F_RD) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } } |
| 131 | }; |
| 132 | |
| 133 | static const CGEN_IFMT ifmt_bnlmemimm ATTRIBUTE_UNUSED = { |
| 134 | 32, 32, 0xff008000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_LMEM8) }, { F (F_OP5A) }, { F (F_IMM3B) }, { F (F_REL12) }, { 0 } } |
| 135 | }; |
| 136 | |
| 137 | static const CGEN_IFMT ifmt_bnhmemimm ATTRIBUTE_UNUSED = { |
| 138 | 32, 32, 0xff008000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_HMEM8) }, { F (F_OP5A) }, { F (F_IMM3B) }, { F (F_REL12) }, { 0 } } |
| 139 | }; |
| 140 | |
| 141 | static const CGEN_IFMT ifmt_bcc ATTRIBUTE_UNUSED = { |
| 142 | 16, 16, 0xf000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REL8_2) }, { 0 } } |
| 143 | }; |
| 144 | |
| 145 | static const CGEN_IFMT ifmt_br ATTRIBUTE_UNUSED = { |
| 146 | 16, 16, 0xf001, { { F (F_OP1) }, { F (F_REL12A) }, { F (F_OP4B) }, { 0 } } |
| 147 | }; |
| 148 | |
| 149 | static const CGEN_IFMT ifmt_jmp ATTRIBUTE_UNUSED = { |
| 150 | 16, 16, 0xffe0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3B) }, { F (F_RBJ) }, { F (F_RD) }, { 0 } } |
| 151 | }; |
| 152 | |
| 153 | static const CGEN_IFMT ifmt_jmpf ATTRIBUTE_UNUSED = { |
| 154 | 32, 32, 0xff000000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_ABS24) }, { 0 } } |
| 155 | }; |
| 156 | |
| 157 | static const CGEN_IFMT ifmt_iret ATTRIBUTE_UNUSED = { |
| 158 | 16, 16, 0xffff, { { F (F_OP) }, { 0 } } |
| 159 | }; |
| 160 | |
| 161 | #undef F |
| 162 | |
| 163 | #define A(a) (1 << CGEN_INSN_##a) |
| 164 | #define OPERAND(op) XSTORMY16_OPERAND_##op |
| 165 | #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */ |
| 166 | #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field)) |
| 167 | |
| 168 | /* The instruction table. */ |
| 169 | |
| 170 | static const CGEN_OPCODE xstormy16_cgen_insn_opcode_table[MAX_INSNS] = |
| 171 | { |
| 172 | /* Special null first entry. |
| 173 | A `num' value of zero is thus invalid. |
| 174 | Also, the special `invalid' insn resides here. */ |
| 175 | { { 0, 0, 0, 0 }, {{0}}, 0, {0}}, |
| 176 | /* mov$ws2 $lmem8,#$imm16 */ |
| 177 | { |
| 178 | { 0, 0, 0, 0 }, |
| 179 | { { MNEM, OP (WS2), ' ', OP (LMEM8), ',', '#', OP (IMM16), 0 } }, |
| 180 | & ifmt_movlmemimm, { 0x78000000 } |
| 181 | }, |
| 182 | /* mov$ws2 $hmem8,#$imm16 */ |
| 183 | { |
| 184 | { 0, 0, 0, 0 }, |
| 185 | { { MNEM, OP (WS2), ' ', OP (HMEM8), ',', '#', OP (IMM16), 0 } }, |
| 186 | & ifmt_movhmemimm, { 0x7a000000 } |
| 187 | }, |
| 188 | /* mov$ws2 $Rm,$lmem8 */ |
| 189 | { |
| 190 | { 0, 0, 0, 0 }, |
| 191 | { { MNEM, OP (WS2), ' ', OP (RM), ',', OP (LMEM8), 0 } }, |
| 192 | & ifmt_movlgrmem, { 0x8000 } |
| 193 | }, |
| 194 | /* mov$ws2 $Rm,$hmem8 */ |
| 195 | { |
| 196 | { 0, 0, 0, 0 }, |
| 197 | { { MNEM, OP (WS2), ' ', OP (RM), ',', OP (HMEM8), 0 } }, |
| 198 | & ifmt_movhgrmem, { 0xa000 } |
| 199 | }, |
| 200 | /* mov$ws2 $lmem8,$Rm */ |
| 201 | { |
| 202 | { 0, 0, 0, 0 }, |
| 203 | { { MNEM, OP (WS2), ' ', OP (LMEM8), ',', OP (RM), 0 } }, |
| 204 | & ifmt_movlgrmem, { 0x9000 } |
| 205 | }, |
| 206 | /* mov$ws2 $hmem8,$Rm */ |
| 207 | { |
| 208 | { 0, 0, 0, 0 }, |
| 209 | { { MNEM, OP (WS2), ' ', OP (HMEM8), ',', OP (RM), 0 } }, |
| 210 | & ifmt_movhgrmem, { 0xb000 } |
| 211 | }, |
| 212 | /* mov$ws2 $Rdm,($Rs) */ |
| 213 | { |
| 214 | { 0, 0, 0, 0 }, |
| 215 | { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), ')', 0 } }, |
| 216 | & ifmt_movgrgri, { 0x7000 } |
| 217 | }, |
| 218 | /* mov$ws2 $Rdm,($Rs++) */ |
| 219 | { |
| 220 | { 0, 0, 0, 0 }, |
| 221 | { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), '+', '+', ')', 0 } }, |
| 222 | & ifmt_movgrgri, { 0x6000 } |
| 223 | }, |
| 224 | /* mov$ws2 $Rdm,(--$Rs) */ |
| 225 | { |
| 226 | { 0, 0, 0, 0 }, |
| 227 | { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', '-', '-', OP (RS), ')', 0 } }, |
| 228 | & ifmt_movgrgri, { 0x6800 } |
| 229 | }, |
| 230 | /* mov$ws2 ($Rs),$Rdm */ |
| 231 | { |
| 232 | { 0, 0, 0, 0 }, |
| 233 | { { MNEM, OP (WS2), ' ', '(', OP (RS), ')', ',', OP (RDM), 0 } }, |
| 234 | & ifmt_movgrgri, { 0x7200 } |
| 235 | }, |
| 236 | /* mov$ws2 ($Rs++),$Rdm */ |
| 237 | { |
| 238 | { 0, 0, 0, 0 }, |
| 239 | { { MNEM, OP (WS2), ' ', '(', OP (RS), '+', '+', ')', ',', OP (RDM), 0 } }, |
| 240 | & ifmt_movgrgri, { 0x6200 } |
| 241 | }, |
| 242 | /* mov$ws2 (--$Rs),$Rdm */ |
| 243 | { |
| 244 | { 0, 0, 0, 0 }, |
| 245 | { { MNEM, OP (WS2), ' ', '(', '-', '-', OP (RS), ')', ',', OP (RDM), 0 } }, |
| 246 | & ifmt_movgrgri, { 0x6a00 } |
| 247 | }, |
| 248 | /* mov$ws2 $Rdm,($Rs,$imm12) */ |
| 249 | { |
| 250 | { 0, 0, 0, 0 }, |
| 251 | { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), ',', OP (IMM12), ')', 0 } }, |
| 252 | & ifmt_movgrgrii, { 0x70080000 } |
| 253 | }, |
| 254 | /* mov$ws2 $Rdm,($Rs++,$imm12) */ |
| 255 | { |
| 256 | { 0, 0, 0, 0 }, |
| 257 | { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), '+', '+', ',', OP (IMM12), ')', 0 } }, |
| 258 | & ifmt_movgrgrii, { 0x60080000 } |
| 259 | }, |
| 260 | /* mov$ws2 $Rdm,(--$Rs,$imm12) */ |
| 261 | { |
| 262 | { 0, 0, 0, 0 }, |
| 263 | { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', '-', '-', OP (RS), ',', OP (IMM12), ')', 0 } }, |
| 264 | & ifmt_movgrgrii, { 0x68080000 } |
| 265 | }, |
| 266 | /* mov$ws2 ($Rs,$imm12),$Rdm */ |
| 267 | { |
| 268 | { 0, 0, 0, 0 }, |
| 269 | { { MNEM, OP (WS2), ' ', '(', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } }, |
| 270 | & ifmt_movgrgrii, { 0x72080000 } |
| 271 | }, |
| 272 | /* mov$ws2 ($Rs++,$imm12),$Rdm */ |
| 273 | { |
| 274 | { 0, 0, 0, 0 }, |
| 275 | { { MNEM, OP (WS2), ' ', '(', OP (RS), '+', '+', ',', OP (IMM12), ')', ',', OP (RDM), 0 } }, |
| 276 | & ifmt_movgrgrii, { 0x62080000 } |
| 277 | }, |
| 278 | /* mov$ws2 (--$Rs,$imm12),$Rdm */ |
| 279 | { |
| 280 | { 0, 0, 0, 0 }, |
| 281 | { { MNEM, OP (WS2), ' ', '(', '-', '-', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } }, |
| 282 | & ifmt_movgrgrii, { 0x6a080000 } |
| 283 | }, |
| 284 | /* mov $Rd,$Rs */ |
| 285 | { |
| 286 | { 0, 0, 0, 0 }, |
| 287 | { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } }, |
| 288 | & ifmt_movgrgr, { 0x4600 } |
| 289 | }, |
| 290 | /* mov.w Rx,#$imm8 */ |
| 291 | { |
| 292 | { 0, 0, 0, 0 }, |
| 293 | { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } }, |
| 294 | & ifmt_movwimm8, { 0x4700 } |
| 295 | }, |
| 296 | /* mov.w $Rm,#$imm8small */ |
| 297 | { |
| 298 | { 0, 0, 0, 0 }, |
| 299 | { { MNEM, ' ', OP (RM), ',', '#', OP (IMM8SMALL), 0 } }, |
| 300 | & ifmt_movwgrimm8, { 0x2100 } |
| 301 | }, |
| 302 | /* mov.w $Rd,#$imm16 */ |
| 303 | { |
| 304 | { 0, 0, 0, 0 }, |
| 305 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, |
| 306 | & ifmt_movwgrimm16, { 0x31300000 } |
| 307 | }, |
| 308 | /* mov.b $Rd,RxL */ |
| 309 | { |
| 310 | { 0, 0, 0, 0 }, |
| 311 | { { MNEM, ' ', OP (RD), ',', 'R', 'x', 'L', 0 } }, |
| 312 | & ifmt_movlowgr, { 0x30c0 } |
| 313 | }, |
| 314 | /* mov.b $Rd,RxH */ |
| 315 | { |
| 316 | { 0, 0, 0, 0 }, |
| 317 | { { MNEM, ' ', OP (RD), ',', 'R', 'x', 'H', 0 } }, |
| 318 | & ifmt_movlowgr, { 0x30d0 } |
| 319 | }, |
| 320 | /* movf$ws2 $Rdm,($Rs) */ |
| 321 | { |
| 322 | { 0, 0, 0, 0 }, |
| 323 | { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), ')', 0 } }, |
| 324 | & ifmt_movgrgri, { 0x7400 } |
| 325 | }, |
| 326 | /* movf$ws2 $Rdm,($Rs++) */ |
| 327 | { |
| 328 | { 0, 0, 0, 0 }, |
| 329 | { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), '+', '+', ')', 0 } }, |
| 330 | & ifmt_movgrgri, { 0x6400 } |
| 331 | }, |
| 332 | /* movf$ws2 $Rdm,(--$Rs) */ |
| 333 | { |
| 334 | { 0, 0, 0, 0 }, |
| 335 | { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', '-', '-', OP (RS), ')', 0 } }, |
| 336 | & ifmt_movgrgri, { 0x6c00 } |
| 337 | }, |
| 338 | /* movf$ws2 ($Rs),$Rdm */ |
| 339 | { |
| 340 | { 0, 0, 0, 0 }, |
| 341 | { { MNEM, OP (WS2), ' ', '(', OP (RS), ')', ',', OP (RDM), 0 } }, |
| 342 | & ifmt_movgrgri, { 0x7600 } |
| 343 | }, |
| 344 | /* movf$ws2 ($Rs++),$Rdm */ |
| 345 | { |
| 346 | { 0, 0, 0, 0 }, |
| 347 | { { MNEM, OP (WS2), ' ', '(', OP (RS), '+', '+', ')', ',', OP (RDM), 0 } }, |
| 348 | & ifmt_movgrgri, { 0x6600 } |
| 349 | }, |
| 350 | /* movf$ws2 (--$Rs),$Rdm */ |
| 351 | { |
| 352 | { 0, 0, 0, 0 }, |
| 353 | { { MNEM, OP (WS2), ' ', '(', '-', '-', OP (RS), ')', ',', OP (RDM), 0 } }, |
| 354 | & ifmt_movgrgri, { 0x6e00 } |
| 355 | }, |
| 356 | /* movf$ws2 $Rdm,($Rb,$Rs,$imm12) */ |
| 357 | { |
| 358 | { 0, 0, 0, 0 }, |
| 359 | { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RB), ',', OP (RS), ',', OP (IMM12), ')', 0 } }, |
| 360 | & ifmt_movfgrgrii, { 0x74080000 } |
| 361 | }, |
| 362 | /* movf$ws2 $Rdm,($Rb,$Rs++,$imm12) */ |
| 363 | { |
| 364 | { 0, 0, 0, 0 }, |
| 365 | { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RB), ',', OP (RS), '+', '+', ',', OP (IMM12), ')', 0 } }, |
| 366 | & ifmt_movfgrgrii, { 0x64080000 } |
| 367 | }, |
| 368 | /* movf$ws2 $Rdm,($Rb,--$Rs,$imm12) */ |
| 369 | { |
| 370 | { 0, 0, 0, 0 }, |
| 371 | { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RB), ',', '-', '-', OP (RS), ',', OP (IMM12), ')', 0 } }, |
| 372 | & ifmt_movfgrgrii, { 0x6c080000 } |
| 373 | }, |
| 374 | /* movf$ws2 ($Rb,$Rs,$imm12),$Rdm */ |
| 375 | { |
| 376 | { 0, 0, 0, 0 }, |
| 377 | { { MNEM, OP (WS2), ' ', '(', OP (RB), ',', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } }, |
| 378 | & ifmt_movfgrgrii, { 0x76080000 } |
| 379 | }, |
| 380 | /* movf$ws2 ($Rb,$Rs++,$imm12),$Rdm */ |
| 381 | { |
| 382 | { 0, 0, 0, 0 }, |
| 383 | { { MNEM, OP (WS2), ' ', '(', OP (RB), ',', OP (RS), '+', '+', ',', OP (IMM12), ')', ',', OP (RDM), 0 } }, |
| 384 | & ifmt_movfgrgrii, { 0x66080000 } |
| 385 | }, |
| 386 | /* movf$ws2 ($Rb,--$Rs,$imm12),$Rdm */ |
| 387 | { |
| 388 | { 0, 0, 0, 0 }, |
| 389 | { { MNEM, OP (WS2), ' ', '(', OP (RB), ',', '-', '-', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } }, |
| 390 | & ifmt_movfgrgrii, { 0x6e080000 } |
| 391 | }, |
| 392 | /* mask $Rd,$Rs */ |
| 393 | { |
| 394 | { 0, 0, 0, 0 }, |
| 395 | { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } }, |
| 396 | & ifmt_movgrgr, { 0x3300 } |
| 397 | }, |
| 398 | /* mask $Rd,#$imm16 */ |
| 399 | { |
| 400 | { 0, 0, 0, 0 }, |
| 401 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, |
| 402 | & ifmt_movwgrimm16, { 0x30e00000 } |
| 403 | }, |
| 404 | /* push $Rd */ |
| 405 | { |
| 406 | { 0, 0, 0, 0 }, |
| 407 | { { MNEM, ' ', OP (RD), 0 } }, |
| 408 | & ifmt_movlowgr, { 0x80 } |
| 409 | }, |
| 410 | /* pop $Rd */ |
| 411 | { |
| 412 | { 0, 0, 0, 0 }, |
| 413 | { { MNEM, ' ', OP (RD), 0 } }, |
| 414 | & ifmt_movlowgr, { 0x90 } |
| 415 | }, |
| 416 | /* swpn $Rd */ |
| 417 | { |
| 418 | { 0, 0, 0, 0 }, |
| 419 | { { MNEM, ' ', OP (RD), 0 } }, |
| 420 | & ifmt_movlowgr, { 0x3090 } |
| 421 | }, |
| 422 | /* swpb $Rd */ |
| 423 | { |
| 424 | { 0, 0, 0, 0 }, |
| 425 | { { MNEM, ' ', OP (RD), 0 } }, |
| 426 | & ifmt_movlowgr, { 0x3080 } |
| 427 | }, |
| 428 | /* swpw $Rd,$Rs */ |
| 429 | { |
| 430 | { 0, 0, 0, 0 }, |
| 431 | { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } }, |
| 432 | & ifmt_movgrgr, { 0x3200 } |
| 433 | }, |
| 434 | /* and $Rd,$Rs */ |
| 435 | { |
| 436 | { 0, 0, 0, 0 }, |
| 437 | { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } }, |
| 438 | & ifmt_movgrgr, { 0x4000 } |
| 439 | }, |
| 440 | /* and Rx,#$imm8 */ |
| 441 | { |
| 442 | { 0, 0, 0, 0 }, |
| 443 | { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } }, |
| 444 | & ifmt_movwimm8, { 0x4100 } |
| 445 | }, |
| 446 | /* and $Rd,#$imm16 */ |
| 447 | { |
| 448 | { 0, 0, 0, 0 }, |
| 449 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, |
| 450 | & ifmt_movwgrimm16, { 0x31000000 } |
| 451 | }, |
| 452 | /* or $Rd,$Rs */ |
| 453 | { |
| 454 | { 0, 0, 0, 0 }, |
| 455 | { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } }, |
| 456 | & ifmt_movgrgr, { 0x4200 } |
| 457 | }, |
| 458 | /* or Rx,#$imm8 */ |
| 459 | { |
| 460 | { 0, 0, 0, 0 }, |
| 461 | { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } }, |
| 462 | & ifmt_movwimm8, { 0x4300 } |
| 463 | }, |
| 464 | /* or $Rd,#$imm16 */ |
| 465 | { |
| 466 | { 0, 0, 0, 0 }, |
| 467 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, |
| 468 | & ifmt_movwgrimm16, { 0x31100000 } |
| 469 | }, |
| 470 | /* xor $Rd,$Rs */ |
| 471 | { |
| 472 | { 0, 0, 0, 0 }, |
| 473 | { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } }, |
| 474 | & ifmt_movgrgr, { 0x4400 } |
| 475 | }, |
| 476 | /* xor Rx,#$imm8 */ |
| 477 | { |
| 478 | { 0, 0, 0, 0 }, |
| 479 | { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } }, |
| 480 | & ifmt_movwimm8, { 0x4500 } |
| 481 | }, |
| 482 | /* xor $Rd,#$imm16 */ |
| 483 | { |
| 484 | { 0, 0, 0, 0 }, |
| 485 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, |
| 486 | & ifmt_movwgrimm16, { 0x31200000 } |
| 487 | }, |
| 488 | /* not $Rd */ |
| 489 | { |
| 490 | { 0, 0, 0, 0 }, |
| 491 | { { MNEM, ' ', OP (RD), 0 } }, |
| 492 | & ifmt_movlowgr, { 0x30b0 } |
| 493 | }, |
| 494 | /* add $Rd,$Rs */ |
| 495 | { |
| 496 | { 0, 0, 0, 0 }, |
| 497 | { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } }, |
| 498 | & ifmt_movgrgr, { 0x4900 } |
| 499 | }, |
| 500 | /* add $Rd,#$imm4 */ |
| 501 | { |
| 502 | { 0, 0, 0, 0 }, |
| 503 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } }, |
| 504 | & ifmt_addgrimm4, { 0x5100 } |
| 505 | }, |
| 506 | /* add Rx,#$imm8 */ |
| 507 | { |
| 508 | { 0, 0, 0, 0 }, |
| 509 | { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } }, |
| 510 | & ifmt_movwimm8, { 0x5900 } |
| 511 | }, |
| 512 | /* add $Rd,#$imm16 */ |
| 513 | { |
| 514 | { 0, 0, 0, 0 }, |
| 515 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, |
| 516 | & ifmt_movwgrimm16, { 0x31400000 } |
| 517 | }, |
| 518 | /* adc $Rd,$Rs */ |
| 519 | { |
| 520 | { 0, 0, 0, 0 }, |
| 521 | { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } }, |
| 522 | & ifmt_movgrgr, { 0x4b00 } |
| 523 | }, |
| 524 | /* adc $Rd,#$imm4 */ |
| 525 | { |
| 526 | { 0, 0, 0, 0 }, |
| 527 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } }, |
| 528 | & ifmt_addgrimm4, { 0x5300 } |
| 529 | }, |
| 530 | /* adc Rx,#$imm8 */ |
| 531 | { |
| 532 | { 0, 0, 0, 0 }, |
| 533 | { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } }, |
| 534 | & ifmt_movwimm8, { 0x5b00 } |
| 535 | }, |
| 536 | /* adc $Rd,#$imm16 */ |
| 537 | { |
| 538 | { 0, 0, 0, 0 }, |
| 539 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, |
| 540 | & ifmt_movwgrimm16, { 0x31500000 } |
| 541 | }, |
| 542 | /* sub $Rd,$Rs */ |
| 543 | { |
| 544 | { 0, 0, 0, 0 }, |
| 545 | { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } }, |
| 546 | & ifmt_movgrgr, { 0x4d00 } |
| 547 | }, |
| 548 | /* sub $Rd,#$imm4 */ |
| 549 | { |
| 550 | { 0, 0, 0, 0 }, |
| 551 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } }, |
| 552 | & ifmt_addgrimm4, { 0x5500 } |
| 553 | }, |
| 554 | /* sub Rx,#$imm8 */ |
| 555 | { |
| 556 | { 0, 0, 0, 0 }, |
| 557 | { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } }, |
| 558 | & ifmt_movwimm8, { 0x5d00 } |
| 559 | }, |
| 560 | /* sub $Rd,#$imm16 */ |
| 561 | { |
| 562 | { 0, 0, 0, 0 }, |
| 563 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, |
| 564 | & ifmt_movwgrimm16, { 0x31600000 } |
| 565 | }, |
| 566 | /* sbc $Rd,$Rs */ |
| 567 | { |
| 568 | { 0, 0, 0, 0 }, |
| 569 | { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } }, |
| 570 | & ifmt_movgrgr, { 0x4f00 } |
| 571 | }, |
| 572 | /* sbc $Rd,#$imm4 */ |
| 573 | { |
| 574 | { 0, 0, 0, 0 }, |
| 575 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } }, |
| 576 | & ifmt_addgrimm4, { 0x5700 } |
| 577 | }, |
| 578 | /* sbc Rx,#$imm8 */ |
| 579 | { |
| 580 | { 0, 0, 0, 0 }, |
| 581 | { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } }, |
| 582 | & ifmt_movwimm8, { 0x5f00 } |
| 583 | }, |
| 584 | /* sbc $Rd,#$imm16 */ |
| 585 | { |
| 586 | { 0, 0, 0, 0 }, |
| 587 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, |
| 588 | & ifmt_movwgrimm16, { 0x31700000 } |
| 589 | }, |
| 590 | /* inc $Rd,#$imm2 */ |
| 591 | { |
| 592 | { 0, 0, 0, 0 }, |
| 593 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM2), 0 } }, |
| 594 | & ifmt_incgrimm2, { 0x3000 } |
| 595 | }, |
| 596 | /* dec $Rd,#$imm2 */ |
| 597 | { |
| 598 | { 0, 0, 0, 0 }, |
| 599 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM2), 0 } }, |
| 600 | & ifmt_incgrimm2, { 0x3040 } |
| 601 | }, |
| 602 | /* rrc $Rd,$Rs */ |
| 603 | { |
| 604 | { 0, 0, 0, 0 }, |
| 605 | { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } }, |
| 606 | & ifmt_movgrgr, { 0x3800 } |
| 607 | }, |
| 608 | /* rrc $Rd,#$imm4 */ |
| 609 | { |
| 610 | { 0, 0, 0, 0 }, |
| 611 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } }, |
| 612 | & ifmt_addgrimm4, { 0x3900 } |
| 613 | }, |
| 614 | /* rlc $Rd,$Rs */ |
| 615 | { |
| 616 | { 0, 0, 0, 0 }, |
| 617 | { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } }, |
| 618 | & ifmt_movgrgr, { 0x3a00 } |
| 619 | }, |
| 620 | /* rlc $Rd,#$imm4 */ |
| 621 | { |
| 622 | { 0, 0, 0, 0 }, |
| 623 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } }, |
| 624 | & ifmt_addgrimm4, { 0x3b00 } |
| 625 | }, |
| 626 | /* shr $Rd,$Rs */ |
| 627 | { |
| 628 | { 0, 0, 0, 0 }, |
| 629 | { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } }, |
| 630 | & ifmt_movgrgr, { 0x3c00 } |
| 631 | }, |
| 632 | /* shr $Rd,#$imm4 */ |
| 633 | { |
| 634 | { 0, 0, 0, 0 }, |
| 635 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } }, |
| 636 | & ifmt_addgrimm4, { 0x3d00 } |
| 637 | }, |
| 638 | /* shl $Rd,$Rs */ |
| 639 | { |
| 640 | { 0, 0, 0, 0 }, |
| 641 | { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } }, |
| 642 | & ifmt_movgrgr, { 0x3e00 } |
| 643 | }, |
| 644 | /* shl $Rd,#$imm4 */ |
| 645 | { |
| 646 | { 0, 0, 0, 0 }, |
| 647 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } }, |
| 648 | & ifmt_addgrimm4, { 0x3f00 } |
| 649 | }, |
| 650 | /* asr $Rd,$Rs */ |
| 651 | { |
| 652 | { 0, 0, 0, 0 }, |
| 653 | { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } }, |
| 654 | & ifmt_movgrgr, { 0x3600 } |
| 655 | }, |
| 656 | /* asr $Rd,#$imm4 */ |
| 657 | { |
| 658 | { 0, 0, 0, 0 }, |
| 659 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } }, |
| 660 | & ifmt_addgrimm4, { 0x3700 } |
| 661 | }, |
| 662 | /* set1 $Rd,#$imm4 */ |
| 663 | { |
| 664 | { 0, 0, 0, 0 }, |
| 665 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } }, |
| 666 | & ifmt_addgrimm4, { 0x900 } |
| 667 | }, |
| 668 | /* set1 $Rd,$Rs */ |
| 669 | { |
| 670 | { 0, 0, 0, 0 }, |
| 671 | { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } }, |
| 672 | & ifmt_movgrgr, { 0xb00 } |
| 673 | }, |
| 674 | /* set1 $lmem8,#$imm3 */ |
| 675 | { |
| 676 | { 0, 0, 0, 0 }, |
| 677 | { { MNEM, ' ', OP (LMEM8), ',', '#', OP (IMM3), 0 } }, |
| 678 | & ifmt_set1lmemimm, { 0xe100 } |
| 679 | }, |
| 680 | /* set1 $hmem8,#$imm3 */ |
| 681 | { |
| 682 | { 0, 0, 0, 0 }, |
| 683 | { { MNEM, ' ', OP (HMEM8), ',', '#', OP (IMM3), 0 } }, |
| 684 | & ifmt_set1hmemimm, { 0xf100 } |
| 685 | }, |
| 686 | /* clr1 $Rd,#$imm4 */ |
| 687 | { |
| 688 | { 0, 0, 0, 0 }, |
| 689 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } }, |
| 690 | & ifmt_addgrimm4, { 0x800 } |
| 691 | }, |
| 692 | /* clr1 $Rd,$Rs */ |
| 693 | { |
| 694 | { 0, 0, 0, 0 }, |
| 695 | { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } }, |
| 696 | & ifmt_movgrgr, { 0xa00 } |
| 697 | }, |
| 698 | /* clr1 $lmem8,#$imm3 */ |
| 699 | { |
| 700 | { 0, 0, 0, 0 }, |
| 701 | { { MNEM, ' ', OP (LMEM8), ',', '#', OP (IMM3), 0 } }, |
| 702 | & ifmt_set1lmemimm, { 0xe000 } |
| 703 | }, |
| 704 | /* clr1 $hmem8,#$imm3 */ |
| 705 | { |
| 706 | { 0, 0, 0, 0 }, |
| 707 | { { MNEM, ' ', OP (HMEM8), ',', '#', OP (IMM3), 0 } }, |
| 708 | & ifmt_set1hmemimm, { 0xf000 } |
| 709 | }, |
| 710 | /* cbw $Rd */ |
| 711 | { |
| 712 | { 0, 0, 0, 0 }, |
| 713 | { { MNEM, ' ', OP (RD), 0 } }, |
| 714 | & ifmt_movlowgr, { 0x30a0 } |
| 715 | }, |
| 716 | /* rev $Rd */ |
| 717 | { |
| 718 | { 0, 0, 0, 0 }, |
| 719 | { { MNEM, ' ', OP (RD), 0 } }, |
| 720 | & ifmt_movlowgr, { 0x30f0 } |
| 721 | }, |
| 722 | /* b$bcond5 $Rd,$Rs,$rel12 */ |
| 723 | { |
| 724 | { 0, 0, 0, 0 }, |
| 725 | { { MNEM, OP (BCOND5), ' ', OP (RD), ',', OP (RS), ',', OP (REL12), 0 } }, |
| 726 | & ifmt_bccgrgr, { 0xd000000 } |
| 727 | }, |
| 728 | /* b$bcond5 $Rm,#$imm8,$rel12 */ |
| 729 | { |
| 730 | { 0, 0, 0, 0 }, |
| 731 | { { MNEM, OP (BCOND5), ' ', OP (RM), ',', '#', OP (IMM8), ',', OP (REL12), 0 } }, |
| 732 | & ifmt_bccgrimm8, { 0x20000000 } |
| 733 | }, |
| 734 | /* b$bcond2 Rx,#$imm16,${rel8-4} */ |
| 735 | { |
| 736 | { 0, 0, 0, 0 }, |
| 737 | { { MNEM, OP (BCOND2), ' ', 'R', 'x', ',', '#', OP (IMM16), ',', OP (REL8_4), 0 } }, |
| 738 | & ifmt_bccimm16, { 0xc0000000 } |
| 739 | }, |
| 740 | /* bn $Rd,#$imm4,$rel12 */ |
| 741 | { |
| 742 | { 0, 0, 0, 0 }, |
| 743 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), ',', OP (REL12), 0 } }, |
| 744 | & ifmt_bngrimm4, { 0x4000000 } |
| 745 | }, |
| 746 | /* bn $Rd,$Rs,$rel12 */ |
| 747 | { |
| 748 | { 0, 0, 0, 0 }, |
| 749 | { { MNEM, ' ', OP (RD), ',', OP (RS), ',', OP (REL12), 0 } }, |
| 750 | & ifmt_bngrgr, { 0x6000000 } |
| 751 | }, |
| 752 | /* bn $lmem8,#$imm3b,$rel12 */ |
| 753 | { |
| 754 | { 0, 0, 0, 0 }, |
| 755 | { { MNEM, ' ', OP (LMEM8), ',', '#', OP (IMM3B), ',', OP (REL12), 0 } }, |
| 756 | & ifmt_bnlmemimm, { 0x7c000000 } |
| 757 | }, |
| 758 | /* bn $hmem8,#$imm3b,$rel12 */ |
| 759 | { |
| 760 | { 0, 0, 0, 0 }, |
| 761 | { { MNEM, ' ', OP (HMEM8), ',', '#', OP (IMM3B), ',', OP (REL12), 0 } }, |
| 762 | & ifmt_bnhmemimm, { 0x7e000000 } |
| 763 | }, |
| 764 | /* bp $Rd,#$imm4,$rel12 */ |
| 765 | { |
| 766 | { 0, 0, 0, 0 }, |
| 767 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), ',', OP (REL12), 0 } }, |
| 768 | & ifmt_bngrimm4, { 0x5000000 } |
| 769 | }, |
| 770 | /* bp $Rd,$Rs,$rel12 */ |
| 771 | { |
| 772 | { 0, 0, 0, 0 }, |
| 773 | { { MNEM, ' ', OP (RD), ',', OP (RS), ',', OP (REL12), 0 } }, |
| 774 | & ifmt_bngrgr, { 0x7000000 } |
| 775 | }, |
| 776 | /* bp $lmem8,#$imm3b,$rel12 */ |
| 777 | { |
| 778 | { 0, 0, 0, 0 }, |
| 779 | { { MNEM, ' ', OP (LMEM8), ',', '#', OP (IMM3B), ',', OP (REL12), 0 } }, |
| 780 | & ifmt_bnlmemimm, { 0x7d000000 } |
| 781 | }, |
| 782 | /* bp $hmem8,#$imm3b,$rel12 */ |
| 783 | { |
| 784 | { 0, 0, 0, 0 }, |
| 785 | { { MNEM, ' ', OP (HMEM8), ',', '#', OP (IMM3B), ',', OP (REL12), 0 } }, |
| 786 | & ifmt_bnhmemimm, { 0x7f000000 } |
| 787 | }, |
| 788 | /* b$bcond2 ${rel8-2} */ |
| 789 | { |
| 790 | { 0, 0, 0, 0 }, |
| 791 | { { MNEM, OP (BCOND2), ' ', OP (REL8_2), 0 } }, |
| 792 | & ifmt_bcc, { 0xd000 } |
| 793 | }, |
| 794 | /* br $Rd */ |
| 795 | { |
| 796 | { 0, 0, 0, 0 }, |
| 797 | { { MNEM, ' ', OP (RD), 0 } }, |
| 798 | & ifmt_movlowgr, { 0x20 } |
| 799 | }, |
| 800 | /* br $rel12a */ |
| 801 | { |
| 802 | { 0, 0, 0, 0 }, |
| 803 | { { MNEM, ' ', OP (REL12A), 0 } }, |
| 804 | & ifmt_br, { 0x1000 } |
| 805 | }, |
| 806 | /* jmp $Rbj,$Rd */ |
| 807 | { |
| 808 | { 0, 0, 0, 0 }, |
| 809 | { { MNEM, ' ', OP (RBJ), ',', OP (RD), 0 } }, |
| 810 | & ifmt_jmp, { 0x40 } |
| 811 | }, |
| 812 | /* jmpf $abs24 */ |
| 813 | { |
| 814 | { 0, 0, 0, 0 }, |
| 815 | { { MNEM, ' ', OP (ABS24), 0 } }, |
| 816 | & ifmt_jmpf, { 0x2000000 } |
| 817 | }, |
| 818 | /* callr $Rd */ |
| 819 | { |
| 820 | { 0, 0, 0, 0 }, |
| 821 | { { MNEM, ' ', OP (RD), 0 } }, |
| 822 | & ifmt_movlowgr, { 0x10 } |
| 823 | }, |
| 824 | /* callr $rel12a */ |
| 825 | { |
| 826 | { 0, 0, 0, 0 }, |
| 827 | { { MNEM, ' ', OP (REL12A), 0 } }, |
| 828 | & ifmt_br, { 0x1001 } |
| 829 | }, |
| 830 | /* call $Rbj,$Rd */ |
| 831 | { |
| 832 | { 0, 0, 0, 0 }, |
| 833 | { { MNEM, ' ', OP (RBJ), ',', OP (RD), 0 } }, |
| 834 | & ifmt_jmp, { 0xa0 } |
| 835 | }, |
| 836 | /* callf $abs24 */ |
| 837 | { |
| 838 | { 0, 0, 0, 0 }, |
| 839 | { { MNEM, ' ', OP (ABS24), 0 } }, |
| 840 | & ifmt_jmpf, { 0x1000000 } |
| 841 | }, |
| 842 | /* icallr $Rd */ |
| 843 | { |
| 844 | { 0, 0, 0, 0 }, |
| 845 | { { MNEM, ' ', OP (RD), 0 } }, |
| 846 | & ifmt_movlowgr, { 0x30 } |
| 847 | }, |
| 848 | /* icall $Rbj,$Rd */ |
| 849 | { |
| 850 | { 0, 0, 0, 0 }, |
| 851 | { { MNEM, ' ', OP (RBJ), ',', OP (RD), 0 } }, |
| 852 | & ifmt_jmp, { 0x60 } |
| 853 | }, |
| 854 | /* icallf $abs24 */ |
| 855 | { |
| 856 | { 0, 0, 0, 0 }, |
| 857 | { { MNEM, ' ', OP (ABS24), 0 } }, |
| 858 | & ifmt_jmpf, { 0x3000000 } |
| 859 | }, |
| 860 | /* iret */ |
| 861 | { |
| 862 | { 0, 0, 0, 0 }, |
| 863 | { { MNEM, 0 } }, |
| 864 | & ifmt_iret, { 0x2 } |
| 865 | }, |
| 866 | /* ret */ |
| 867 | { |
| 868 | { 0, 0, 0, 0 }, |
| 869 | { { MNEM, 0 } }, |
| 870 | & ifmt_iret, { 0x3 } |
| 871 | }, |
| 872 | /* mul */ |
| 873 | { |
| 874 | { 0, 0, 0, 0 }, |
| 875 | { { MNEM, 0 } }, |
| 876 | & ifmt_iret, { 0xd0 } |
| 877 | }, |
| 878 | /* div */ |
| 879 | { |
| 880 | { 0, 0, 0, 0 }, |
| 881 | { { MNEM, 0 } }, |
| 882 | & ifmt_iret, { 0xc0 } |
| 883 | }, |
| 884 | /* sdiv */ |
| 885 | { |
| 886 | { 0, 0, 0, 0 }, |
| 887 | { { MNEM, 0 } }, |
| 888 | & ifmt_iret, { 0xc8 } |
| 889 | }, |
| 890 | /* sdivlh */ |
| 891 | { |
| 892 | { 0, 0, 0, 0 }, |
| 893 | { { MNEM, 0 } }, |
| 894 | & ifmt_iret, { 0xe8 } |
| 895 | }, |
| 896 | /* divlh */ |
| 897 | { |
| 898 | { 0, 0, 0, 0 }, |
| 899 | { { MNEM, 0 } }, |
| 900 | & ifmt_iret, { 0xe0 } |
| 901 | }, |
| 902 | /* reset */ |
| 903 | { |
| 904 | { 0, 0, 0, 0 }, |
| 905 | { { MNEM, 0 } }, |
| 906 | & ifmt_iret, { 0xf } |
| 907 | }, |
| 908 | /* nop */ |
| 909 | { |
| 910 | { 0, 0, 0, 0 }, |
| 911 | { { MNEM, 0 } }, |
| 912 | & ifmt_iret, { 0x0 } |
| 913 | }, |
| 914 | /* halt */ |
| 915 | { |
| 916 | { 0, 0, 0, 0 }, |
| 917 | { { MNEM, 0 } }, |
| 918 | & ifmt_iret, { 0x8 } |
| 919 | }, |
| 920 | /* hold */ |
| 921 | { |
| 922 | { 0, 0, 0, 0 }, |
| 923 | { { MNEM, 0 } }, |
| 924 | & ifmt_iret, { 0xa } |
| 925 | }, |
| 926 | /* holdx */ |
| 927 | { |
| 928 | { 0, 0, 0, 0 }, |
| 929 | { { MNEM, 0 } }, |
| 930 | & ifmt_iret, { 0xb } |
| 931 | }, |
| 932 | /* brk */ |
| 933 | { |
| 934 | { 0, 0, 0, 0 }, |
| 935 | { { MNEM, 0 } }, |
| 936 | & ifmt_iret, { 0x5 } |
| 937 | }, |
| 938 | /* --unused-- */ |
| 939 | { |
| 940 | { 0, 0, 0, 0 }, |
| 941 | { { MNEM, 0 } }, |
| 942 | & ifmt_iret, { 0x1 } |
| 943 | }, |
| 944 | }; |
| 945 | |
| 946 | #undef A |
| 947 | #undef OPERAND |
| 948 | #undef MNEM |
| 949 | #undef OP |
| 950 | |
| 951 | /* Formats for ALIAS macro-insns. */ |
| 952 | |
| 953 | #define F(f) & xstormy16_cgen_ifld_table[XSTORMY16_##f] |
| 954 | static const CGEN_IFMT ifmt_movimm8 ATTRIBUTE_UNUSED = { |
| 955 | 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_IMM8) }, { 0 } } |
| 956 | }; |
| 957 | |
| 958 | static const CGEN_IFMT ifmt_movgrimm8 ATTRIBUTE_UNUSED = { |
| 959 | 16, 16, 0xf100, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_IMM8) }, { 0 } } |
| 960 | }; |
| 961 | |
| 962 | static const CGEN_IFMT ifmt_movgrimm16 ATTRIBUTE_UNUSED = { |
| 963 | 32, 32, 0xfff00000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RD) }, { F (F_IMM16) }, { 0 } } |
| 964 | }; |
| 965 | |
| 966 | static const CGEN_IFMT ifmt_incgr ATTRIBUTE_UNUSED = { |
| 967 | 16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3A) }, { F (F_IMM2) }, { F (F_RD) }, { 0 } } |
| 968 | }; |
| 969 | |
| 970 | static const CGEN_IFMT ifmt_decgr ATTRIBUTE_UNUSED = { |
| 971 | 16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3A) }, { F (F_IMM2) }, { F (F_RD) }, { 0 } } |
| 972 | }; |
| 973 | |
| 974 | #undef F |
| 975 | |
| 976 | /* Each non-simple macro entry points to an array of expansion possibilities. */ |
| 977 | |
| 978 | #define A(a) (1 << CGEN_INSN_##a) |
| 979 | #define OPERAND(op) XSTORMY16_OPERAND_##op |
| 980 | #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */ |
| 981 | #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field)) |
| 982 | |
| 983 | /* The macro instruction table. */ |
| 984 | |
| 985 | static const CGEN_IBASE xstormy16_cgen_macro_insn_table[] = |
| 986 | { |
| 987 | /* mov Rx,#$imm8 */ |
| 988 | { |
| 989 | -1, "movimm8", "mov", 16, |
| 990 | { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } } |
| 991 | }, |
| 992 | /* mov $Rm,#$imm8small */ |
| 993 | { |
| 994 | -1, "movgrimm8", "mov", 16, |
| 995 | { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } } |
| 996 | }, |
| 997 | /* mov $Rd,#$imm16 */ |
| 998 | { |
| 999 | -1, "movgrimm16", "mov", 32, |
| 1000 | { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } } |
| 1001 | }, |
| 1002 | /* inc $Rd */ |
| 1003 | { |
| 1004 | -1, "incgr", "inc", 16, |
| 1005 | { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } } |
| 1006 | }, |
| 1007 | /* dec $Rd */ |
| 1008 | { |
| 1009 | -1, "decgr", "dec", 16, |
| 1010 | { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } } |
| 1011 | }, |
| 1012 | }; |
| 1013 | |
| 1014 | /* The macro instruction opcode table. */ |
| 1015 | |
| 1016 | static const CGEN_OPCODE xstormy16_cgen_macro_insn_opcode_table[] = |
| 1017 | { |
| 1018 | /* mov Rx,#$imm8 */ |
| 1019 | { |
| 1020 | { 0, 0, 0, 0 }, |
| 1021 | { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } }, |
| 1022 | & ifmt_movimm8, { 0x4700 } |
| 1023 | }, |
| 1024 | /* mov $Rm,#$imm8small */ |
| 1025 | { |
| 1026 | { 0, 0, 0, 0 }, |
| 1027 | { { MNEM, ' ', OP (RM), ',', '#', OP (IMM8SMALL), 0 } }, |
| 1028 | & ifmt_movgrimm8, { 0x2100 } |
| 1029 | }, |
| 1030 | /* mov $Rd,#$imm16 */ |
| 1031 | { |
| 1032 | { 0, 0, 0, 0 }, |
| 1033 | { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, |
| 1034 | & ifmt_movgrimm16, { 0x31300000 } |
| 1035 | }, |
| 1036 | /* inc $Rd */ |
| 1037 | { |
| 1038 | { 0, 0, 0, 0 }, |
| 1039 | { { MNEM, ' ', OP (RD), 0 } }, |
| 1040 | & ifmt_incgr, { 0x3000 } |
| 1041 | }, |
| 1042 | /* dec $Rd */ |
| 1043 | { |
| 1044 | { 0, 0, 0, 0 }, |
| 1045 | { { MNEM, ' ', OP (RD), 0 } }, |
| 1046 | & ifmt_decgr, { 0x3040 } |
| 1047 | }, |
| 1048 | }; |
| 1049 | |
| 1050 | #undef A |
| 1051 | #undef OPERAND |
| 1052 | #undef MNEM |
| 1053 | #undef OP |
| 1054 | |
| 1055 | #ifndef CGEN_ASM_HASH_P |
| 1056 | #define CGEN_ASM_HASH_P(insn) 1 |
| 1057 | #endif |
| 1058 | |
| 1059 | #ifndef CGEN_DIS_HASH_P |
| 1060 | #define CGEN_DIS_HASH_P(insn) 1 |
| 1061 | #endif |
| 1062 | |
| 1063 | /* Return non-zero if INSN is to be added to the hash table. |
| 1064 | Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */ |
| 1065 | |
| 1066 | static int |
| 1067 | asm_hash_insn_p (const CGEN_INSN *insn ATTRIBUTE_UNUSED) |
| 1068 | { |
| 1069 | return CGEN_ASM_HASH_P (insn); |
| 1070 | } |
| 1071 | |
| 1072 | static int |
| 1073 | dis_hash_insn_p (const CGEN_INSN *insn) |
| 1074 | { |
| 1075 | /* If building the hash table and the NO-DIS attribute is present, |
| 1076 | ignore. */ |
| 1077 | if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS)) |
| 1078 | return 0; |
| 1079 | return CGEN_DIS_HASH_P (insn); |
| 1080 | } |
| 1081 | |
| 1082 | #ifndef CGEN_ASM_HASH |
| 1083 | #define CGEN_ASM_HASH_SIZE 127 |
| 1084 | #ifdef CGEN_MNEMONIC_OPERANDS |
| 1085 | #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) |
| 1086 | #else |
| 1087 | #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/ |
| 1088 | #endif |
| 1089 | #endif |
| 1090 | |
| 1091 | /* It doesn't make much sense to provide a default here, |
| 1092 | but while this is under development we do. |
| 1093 | BUFFER is a pointer to the bytes of the insn, target order. |
| 1094 | VALUE is the first base_insn_bitsize bits as an int in host order. */ |
| 1095 | |
| 1096 | #ifndef CGEN_DIS_HASH |
| 1097 | #define CGEN_DIS_HASH_SIZE 256 |
| 1098 | #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf)) |
| 1099 | #endif |
| 1100 | |
| 1101 | /* The result is the hash value of the insn. |
| 1102 | Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */ |
| 1103 | |
| 1104 | static unsigned int |
| 1105 | asm_hash_insn (const char *mnem) |
| 1106 | { |
| 1107 | return CGEN_ASM_HASH (mnem); |
| 1108 | } |
| 1109 | |
| 1110 | /* BUF is a pointer to the bytes of the insn, target order. |
| 1111 | VALUE is the first base_insn_bitsize bits as an int in host order. */ |
| 1112 | |
| 1113 | static unsigned int |
| 1114 | dis_hash_insn (const char *buf ATTRIBUTE_UNUSED, |
| 1115 | CGEN_INSN_INT value ATTRIBUTE_UNUSED) |
| 1116 | { |
| 1117 | return CGEN_DIS_HASH (buf, value); |
| 1118 | } |
| 1119 | |
| 1120 | /* Set the recorded length of the insn in the CGEN_FIELDS struct. */ |
| 1121 | |
| 1122 | static void |
| 1123 | set_fields_bitsize (CGEN_FIELDS *fields, int size) |
| 1124 | { |
| 1125 | CGEN_FIELDS_BITSIZE (fields) = size; |
| 1126 | } |
| 1127 | |
| 1128 | /* Function to call before using the operand instance table. |
| 1129 | This plugs the opcode entries and macro instructions into the cpu table. */ |
| 1130 | |
| 1131 | void |
| 1132 | xstormy16_cgen_init_opcode_table (CGEN_CPU_DESC cd) |
| 1133 | { |
| 1134 | int i; |
| 1135 | int num_macros = (sizeof (xstormy16_cgen_macro_insn_table) / |
| 1136 | sizeof (xstormy16_cgen_macro_insn_table[0])); |
| 1137 | const CGEN_IBASE *ib = & xstormy16_cgen_macro_insn_table[0]; |
| 1138 | const CGEN_OPCODE *oc = & xstormy16_cgen_macro_insn_opcode_table[0]; |
| 1139 | CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN)); |
| 1140 | |
| 1141 | /* This test has been added to avoid a warning generated |
| 1142 | if memset is called with a third argument of value zero. */ |
| 1143 | if (num_macros >= 1) |
| 1144 | memset (insns, 0, num_macros * sizeof (CGEN_INSN)); |
| 1145 | for (i = 0; i < num_macros; ++i) |
| 1146 | { |
| 1147 | insns[i].base = &ib[i]; |
| 1148 | insns[i].opcode = &oc[i]; |
| 1149 | xstormy16_cgen_build_insn_regex (& insns[i]); |
| 1150 | } |
| 1151 | cd->macro_insn_table.init_entries = insns; |
| 1152 | cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE); |
| 1153 | cd->macro_insn_table.num_init_entries = num_macros; |
| 1154 | |
| 1155 | oc = & xstormy16_cgen_insn_opcode_table[0]; |
| 1156 | insns = (CGEN_INSN *) cd->insn_table.init_entries; |
| 1157 | for (i = 0; i < MAX_INSNS; ++i) |
| 1158 | { |
| 1159 | insns[i].opcode = &oc[i]; |
| 1160 | xstormy16_cgen_build_insn_regex (& insns[i]); |
| 1161 | } |
| 1162 | |
| 1163 | cd->sizeof_fields = sizeof (CGEN_FIELDS); |
| 1164 | cd->set_fields_bitsize = set_fields_bitsize; |
| 1165 | |
| 1166 | cd->asm_hash_p = asm_hash_insn_p; |
| 1167 | cd->asm_hash = asm_hash_insn; |
| 1168 | cd->asm_hash_size = CGEN_ASM_HASH_SIZE; |
| 1169 | |
| 1170 | cd->dis_hash_p = dis_hash_insn_p; |
| 1171 | cd->dis_hash = dis_hash_insn; |
| 1172 | cd->dis_hash_size = CGEN_DIS_HASH_SIZE; |
| 1173 | } |