| 1 | /* sim-main.h -- Interface with sim/common. |
| 2 | |
| 3 | Copyright (C) 2015-2020 Free Software Foundation, Inc. |
| 4 | |
| 5 | Contributed by Red Hat. |
| 6 | |
| 7 | This file is part of GDB. |
| 8 | |
| 9 | This program is free software; you can redistribute it and/or modify |
| 10 | it under the terms of the GNU General Public License as published by |
| 11 | the Free Software Foundation; either version 3 of the License, or |
| 12 | (at your option) any later version. |
| 13 | |
| 14 | This program is distributed in the hope that it will be useful, |
| 15 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | GNU General Public License for more details. |
| 18 | |
| 19 | You should have received a copy of the GNU General Public License |
| 20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 21 | |
| 22 | #ifndef _SIM_MAIN_H |
| 23 | #define _SIM_MAIN_H |
| 24 | |
| 25 | #include "sim-basics.h" |
| 26 | #include "sim-types.h" |
| 27 | #include "sim-base.h" |
| 28 | #include "sim-base.h" |
| 29 | #include "sim-io.h" |
| 30 | #include "cpustate.h" |
| 31 | |
| 32 | /* A per-core state structure. */ |
| 33 | struct _sim_cpu |
| 34 | { |
| 35 | GRegister gr[33]; /* Extra register at index 32 is used to hold zero value. */ |
| 36 | FRegister fr[32]; |
| 37 | |
| 38 | uint64_t pc; |
| 39 | uint32_t CPSR; |
| 40 | uint32_t FPSR; /* Floating point Status register. */ |
| 41 | uint32_t FPCR; /* Floating point Control register. */ |
| 42 | |
| 43 | uint64_t nextpc; |
| 44 | uint32_t instr; |
| 45 | |
| 46 | uint64_t tpidr; /* Thread pointer id. */ |
| 47 | |
| 48 | sim_cpu_base base; |
| 49 | }; |
| 50 | |
| 51 | typedef enum |
| 52 | { |
| 53 | AARCH64_MIN_GR = 0, |
| 54 | AARCH64_MAX_GR = 31, |
| 55 | AARCH64_MIN_FR = 32, |
| 56 | AARCH64_MAX_FR = 63, |
| 57 | AARCH64_PC_REGNO = 64, |
| 58 | AARCH64_CPSR_REGNO = 65, |
| 59 | AARCH64_FPSR_REGNO = 66, |
| 60 | AARCH64_MAX_REGNO = 67 |
| 61 | } aarch64_regno; |
| 62 | |
| 63 | /* The simulator state structure used to hold all global variables. */ |
| 64 | struct sim_state |
| 65 | { |
| 66 | sim_cpu * cpu[MAX_NR_PROCESSORS]; |
| 67 | sim_state_base base; |
| 68 | }; |
| 69 | |
| 70 | #endif /* _SIM_MAIN_H */ |