| 1 | /* Blackfin External Bus Interface Unit (EBIU) SDRAM Controller (SDC) Model. |
| 2 | |
| 3 | Copyright (C) 2010-2011 Free Software Foundation, Inc. |
| 4 | Contributed by Analog Devices, Inc. |
| 5 | |
| 6 | This file is part of simulators. |
| 7 | |
| 8 | This program is free software; you can redistribute it and/or modify |
| 9 | it under the terms of the GNU General Public License as published by |
| 10 | the Free Software Foundation; either version 3 of the License, or |
| 11 | (at your option) any later version. |
| 12 | |
| 13 | This program is distributed in the hope that it will be useful, |
| 14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | GNU General Public License for more details. |
| 17 | |
| 18 | You should have received a copy of the GNU General Public License |
| 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 20 | |
| 21 | #include "config.h" |
| 22 | |
| 23 | #include "sim-main.h" |
| 24 | #include "devices.h" |
| 25 | #include "dv-bfin_ebiu_sdc.h" |
| 26 | |
| 27 | struct bfin_ebiu_sdc |
| 28 | { |
| 29 | bu32 base; |
| 30 | int type; |
| 31 | bu32 reg_size, bank_size; |
| 32 | |
| 33 | /* Order after here is important -- matches hardware MMR layout. */ |
| 34 | bu32 sdgctl; |
| 35 | bu32 sdbctl; /* 16bit on most parts ... */ |
| 36 | bu16 BFIN_MMR_16(sdrrc); |
| 37 | bu16 BFIN_MMR_16(sdstat); |
| 38 | }; |
| 39 | #define mmr_base() offsetof(struct bfin_ebiu_sdc, sdgctl) |
| 40 | #define mmr_offset(mmr) (offsetof(struct bfin_ebiu_sdc, mmr) - mmr_base()) |
| 41 | |
| 42 | static const char * const mmr_names[] = { |
| 43 | "EBIU_SDGCTL", "EBIU_SDBCTL", "EBIU_SDRRC", "EBIU_SDSTAT", |
| 44 | }; |
| 45 | #define mmr_name(off) mmr_names[(off) / 4] |
| 46 | |
| 47 | static unsigned |
| 48 | bfin_ebiu_sdc_io_write_buffer (struct hw *me, const void *source, |
| 49 | int space, address_word addr, unsigned nr_bytes) |
| 50 | { |
| 51 | struct bfin_ebiu_sdc *sdc = hw_data (me); |
| 52 | bu32 mmr_off; |
| 53 | bu32 value; |
| 54 | bu16 *value16p; |
| 55 | bu32 *value32p; |
| 56 | void *valuep; |
| 57 | |
| 58 | if (nr_bytes == 4) |
| 59 | value = dv_load_4 (source); |
| 60 | else |
| 61 | value = dv_load_2 (source); |
| 62 | |
| 63 | mmr_off = addr - sdc->base; |
| 64 | valuep = (void *)((unsigned long)sdc + mmr_base() + mmr_off); |
| 65 | value16p = valuep; |
| 66 | value32p = valuep; |
| 67 | |
| 68 | HW_TRACE_WRITE (); |
| 69 | |
| 70 | switch (mmr_off) |
| 71 | { |
| 72 | case mmr_offset(sdgctl): |
| 73 | /* XXX: SRFS should make external mem unreadable. */ |
| 74 | *value32p = value; |
| 75 | break; |
| 76 | case mmr_offset(sdbctl): |
| 77 | if (sdc->type == 561) |
| 78 | { |
| 79 | dv_bfin_mmr_require_32 (me, addr, nr_bytes, true); |
| 80 | *value32p = value; |
| 81 | } |
| 82 | else |
| 83 | { |
| 84 | dv_bfin_mmr_require_16 (me, addr, nr_bytes, true); |
| 85 | *value16p = value; |
| 86 | } |
| 87 | break; |
| 88 | case mmr_offset(sdrrc): |
| 89 | dv_bfin_mmr_require_16 (me, addr, nr_bytes, true); |
| 90 | *value16p = value; |
| 91 | break; |
| 92 | case mmr_offset(sdstat): |
| 93 | dv_bfin_mmr_require_16 (me, addr, nr_bytes, true); |
| 94 | /* XXX: Some bits are W1C ... */ |
| 95 | break; |
| 96 | } |
| 97 | |
| 98 | return nr_bytes; |
| 99 | } |
| 100 | |
| 101 | static unsigned |
| 102 | bfin_ebiu_sdc_io_read_buffer (struct hw *me, void *dest, |
| 103 | int space, address_word addr, unsigned nr_bytes) |
| 104 | { |
| 105 | struct bfin_ebiu_sdc *sdc = hw_data (me); |
| 106 | bu32 mmr_off; |
| 107 | bu32 *value32p; |
| 108 | bu16 *value16p; |
| 109 | void *valuep; |
| 110 | |
| 111 | mmr_off = addr - sdc->base; |
| 112 | valuep = (void *)((unsigned long)sdc + mmr_base() + mmr_off); |
| 113 | value16p = valuep; |
| 114 | value32p = valuep; |
| 115 | |
| 116 | HW_TRACE_READ (); |
| 117 | |
| 118 | switch (mmr_off) |
| 119 | { |
| 120 | case mmr_offset(sdgctl): |
| 121 | dv_store_4 (dest, *value32p); |
| 122 | break; |
| 123 | case mmr_offset(sdbctl): |
| 124 | if (sdc->type == 561) |
| 125 | { |
| 126 | dv_bfin_mmr_require_32 (me, addr, nr_bytes, false); |
| 127 | dv_store_4 (dest, *value32p); |
| 128 | } |
| 129 | else |
| 130 | { |
| 131 | dv_bfin_mmr_require_16 (me, addr, nr_bytes, false); |
| 132 | dv_store_2 (dest, *value16p); |
| 133 | } |
| 134 | break; |
| 135 | case mmr_offset(sdrrc): |
| 136 | case mmr_offset(sdstat): |
| 137 | dv_bfin_mmr_require_16 (me, addr, nr_bytes, false); |
| 138 | dv_store_2 (dest, *value16p); |
| 139 | break; |
| 140 | } |
| 141 | |
| 142 | return nr_bytes; |
| 143 | } |
| 144 | |
| 145 | static void |
| 146 | attach_bfin_ebiu_sdc_regs (struct hw *me, struct bfin_ebiu_sdc *sdc) |
| 147 | { |
| 148 | address_word attach_address; |
| 149 | int attach_space; |
| 150 | unsigned attach_size; |
| 151 | reg_property_spec reg; |
| 152 | |
| 153 | if (hw_find_property (me, "reg") == NULL) |
| 154 | hw_abort (me, "Missing \"reg\" property"); |
| 155 | |
| 156 | if (!hw_find_reg_array_property (me, "reg", 0, ®)) |
| 157 | hw_abort (me, "\"reg\" property must contain three addr/size entries"); |
| 158 | |
| 159 | hw_unit_address_to_attach_address (hw_parent (me), |
| 160 | ®.address, |
| 161 | &attach_space, &attach_address, me); |
| 162 | hw_unit_size_to_attach_size (hw_parent (me), ®.size, &attach_size, me); |
| 163 | |
| 164 | if (attach_size != BFIN_MMR_EBIU_SDC_SIZE) |
| 165 | hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_EBIU_SDC_SIZE); |
| 166 | |
| 167 | hw_attach_address (hw_parent (me), |
| 168 | 0, attach_space, attach_address, attach_size, me); |
| 169 | |
| 170 | sdc->base = attach_address; |
| 171 | } |
| 172 | |
| 173 | static void |
| 174 | bfin_ebiu_sdc_finish (struct hw *me) |
| 175 | { |
| 176 | struct bfin_ebiu_sdc *sdc; |
| 177 | |
| 178 | sdc = HW_ZALLOC (me, struct bfin_ebiu_sdc); |
| 179 | |
| 180 | set_hw_data (me, sdc); |
| 181 | set_hw_io_read_buffer (me, bfin_ebiu_sdc_io_read_buffer); |
| 182 | set_hw_io_write_buffer (me, bfin_ebiu_sdc_io_write_buffer); |
| 183 | |
| 184 | attach_bfin_ebiu_sdc_regs (me, sdc); |
| 185 | |
| 186 | sdc->type = hw_find_integer_property (me, "type"); |
| 187 | |
| 188 | /* Initialize the SDC. */ |
| 189 | sdc->sdgctl = 0xE0088849; |
| 190 | sdc->sdbctl = 0x00000000; |
| 191 | sdc->sdrrc = 0x081A; |
| 192 | sdc->sdstat = 0x0008; |
| 193 | |
| 194 | /* XXX: We boot with 64M external memory by default ... */ |
| 195 | sdc->sdbctl |= EBE | EBSZ_64 | EBCAW_10; |
| 196 | } |
| 197 | |
| 198 | const struct hw_descriptor dv_bfin_ebiu_sdc_descriptor[] = { |
| 199 | {"bfin_ebiu_sdc", bfin_ebiu_sdc_finish,}, |
| 200 | {NULL, NULL}, |
| 201 | }; |