| 1 | /* Blackfin One-Time Programmable Memory (OTP) model |
| 2 | |
| 3 | Copyright (C) 2010-2013 Free Software Foundation, Inc. |
| 4 | Contributed by Analog Devices, Inc. |
| 5 | |
| 6 | This file is part of simulators. |
| 7 | |
| 8 | This program is free software; you can redistribute it and/or modify |
| 9 | it under the terms of the GNU General Public License as published by |
| 10 | the Free Software Foundation; either version 3 of the License, or |
| 11 | (at your option) any later version. |
| 12 | |
| 13 | This program is distributed in the hope that it will be useful, |
| 14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | GNU General Public License for more details. |
| 17 | |
| 18 | You should have received a copy of the GNU General Public License |
| 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 20 | |
| 21 | #include "config.h" |
| 22 | |
| 23 | #include "sim-main.h" |
| 24 | #include "devices.h" |
| 25 | #include "dv-bfin_otp.h" |
| 26 | |
| 27 | /* XXX: No public documentation on this interface. This seems to work |
| 28 | with the on-chip ROM functions though and was figured out by |
| 29 | disassembling & walking that code. */ |
| 30 | /* XXX: About only thing that should be done here are CRC fields. And |
| 31 | supposedly there is an interrupt that could be generated. */ |
| 32 | |
| 33 | struct bfin_otp |
| 34 | { |
| 35 | bu32 base; |
| 36 | |
| 37 | /* The actual OTP storage -- 0x200 pages, each page is 128bits. |
| 38 | While certain pages have predefined and/or secure access, we don't |
| 39 | bother trying to implement that coverage. All pages are open for |
| 40 | reading & writing. */ |
| 41 | bu32 mem[0x200 * 4]; |
| 42 | |
| 43 | /* Order after here is important -- matches hardware MMR layout. */ |
| 44 | bu16 BFIN_MMR_16(control); |
| 45 | bu16 BFIN_MMR_16(ben); |
| 46 | bu16 BFIN_MMR_16(status); |
| 47 | bu32 timing; |
| 48 | bu32 _pad0[28]; |
| 49 | bu32 data0, data1, data2, data3; |
| 50 | }; |
| 51 | #define mmr_base() offsetof(struct bfin_otp, control) |
| 52 | #define mmr_offset(mmr) (offsetof(struct bfin_otp, mmr) - mmr_base()) |
| 53 | #define mmr_idx(mmr) (mmr_offset (mmr) / 4) |
| 54 | |
| 55 | static const char * const mmr_names[] = |
| 56 | { |
| 57 | "OTP_CONTROL", "OTP_BEN", "OTP_STATUS", "OTP_TIMING", |
| 58 | [mmr_idx (data0)] = "OTP_DATA0", "OTP_DATA1", "OTP_DATA2", "OTP_DATA3", |
| 59 | }; |
| 60 | #define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>") |
| 61 | |
| 62 | /* XXX: This probably misbehaves with big endian hosts. */ |
| 63 | static void |
| 64 | bfin_otp_transfer (struct bfin_otp *otp, void *vdst, void *vsrc) |
| 65 | { |
| 66 | bu8 *dst = vdst, *src = vsrc; |
| 67 | int bidx; |
| 68 | for (bidx = 0; bidx < 16; ++bidx) |
| 69 | if (otp->ben & (1 << bidx)) |
| 70 | dst[bidx] = src[bidx]; |
| 71 | } |
| 72 | |
| 73 | static void |
| 74 | bfin_otp_read_page (struct bfin_otp *otp, bu16 page) |
| 75 | { |
| 76 | bfin_otp_transfer (otp, &otp->data0, &otp->mem[page * 4]); |
| 77 | } |
| 78 | |
| 79 | static void |
| 80 | bfin_otp_write_page_val (struct bfin_otp *otp, bu16 page, bu64 val[2]) |
| 81 | { |
| 82 | bfin_otp_transfer (otp, &otp->mem[page * 4], val); |
| 83 | } |
| 84 | static void |
| 85 | bfin_otp_write_page_val2 (struct bfin_otp *otp, bu16 page, bu64 lo, bu64 hi) |
| 86 | { |
| 87 | bu64 val[2] = { lo, hi }; |
| 88 | bfin_otp_write_page_val (otp, page, val); |
| 89 | } |
| 90 | static void |
| 91 | bfin_otp_write_page (struct bfin_otp *otp, bu16 page) |
| 92 | { |
| 93 | bfin_otp_write_page_val (otp, page, (void *)&otp->data0); |
| 94 | } |
| 95 | |
| 96 | static unsigned |
| 97 | bfin_otp_io_write_buffer (struct hw *me, const void *source, int space, |
| 98 | address_word addr, unsigned nr_bytes) |
| 99 | { |
| 100 | struct bfin_otp *otp = hw_data (me); |
| 101 | bu32 mmr_off; |
| 102 | bu32 value; |
| 103 | bu16 *value16p; |
| 104 | bu32 *value32p; |
| 105 | void *valuep; |
| 106 | |
| 107 | if (nr_bytes == 4) |
| 108 | value = dv_load_4 (source); |
| 109 | else |
| 110 | value = dv_load_2 (source); |
| 111 | |
| 112 | mmr_off = addr - otp->base; |
| 113 | valuep = (void *)((unsigned long)otp + mmr_base() + mmr_off); |
| 114 | value16p = valuep; |
| 115 | value32p = valuep; |
| 116 | |
| 117 | HW_TRACE_WRITE (); |
| 118 | |
| 119 | switch (mmr_off) |
| 120 | { |
| 121 | case mmr_offset(control): |
| 122 | { |
| 123 | int page; |
| 124 | |
| 125 | dv_bfin_mmr_require_16 (me, addr, nr_bytes, true); |
| 126 | /* XXX: Seems like these bits aren't writable. */ |
| 127 | *value16p = value & 0x39FF; |
| 128 | |
| 129 | /* Low bits seem to be the page address. */ |
| 130 | page = value & PAGE_ADDR; |
| 131 | |
| 132 | /* Write operation. */ |
| 133 | if (value & DO_WRITE) |
| 134 | bfin_otp_write_page (otp, page); |
| 135 | |
| 136 | /* Read operation. */ |
| 137 | if (value & DO_READ) |
| 138 | bfin_otp_read_page (otp, page); |
| 139 | |
| 140 | otp->status |= STATUS_DONE; |
| 141 | |
| 142 | break; |
| 143 | } |
| 144 | case mmr_offset(ben): |
| 145 | dv_bfin_mmr_require_16 (me, addr, nr_bytes, true); |
| 146 | /* XXX: All bits seem to be writable. */ |
| 147 | *value16p = value; |
| 148 | break; |
| 149 | case mmr_offset(status): |
| 150 | dv_bfin_mmr_require_16 (me, addr, nr_bytes, true); |
| 151 | /* XXX: All bits seem to be W1C. */ |
| 152 | dv_w1c_2 (value16p, value, -1); |
| 153 | break; |
| 154 | case mmr_offset(timing): |
| 155 | case mmr_offset(data0): |
| 156 | case mmr_offset(data1): |
| 157 | case mmr_offset(data2): |
| 158 | case mmr_offset(data3): |
| 159 | dv_bfin_mmr_require_32 (me, addr, nr_bytes, true); |
| 160 | *value32p = value; |
| 161 | break; |
| 162 | default: |
| 163 | dv_bfin_mmr_invalid (me, addr, nr_bytes, true); |
| 164 | break; |
| 165 | } |
| 166 | |
| 167 | return nr_bytes; |
| 168 | } |
| 169 | |
| 170 | static unsigned |
| 171 | bfin_otp_io_read_buffer (struct hw *me, void *dest, int space, |
| 172 | address_word addr, unsigned nr_bytes) |
| 173 | { |
| 174 | struct bfin_otp *otp = hw_data (me); |
| 175 | bu32 mmr_off; |
| 176 | bu16 *value16p; |
| 177 | bu32 *value32p; |
| 178 | void *valuep; |
| 179 | |
| 180 | mmr_off = addr - otp->base; |
| 181 | valuep = (void *)((unsigned long)otp + mmr_base() + mmr_off); |
| 182 | value16p = valuep; |
| 183 | value32p = valuep; |
| 184 | |
| 185 | HW_TRACE_READ (); |
| 186 | |
| 187 | switch (mmr_off) |
| 188 | { |
| 189 | case mmr_offset(control): |
| 190 | case mmr_offset(ben): |
| 191 | case mmr_offset(status): |
| 192 | dv_bfin_mmr_require_16 (me, addr, nr_bytes, false); |
| 193 | dv_store_2 (dest, *value16p); |
| 194 | break; |
| 195 | case mmr_offset(timing): |
| 196 | case mmr_offset(data0): |
| 197 | case mmr_offset(data1): |
| 198 | case mmr_offset(data2): |
| 199 | case mmr_offset(data3): |
| 200 | dv_bfin_mmr_require_32 (me, addr, nr_bytes, false); |
| 201 | dv_store_4 (dest, *value32p); |
| 202 | break; |
| 203 | default: |
| 204 | dv_bfin_mmr_invalid (me, addr, nr_bytes, false); |
| 205 | break; |
| 206 | } |
| 207 | |
| 208 | return nr_bytes; |
| 209 | } |
| 210 | |
| 211 | static void |
| 212 | attach_bfin_otp_regs (struct hw *me, struct bfin_otp *otp) |
| 213 | { |
| 214 | address_word attach_address; |
| 215 | int attach_space; |
| 216 | unsigned attach_size; |
| 217 | reg_property_spec reg; |
| 218 | |
| 219 | if (hw_find_property (me, "reg") == NULL) |
| 220 | hw_abort (me, "Missing \"reg\" property"); |
| 221 | |
| 222 | if (!hw_find_reg_array_property (me, "reg", 0, ®)) |
| 223 | hw_abort (me, "\"reg\" property must contain three addr/size entries"); |
| 224 | |
| 225 | hw_unit_address_to_attach_address (hw_parent (me), |
| 226 | ®.address, |
| 227 | &attach_space, &attach_address, me); |
| 228 | hw_unit_size_to_attach_size (hw_parent (me), ®.size, &attach_size, me); |
| 229 | |
| 230 | if (attach_size != BFIN_MMR_OTP_SIZE) |
| 231 | hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_OTP_SIZE); |
| 232 | |
| 233 | hw_attach_address (hw_parent (me), |
| 234 | 0, attach_space, attach_address, attach_size, me); |
| 235 | |
| 236 | otp->base = attach_address; |
| 237 | } |
| 238 | |
| 239 | static const struct hw_port_descriptor bfin_otp_ports[] = |
| 240 | { |
| 241 | { "stat", 0, 0, output_port, }, |
| 242 | { NULL, 0, 0, 0, }, |
| 243 | }; |
| 244 | |
| 245 | static void |
| 246 | bfin_otp_finish (struct hw *me) |
| 247 | { |
| 248 | char part_str[16]; |
| 249 | struct bfin_otp *otp; |
| 250 | unsigned int fps03; |
| 251 | int type = hw_find_integer_property (me, "type"); |
| 252 | |
| 253 | otp = HW_ZALLOC (me, struct bfin_otp); |
| 254 | |
| 255 | set_hw_data (me, otp); |
| 256 | set_hw_io_read_buffer (me, bfin_otp_io_read_buffer); |
| 257 | set_hw_io_write_buffer (me, bfin_otp_io_write_buffer); |
| 258 | set_hw_ports (me, bfin_otp_ports); |
| 259 | |
| 260 | attach_bfin_otp_regs (me, otp); |
| 261 | |
| 262 | /* Initialize the OTP. */ |
| 263 | otp->ben = 0xFFFF; |
| 264 | otp->timing = 0x00001485; |
| 265 | |
| 266 | /* Semi-random value for unique chip id. */ |
| 267 | bfin_otp_write_page_val2 (otp, FPS00, (unsigned long)otp, ~(unsigned long)otp); |
| 268 | |
| 269 | memset (part_str, 0, sizeof (part_str)); |
| 270 | sprintf (part_str, "ADSP-BF%iX", type); |
| 271 | switch (type) |
| 272 | { |
| 273 | case 512: |
| 274 | fps03 = FPS03_BF512; |
| 275 | break; |
| 276 | case 514: |
| 277 | fps03 = FPS03_BF514; |
| 278 | break; |
| 279 | case 516: |
| 280 | fps03 = FPS03_BF516; |
| 281 | break; |
| 282 | case 518: |
| 283 | fps03 = FPS03_BF518; |
| 284 | break; |
| 285 | case 522: |
| 286 | fps03 = FPS03_BF522; |
| 287 | break; |
| 288 | case 523: |
| 289 | fps03 = FPS03_BF523; |
| 290 | break; |
| 291 | case 524: |
| 292 | fps03 = FPS03_BF524; |
| 293 | break; |
| 294 | case 525: |
| 295 | fps03 = FPS03_BF525; |
| 296 | break; |
| 297 | case 526: |
| 298 | fps03 = FPS03_BF526; |
| 299 | break; |
| 300 | case 527: |
| 301 | fps03 = FPS03_BF527; |
| 302 | break; |
| 303 | default: |
| 304 | fps03 = 0; |
| 305 | break; |
| 306 | } |
| 307 | part_str[14] = (fps03 >> 0); |
| 308 | part_str[15] = (fps03 >> 8); |
| 309 | bfin_otp_write_page_val (otp, FPS03, (void *)part_str); |
| 310 | } |
| 311 | |
| 312 | const struct hw_descriptor dv_bfin_otp_descriptor[] = |
| 313 | { |
| 314 | {"bfin_otp", bfin_otp_finish,}, |
| 315 | {NULL, NULL}, |
| 316 | }; |