| 1 | /* Blackfin One-Time Programmable Memory (OTP) model |
| 2 | |
| 3 | Copyright (C) 2010-2013 Free Software Foundation, Inc. |
| 4 | Contributed by Analog Devices, Inc. |
| 5 | |
| 6 | This file is part of simulators. |
| 7 | |
| 8 | This program is free software; you can redistribute it and/or modify |
| 9 | it under the terms of the GNU General Public License as published by |
| 10 | the Free Software Foundation; either version 3 of the License, or |
| 11 | (at your option) any later version. |
| 12 | |
| 13 | This program is distributed in the hope that it will be useful, |
| 14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | GNU General Public License for more details. |
| 17 | |
| 18 | You should have received a copy of the GNU General Public License |
| 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 20 | |
| 21 | #ifndef DV_BFIN_OTP_H |
| 22 | #define DV_BFIN_OTP_H |
| 23 | |
| 24 | /* OTP Defined Pages. */ |
| 25 | #define FPS00 0x004 |
| 26 | #define FPS01 0x005 |
| 27 | #define FPS02 0x006 |
| 28 | #define FPS03 0x007 |
| 29 | #define FPS04 0x008 |
| 30 | #define FPS05 0x009 |
| 31 | #define FPS06 0x00A |
| 32 | #define FPS07 0x00B |
| 33 | #define FPS08 0x00C |
| 34 | #define FPS09 0x00D |
| 35 | #define FPS10 0x00E |
| 36 | #define FPS11 0x00F |
| 37 | #define CPS00 0x010 |
| 38 | #define CPS01 0x011 |
| 39 | #define CPS02 0x012 |
| 40 | #define CPS03 0x013 |
| 41 | #define CPS04 0x014 |
| 42 | #define CPS05 0x015 |
| 43 | #define CPS06 0x016 |
| 44 | #define CPS07 0x017 |
| 45 | #define PBS00 0x018 |
| 46 | #define PBS01 0x019 |
| 47 | #define PBS02 0x01A |
| 48 | #define PBS03 0x01B |
| 49 | #define PUB000 0x01C |
| 50 | #define PUBCRC000 0x0E0 |
| 51 | #define PRIV000 0x110 |
| 52 | #define PRIVCRC000 0x1E0 |
| 53 | |
| 54 | /* FPS03 Part values. */ |
| 55 | #define FPS03_BF51XF(n) (FPS03_BF##n | 0xF000) |
| 56 | #define FPS03_BF512 0x0200 |
| 57 | #define FPS03_BF512F FPS03_BF51XF(512) |
| 58 | #define FPS03_BF514 0x0202 |
| 59 | #define FPS03_BF514F FPS03_BF51XF(514) |
| 60 | #define FPS03_BF516 0x0204 |
| 61 | #define FPS03_BF516F FPS03_BF51XF(516) |
| 62 | #define FPS03_BF518 0x0206 |
| 63 | #define FPS03_BF518F FPS03_BF51XF(518) |
| 64 | #define FPS03_BF52X_C1(n) (FPS03_BF##n | 0x8000) |
| 65 | #define FPS03_BF52X_C2(n) (FPS03_BF##n | 0x4000) |
| 66 | #define FPS03_BF522 0x020A |
| 67 | #define FPS03_BF522_C1 FPS03_BF52X_C1(522) |
| 68 | #define FPS03_BF522_C2 FPS03_BF52X_C2(522) |
| 69 | #define FPS03_BF523 0x020B |
| 70 | #define FPS03_BF523_C1 FPS03_BF52X_C1(523) |
| 71 | #define FPS03_BF523_C2 FPS03_BF52X_C2(523) |
| 72 | #define FPS03_BF524 0x020C |
| 73 | #define FPS03_BF524_C1 FPS03_BF52X_C1(524) |
| 74 | #define FPS03_BF524_C2 FPS03_BF52X_C2(524) |
| 75 | #define FPS03_BF525 0x020D |
| 76 | #define FPS03_BF525_C1 FPS03_BF52X_C1(525) |
| 77 | #define FPS03_BF525_C2 FPS03_BF52X_C2(525) |
| 78 | #define FPS03_BF526 0x020E |
| 79 | #define FPS03_BF526_C1 FPS03_BF52X_C1(526) |
| 80 | #define FPS03_BF526_C2 FPS03_BF52X_C2(526) |
| 81 | #define FPS03_BF527 0x020F |
| 82 | #define FPS03_BF527_C1 FPS03_BF52X_C1(527) |
| 83 | #define FPS03_BF527_C2 FPS03_BF52X_C2(527) |
| 84 | |
| 85 | /* OTP_CONTROL masks. */ |
| 86 | #define PAGE_ADDR (0x1FF) |
| 87 | #define DO_READ (1 << 14) |
| 88 | #define DO_WRITE (1 << 15) |
| 89 | |
| 90 | /* OTP_STATUS masks. */ |
| 91 | #define STATUS_DONE (1 << 0) |
| 92 | #define STATUS_ERR (1 << 1) |
| 93 | |
| 94 | #endif |