| 1 | /* Simulator header for cgen cpus. |
| 2 | Copyright (C) 1998, 1999 Free Software Foundation, Inc. |
| 3 | Contributed by Cygnus Support. |
| 4 | |
| 5 | This file is part of GDB, the GNU debugger. |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 2, or (at your option) |
| 10 | any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License along |
| 18 | with this program; if not, write to the Free Software Foundation, Inc., |
| 19 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
| 20 | |
| 21 | #ifndef CGEN_CPU_H |
| 22 | #define CGEN_CPU_H |
| 23 | |
| 24 | /* Type of function that is ultimately called by sim_resume. */ |
| 25 | typedef void (ENGINE_FN) (SIM_CPU *); |
| 26 | |
| 27 | /* Type of function to do disassembly. */ |
| 28 | typedef void (CGEN_DISASSEMBLER) (SIM_CPU *, const CGEN_INSN *, |
| 29 | const ARGBUF *, IADDR pc_, char *buf_); |
| 30 | |
| 31 | /* Additional non-machine generated per-cpu data to go in SIM_CPU. |
| 32 | The member's name must be `cgen_cpu'. */ |
| 33 | |
| 34 | typedef struct { |
| 35 | /* Non-zero while cpu simulation is running. */ |
| 36 | int running_p; |
| 37 | #define CPU_RUNNING_P(cpu) ((cpu)->cgen_cpu.running_p) |
| 38 | |
| 39 | /* Instruction count. This is maintained even in fast mode to keep track |
| 40 | of simulator speed. */ |
| 41 | unsigned long insn_count; |
| 42 | #define CPU_INSN_COUNT(cpu) ((cpu)->cgen_cpu.insn_count) |
| 43 | |
| 44 | /* sim_resume handlers */ |
| 45 | ENGINE_FN *fast_engine_fn; |
| 46 | #define CPU_FAST_ENGINE_FN(cpu) ((cpu)->cgen_cpu.fast_engine_fn) |
| 47 | ENGINE_FN *full_engine_fn; |
| 48 | #define CPU_FULL_ENGINE_FN(cpu) ((cpu)->cgen_cpu.full_engine_fn) |
| 49 | |
| 50 | /* Maximum number of instructions per time slice. |
| 51 | When single stepping this is 1. If using the pbb model, this can be |
| 52 | more than 1. 0 means "as long as you want". */ |
| 53 | unsigned int max_slice_insns; |
| 54 | #define CPU_MAX_SLICE_INSNS(cpu) ((cpu)->cgen_cpu.max_slice_insns) |
| 55 | |
| 56 | /* Simulator's execution cache. |
| 57 | Allocate space for this even if not used as some simulators may have |
| 58 | one machine variant that uses the scache and another that doesn't and |
| 59 | we don't want members in this struct to move about. */ |
| 60 | CPU_SCACHE scache; |
| 61 | |
| 62 | /* Instruction descriptor table. */ |
| 63 | IDESC *idesc; |
| 64 | #define CPU_IDESC(cpu) ((cpu)->cgen_cpu.idesc) |
| 65 | |
| 66 | /* Whether the read,write,semantic entries (function pointers or computed |
| 67 | goto labels) have been initialized or not. */ |
| 68 | int idesc_read_init_p; |
| 69 | #define CPU_IDESC_READ_INIT_P(cpu) ((cpu)->cgen_cpu.idesc_read_init_p) |
| 70 | int idesc_write_init_p; |
| 71 | #define CPU_IDESC_WRITE_INIT_P(cpu) ((cpu)->cgen_cpu.idesc_write_init_p) |
| 72 | int idesc_sem_init_p; |
| 73 | #define CPU_IDESC_SEM_INIT_P(cpu) ((cpu)->cgen_cpu.idesc_sem_init_p) |
| 74 | |
| 75 | /* Cpu descriptor table. |
| 76 | This is a CGEN created entity that contains the description file |
| 77 | turned into C code and tables for our use. */ |
| 78 | CGEN_CPU_DESC cpu_desc; |
| 79 | #define CPU_CPU_DESC(cpu) ((cpu)->cgen_cpu.cpu_desc) |
| 80 | |
| 81 | /* Function to fetch the insn data entry in the IDESC. */ |
| 82 | const CGEN_INSN * (*get_idata) (SIM_CPU *, int); |
| 83 | #define CPU_GET_IDATA(cpu) ((cpu)->cgen_cpu.get_idata) |
| 84 | |
| 85 | /* Floating point support. */ |
| 86 | CGEN_FPU fpu; |
| 87 | #define CGEN_CPU_FPU(cpu) (& (cpu)->cgen_cpu.fpu) |
| 88 | |
| 89 | /* Disassembler. */ |
| 90 | CGEN_DISASSEMBLER *disassembler; |
| 91 | #define CPU_DISASSEMBLER(cpu) ((cpu)->cgen_cpu.disassembler) |
| 92 | |
| 93 | /* Allow slop in size calcs for case where multiple cpu types are supported |
| 94 | and space for the specified cpu is malloc'd at run time. */ |
| 95 | double slop; |
| 96 | } CGEN_CPU; |
| 97 | |
| 98 | /* Shorthand macro for fetching registers. |
| 99 | CPU_CGEN_HW is defined in cpu.h. */ |
| 100 | #define CPU(x) (CPU_CGEN_HW (current_cpu)->x) |
| 101 | |
| 102 | #endif /* CGEN_CPU_H */ |