| 1 | /* Simulator instruction semantics for m32rbf. |
| 2 | |
| 3 | THIS FILE IS MACHINE GENERATED WITH CGEN. |
| 4 | |
| 5 | Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. |
| 6 | |
| 7 | This file is part of the GNU Simulators. |
| 8 | |
| 9 | This program is free software; you can redistribute it and/or modify |
| 10 | it under the terms of the GNU General Public License as published by |
| 11 | the Free Software Foundation; either version 2, or (at your option) |
| 12 | any later version. |
| 13 | |
| 14 | This program is distributed in the hope that it will be useful, |
| 15 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | GNU General Public License for more details. |
| 18 | |
| 19 | You should have received a copy of the GNU General Public License along |
| 20 | with this program; if not, write to the Free Software Foundation, Inc., |
| 21 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 22 | |
| 23 | */ |
| 24 | |
| 25 | #define WANT_CPU |
| 26 | #define WANT_CPU_M32RBF |
| 27 | |
| 28 | #include "sim-main.h" |
| 29 | #include "cgen-mem.h" |
| 30 | #include "cgen-ops.h" |
| 31 | |
| 32 | #undef GET_ATTR |
| 33 | #define GET_ATTR(cpu, num, attr) CGEN_INSN_ATTR (abuf->idesc->opcode, CGEN_INSN_##attr) |
| 34 | |
| 35 | /* x-invalid: --invalid-- */ |
| 36 | |
| 37 | SEM_PC |
| 38 | SEM_FN_NAME (m32rbf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 39 | { |
| 40 | #define FLD(f) abuf->fields.fmt_empty.f |
| 41 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 42 | int UNUSED written = 0; |
| 43 | PCADDR UNUSED pc = abuf->addr; |
| 44 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); |
| 45 | |
| 46 | { |
| 47 | #if WITH_SCACHE |
| 48 | /* Update the recorded pc in the cpu state struct. */ |
| 49 | SET_H_PC (pc); |
| 50 | #endif |
| 51 | sim_engine_invalid_insn (current_cpu, pc); |
| 52 | sim_io_error (CPU_STATE (current_cpu), "invalid insn not handled\n"); |
| 53 | /* NOTREACHED */ |
| 54 | } |
| 55 | |
| 56 | return vpc; |
| 57 | #undef FLD |
| 58 | } |
| 59 | |
| 60 | /* x-after: --after-- */ |
| 61 | |
| 62 | SEM_PC |
| 63 | SEM_FN_NAME (m32rbf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 64 | { |
| 65 | #define FLD(f) abuf->fields.fmt_empty.f |
| 66 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 67 | int UNUSED written = 0; |
| 68 | PCADDR UNUSED pc = abuf->addr; |
| 69 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); |
| 70 | |
| 71 | { |
| 72 | #if WITH_SCACHE_PBB |
| 73 | m32rbf_pbb_after (current_cpu, sem_arg); |
| 74 | #endif |
| 75 | } |
| 76 | |
| 77 | return vpc; |
| 78 | #undef FLD |
| 79 | } |
| 80 | |
| 81 | /* x-before: --before-- */ |
| 82 | |
| 83 | SEM_PC |
| 84 | SEM_FN_NAME (m32rbf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 85 | { |
| 86 | #define FLD(f) abuf->fields.fmt_empty.f |
| 87 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 88 | int UNUSED written = 0; |
| 89 | PCADDR UNUSED pc = abuf->addr; |
| 90 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); |
| 91 | |
| 92 | { |
| 93 | #if WITH_SCACHE_PBB |
| 94 | m32rbf_pbb_before (current_cpu, sem_arg); |
| 95 | #endif |
| 96 | } |
| 97 | |
| 98 | return vpc; |
| 99 | #undef FLD |
| 100 | } |
| 101 | |
| 102 | /* x-cti-chain: --cti-chain-- */ |
| 103 | |
| 104 | SEM_PC |
| 105 | SEM_FN_NAME (m32rbf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 106 | { |
| 107 | #define FLD(f) abuf->fields.fmt_empty.f |
| 108 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 109 | int UNUSED written = 0; |
| 110 | PCADDR UNUSED pc = abuf->addr; |
| 111 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); |
| 112 | |
| 113 | { |
| 114 | #if WITH_SCACHE_PBB |
| 115 | #ifdef DEFINE_SWITCH |
| 116 | vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg, |
| 117 | pbb_br_npc_ptr, pbb_br_npc); |
| 118 | BREAK (sem); |
| 119 | #else |
| 120 | /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ |
| 121 | vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg, |
| 122 | CPU_PBB_BR_NPC_PTR (current_cpu), |
| 123 | CPU_PBB_BR_NPC (current_cpu)); |
| 124 | #endif |
| 125 | #endif |
| 126 | } |
| 127 | |
| 128 | return vpc; |
| 129 | #undef FLD |
| 130 | } |
| 131 | |
| 132 | /* x-chain: --chain-- */ |
| 133 | |
| 134 | SEM_PC |
| 135 | SEM_FN_NAME (m32rbf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 136 | { |
| 137 | #define FLD(f) abuf->fields.fmt_empty.f |
| 138 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 139 | int UNUSED written = 0; |
| 140 | PCADDR UNUSED pc = abuf->addr; |
| 141 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); |
| 142 | |
| 143 | { |
| 144 | #if WITH_SCACHE_PBB |
| 145 | vpc = m32rbf_pbb_chain (current_cpu, sem_arg); |
| 146 | #ifdef DEFINE_SWITCH |
| 147 | BREAK (sem); |
| 148 | #endif |
| 149 | #endif |
| 150 | } |
| 151 | |
| 152 | return vpc; |
| 153 | #undef FLD |
| 154 | } |
| 155 | |
| 156 | /* x-begin: --begin-- */ |
| 157 | |
| 158 | SEM_PC |
| 159 | SEM_FN_NAME (m32rbf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 160 | { |
| 161 | #define FLD(f) abuf->fields.fmt_empty.f |
| 162 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 163 | int UNUSED written = 0; |
| 164 | PCADDR UNUSED pc = abuf->addr; |
| 165 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); |
| 166 | |
| 167 | { |
| 168 | #if WITH_SCACHE_PBB |
| 169 | #ifdef DEFINE_SWITCH |
| 170 | /* In the switch case FAST_P is a constant, allowing several optimizations |
| 171 | in any called inline functions. */ |
| 172 | vpc = m32rbf_pbb_begin (current_cpu, FAST_P); |
| 173 | #else |
| 174 | vpc = m32rbf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); |
| 175 | #endif |
| 176 | #endif |
| 177 | } |
| 178 | |
| 179 | return vpc; |
| 180 | #undef FLD |
| 181 | } |
| 182 | |
| 183 | /* add: add $dr,$sr */ |
| 184 | |
| 185 | SEM_PC |
| 186 | SEM_FN_NAME (m32rbf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 187 | { |
| 188 | #define FLD(f) abuf->fields.fmt_add.f |
| 189 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 190 | int UNUSED written = 0; |
| 191 | PCADDR UNUSED pc = abuf->addr; |
| 192 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 193 | |
| 194 | { |
| 195 | SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr)); |
| 196 | * FLD (i_dr) = opval; |
| 197 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 198 | } |
| 199 | |
| 200 | return vpc; |
| 201 | #undef FLD |
| 202 | } |
| 203 | |
| 204 | /* add3: add3 $dr,$sr,$hash$slo16 */ |
| 205 | |
| 206 | SEM_PC |
| 207 | SEM_FN_NAME (m32rbf,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 208 | { |
| 209 | #define FLD(f) abuf->fields.fmt_add3.f |
| 210 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 211 | int UNUSED written = 0; |
| 212 | PCADDR UNUSED pc = abuf->addr; |
| 213 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 214 | |
| 215 | { |
| 216 | SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16)); |
| 217 | * FLD (i_dr) = opval; |
| 218 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 219 | } |
| 220 | |
| 221 | return vpc; |
| 222 | #undef FLD |
| 223 | } |
| 224 | |
| 225 | /* and: and $dr,$sr */ |
| 226 | |
| 227 | SEM_PC |
| 228 | SEM_FN_NAME (m32rbf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 229 | { |
| 230 | #define FLD(f) abuf->fields.fmt_add.f |
| 231 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 232 | int UNUSED written = 0; |
| 233 | PCADDR UNUSED pc = abuf->addr; |
| 234 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 235 | |
| 236 | { |
| 237 | SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr)); |
| 238 | * FLD (i_dr) = opval; |
| 239 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 240 | } |
| 241 | |
| 242 | return vpc; |
| 243 | #undef FLD |
| 244 | } |
| 245 | |
| 246 | /* and3: and3 $dr,$sr,$uimm16 */ |
| 247 | |
| 248 | SEM_PC |
| 249 | SEM_FN_NAME (m32rbf,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 250 | { |
| 251 | #define FLD(f) abuf->fields.fmt_and3.f |
| 252 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 253 | int UNUSED written = 0; |
| 254 | PCADDR UNUSED pc = abuf->addr; |
| 255 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 256 | |
| 257 | { |
| 258 | SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16)); |
| 259 | * FLD (i_dr) = opval; |
| 260 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 261 | } |
| 262 | |
| 263 | return vpc; |
| 264 | #undef FLD |
| 265 | } |
| 266 | |
| 267 | /* or: or $dr,$sr */ |
| 268 | |
| 269 | SEM_PC |
| 270 | SEM_FN_NAME (m32rbf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 271 | { |
| 272 | #define FLD(f) abuf->fields.fmt_add.f |
| 273 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 274 | int UNUSED written = 0; |
| 275 | PCADDR UNUSED pc = abuf->addr; |
| 276 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 277 | |
| 278 | { |
| 279 | SI opval = ORSI (* FLD (i_dr), * FLD (i_sr)); |
| 280 | * FLD (i_dr) = opval; |
| 281 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 282 | } |
| 283 | |
| 284 | return vpc; |
| 285 | #undef FLD |
| 286 | } |
| 287 | |
| 288 | /* or3: or3 $dr,$sr,$hash$ulo16 */ |
| 289 | |
| 290 | SEM_PC |
| 291 | SEM_FN_NAME (m32rbf,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 292 | { |
| 293 | #define FLD(f) abuf->fields.fmt_or3.f |
| 294 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 295 | int UNUSED written = 0; |
| 296 | PCADDR UNUSED pc = abuf->addr; |
| 297 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 298 | |
| 299 | { |
| 300 | SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16)); |
| 301 | * FLD (i_dr) = opval; |
| 302 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 303 | } |
| 304 | |
| 305 | return vpc; |
| 306 | #undef FLD |
| 307 | } |
| 308 | |
| 309 | /* xor: xor $dr,$sr */ |
| 310 | |
| 311 | SEM_PC |
| 312 | SEM_FN_NAME (m32rbf,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 313 | { |
| 314 | #define FLD(f) abuf->fields.fmt_add.f |
| 315 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 316 | int UNUSED written = 0; |
| 317 | PCADDR UNUSED pc = abuf->addr; |
| 318 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 319 | |
| 320 | { |
| 321 | SI opval = XORSI (* FLD (i_dr), * FLD (i_sr)); |
| 322 | * FLD (i_dr) = opval; |
| 323 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 324 | } |
| 325 | |
| 326 | return vpc; |
| 327 | #undef FLD |
| 328 | } |
| 329 | |
| 330 | /* xor3: xor3 $dr,$sr,$uimm16 */ |
| 331 | |
| 332 | SEM_PC |
| 333 | SEM_FN_NAME (m32rbf,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 334 | { |
| 335 | #define FLD(f) abuf->fields.fmt_and3.f |
| 336 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 337 | int UNUSED written = 0; |
| 338 | PCADDR UNUSED pc = abuf->addr; |
| 339 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 340 | |
| 341 | { |
| 342 | SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16)); |
| 343 | * FLD (i_dr) = opval; |
| 344 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 345 | } |
| 346 | |
| 347 | return vpc; |
| 348 | #undef FLD |
| 349 | } |
| 350 | |
| 351 | /* addi: addi $dr,$simm8 */ |
| 352 | |
| 353 | SEM_PC |
| 354 | SEM_FN_NAME (m32rbf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 355 | { |
| 356 | #define FLD(f) abuf->fields.fmt_addi.f |
| 357 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 358 | int UNUSED written = 0; |
| 359 | PCADDR UNUSED pc = abuf->addr; |
| 360 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 361 | |
| 362 | { |
| 363 | SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8)); |
| 364 | * FLD (i_dr) = opval; |
| 365 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 366 | } |
| 367 | |
| 368 | return vpc; |
| 369 | #undef FLD |
| 370 | } |
| 371 | |
| 372 | /* addv: addv $dr,$sr */ |
| 373 | |
| 374 | SEM_PC |
| 375 | SEM_FN_NAME (m32rbf,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 376 | { |
| 377 | #define FLD(f) abuf->fields.fmt_addv.f |
| 378 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 379 | int UNUSED written = 0; |
| 380 | PCADDR UNUSED pc = abuf->addr; |
| 381 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 382 | |
| 383 | do { |
| 384 | BI temp1;SI temp0; |
| 385 | temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr)); |
| 386 | temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0); |
| 387 | { |
| 388 | SI opval = temp0; |
| 389 | * FLD (i_dr) = opval; |
| 390 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 391 | } |
| 392 | { |
| 393 | BI opval = temp1; |
| 394 | CPU (h_cond) = opval; |
| 395 | TRACE_RESULT (current_cpu, "condbit", 'x', opval); |
| 396 | } |
| 397 | } while (0); |
| 398 | |
| 399 | return vpc; |
| 400 | #undef FLD |
| 401 | } |
| 402 | |
| 403 | /* addv3: addv3 $dr,$sr,$simm16 */ |
| 404 | |
| 405 | SEM_PC |
| 406 | SEM_FN_NAME (m32rbf,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 407 | { |
| 408 | #define FLD(f) abuf->fields.fmt_addv3.f |
| 409 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 410 | int UNUSED written = 0; |
| 411 | PCADDR UNUSED pc = abuf->addr; |
| 412 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 413 | |
| 414 | do { |
| 415 | BI temp1;SI temp0; |
| 416 | temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16)); |
| 417 | temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0); |
| 418 | { |
| 419 | SI opval = temp0; |
| 420 | * FLD (i_dr) = opval; |
| 421 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 422 | } |
| 423 | { |
| 424 | BI opval = temp1; |
| 425 | CPU (h_cond) = opval; |
| 426 | TRACE_RESULT (current_cpu, "condbit", 'x', opval); |
| 427 | } |
| 428 | } while (0); |
| 429 | |
| 430 | return vpc; |
| 431 | #undef FLD |
| 432 | } |
| 433 | |
| 434 | /* addx: addx $dr,$sr */ |
| 435 | |
| 436 | SEM_PC |
| 437 | SEM_FN_NAME (m32rbf,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 438 | { |
| 439 | #define FLD(f) abuf->fields.fmt_addx.f |
| 440 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 441 | int UNUSED written = 0; |
| 442 | PCADDR UNUSED pc = abuf->addr; |
| 443 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 444 | |
| 445 | do { |
| 446 | BI temp1;SI temp0; |
| 447 | temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); |
| 448 | temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); |
| 449 | { |
| 450 | SI opval = temp0; |
| 451 | * FLD (i_dr) = opval; |
| 452 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 453 | } |
| 454 | { |
| 455 | BI opval = temp1; |
| 456 | CPU (h_cond) = opval; |
| 457 | TRACE_RESULT (current_cpu, "condbit", 'x', opval); |
| 458 | } |
| 459 | } while (0); |
| 460 | |
| 461 | return vpc; |
| 462 | #undef FLD |
| 463 | } |
| 464 | |
| 465 | /* bc8: bc.s $disp8 */ |
| 466 | |
| 467 | SEM_PC |
| 468 | SEM_FN_NAME (m32rbf,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 469 | { |
| 470 | #define FLD(f) abuf->fields.cti.fields.fmt_bc8.f |
| 471 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 472 | int UNUSED written = 0; |
| 473 | PCADDR UNUSED pc = abuf->addr; |
| 474 | SEM_BRANCH_INIT |
| 475 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 476 | |
| 477 | if (CPU (h_cond)) { |
| 478 | { |
| 479 | USI opval = FLD (f_disp8); |
| 480 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); |
| 481 | written |= (1 << 2); |
| 482 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 483 | } |
| 484 | } |
| 485 | |
| 486 | abuf->written = written; |
| 487 | SEM_BRANCH_FINI |
| 488 | return vpc; |
| 489 | #undef FLD |
| 490 | } |
| 491 | |
| 492 | /* bc24: bc.l $disp24 */ |
| 493 | |
| 494 | SEM_PC |
| 495 | SEM_FN_NAME (m32rbf,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 496 | { |
| 497 | #define FLD(f) abuf->fields.cti.fields.fmt_bc24.f |
| 498 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 499 | int UNUSED written = 0; |
| 500 | PCADDR UNUSED pc = abuf->addr; |
| 501 | SEM_BRANCH_INIT |
| 502 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 503 | |
| 504 | if (CPU (h_cond)) { |
| 505 | { |
| 506 | USI opval = FLD (f_disp24); |
| 507 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); |
| 508 | written |= (1 << 2); |
| 509 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 510 | } |
| 511 | } |
| 512 | |
| 513 | abuf->written = written; |
| 514 | SEM_BRANCH_FINI |
| 515 | return vpc; |
| 516 | #undef FLD |
| 517 | } |
| 518 | |
| 519 | /* beq: beq $src1,$src2,$disp16 */ |
| 520 | |
| 521 | SEM_PC |
| 522 | SEM_FN_NAME (m32rbf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 523 | { |
| 524 | #define FLD(f) abuf->fields.cti.fields.fmt_beq.f |
| 525 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 526 | int UNUSED written = 0; |
| 527 | PCADDR UNUSED pc = abuf->addr; |
| 528 | SEM_BRANCH_INIT |
| 529 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 530 | |
| 531 | if (EQSI (* FLD (i_src1), * FLD (i_src2))) { |
| 532 | { |
| 533 | USI opval = FLD (f_disp16); |
| 534 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); |
| 535 | written |= (1 << 3); |
| 536 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 537 | } |
| 538 | } |
| 539 | |
| 540 | abuf->written = written; |
| 541 | SEM_BRANCH_FINI |
| 542 | return vpc; |
| 543 | #undef FLD |
| 544 | } |
| 545 | |
| 546 | /* beqz: beqz $src2,$disp16 */ |
| 547 | |
| 548 | SEM_PC |
| 549 | SEM_FN_NAME (m32rbf,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 550 | { |
| 551 | #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f |
| 552 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 553 | int UNUSED written = 0; |
| 554 | PCADDR UNUSED pc = abuf->addr; |
| 555 | SEM_BRANCH_INIT |
| 556 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 557 | |
| 558 | if (EQSI (* FLD (i_src2), 0)) { |
| 559 | { |
| 560 | USI opval = FLD (f_disp16); |
| 561 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); |
| 562 | written |= (1 << 2); |
| 563 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 564 | } |
| 565 | } |
| 566 | |
| 567 | abuf->written = written; |
| 568 | SEM_BRANCH_FINI |
| 569 | return vpc; |
| 570 | #undef FLD |
| 571 | } |
| 572 | |
| 573 | /* bgez: bgez $src2,$disp16 */ |
| 574 | |
| 575 | SEM_PC |
| 576 | SEM_FN_NAME (m32rbf,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 577 | { |
| 578 | #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f |
| 579 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 580 | int UNUSED written = 0; |
| 581 | PCADDR UNUSED pc = abuf->addr; |
| 582 | SEM_BRANCH_INIT |
| 583 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 584 | |
| 585 | if (GESI (* FLD (i_src2), 0)) { |
| 586 | { |
| 587 | USI opval = FLD (f_disp16); |
| 588 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); |
| 589 | written |= (1 << 2); |
| 590 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 591 | } |
| 592 | } |
| 593 | |
| 594 | abuf->written = written; |
| 595 | SEM_BRANCH_FINI |
| 596 | return vpc; |
| 597 | #undef FLD |
| 598 | } |
| 599 | |
| 600 | /* bgtz: bgtz $src2,$disp16 */ |
| 601 | |
| 602 | SEM_PC |
| 603 | SEM_FN_NAME (m32rbf,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 604 | { |
| 605 | #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f |
| 606 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 607 | int UNUSED written = 0; |
| 608 | PCADDR UNUSED pc = abuf->addr; |
| 609 | SEM_BRANCH_INIT |
| 610 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 611 | |
| 612 | if (GTSI (* FLD (i_src2), 0)) { |
| 613 | { |
| 614 | USI opval = FLD (f_disp16); |
| 615 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); |
| 616 | written |= (1 << 2); |
| 617 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 618 | } |
| 619 | } |
| 620 | |
| 621 | abuf->written = written; |
| 622 | SEM_BRANCH_FINI |
| 623 | return vpc; |
| 624 | #undef FLD |
| 625 | } |
| 626 | |
| 627 | /* blez: blez $src2,$disp16 */ |
| 628 | |
| 629 | SEM_PC |
| 630 | SEM_FN_NAME (m32rbf,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 631 | { |
| 632 | #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f |
| 633 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 634 | int UNUSED written = 0; |
| 635 | PCADDR UNUSED pc = abuf->addr; |
| 636 | SEM_BRANCH_INIT |
| 637 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 638 | |
| 639 | if (LESI (* FLD (i_src2), 0)) { |
| 640 | { |
| 641 | USI opval = FLD (f_disp16); |
| 642 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); |
| 643 | written |= (1 << 2); |
| 644 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 645 | } |
| 646 | } |
| 647 | |
| 648 | abuf->written = written; |
| 649 | SEM_BRANCH_FINI |
| 650 | return vpc; |
| 651 | #undef FLD |
| 652 | } |
| 653 | |
| 654 | /* bltz: bltz $src2,$disp16 */ |
| 655 | |
| 656 | SEM_PC |
| 657 | SEM_FN_NAME (m32rbf,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 658 | { |
| 659 | #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f |
| 660 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 661 | int UNUSED written = 0; |
| 662 | PCADDR UNUSED pc = abuf->addr; |
| 663 | SEM_BRANCH_INIT |
| 664 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 665 | |
| 666 | if (LTSI (* FLD (i_src2), 0)) { |
| 667 | { |
| 668 | USI opval = FLD (f_disp16); |
| 669 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); |
| 670 | written |= (1 << 2); |
| 671 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 672 | } |
| 673 | } |
| 674 | |
| 675 | abuf->written = written; |
| 676 | SEM_BRANCH_FINI |
| 677 | return vpc; |
| 678 | #undef FLD |
| 679 | } |
| 680 | |
| 681 | /* bnez: bnez $src2,$disp16 */ |
| 682 | |
| 683 | SEM_PC |
| 684 | SEM_FN_NAME (m32rbf,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 685 | { |
| 686 | #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f |
| 687 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 688 | int UNUSED written = 0; |
| 689 | PCADDR UNUSED pc = abuf->addr; |
| 690 | SEM_BRANCH_INIT |
| 691 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 692 | |
| 693 | if (NESI (* FLD (i_src2), 0)) { |
| 694 | { |
| 695 | USI opval = FLD (f_disp16); |
| 696 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); |
| 697 | written |= (1 << 2); |
| 698 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 699 | } |
| 700 | } |
| 701 | |
| 702 | abuf->written = written; |
| 703 | SEM_BRANCH_FINI |
| 704 | return vpc; |
| 705 | #undef FLD |
| 706 | } |
| 707 | |
| 708 | /* bl8: bl.s $disp8 */ |
| 709 | |
| 710 | SEM_PC |
| 711 | SEM_FN_NAME (m32rbf,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 712 | { |
| 713 | #define FLD(f) abuf->fields.cti.fields.fmt_bl8.f |
| 714 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 715 | int UNUSED written = 0; |
| 716 | PCADDR UNUSED pc = abuf->addr; |
| 717 | SEM_BRANCH_INIT |
| 718 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 719 | |
| 720 | do { |
| 721 | { |
| 722 | SI opval = ADDSI (ANDSI (pc, -4), 4); |
| 723 | CPU (h_gr[((UINT) 14)]) = opval; |
| 724 | TRACE_RESULT (current_cpu, "gr-14", 'x', opval); |
| 725 | } |
| 726 | { |
| 727 | USI opval = FLD (f_disp8); |
| 728 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); |
| 729 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 730 | } |
| 731 | } while (0); |
| 732 | |
| 733 | SEM_BRANCH_FINI |
| 734 | return vpc; |
| 735 | #undef FLD |
| 736 | } |
| 737 | |
| 738 | /* bl24: bl.l $disp24 */ |
| 739 | |
| 740 | SEM_PC |
| 741 | SEM_FN_NAME (m32rbf,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 742 | { |
| 743 | #define FLD(f) abuf->fields.cti.fields.fmt_bl24.f |
| 744 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 745 | int UNUSED written = 0; |
| 746 | PCADDR UNUSED pc = abuf->addr; |
| 747 | SEM_BRANCH_INIT |
| 748 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 749 | |
| 750 | do { |
| 751 | { |
| 752 | SI opval = ADDSI (pc, 4); |
| 753 | CPU (h_gr[((UINT) 14)]) = opval; |
| 754 | TRACE_RESULT (current_cpu, "gr-14", 'x', opval); |
| 755 | } |
| 756 | { |
| 757 | USI opval = FLD (f_disp24); |
| 758 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); |
| 759 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 760 | } |
| 761 | } while (0); |
| 762 | |
| 763 | SEM_BRANCH_FINI |
| 764 | return vpc; |
| 765 | #undef FLD |
| 766 | } |
| 767 | |
| 768 | /* bnc8: bnc.s $disp8 */ |
| 769 | |
| 770 | SEM_PC |
| 771 | SEM_FN_NAME (m32rbf,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 772 | { |
| 773 | #define FLD(f) abuf->fields.cti.fields.fmt_bc8.f |
| 774 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 775 | int UNUSED written = 0; |
| 776 | PCADDR UNUSED pc = abuf->addr; |
| 777 | SEM_BRANCH_INIT |
| 778 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 779 | |
| 780 | if (NOTBI (CPU (h_cond))) { |
| 781 | { |
| 782 | USI opval = FLD (f_disp8); |
| 783 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); |
| 784 | written |= (1 << 2); |
| 785 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 786 | } |
| 787 | } |
| 788 | |
| 789 | abuf->written = written; |
| 790 | SEM_BRANCH_FINI |
| 791 | return vpc; |
| 792 | #undef FLD |
| 793 | } |
| 794 | |
| 795 | /* bnc24: bnc.l $disp24 */ |
| 796 | |
| 797 | SEM_PC |
| 798 | SEM_FN_NAME (m32rbf,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 799 | { |
| 800 | #define FLD(f) abuf->fields.cti.fields.fmt_bc24.f |
| 801 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 802 | int UNUSED written = 0; |
| 803 | PCADDR UNUSED pc = abuf->addr; |
| 804 | SEM_BRANCH_INIT |
| 805 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 806 | |
| 807 | if (NOTBI (CPU (h_cond))) { |
| 808 | { |
| 809 | USI opval = FLD (f_disp24); |
| 810 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); |
| 811 | written |= (1 << 2); |
| 812 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 813 | } |
| 814 | } |
| 815 | |
| 816 | abuf->written = written; |
| 817 | SEM_BRANCH_FINI |
| 818 | return vpc; |
| 819 | #undef FLD |
| 820 | } |
| 821 | |
| 822 | /* bne: bne $src1,$src2,$disp16 */ |
| 823 | |
| 824 | SEM_PC |
| 825 | SEM_FN_NAME (m32rbf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 826 | { |
| 827 | #define FLD(f) abuf->fields.cti.fields.fmt_beq.f |
| 828 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 829 | int UNUSED written = 0; |
| 830 | PCADDR UNUSED pc = abuf->addr; |
| 831 | SEM_BRANCH_INIT |
| 832 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 833 | |
| 834 | if (NESI (* FLD (i_src1), * FLD (i_src2))) { |
| 835 | { |
| 836 | USI opval = FLD (f_disp16); |
| 837 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); |
| 838 | written |= (1 << 3); |
| 839 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 840 | } |
| 841 | } |
| 842 | |
| 843 | abuf->written = written; |
| 844 | SEM_BRANCH_FINI |
| 845 | return vpc; |
| 846 | #undef FLD |
| 847 | } |
| 848 | |
| 849 | /* bra8: bra.s $disp8 */ |
| 850 | |
| 851 | SEM_PC |
| 852 | SEM_FN_NAME (m32rbf,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 853 | { |
| 854 | #define FLD(f) abuf->fields.cti.fields.fmt_bra8.f |
| 855 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 856 | int UNUSED written = 0; |
| 857 | PCADDR UNUSED pc = abuf->addr; |
| 858 | SEM_BRANCH_INIT |
| 859 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 860 | |
| 861 | { |
| 862 | USI opval = FLD (f_disp8); |
| 863 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); |
| 864 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 865 | } |
| 866 | |
| 867 | SEM_BRANCH_FINI |
| 868 | return vpc; |
| 869 | #undef FLD |
| 870 | } |
| 871 | |
| 872 | /* bra24: bra.l $disp24 */ |
| 873 | |
| 874 | SEM_PC |
| 875 | SEM_FN_NAME (m32rbf,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 876 | { |
| 877 | #define FLD(f) abuf->fields.cti.fields.fmt_bra24.f |
| 878 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 879 | int UNUSED written = 0; |
| 880 | PCADDR UNUSED pc = abuf->addr; |
| 881 | SEM_BRANCH_INIT |
| 882 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 883 | |
| 884 | { |
| 885 | USI opval = FLD (f_disp24); |
| 886 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); |
| 887 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 888 | } |
| 889 | |
| 890 | SEM_BRANCH_FINI |
| 891 | return vpc; |
| 892 | #undef FLD |
| 893 | } |
| 894 | |
| 895 | /* cmp: cmp $src1,$src2 */ |
| 896 | |
| 897 | SEM_PC |
| 898 | SEM_FN_NAME (m32rbf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 899 | { |
| 900 | #define FLD(f) abuf->fields.fmt_cmp.f |
| 901 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 902 | int UNUSED written = 0; |
| 903 | PCADDR UNUSED pc = abuf->addr; |
| 904 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 905 | |
| 906 | { |
| 907 | BI opval = LTSI (* FLD (i_src1), * FLD (i_src2)); |
| 908 | CPU (h_cond) = opval; |
| 909 | TRACE_RESULT (current_cpu, "condbit", 'x', opval); |
| 910 | } |
| 911 | |
| 912 | return vpc; |
| 913 | #undef FLD |
| 914 | } |
| 915 | |
| 916 | /* cmpi: cmpi $src2,$simm16 */ |
| 917 | |
| 918 | SEM_PC |
| 919 | SEM_FN_NAME (m32rbf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 920 | { |
| 921 | #define FLD(f) abuf->fields.fmt_cmpi.f |
| 922 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 923 | int UNUSED written = 0; |
| 924 | PCADDR UNUSED pc = abuf->addr; |
| 925 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 926 | |
| 927 | { |
| 928 | BI opval = LTSI (* FLD (i_src2), FLD (f_simm16)); |
| 929 | CPU (h_cond) = opval; |
| 930 | TRACE_RESULT (current_cpu, "condbit", 'x', opval); |
| 931 | } |
| 932 | |
| 933 | return vpc; |
| 934 | #undef FLD |
| 935 | } |
| 936 | |
| 937 | /* cmpu: cmpu $src1,$src2 */ |
| 938 | |
| 939 | SEM_PC |
| 940 | SEM_FN_NAME (m32rbf,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 941 | { |
| 942 | #define FLD(f) abuf->fields.fmt_cmp.f |
| 943 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 944 | int UNUSED written = 0; |
| 945 | PCADDR UNUSED pc = abuf->addr; |
| 946 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 947 | |
| 948 | { |
| 949 | BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2)); |
| 950 | CPU (h_cond) = opval; |
| 951 | TRACE_RESULT (current_cpu, "condbit", 'x', opval); |
| 952 | } |
| 953 | |
| 954 | return vpc; |
| 955 | #undef FLD |
| 956 | } |
| 957 | |
| 958 | /* cmpui: cmpui $src2,$simm16 */ |
| 959 | |
| 960 | SEM_PC |
| 961 | SEM_FN_NAME (m32rbf,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 962 | { |
| 963 | #define FLD(f) abuf->fields.fmt_cmpi.f |
| 964 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 965 | int UNUSED written = 0; |
| 966 | PCADDR UNUSED pc = abuf->addr; |
| 967 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 968 | |
| 969 | { |
| 970 | BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16)); |
| 971 | CPU (h_cond) = opval; |
| 972 | TRACE_RESULT (current_cpu, "condbit", 'x', opval); |
| 973 | } |
| 974 | |
| 975 | return vpc; |
| 976 | #undef FLD |
| 977 | } |
| 978 | |
| 979 | /* div: div $dr,$sr */ |
| 980 | |
| 981 | SEM_PC |
| 982 | SEM_FN_NAME (m32rbf,div) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 983 | { |
| 984 | #define FLD(f) abuf->fields.fmt_div.f |
| 985 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 986 | int UNUSED written = 0; |
| 987 | PCADDR UNUSED pc = abuf->addr; |
| 988 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 989 | |
| 990 | if (NESI (* FLD (i_sr), 0)) { |
| 991 | { |
| 992 | SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr)); |
| 993 | * FLD (i_dr) = opval; |
| 994 | written |= (1 << 2); |
| 995 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 996 | } |
| 997 | } |
| 998 | |
| 999 | abuf->written = written; |
| 1000 | return vpc; |
| 1001 | #undef FLD |
| 1002 | } |
| 1003 | |
| 1004 | /* divu: divu $dr,$sr */ |
| 1005 | |
| 1006 | SEM_PC |
| 1007 | SEM_FN_NAME (m32rbf,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1008 | { |
| 1009 | #define FLD(f) abuf->fields.fmt_div.f |
| 1010 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1011 | int UNUSED written = 0; |
| 1012 | PCADDR UNUSED pc = abuf->addr; |
| 1013 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 1014 | |
| 1015 | if (NESI (* FLD (i_sr), 0)) { |
| 1016 | { |
| 1017 | SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr)); |
| 1018 | * FLD (i_dr) = opval; |
| 1019 | written |= (1 << 2); |
| 1020 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1021 | } |
| 1022 | } |
| 1023 | |
| 1024 | abuf->written = written; |
| 1025 | return vpc; |
| 1026 | #undef FLD |
| 1027 | } |
| 1028 | |
| 1029 | /* rem: rem $dr,$sr */ |
| 1030 | |
| 1031 | SEM_PC |
| 1032 | SEM_FN_NAME (m32rbf,rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1033 | { |
| 1034 | #define FLD(f) abuf->fields.fmt_div.f |
| 1035 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1036 | int UNUSED written = 0; |
| 1037 | PCADDR UNUSED pc = abuf->addr; |
| 1038 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 1039 | |
| 1040 | if (NESI (* FLD (i_sr), 0)) { |
| 1041 | { |
| 1042 | SI opval = MODSI (* FLD (i_dr), * FLD (i_sr)); |
| 1043 | * FLD (i_dr) = opval; |
| 1044 | written |= (1 << 2); |
| 1045 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1046 | } |
| 1047 | } |
| 1048 | |
| 1049 | abuf->written = written; |
| 1050 | return vpc; |
| 1051 | #undef FLD |
| 1052 | } |
| 1053 | |
| 1054 | /* remu: remu $dr,$sr */ |
| 1055 | |
| 1056 | SEM_PC |
| 1057 | SEM_FN_NAME (m32rbf,remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1058 | { |
| 1059 | #define FLD(f) abuf->fields.fmt_div.f |
| 1060 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1061 | int UNUSED written = 0; |
| 1062 | PCADDR UNUSED pc = abuf->addr; |
| 1063 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 1064 | |
| 1065 | if (NESI (* FLD (i_sr), 0)) { |
| 1066 | { |
| 1067 | SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr)); |
| 1068 | * FLD (i_dr) = opval; |
| 1069 | written |= (1 << 2); |
| 1070 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1071 | } |
| 1072 | } |
| 1073 | |
| 1074 | abuf->written = written; |
| 1075 | return vpc; |
| 1076 | #undef FLD |
| 1077 | } |
| 1078 | |
| 1079 | /* jl: jl $sr */ |
| 1080 | |
| 1081 | SEM_PC |
| 1082 | SEM_FN_NAME (m32rbf,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1083 | { |
| 1084 | #define FLD(f) abuf->fields.cti.fields.fmt_jl.f |
| 1085 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1086 | int UNUSED written = 0; |
| 1087 | PCADDR UNUSED pc = abuf->addr; |
| 1088 | SEM_BRANCH_INIT |
| 1089 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1090 | |
| 1091 | do { |
| 1092 | USI temp1;SI temp0; |
| 1093 | temp0 = ADDSI (ANDSI (pc, -4), 4); |
| 1094 | temp1 = ANDSI (* FLD (i_sr), -4); |
| 1095 | { |
| 1096 | SI opval = temp0; |
| 1097 | CPU (h_gr[((UINT) 14)]) = opval; |
| 1098 | TRACE_RESULT (current_cpu, "gr-14", 'x', opval); |
| 1099 | } |
| 1100 | { |
| 1101 | USI opval = temp1; |
| 1102 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); |
| 1103 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 1104 | } |
| 1105 | } while (0); |
| 1106 | |
| 1107 | SEM_BRANCH_FINI |
| 1108 | return vpc; |
| 1109 | #undef FLD |
| 1110 | } |
| 1111 | |
| 1112 | /* jmp: jmp $sr */ |
| 1113 | |
| 1114 | SEM_PC |
| 1115 | SEM_FN_NAME (m32rbf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1116 | { |
| 1117 | #define FLD(f) abuf->fields.cti.fields.fmt_jmp.f |
| 1118 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1119 | int UNUSED written = 0; |
| 1120 | PCADDR UNUSED pc = abuf->addr; |
| 1121 | SEM_BRANCH_INIT |
| 1122 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1123 | |
| 1124 | { |
| 1125 | USI opval = ANDSI (* FLD (i_sr), -4); |
| 1126 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); |
| 1127 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 1128 | } |
| 1129 | |
| 1130 | SEM_BRANCH_FINI |
| 1131 | return vpc; |
| 1132 | #undef FLD |
| 1133 | } |
| 1134 | |
| 1135 | /* ld: ld $dr,@$sr */ |
| 1136 | |
| 1137 | SEM_PC |
| 1138 | SEM_FN_NAME (m32rbf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1139 | { |
| 1140 | #define FLD(f) abuf->fields.fmt_ld.f |
| 1141 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1142 | int UNUSED written = 0; |
| 1143 | PCADDR UNUSED pc = abuf->addr; |
| 1144 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1145 | |
| 1146 | { |
| 1147 | SI opval = GETMEMSI (current_cpu, * FLD (i_sr)); |
| 1148 | * FLD (i_dr) = opval; |
| 1149 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1150 | } |
| 1151 | |
| 1152 | return vpc; |
| 1153 | #undef FLD |
| 1154 | } |
| 1155 | |
| 1156 | /* ld-d: ld $dr,@($slo16,$sr) */ |
| 1157 | |
| 1158 | SEM_PC |
| 1159 | SEM_FN_NAME (m32rbf,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1160 | { |
| 1161 | #define FLD(f) abuf->fields.fmt_ld_d.f |
| 1162 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1163 | int UNUSED written = 0; |
| 1164 | PCADDR UNUSED pc = abuf->addr; |
| 1165 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 1166 | |
| 1167 | { |
| 1168 | SI opval = GETMEMSI (current_cpu, ADDSI (* FLD (i_sr), FLD (f_simm16))); |
| 1169 | * FLD (i_dr) = opval; |
| 1170 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1171 | } |
| 1172 | |
| 1173 | return vpc; |
| 1174 | #undef FLD |
| 1175 | } |
| 1176 | |
| 1177 | /* ldb: ldb $dr,@$sr */ |
| 1178 | |
| 1179 | SEM_PC |
| 1180 | SEM_FN_NAME (m32rbf,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1181 | { |
| 1182 | #define FLD(f) abuf->fields.fmt_ldb.f |
| 1183 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1184 | int UNUSED written = 0; |
| 1185 | PCADDR UNUSED pc = abuf->addr; |
| 1186 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1187 | |
| 1188 | { |
| 1189 | SI opval = EXTQISI (GETMEMQI (current_cpu, * FLD (i_sr))); |
| 1190 | * FLD (i_dr) = opval; |
| 1191 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1192 | } |
| 1193 | |
| 1194 | return vpc; |
| 1195 | #undef FLD |
| 1196 | } |
| 1197 | |
| 1198 | /* ldb-d: ldb $dr,@($slo16,$sr) */ |
| 1199 | |
| 1200 | SEM_PC |
| 1201 | SEM_FN_NAME (m32rbf,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1202 | { |
| 1203 | #define FLD(f) abuf->fields.fmt_ldb_d.f |
| 1204 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1205 | int UNUSED written = 0; |
| 1206 | PCADDR UNUSED pc = abuf->addr; |
| 1207 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 1208 | |
| 1209 | { |
| 1210 | SI opval = EXTQISI (GETMEMQI (current_cpu, ADDSI (* FLD (i_sr), FLD (f_simm16)))); |
| 1211 | * FLD (i_dr) = opval; |
| 1212 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1213 | } |
| 1214 | |
| 1215 | return vpc; |
| 1216 | #undef FLD |
| 1217 | } |
| 1218 | |
| 1219 | /* ldh: ldh $dr,@$sr */ |
| 1220 | |
| 1221 | SEM_PC |
| 1222 | SEM_FN_NAME (m32rbf,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1223 | { |
| 1224 | #define FLD(f) abuf->fields.fmt_ldh.f |
| 1225 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1226 | int UNUSED written = 0; |
| 1227 | PCADDR UNUSED pc = abuf->addr; |
| 1228 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1229 | |
| 1230 | { |
| 1231 | SI opval = EXTHISI (GETMEMHI (current_cpu, * FLD (i_sr))); |
| 1232 | * FLD (i_dr) = opval; |
| 1233 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1234 | } |
| 1235 | |
| 1236 | return vpc; |
| 1237 | #undef FLD |
| 1238 | } |
| 1239 | |
| 1240 | /* ldh-d: ldh $dr,@($slo16,$sr) */ |
| 1241 | |
| 1242 | SEM_PC |
| 1243 | SEM_FN_NAME (m32rbf,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1244 | { |
| 1245 | #define FLD(f) abuf->fields.fmt_ldh_d.f |
| 1246 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1247 | int UNUSED written = 0; |
| 1248 | PCADDR UNUSED pc = abuf->addr; |
| 1249 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 1250 | |
| 1251 | { |
| 1252 | SI opval = EXTHISI (GETMEMHI (current_cpu, ADDSI (* FLD (i_sr), FLD (f_simm16)))); |
| 1253 | * FLD (i_dr) = opval; |
| 1254 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1255 | } |
| 1256 | |
| 1257 | return vpc; |
| 1258 | #undef FLD |
| 1259 | } |
| 1260 | |
| 1261 | /* ldub: ldub $dr,@$sr */ |
| 1262 | |
| 1263 | SEM_PC |
| 1264 | SEM_FN_NAME (m32rbf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1265 | { |
| 1266 | #define FLD(f) abuf->fields.fmt_ldb.f |
| 1267 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1268 | int UNUSED written = 0; |
| 1269 | PCADDR UNUSED pc = abuf->addr; |
| 1270 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1271 | |
| 1272 | { |
| 1273 | SI opval = ZEXTQISI (GETMEMQI (current_cpu, * FLD (i_sr))); |
| 1274 | * FLD (i_dr) = opval; |
| 1275 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1276 | } |
| 1277 | |
| 1278 | return vpc; |
| 1279 | #undef FLD |
| 1280 | } |
| 1281 | |
| 1282 | /* ldub-d: ldub $dr,@($slo16,$sr) */ |
| 1283 | |
| 1284 | SEM_PC |
| 1285 | SEM_FN_NAME (m32rbf,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1286 | { |
| 1287 | #define FLD(f) abuf->fields.fmt_ldb_d.f |
| 1288 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1289 | int UNUSED written = 0; |
| 1290 | PCADDR UNUSED pc = abuf->addr; |
| 1291 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 1292 | |
| 1293 | { |
| 1294 | SI opval = ZEXTQISI (GETMEMQI (current_cpu, ADDSI (* FLD (i_sr), FLD (f_simm16)))); |
| 1295 | * FLD (i_dr) = opval; |
| 1296 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1297 | } |
| 1298 | |
| 1299 | return vpc; |
| 1300 | #undef FLD |
| 1301 | } |
| 1302 | |
| 1303 | /* lduh: lduh $dr,@$sr */ |
| 1304 | |
| 1305 | SEM_PC |
| 1306 | SEM_FN_NAME (m32rbf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1307 | { |
| 1308 | #define FLD(f) abuf->fields.fmt_ldh.f |
| 1309 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1310 | int UNUSED written = 0; |
| 1311 | PCADDR UNUSED pc = abuf->addr; |
| 1312 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1313 | |
| 1314 | { |
| 1315 | SI opval = ZEXTHISI (GETMEMHI (current_cpu, * FLD (i_sr))); |
| 1316 | * FLD (i_dr) = opval; |
| 1317 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1318 | } |
| 1319 | |
| 1320 | return vpc; |
| 1321 | #undef FLD |
| 1322 | } |
| 1323 | |
| 1324 | /* lduh-d: lduh $dr,@($slo16,$sr) */ |
| 1325 | |
| 1326 | SEM_PC |
| 1327 | SEM_FN_NAME (m32rbf,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1328 | { |
| 1329 | #define FLD(f) abuf->fields.fmt_ldh_d.f |
| 1330 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1331 | int UNUSED written = 0; |
| 1332 | PCADDR UNUSED pc = abuf->addr; |
| 1333 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 1334 | |
| 1335 | { |
| 1336 | SI opval = ZEXTHISI (GETMEMHI (current_cpu, ADDSI (* FLD (i_sr), FLD (f_simm16)))); |
| 1337 | * FLD (i_dr) = opval; |
| 1338 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1339 | } |
| 1340 | |
| 1341 | return vpc; |
| 1342 | #undef FLD |
| 1343 | } |
| 1344 | |
| 1345 | /* ld-plus: ld $dr,@$sr+ */ |
| 1346 | |
| 1347 | SEM_PC |
| 1348 | SEM_FN_NAME (m32rbf,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1349 | { |
| 1350 | #define FLD(f) abuf->fields.fmt_ld_plus.f |
| 1351 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1352 | int UNUSED written = 0; |
| 1353 | PCADDR UNUSED pc = abuf->addr; |
| 1354 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1355 | |
| 1356 | do { |
| 1357 | SI temp1;SI temp0; |
| 1358 | temp0 = GETMEMSI (current_cpu, * FLD (i_sr)); |
| 1359 | temp1 = ADDSI (* FLD (i_sr), 4); |
| 1360 | { |
| 1361 | SI opval = temp0; |
| 1362 | * FLD (i_dr) = opval; |
| 1363 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1364 | } |
| 1365 | { |
| 1366 | SI opval = temp1; |
| 1367 | * FLD (i_sr) = opval; |
| 1368 | TRACE_RESULT (current_cpu, "sr", 'x', opval); |
| 1369 | } |
| 1370 | } while (0); |
| 1371 | |
| 1372 | return vpc; |
| 1373 | #undef FLD |
| 1374 | } |
| 1375 | |
| 1376 | /* ld24: ld24 $dr,$uimm24 */ |
| 1377 | |
| 1378 | SEM_PC |
| 1379 | SEM_FN_NAME (m32rbf,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1380 | { |
| 1381 | #define FLD(f) abuf->fields.fmt_ld24.f |
| 1382 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1383 | int UNUSED written = 0; |
| 1384 | PCADDR UNUSED pc = abuf->addr; |
| 1385 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 1386 | |
| 1387 | { |
| 1388 | SI opval = FLD (f_uimm24); |
| 1389 | * FLD (i_dr) = opval; |
| 1390 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1391 | } |
| 1392 | |
| 1393 | return vpc; |
| 1394 | #undef FLD |
| 1395 | } |
| 1396 | |
| 1397 | /* ldi8: ldi8 $dr,$simm8 */ |
| 1398 | |
| 1399 | SEM_PC |
| 1400 | SEM_FN_NAME (m32rbf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1401 | { |
| 1402 | #define FLD(f) abuf->fields.fmt_ldi8.f |
| 1403 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1404 | int UNUSED written = 0; |
| 1405 | PCADDR UNUSED pc = abuf->addr; |
| 1406 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1407 | |
| 1408 | { |
| 1409 | SI opval = FLD (f_simm8); |
| 1410 | * FLD (i_dr) = opval; |
| 1411 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1412 | } |
| 1413 | |
| 1414 | return vpc; |
| 1415 | #undef FLD |
| 1416 | } |
| 1417 | |
| 1418 | /* ldi16: ldi16 $dr,$hash$slo16 */ |
| 1419 | |
| 1420 | SEM_PC |
| 1421 | SEM_FN_NAME (m32rbf,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1422 | { |
| 1423 | #define FLD(f) abuf->fields.fmt_ldi16.f |
| 1424 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1425 | int UNUSED written = 0; |
| 1426 | PCADDR UNUSED pc = abuf->addr; |
| 1427 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 1428 | |
| 1429 | { |
| 1430 | SI opval = FLD (f_simm16); |
| 1431 | * FLD (i_dr) = opval; |
| 1432 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1433 | } |
| 1434 | |
| 1435 | return vpc; |
| 1436 | #undef FLD |
| 1437 | } |
| 1438 | |
| 1439 | /* lock: lock $dr,@$sr */ |
| 1440 | |
| 1441 | SEM_PC |
| 1442 | SEM_FN_NAME (m32rbf,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1443 | { |
| 1444 | #define FLD(f) abuf->fields.fmt_lock.f |
| 1445 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1446 | int UNUSED written = 0; |
| 1447 | PCADDR UNUSED pc = abuf->addr; |
| 1448 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1449 | |
| 1450 | do { |
| 1451 | { |
| 1452 | BI opval = 1; |
| 1453 | CPU (h_lock) = opval; |
| 1454 | TRACE_RESULT (current_cpu, "lock-0", 'x', opval); |
| 1455 | } |
| 1456 | { |
| 1457 | SI opval = GETMEMSI (current_cpu, * FLD (i_sr)); |
| 1458 | * FLD (i_dr) = opval; |
| 1459 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1460 | } |
| 1461 | } while (0); |
| 1462 | |
| 1463 | return vpc; |
| 1464 | #undef FLD |
| 1465 | } |
| 1466 | |
| 1467 | /* machi: machi $src1,$src2 */ |
| 1468 | |
| 1469 | SEM_PC |
| 1470 | SEM_FN_NAME (m32rbf,machi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1471 | { |
| 1472 | #define FLD(f) abuf->fields.fmt_machi.f |
| 1473 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1474 | int UNUSED written = 0; |
| 1475 | PCADDR UNUSED pc = abuf->addr; |
| 1476 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1477 | |
| 1478 | { |
| 1479 | DI opval = SRADI (SLLDI (ADDDI (m32rbf_h_accum_get (current_cpu), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8); |
| 1480 | m32rbf_h_accum_set (current_cpu, opval); |
| 1481 | TRACE_RESULT (current_cpu, "accum", 'D', opval); |
| 1482 | } |
| 1483 | |
| 1484 | return vpc; |
| 1485 | #undef FLD |
| 1486 | } |
| 1487 | |
| 1488 | /* maclo: maclo $src1,$src2 */ |
| 1489 | |
| 1490 | SEM_PC |
| 1491 | SEM_FN_NAME (m32rbf,maclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1492 | { |
| 1493 | #define FLD(f) abuf->fields.fmt_machi.f |
| 1494 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1495 | int UNUSED written = 0; |
| 1496 | PCADDR UNUSED pc = abuf->addr; |
| 1497 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1498 | |
| 1499 | { |
| 1500 | DI opval = SRADI (SLLDI (ADDDI (m32rbf_h_accum_get (current_cpu), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8); |
| 1501 | m32rbf_h_accum_set (current_cpu, opval); |
| 1502 | TRACE_RESULT (current_cpu, "accum", 'D', opval); |
| 1503 | } |
| 1504 | |
| 1505 | return vpc; |
| 1506 | #undef FLD |
| 1507 | } |
| 1508 | |
| 1509 | /* macwhi: macwhi $src1,$src2 */ |
| 1510 | |
| 1511 | SEM_PC |
| 1512 | SEM_FN_NAME (m32rbf,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1513 | { |
| 1514 | #define FLD(f) abuf->fields.fmt_machi.f |
| 1515 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1516 | int UNUSED written = 0; |
| 1517 | PCADDR UNUSED pc = abuf->addr; |
| 1518 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1519 | |
| 1520 | { |
| 1521 | DI opval = SRADI (SLLDI (ADDDI (m32rbf_h_accum_get (current_cpu), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8); |
| 1522 | m32rbf_h_accum_set (current_cpu, opval); |
| 1523 | TRACE_RESULT (current_cpu, "accum", 'D', opval); |
| 1524 | } |
| 1525 | |
| 1526 | return vpc; |
| 1527 | #undef FLD |
| 1528 | } |
| 1529 | |
| 1530 | /* macwlo: macwlo $src1,$src2 */ |
| 1531 | |
| 1532 | SEM_PC |
| 1533 | SEM_FN_NAME (m32rbf,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1534 | { |
| 1535 | #define FLD(f) abuf->fields.fmt_machi.f |
| 1536 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1537 | int UNUSED written = 0; |
| 1538 | PCADDR UNUSED pc = abuf->addr; |
| 1539 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1540 | |
| 1541 | { |
| 1542 | DI opval = SRADI (SLLDI (ADDDI (m32rbf_h_accum_get (current_cpu), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8); |
| 1543 | m32rbf_h_accum_set (current_cpu, opval); |
| 1544 | TRACE_RESULT (current_cpu, "accum", 'D', opval); |
| 1545 | } |
| 1546 | |
| 1547 | return vpc; |
| 1548 | #undef FLD |
| 1549 | } |
| 1550 | |
| 1551 | /* mul: mul $dr,$sr */ |
| 1552 | |
| 1553 | SEM_PC |
| 1554 | SEM_FN_NAME (m32rbf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1555 | { |
| 1556 | #define FLD(f) abuf->fields.fmt_add.f |
| 1557 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1558 | int UNUSED written = 0; |
| 1559 | PCADDR UNUSED pc = abuf->addr; |
| 1560 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1561 | |
| 1562 | { |
| 1563 | SI opval = MULSI (* FLD (i_dr), * FLD (i_sr)); |
| 1564 | * FLD (i_dr) = opval; |
| 1565 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1566 | } |
| 1567 | |
| 1568 | return vpc; |
| 1569 | #undef FLD |
| 1570 | } |
| 1571 | |
| 1572 | /* mulhi: mulhi $src1,$src2 */ |
| 1573 | |
| 1574 | SEM_PC |
| 1575 | SEM_FN_NAME (m32rbf,mulhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1576 | { |
| 1577 | #define FLD(f) abuf->fields.fmt_mulhi.f |
| 1578 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1579 | int UNUSED written = 0; |
| 1580 | PCADDR UNUSED pc = abuf->addr; |
| 1581 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1582 | |
| 1583 | { |
| 1584 | DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16); |
| 1585 | m32rbf_h_accum_set (current_cpu, opval); |
| 1586 | TRACE_RESULT (current_cpu, "accum", 'D', opval); |
| 1587 | } |
| 1588 | |
| 1589 | return vpc; |
| 1590 | #undef FLD |
| 1591 | } |
| 1592 | |
| 1593 | /* mullo: mullo $src1,$src2 */ |
| 1594 | |
| 1595 | SEM_PC |
| 1596 | SEM_FN_NAME (m32rbf,mullo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1597 | { |
| 1598 | #define FLD(f) abuf->fields.fmt_mulhi.f |
| 1599 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1600 | int UNUSED written = 0; |
| 1601 | PCADDR UNUSED pc = abuf->addr; |
| 1602 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1603 | |
| 1604 | { |
| 1605 | DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16); |
| 1606 | m32rbf_h_accum_set (current_cpu, opval); |
| 1607 | TRACE_RESULT (current_cpu, "accum", 'D', opval); |
| 1608 | } |
| 1609 | |
| 1610 | return vpc; |
| 1611 | #undef FLD |
| 1612 | } |
| 1613 | |
| 1614 | /* mulwhi: mulwhi $src1,$src2 */ |
| 1615 | |
| 1616 | SEM_PC |
| 1617 | SEM_FN_NAME (m32rbf,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1618 | { |
| 1619 | #define FLD(f) abuf->fields.fmt_mulhi.f |
| 1620 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1621 | int UNUSED written = 0; |
| 1622 | PCADDR UNUSED pc = abuf->addr; |
| 1623 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1624 | |
| 1625 | { |
| 1626 | DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 8), 8); |
| 1627 | m32rbf_h_accum_set (current_cpu, opval); |
| 1628 | TRACE_RESULT (current_cpu, "accum", 'D', opval); |
| 1629 | } |
| 1630 | |
| 1631 | return vpc; |
| 1632 | #undef FLD |
| 1633 | } |
| 1634 | |
| 1635 | /* mulwlo: mulwlo $src1,$src2 */ |
| 1636 | |
| 1637 | SEM_PC |
| 1638 | SEM_FN_NAME (m32rbf,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1639 | { |
| 1640 | #define FLD(f) abuf->fields.fmt_mulhi.f |
| 1641 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1642 | int UNUSED written = 0; |
| 1643 | PCADDR UNUSED pc = abuf->addr; |
| 1644 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1645 | |
| 1646 | { |
| 1647 | DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 8), 8); |
| 1648 | m32rbf_h_accum_set (current_cpu, opval); |
| 1649 | TRACE_RESULT (current_cpu, "accum", 'D', opval); |
| 1650 | } |
| 1651 | |
| 1652 | return vpc; |
| 1653 | #undef FLD |
| 1654 | } |
| 1655 | |
| 1656 | /* mv: mv $dr,$sr */ |
| 1657 | |
| 1658 | SEM_PC |
| 1659 | SEM_FN_NAME (m32rbf,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1660 | { |
| 1661 | #define FLD(f) abuf->fields.fmt_mv.f |
| 1662 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1663 | int UNUSED written = 0; |
| 1664 | PCADDR UNUSED pc = abuf->addr; |
| 1665 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1666 | |
| 1667 | { |
| 1668 | SI opval = * FLD (i_sr); |
| 1669 | * FLD (i_dr) = opval; |
| 1670 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1671 | } |
| 1672 | |
| 1673 | return vpc; |
| 1674 | #undef FLD |
| 1675 | } |
| 1676 | |
| 1677 | /* mvfachi: mvfachi $dr */ |
| 1678 | |
| 1679 | SEM_PC |
| 1680 | SEM_FN_NAME (m32rbf,mvfachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1681 | { |
| 1682 | #define FLD(f) abuf->fields.fmt_mvfachi.f |
| 1683 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1684 | int UNUSED written = 0; |
| 1685 | PCADDR UNUSED pc = abuf->addr; |
| 1686 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1687 | |
| 1688 | { |
| 1689 | SI opval = TRUNCDISI (SRADI (m32rbf_h_accum_get (current_cpu), 32)); |
| 1690 | * FLD (i_dr) = opval; |
| 1691 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1692 | } |
| 1693 | |
| 1694 | return vpc; |
| 1695 | #undef FLD |
| 1696 | } |
| 1697 | |
| 1698 | /* mvfaclo: mvfaclo $dr */ |
| 1699 | |
| 1700 | SEM_PC |
| 1701 | SEM_FN_NAME (m32rbf,mvfaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1702 | { |
| 1703 | #define FLD(f) abuf->fields.fmt_mvfachi.f |
| 1704 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1705 | int UNUSED written = 0; |
| 1706 | PCADDR UNUSED pc = abuf->addr; |
| 1707 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1708 | |
| 1709 | { |
| 1710 | SI opval = TRUNCDISI (m32rbf_h_accum_get (current_cpu)); |
| 1711 | * FLD (i_dr) = opval; |
| 1712 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1713 | } |
| 1714 | |
| 1715 | return vpc; |
| 1716 | #undef FLD |
| 1717 | } |
| 1718 | |
| 1719 | /* mvfacmi: mvfacmi $dr */ |
| 1720 | |
| 1721 | SEM_PC |
| 1722 | SEM_FN_NAME (m32rbf,mvfacmi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1723 | { |
| 1724 | #define FLD(f) abuf->fields.fmt_mvfachi.f |
| 1725 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1726 | int UNUSED written = 0; |
| 1727 | PCADDR UNUSED pc = abuf->addr; |
| 1728 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1729 | |
| 1730 | { |
| 1731 | SI opval = TRUNCDISI (SRADI (m32rbf_h_accum_get (current_cpu), 16)); |
| 1732 | * FLD (i_dr) = opval; |
| 1733 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1734 | } |
| 1735 | |
| 1736 | return vpc; |
| 1737 | #undef FLD |
| 1738 | } |
| 1739 | |
| 1740 | /* mvfc: mvfc $dr,$scr */ |
| 1741 | |
| 1742 | SEM_PC |
| 1743 | SEM_FN_NAME (m32rbf,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1744 | { |
| 1745 | #define FLD(f) abuf->fields.fmt_mvfc.f |
| 1746 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1747 | int UNUSED written = 0; |
| 1748 | PCADDR UNUSED pc = abuf->addr; |
| 1749 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1750 | |
| 1751 | { |
| 1752 | SI opval = m32rbf_h_cr_get (current_cpu, FLD (f_r2)); |
| 1753 | * FLD (i_dr) = opval; |
| 1754 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1755 | } |
| 1756 | |
| 1757 | return vpc; |
| 1758 | #undef FLD |
| 1759 | } |
| 1760 | |
| 1761 | /* mvtachi: mvtachi $src1 */ |
| 1762 | |
| 1763 | SEM_PC |
| 1764 | SEM_FN_NAME (m32rbf,mvtachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1765 | { |
| 1766 | #define FLD(f) abuf->fields.fmt_mvtachi.f |
| 1767 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1768 | int UNUSED written = 0; |
| 1769 | PCADDR UNUSED pc = abuf->addr; |
| 1770 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1771 | |
| 1772 | { |
| 1773 | DI opval = ORDI (ANDDI (m32rbf_h_accum_get (current_cpu), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32)); |
| 1774 | m32rbf_h_accum_set (current_cpu, opval); |
| 1775 | TRACE_RESULT (current_cpu, "accum", 'D', opval); |
| 1776 | } |
| 1777 | |
| 1778 | return vpc; |
| 1779 | #undef FLD |
| 1780 | } |
| 1781 | |
| 1782 | /* mvtaclo: mvtaclo $src1 */ |
| 1783 | |
| 1784 | SEM_PC |
| 1785 | SEM_FN_NAME (m32rbf,mvtaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1786 | { |
| 1787 | #define FLD(f) abuf->fields.fmt_mvtachi.f |
| 1788 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1789 | int UNUSED written = 0; |
| 1790 | PCADDR UNUSED pc = abuf->addr; |
| 1791 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1792 | |
| 1793 | { |
| 1794 | DI opval = ORDI (ANDDI (m32rbf_h_accum_get (current_cpu), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1))); |
| 1795 | m32rbf_h_accum_set (current_cpu, opval); |
| 1796 | TRACE_RESULT (current_cpu, "accum", 'D', opval); |
| 1797 | } |
| 1798 | |
| 1799 | return vpc; |
| 1800 | #undef FLD |
| 1801 | } |
| 1802 | |
| 1803 | /* mvtc: mvtc $sr,$dcr */ |
| 1804 | |
| 1805 | SEM_PC |
| 1806 | SEM_FN_NAME (m32rbf,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1807 | { |
| 1808 | #define FLD(f) abuf->fields.fmt_mvtc.f |
| 1809 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1810 | int UNUSED written = 0; |
| 1811 | PCADDR UNUSED pc = abuf->addr; |
| 1812 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1813 | |
| 1814 | { |
| 1815 | USI opval = * FLD (i_sr); |
| 1816 | m32rbf_h_cr_set (current_cpu, FLD (f_r1), opval); |
| 1817 | TRACE_RESULT (current_cpu, "dcr", 'x', opval); |
| 1818 | } |
| 1819 | |
| 1820 | return vpc; |
| 1821 | #undef FLD |
| 1822 | } |
| 1823 | |
| 1824 | /* neg: neg $dr,$sr */ |
| 1825 | |
| 1826 | SEM_PC |
| 1827 | SEM_FN_NAME (m32rbf,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1828 | { |
| 1829 | #define FLD(f) abuf->fields.fmt_mv.f |
| 1830 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1831 | int UNUSED written = 0; |
| 1832 | PCADDR UNUSED pc = abuf->addr; |
| 1833 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1834 | |
| 1835 | { |
| 1836 | SI opval = NEGSI (* FLD (i_sr)); |
| 1837 | * FLD (i_dr) = opval; |
| 1838 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1839 | } |
| 1840 | |
| 1841 | return vpc; |
| 1842 | #undef FLD |
| 1843 | } |
| 1844 | |
| 1845 | /* nop: nop */ |
| 1846 | |
| 1847 | SEM_PC |
| 1848 | SEM_FN_NAME (m32rbf,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1849 | { |
| 1850 | #define FLD(f) abuf->fields.fmt_nop.f |
| 1851 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1852 | int UNUSED written = 0; |
| 1853 | PCADDR UNUSED pc = abuf->addr; |
| 1854 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1855 | |
| 1856 | PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr); |
| 1857 | |
| 1858 | return vpc; |
| 1859 | #undef FLD |
| 1860 | } |
| 1861 | |
| 1862 | /* not: not $dr,$sr */ |
| 1863 | |
| 1864 | SEM_PC |
| 1865 | SEM_FN_NAME (m32rbf,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1866 | { |
| 1867 | #define FLD(f) abuf->fields.fmt_mv.f |
| 1868 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1869 | int UNUSED written = 0; |
| 1870 | PCADDR UNUSED pc = abuf->addr; |
| 1871 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1872 | |
| 1873 | { |
| 1874 | SI opval = INVSI (* FLD (i_sr)); |
| 1875 | * FLD (i_dr) = opval; |
| 1876 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1877 | } |
| 1878 | |
| 1879 | return vpc; |
| 1880 | #undef FLD |
| 1881 | } |
| 1882 | |
| 1883 | /* rac: rac */ |
| 1884 | |
| 1885 | SEM_PC |
| 1886 | SEM_FN_NAME (m32rbf,rac) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1887 | { |
| 1888 | #define FLD(f) abuf->fields.fmt_rac.f |
| 1889 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1890 | int UNUSED written = 0; |
| 1891 | PCADDR UNUSED pc = abuf->addr; |
| 1892 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1893 | |
| 1894 | do { |
| 1895 | DI tmp_tmp1; |
| 1896 | tmp_tmp1 = SLLDI (m32rbf_h_accum_get (current_cpu), 1); |
| 1897 | tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768)); |
| 1898 | { |
| 1899 | DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000))); |
| 1900 | m32rbf_h_accum_set (current_cpu, opval); |
| 1901 | TRACE_RESULT (current_cpu, "accum", 'D', opval); |
| 1902 | } |
| 1903 | } while (0); |
| 1904 | |
| 1905 | return vpc; |
| 1906 | #undef FLD |
| 1907 | } |
| 1908 | |
| 1909 | /* rach: rach */ |
| 1910 | |
| 1911 | SEM_PC |
| 1912 | SEM_FN_NAME (m32rbf,rach) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1913 | { |
| 1914 | #define FLD(f) abuf->fields.fmt_rac.f |
| 1915 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1916 | int UNUSED written = 0; |
| 1917 | PCADDR UNUSED pc = abuf->addr; |
| 1918 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1919 | |
| 1920 | do { |
| 1921 | DI tmp_tmp1; |
| 1922 | tmp_tmp1 = ANDDI (m32rbf_h_accum_get (current_cpu), MAKEDI (16777215, 0xffffffff)); |
| 1923 | if (ANDIF (GEDI (tmp_tmp1, MAKEDI (16383, 0x80000000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff)))) { |
| 1924 | tmp_tmp1 = MAKEDI (16383, 0x80000000); |
| 1925 | } else { |
| 1926 | if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0)))) { |
| 1927 | tmp_tmp1 = MAKEDI (16760832, 0); |
| 1928 | } else { |
| 1929 | tmp_tmp1 = ANDDI (ADDDI (m32rbf_h_accum_get (current_cpu), MAKEDI (0, 1073741824)), MAKEDI (0xffffffff, 0x80000000)); |
| 1930 | } |
| 1931 | } |
| 1932 | tmp_tmp1 = SLLDI (tmp_tmp1, 1); |
| 1933 | { |
| 1934 | DI opval = SRADI (SLLDI (tmp_tmp1, 7), 7); |
| 1935 | m32rbf_h_accum_set (current_cpu, opval); |
| 1936 | TRACE_RESULT (current_cpu, "accum", 'D', opval); |
| 1937 | } |
| 1938 | } while (0); |
| 1939 | |
| 1940 | return vpc; |
| 1941 | #undef FLD |
| 1942 | } |
| 1943 | |
| 1944 | /* rte: rte */ |
| 1945 | |
| 1946 | SEM_PC |
| 1947 | SEM_FN_NAME (m32rbf,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1948 | { |
| 1949 | #define FLD(f) abuf->fields.cti.fields.fmt_rte.f |
| 1950 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1951 | int UNUSED written = 0; |
| 1952 | PCADDR UNUSED pc = abuf->addr; |
| 1953 | SEM_BRANCH_INIT |
| 1954 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 1955 | |
| 1956 | do { |
| 1957 | { |
| 1958 | USI opval = ANDSI (m32rbf_h_cr_get (current_cpu, ((UINT) 6)), -4); |
| 1959 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); |
| 1960 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 1961 | } |
| 1962 | { |
| 1963 | USI opval = m32rbf_h_cr_get (current_cpu, ((UINT) 14)); |
| 1964 | m32rbf_h_cr_set (current_cpu, ((UINT) 6), opval); |
| 1965 | TRACE_RESULT (current_cpu, "cr-6", 'x', opval); |
| 1966 | } |
| 1967 | { |
| 1968 | UQI opval = CPU (h_bpsw); |
| 1969 | m32rbf_h_psw_set (current_cpu, opval); |
| 1970 | TRACE_RESULT (current_cpu, "psw-0", 'x', opval); |
| 1971 | } |
| 1972 | { |
| 1973 | UQI opval = CPU (h_bbpsw); |
| 1974 | CPU (h_bpsw) = opval; |
| 1975 | TRACE_RESULT (current_cpu, "bpsw-0", 'x', opval); |
| 1976 | } |
| 1977 | } while (0); |
| 1978 | |
| 1979 | SEM_BRANCH_FINI |
| 1980 | return vpc; |
| 1981 | #undef FLD |
| 1982 | } |
| 1983 | |
| 1984 | /* seth: seth $dr,$hash$hi16 */ |
| 1985 | |
| 1986 | SEM_PC |
| 1987 | SEM_FN_NAME (m32rbf,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 1988 | { |
| 1989 | #define FLD(f) abuf->fields.fmt_seth.f |
| 1990 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 1991 | int UNUSED written = 0; |
| 1992 | PCADDR UNUSED pc = abuf->addr; |
| 1993 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 1994 | |
| 1995 | { |
| 1996 | SI opval = SLLSI (FLD (f_hi16), 16); |
| 1997 | * FLD (i_dr) = opval; |
| 1998 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 1999 | } |
| 2000 | |
| 2001 | return vpc; |
| 2002 | #undef FLD |
| 2003 | } |
| 2004 | |
| 2005 | /* sll: sll $dr,$sr */ |
| 2006 | |
| 2007 | SEM_PC |
| 2008 | SEM_FN_NAME (m32rbf,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2009 | { |
| 2010 | #define FLD(f) abuf->fields.fmt_add.f |
| 2011 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2012 | int UNUSED written = 0; |
| 2013 | PCADDR UNUSED pc = abuf->addr; |
| 2014 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 2015 | |
| 2016 | { |
| 2017 | SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); |
| 2018 | * FLD (i_dr) = opval; |
| 2019 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 2020 | } |
| 2021 | |
| 2022 | return vpc; |
| 2023 | #undef FLD |
| 2024 | } |
| 2025 | |
| 2026 | /* sll3: sll3 $dr,$sr,$simm16 */ |
| 2027 | |
| 2028 | SEM_PC |
| 2029 | SEM_FN_NAME (m32rbf,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2030 | { |
| 2031 | #define FLD(f) abuf->fields.fmt_sll3.f |
| 2032 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2033 | int UNUSED written = 0; |
| 2034 | PCADDR UNUSED pc = abuf->addr; |
| 2035 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 2036 | |
| 2037 | { |
| 2038 | SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); |
| 2039 | * FLD (i_dr) = opval; |
| 2040 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 2041 | } |
| 2042 | |
| 2043 | return vpc; |
| 2044 | #undef FLD |
| 2045 | } |
| 2046 | |
| 2047 | /* slli: slli $dr,$uimm5 */ |
| 2048 | |
| 2049 | SEM_PC |
| 2050 | SEM_FN_NAME (m32rbf,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2051 | { |
| 2052 | #define FLD(f) abuf->fields.fmt_slli.f |
| 2053 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2054 | int UNUSED written = 0; |
| 2055 | PCADDR UNUSED pc = abuf->addr; |
| 2056 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 2057 | |
| 2058 | { |
| 2059 | SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5)); |
| 2060 | * FLD (i_dr) = opval; |
| 2061 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 2062 | } |
| 2063 | |
| 2064 | return vpc; |
| 2065 | #undef FLD |
| 2066 | } |
| 2067 | |
| 2068 | /* sra: sra $dr,$sr */ |
| 2069 | |
| 2070 | SEM_PC |
| 2071 | SEM_FN_NAME (m32rbf,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2072 | { |
| 2073 | #define FLD(f) abuf->fields.fmt_add.f |
| 2074 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2075 | int UNUSED written = 0; |
| 2076 | PCADDR UNUSED pc = abuf->addr; |
| 2077 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 2078 | |
| 2079 | { |
| 2080 | SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); |
| 2081 | * FLD (i_dr) = opval; |
| 2082 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 2083 | } |
| 2084 | |
| 2085 | return vpc; |
| 2086 | #undef FLD |
| 2087 | } |
| 2088 | |
| 2089 | /* sra3: sra3 $dr,$sr,$simm16 */ |
| 2090 | |
| 2091 | SEM_PC |
| 2092 | SEM_FN_NAME (m32rbf,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2093 | { |
| 2094 | #define FLD(f) abuf->fields.fmt_sll3.f |
| 2095 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2096 | int UNUSED written = 0; |
| 2097 | PCADDR UNUSED pc = abuf->addr; |
| 2098 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 2099 | |
| 2100 | { |
| 2101 | SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); |
| 2102 | * FLD (i_dr) = opval; |
| 2103 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 2104 | } |
| 2105 | |
| 2106 | return vpc; |
| 2107 | #undef FLD |
| 2108 | } |
| 2109 | |
| 2110 | /* srai: srai $dr,$uimm5 */ |
| 2111 | |
| 2112 | SEM_PC |
| 2113 | SEM_FN_NAME (m32rbf,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2114 | { |
| 2115 | #define FLD(f) abuf->fields.fmt_slli.f |
| 2116 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2117 | int UNUSED written = 0; |
| 2118 | PCADDR UNUSED pc = abuf->addr; |
| 2119 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 2120 | |
| 2121 | { |
| 2122 | SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5)); |
| 2123 | * FLD (i_dr) = opval; |
| 2124 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 2125 | } |
| 2126 | |
| 2127 | return vpc; |
| 2128 | #undef FLD |
| 2129 | } |
| 2130 | |
| 2131 | /* srl: srl $dr,$sr */ |
| 2132 | |
| 2133 | SEM_PC |
| 2134 | SEM_FN_NAME (m32rbf,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2135 | { |
| 2136 | #define FLD(f) abuf->fields.fmt_add.f |
| 2137 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2138 | int UNUSED written = 0; |
| 2139 | PCADDR UNUSED pc = abuf->addr; |
| 2140 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 2141 | |
| 2142 | { |
| 2143 | SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); |
| 2144 | * FLD (i_dr) = opval; |
| 2145 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 2146 | } |
| 2147 | |
| 2148 | return vpc; |
| 2149 | #undef FLD |
| 2150 | } |
| 2151 | |
| 2152 | /* srl3: srl3 $dr,$sr,$simm16 */ |
| 2153 | |
| 2154 | SEM_PC |
| 2155 | SEM_FN_NAME (m32rbf,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2156 | { |
| 2157 | #define FLD(f) abuf->fields.fmt_sll3.f |
| 2158 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2159 | int UNUSED written = 0; |
| 2160 | PCADDR UNUSED pc = abuf->addr; |
| 2161 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 2162 | |
| 2163 | { |
| 2164 | SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); |
| 2165 | * FLD (i_dr) = opval; |
| 2166 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 2167 | } |
| 2168 | |
| 2169 | return vpc; |
| 2170 | #undef FLD |
| 2171 | } |
| 2172 | |
| 2173 | /* srli: srli $dr,$uimm5 */ |
| 2174 | |
| 2175 | SEM_PC |
| 2176 | SEM_FN_NAME (m32rbf,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2177 | { |
| 2178 | #define FLD(f) abuf->fields.fmt_slli.f |
| 2179 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2180 | int UNUSED written = 0; |
| 2181 | PCADDR UNUSED pc = abuf->addr; |
| 2182 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 2183 | |
| 2184 | { |
| 2185 | SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5)); |
| 2186 | * FLD (i_dr) = opval; |
| 2187 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 2188 | } |
| 2189 | |
| 2190 | return vpc; |
| 2191 | #undef FLD |
| 2192 | } |
| 2193 | |
| 2194 | /* st: st $src1,@$src2 */ |
| 2195 | |
| 2196 | SEM_PC |
| 2197 | SEM_FN_NAME (m32rbf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2198 | { |
| 2199 | #define FLD(f) abuf->fields.fmt_st.f |
| 2200 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2201 | int UNUSED written = 0; |
| 2202 | PCADDR UNUSED pc = abuf->addr; |
| 2203 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 2204 | |
| 2205 | { |
| 2206 | SI opval = * FLD (i_src1); |
| 2207 | SETMEMSI (current_cpu, * FLD (i_src2), opval); |
| 2208 | TRACE_RESULT (current_cpu, "memory", 'x', opval); |
| 2209 | } |
| 2210 | |
| 2211 | return vpc; |
| 2212 | #undef FLD |
| 2213 | } |
| 2214 | |
| 2215 | /* st-d: st $src1,@($slo16,$src2) */ |
| 2216 | |
| 2217 | SEM_PC |
| 2218 | SEM_FN_NAME (m32rbf,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2219 | { |
| 2220 | #define FLD(f) abuf->fields.fmt_st_d.f |
| 2221 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2222 | int UNUSED written = 0; |
| 2223 | PCADDR UNUSED pc = abuf->addr; |
| 2224 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 2225 | |
| 2226 | { |
| 2227 | SI opval = * FLD (i_src1); |
| 2228 | SETMEMSI (current_cpu, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); |
| 2229 | TRACE_RESULT (current_cpu, "memory", 'x', opval); |
| 2230 | } |
| 2231 | |
| 2232 | return vpc; |
| 2233 | #undef FLD |
| 2234 | } |
| 2235 | |
| 2236 | /* stb: stb $src1,@$src2 */ |
| 2237 | |
| 2238 | SEM_PC |
| 2239 | SEM_FN_NAME (m32rbf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2240 | { |
| 2241 | #define FLD(f) abuf->fields.fmt_stb.f |
| 2242 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2243 | int UNUSED written = 0; |
| 2244 | PCADDR UNUSED pc = abuf->addr; |
| 2245 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 2246 | |
| 2247 | { |
| 2248 | QI opval = * FLD (i_src1); |
| 2249 | SETMEMQI (current_cpu, * FLD (i_src2), opval); |
| 2250 | TRACE_RESULT (current_cpu, "memory", 'x', opval); |
| 2251 | } |
| 2252 | |
| 2253 | return vpc; |
| 2254 | #undef FLD |
| 2255 | } |
| 2256 | |
| 2257 | /* stb-d: stb $src1,@($slo16,$src2) */ |
| 2258 | |
| 2259 | SEM_PC |
| 2260 | SEM_FN_NAME (m32rbf,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2261 | { |
| 2262 | #define FLD(f) abuf->fields.fmt_stb_d.f |
| 2263 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2264 | int UNUSED written = 0; |
| 2265 | PCADDR UNUSED pc = abuf->addr; |
| 2266 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 2267 | |
| 2268 | { |
| 2269 | QI opval = * FLD (i_src1); |
| 2270 | SETMEMQI (current_cpu, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); |
| 2271 | TRACE_RESULT (current_cpu, "memory", 'x', opval); |
| 2272 | } |
| 2273 | |
| 2274 | return vpc; |
| 2275 | #undef FLD |
| 2276 | } |
| 2277 | |
| 2278 | /* sth: sth $src1,@$src2 */ |
| 2279 | |
| 2280 | SEM_PC |
| 2281 | SEM_FN_NAME (m32rbf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2282 | { |
| 2283 | #define FLD(f) abuf->fields.fmt_sth.f |
| 2284 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2285 | int UNUSED written = 0; |
| 2286 | PCADDR UNUSED pc = abuf->addr; |
| 2287 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 2288 | |
| 2289 | { |
| 2290 | HI opval = * FLD (i_src1); |
| 2291 | SETMEMHI (current_cpu, * FLD (i_src2), opval); |
| 2292 | TRACE_RESULT (current_cpu, "memory", 'x', opval); |
| 2293 | } |
| 2294 | |
| 2295 | return vpc; |
| 2296 | #undef FLD |
| 2297 | } |
| 2298 | |
| 2299 | /* sth-d: sth $src1,@($slo16,$src2) */ |
| 2300 | |
| 2301 | SEM_PC |
| 2302 | SEM_FN_NAME (m32rbf,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2303 | { |
| 2304 | #define FLD(f) abuf->fields.fmt_sth_d.f |
| 2305 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2306 | int UNUSED written = 0; |
| 2307 | PCADDR UNUSED pc = abuf->addr; |
| 2308 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| 2309 | |
| 2310 | { |
| 2311 | HI opval = * FLD (i_src1); |
| 2312 | SETMEMHI (current_cpu, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); |
| 2313 | TRACE_RESULT (current_cpu, "memory", 'x', opval); |
| 2314 | } |
| 2315 | |
| 2316 | return vpc; |
| 2317 | #undef FLD |
| 2318 | } |
| 2319 | |
| 2320 | /* st-plus: st $src1,@+$src2 */ |
| 2321 | |
| 2322 | SEM_PC |
| 2323 | SEM_FN_NAME (m32rbf,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2324 | { |
| 2325 | #define FLD(f) abuf->fields.fmt_st_plus.f |
| 2326 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2327 | int UNUSED written = 0; |
| 2328 | PCADDR UNUSED pc = abuf->addr; |
| 2329 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 2330 | |
| 2331 | do { |
| 2332 | SI tmp_new_src2; |
| 2333 | tmp_new_src2 = ADDSI (* FLD (i_src2), 4); |
| 2334 | { |
| 2335 | SI opval = * FLD (i_src1); |
| 2336 | SETMEMSI (current_cpu, tmp_new_src2, opval); |
| 2337 | TRACE_RESULT (current_cpu, "memory", 'x', opval); |
| 2338 | } |
| 2339 | { |
| 2340 | SI opval = tmp_new_src2; |
| 2341 | * FLD (i_src2) = opval; |
| 2342 | TRACE_RESULT (current_cpu, "src2", 'x', opval); |
| 2343 | } |
| 2344 | } while (0); |
| 2345 | |
| 2346 | return vpc; |
| 2347 | #undef FLD |
| 2348 | } |
| 2349 | |
| 2350 | /* st-minus: st $src1,@-$src2 */ |
| 2351 | |
| 2352 | SEM_PC |
| 2353 | SEM_FN_NAME (m32rbf,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2354 | { |
| 2355 | #define FLD(f) abuf->fields.fmt_st_plus.f |
| 2356 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2357 | int UNUSED written = 0; |
| 2358 | PCADDR UNUSED pc = abuf->addr; |
| 2359 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 2360 | |
| 2361 | do { |
| 2362 | SI tmp_new_src2; |
| 2363 | tmp_new_src2 = SUBSI (* FLD (i_src2), 4); |
| 2364 | { |
| 2365 | SI opval = * FLD (i_src1); |
| 2366 | SETMEMSI (current_cpu, tmp_new_src2, opval); |
| 2367 | TRACE_RESULT (current_cpu, "memory", 'x', opval); |
| 2368 | } |
| 2369 | { |
| 2370 | SI opval = tmp_new_src2; |
| 2371 | * FLD (i_src2) = opval; |
| 2372 | TRACE_RESULT (current_cpu, "src2", 'x', opval); |
| 2373 | } |
| 2374 | } while (0); |
| 2375 | |
| 2376 | return vpc; |
| 2377 | #undef FLD |
| 2378 | } |
| 2379 | |
| 2380 | /* sub: sub $dr,$sr */ |
| 2381 | |
| 2382 | SEM_PC |
| 2383 | SEM_FN_NAME (m32rbf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2384 | { |
| 2385 | #define FLD(f) abuf->fields.fmt_add.f |
| 2386 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2387 | int UNUSED written = 0; |
| 2388 | PCADDR UNUSED pc = abuf->addr; |
| 2389 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 2390 | |
| 2391 | { |
| 2392 | SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr)); |
| 2393 | * FLD (i_dr) = opval; |
| 2394 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 2395 | } |
| 2396 | |
| 2397 | return vpc; |
| 2398 | #undef FLD |
| 2399 | } |
| 2400 | |
| 2401 | /* subv: subv $dr,$sr */ |
| 2402 | |
| 2403 | SEM_PC |
| 2404 | SEM_FN_NAME (m32rbf,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2405 | { |
| 2406 | #define FLD(f) abuf->fields.fmt_addv.f |
| 2407 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2408 | int UNUSED written = 0; |
| 2409 | PCADDR UNUSED pc = abuf->addr; |
| 2410 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 2411 | |
| 2412 | do { |
| 2413 | BI temp1;SI temp0; |
| 2414 | temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr)); |
| 2415 | temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0); |
| 2416 | { |
| 2417 | SI opval = temp0; |
| 2418 | * FLD (i_dr) = opval; |
| 2419 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 2420 | } |
| 2421 | { |
| 2422 | BI opval = temp1; |
| 2423 | CPU (h_cond) = opval; |
| 2424 | TRACE_RESULT (current_cpu, "condbit", 'x', opval); |
| 2425 | } |
| 2426 | } while (0); |
| 2427 | |
| 2428 | return vpc; |
| 2429 | #undef FLD |
| 2430 | } |
| 2431 | |
| 2432 | /* subx: subx $dr,$sr */ |
| 2433 | |
| 2434 | SEM_PC |
| 2435 | SEM_FN_NAME (m32rbf,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2436 | { |
| 2437 | #define FLD(f) abuf->fields.fmt_addx.f |
| 2438 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2439 | int UNUSED written = 0; |
| 2440 | PCADDR UNUSED pc = abuf->addr; |
| 2441 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 2442 | |
| 2443 | do { |
| 2444 | BI temp1;SI temp0; |
| 2445 | temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); |
| 2446 | temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); |
| 2447 | { |
| 2448 | SI opval = temp0; |
| 2449 | * FLD (i_dr) = opval; |
| 2450 | TRACE_RESULT (current_cpu, "dr", 'x', opval); |
| 2451 | } |
| 2452 | { |
| 2453 | BI opval = temp1; |
| 2454 | CPU (h_cond) = opval; |
| 2455 | TRACE_RESULT (current_cpu, "condbit", 'x', opval); |
| 2456 | } |
| 2457 | } while (0); |
| 2458 | |
| 2459 | return vpc; |
| 2460 | #undef FLD |
| 2461 | } |
| 2462 | |
| 2463 | /* trap: trap $uimm4 */ |
| 2464 | |
| 2465 | SEM_PC |
| 2466 | SEM_FN_NAME (m32rbf,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2467 | { |
| 2468 | #define FLD(f) abuf->fields.cti.fields.fmt_trap.f |
| 2469 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2470 | int UNUSED written = 0; |
| 2471 | PCADDR UNUSED pc = abuf->addr; |
| 2472 | SEM_BRANCH_INIT |
| 2473 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 2474 | |
| 2475 | do { |
| 2476 | { |
| 2477 | USI opval = m32rbf_h_cr_get (current_cpu, ((UINT) 6)); |
| 2478 | m32rbf_h_cr_set (current_cpu, ((UINT) 14), opval); |
| 2479 | TRACE_RESULT (current_cpu, "cr-14", 'x', opval); |
| 2480 | } |
| 2481 | { |
| 2482 | USI opval = ADDSI (pc, 4); |
| 2483 | m32rbf_h_cr_set (current_cpu, ((UINT) 6), opval); |
| 2484 | TRACE_RESULT (current_cpu, "cr-6", 'x', opval); |
| 2485 | } |
| 2486 | { |
| 2487 | UQI opval = CPU (h_bpsw); |
| 2488 | CPU (h_bbpsw) = opval; |
| 2489 | TRACE_RESULT (current_cpu, "bbpsw-0", 'x', opval); |
| 2490 | } |
| 2491 | { |
| 2492 | UQI opval = m32rbf_h_psw_get (current_cpu); |
| 2493 | CPU (h_bpsw) = opval; |
| 2494 | TRACE_RESULT (current_cpu, "bpsw-0", 'x', opval); |
| 2495 | } |
| 2496 | { |
| 2497 | UQI opval = ANDQI (m32rbf_h_psw_get (current_cpu), 128); |
| 2498 | m32rbf_h_psw_set (current_cpu, opval); |
| 2499 | TRACE_RESULT (current_cpu, "psw-0", 'x', opval); |
| 2500 | } |
| 2501 | { |
| 2502 | SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4)); |
| 2503 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); |
| 2504 | TRACE_RESULT (current_cpu, "pc", 'x', opval); |
| 2505 | } |
| 2506 | } while (0); |
| 2507 | |
| 2508 | SEM_BRANCH_FINI |
| 2509 | return vpc; |
| 2510 | #undef FLD |
| 2511 | } |
| 2512 | |
| 2513 | /* unlock: unlock $src1,@$src2 */ |
| 2514 | |
| 2515 | SEM_PC |
| 2516 | SEM_FN_NAME (m32rbf,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| 2517 | { |
| 2518 | #define FLD(f) abuf->fields.fmt_unlock.f |
| 2519 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| 2520 | int UNUSED written = 0; |
| 2521 | PCADDR UNUSED pc = abuf->addr; |
| 2522 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
| 2523 | |
| 2524 | do { |
| 2525 | if (CPU (h_lock)) { |
| 2526 | { |
| 2527 | SI opval = * FLD (i_src1); |
| 2528 | SETMEMSI (current_cpu, * FLD (i_src2), opval); |
| 2529 | written |= (1 << 3); |
| 2530 | TRACE_RESULT (current_cpu, "memory", 'x', opval); |
| 2531 | } |
| 2532 | } |
| 2533 | { |
| 2534 | BI opval = 0; |
| 2535 | CPU (h_lock) = opval; |
| 2536 | TRACE_RESULT (current_cpu, "lock-0", 'x', opval); |
| 2537 | } |
| 2538 | } while (0); |
| 2539 | |
| 2540 | abuf->written = written; |
| 2541 | return vpc; |
| 2542 | #undef FLD |
| 2543 | } |
| 2544 | |