| 1 | dnl Process this file with autoconf to produce a configure script. |
| 2 | sinclude(../common/aclocal.m4) |
| 3 | AC_PREREQ(2.5)dnl |
| 4 | AC_INIT(Makefile.in) |
| 5 | |
| 6 | SIM_AC_COMMON |
| 7 | |
| 8 | dnl Options available in this module |
| 9 | SIM_AC_OPTION_INLINE() |
| 10 | SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT) |
| 11 | SIM_AC_OPTION_HOSTENDIAN |
| 12 | SIM_AC_OPTION_WARNINGS |
| 13 | |
| 14 | # DEPRECATED |
| 15 | # |
| 16 | # Instead of defining a `subtarget' macro, code should be checking |
| 17 | # the value of {STATE,CPU}_ARCHITECTURE to identify the architecture |
| 18 | # in question. |
| 19 | # |
| 20 | case "${target}" in |
| 21 | mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";; |
| 22 | mipsisa32*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; |
| 23 | mipsisa64*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; |
| 24 | *) SIM_SUBTARGET="";; |
| 25 | esac |
| 26 | AC_SUBST(SIM_SUBTARGET) |
| 27 | |
| 28 | |
| 29 | |
| 30 | # |
| 31 | # Select the byte order of the target |
| 32 | # |
| 33 | mips_endian= |
| 34 | default_endian= |
| 35 | case "${target}" in |
| 36 | mips64el*-*-*) mips_endian=LITTLE_ENDIAN ;; |
| 37 | mips64vr*el-*-*) default_endian=LITTLE_ENDIAN ;; |
| 38 | mips64*-*-*) default_endian=BIG_ENDIAN ;; |
| 39 | mips16*-*-*) default_endian=BIG_ENDIAN ;; |
| 40 | mipsisa32*-*-*) default_endian=BIG_ENDIAN ;; |
| 41 | mipsisa64*-*-*) default_endian=BIG_ENDIAN ;; |
| 42 | mips*-*-*) default_endian=BIG_ENDIAN ;; |
| 43 | *) default_endian=BIG_ENDIAN ;; |
| 44 | esac |
| 45 | SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian) |
| 46 | |
| 47 | |
| 48 | |
| 49 | # |
| 50 | # Select the bitsize of the target |
| 51 | # |
| 52 | mips_addr_bitsize= |
| 53 | case "${target}" in |
| 54 | mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;; |
| 55 | mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;; |
| 56 | mipsisa32*-*-*) mips_bitsize=32 ; mips_msb=31 ;; |
| 57 | mipsisa64*-*-*) mips_bitsize=64 ; mips_msb=63 ;; |
| 58 | mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;; |
| 59 | *) mips_bitsize=64 ; mips_msb=63 ;; |
| 60 | esac |
| 61 | SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize) |
| 62 | |
| 63 | |
| 64 | |
| 65 | # |
| 66 | # Select the floating hardware support of the target |
| 67 | # |
| 68 | mips_fpu=HARDWARE_FLOATING_POINT |
| 69 | mips_fpu_bitsize= |
| 70 | case "${target}" in |
| 71 | mips*tx39*) mips_fpu=HARD_FLOATING_POINT |
| 72 | mips_fpu_bitsize=32 |
| 73 | ;; |
| 74 | mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;; |
| 75 | mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;; |
| 76 | mipsisa32*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; |
| 77 | mipsisa64*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; |
| 78 | mips*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;; |
| 79 | *) mips_fpu=HARD_FLOATING_POINT ;; |
| 80 | esac |
| 81 | SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize) |
| 82 | |
| 83 | |
| 84 | |
| 85 | # |
| 86 | # Select the level of SMP support |
| 87 | # |
| 88 | case "${target}" in |
| 89 | *) mips_smp=0 ;; |
| 90 | esac |
| 91 | SIM_AC_OPTION_SMP($mips_smp) |
| 92 | |
| 93 | |
| 94 | |
| 95 | # |
| 96 | # Select the IGEN architecture |
| 97 | # |
| 98 | sim_gen=IGEN |
| 99 | sim_igen_machine="-M mipsIV" |
| 100 | sim_m16_machine="-M mips16" |
| 101 | sim_igen_filter="32,64,f" |
| 102 | sim_m16_filter="16" |
| 103 | case "${target}" in |
| 104 | mips*tx39*) sim_gen=IGEN |
| 105 | sim_igen_filter="32,f" |
| 106 | sim_igen_machine="-M r3900" |
| 107 | ;; |
| 108 | mips64vr43*-*-*) sim_gen=IGEN |
| 109 | sim_igen_machine="-M mipsIV" |
| 110 | ;; |
| 111 | mips64vr5*-*-*) sim_gen=IGEN |
| 112 | sim_igen_machine="-M vr5000" |
| 113 | ;; |
| 114 | mips64vr41*) sim_gen=M16 |
| 115 | sim_igen_machine="-M vr4100" |
| 116 | sim_m16_machine="-M vr4100" |
| 117 | sim_igen_filter="32,64,f" |
| 118 | sim_m16_filter="16" |
| 119 | ;; |
| 120 | mips64*-*-*) sim_igen_filter="32,64,f" |
| 121 | sim_gen=IGEN |
| 122 | ;; |
| 123 | mips16*-*-*) sim_gen=M16 |
| 124 | sim_igen_filter="32,64,f" |
| 125 | sim_m16_filter="16" |
| 126 | ;; |
| 127 | mipsisa32*-*-*) sim_gen=IGEN |
| 128 | sim_igen_machine="-M mips32" |
| 129 | sim_igen_filter="32,f" |
| 130 | ;; |
| 131 | mipsisa64*-*-*) sim_gen=IGEN |
| 132 | sim_igen_machine="-M mips64" |
| 133 | sim_igen_filter="32,64,f" |
| 134 | ;; |
| 135 | mips*lsi*) sim_gen=M16 |
| 136 | sim_igen_machine="-M mipsIII,mips16" |
| 137 | sim_m16_machine="-M mips16,mipsIII" |
| 138 | sim_igen_filter="32,f" |
| 139 | sim_m16_filter="16" |
| 140 | ;; |
| 141 | mips*-*-*) sim_gen=IGEN |
| 142 | sim_igen_filter="32,f" |
| 143 | ;; |
| 144 | esac |
| 145 | sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}" |
| 146 | sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}" |
| 147 | AC_SUBST(sim_igen_flags) |
| 148 | AC_SUBST(sim_m16_flags) |
| 149 | AC_SUBST(sim_gen) |
| 150 | |
| 151 | |
| 152 | # |
| 153 | # Add simulated hardware devices |
| 154 | # |
| 155 | hw_enabled=no |
| 156 | case "${target}" in |
| 157 | mips*tx39*) |
| 158 | hw_enabled=yes |
| 159 | hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio" |
| 160 | mips_extra_objs="dv-sockser.o" |
| 161 | SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_TX3904=1" |
| 162 | ;; |
| 163 | *) |
| 164 | mips_extra_objs="" |
| 165 | ;; |
| 166 | esac |
| 167 | SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices) |
| 168 | AC_SUBST(mips_extra_objs) |
| 169 | |
| 170 | |
| 171 | # Choose simulator engine |
| 172 | case "${target}" in |
| 173 | *) mips_igen_engine="engine.o" |
| 174 | ;; |
| 175 | esac |
| 176 | AC_SUBST(mips_igen_engine) |
| 177 | |
| 178 | |
| 179 | AC_PATH_X |
| 180 | mips_extra_libs="" |
| 181 | AC_SUBST(mips_extra_libs) |
| 182 | |
| 183 | AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h) |
| 184 | AC_CHECK_LIB(m, fabs) |
| 185 | AC_CHECK_FUNCS(aint anint sqrt) |
| 186 | |
| 187 | SIM_AC_OUTPUT |