| 1 | #include <stdio.h> |
| 2 | #include <ctype.h> |
| 3 | #include "ansidecl.h" |
| 4 | #include "gdb/callback.h" |
| 5 | #include "opcode/mn10300.h" |
| 6 | #include <limits.h> |
| 7 | #include "gdb/remote-sim.h" |
| 8 | #include "bfd.h" |
| 9 | |
| 10 | #ifndef INLINE |
| 11 | #ifdef __GNUC__ |
| 12 | #define INLINE inline |
| 13 | #else |
| 14 | #define INLINE |
| 15 | #endif |
| 16 | #endif |
| 17 | |
| 18 | extern host_callback *mn10300_callback; |
| 19 | extern SIM_DESC simulator; |
| 20 | |
| 21 | #define DEBUG_TRACE 0x00000001 |
| 22 | #define DEBUG_VALUES 0x00000002 |
| 23 | |
| 24 | extern int mn10300_debug; |
| 25 | |
| 26 | #if UCHAR_MAX == 255 |
| 27 | typedef unsigned char uint8; |
| 28 | typedef signed char int8; |
| 29 | #else |
| 30 | #error "Char is not an 8-bit type" |
| 31 | #endif |
| 32 | |
| 33 | #if SHRT_MAX == 32767 |
| 34 | typedef unsigned short uint16; |
| 35 | typedef signed short int16; |
| 36 | #else |
| 37 | #error "Short is not a 16-bit type" |
| 38 | #endif |
| 39 | |
| 40 | #if INT_MAX == 2147483647 |
| 41 | |
| 42 | typedef unsigned int uint32; |
| 43 | typedef signed int int32; |
| 44 | |
| 45 | #else |
| 46 | # if LONG_MAX == 2147483647 |
| 47 | |
| 48 | typedef unsigned long uint32; |
| 49 | typedef signed long int32; |
| 50 | |
| 51 | # else |
| 52 | # error "Neither int nor long is a 32-bit type" |
| 53 | # endif |
| 54 | #endif |
| 55 | |
| 56 | typedef uint32 reg_t; |
| 57 | |
| 58 | struct simops |
| 59 | { |
| 60 | long opcode; |
| 61 | long mask; |
| 62 | void (*func)(); |
| 63 | int length; |
| 64 | int format; |
| 65 | int numops; |
| 66 | int operands[16]; |
| 67 | }; |
| 68 | |
| 69 | /* The current state of the processor; registers, memory, etc. */ |
| 70 | |
| 71 | struct _state |
| 72 | { |
| 73 | reg_t regs[32]; /* registers, d0-d3, a0-a3, sp, pc, mdr, psw, |
| 74 | lir, lar, mdrq, plus some room for processor |
| 75 | specific regs. */ |
| 76 | uint8 *mem; /* main memory */ |
| 77 | int exception; |
| 78 | int exited; |
| 79 | |
| 80 | /* All internal state modified by signal_exception() that may need to be |
| 81 | rolled back for passing moment-of-exception image back to gdb. */ |
| 82 | reg_t exc_trigger_regs[32]; |
| 83 | reg_t exc_suspend_regs[32]; |
| 84 | int exc_suspended; |
| 85 | |
| 86 | #define SIM_CPU_EXCEPTION_TRIGGER(SD,CPU,CIA) mn10300_cpu_exception_trigger(SD,CPU,CIA) |
| 87 | #define SIM_CPU_EXCEPTION_SUSPEND(SD,CPU,EXC) mn10300_cpu_exception_suspend(SD,CPU,EXC) |
| 88 | #define SIM_CPU_EXCEPTION_RESUME(SD,CPU,EXC) mn10300_cpu_exception_resume(SD,CPU,EXC) |
| 89 | }; |
| 90 | |
| 91 | extern struct _state State; |
| 92 | extern uint32 OP[4]; |
| 93 | extern struct simops Simops[]; |
| 94 | |
| 95 | #define PC (State.regs[REG_PC]) |
| 96 | #define SP (State.regs[REG_SP]) |
| 97 | |
| 98 | #define PSW (State.regs[11]) |
| 99 | #define PSW_Z 0x1 |
| 100 | #define PSW_N 0x2 |
| 101 | #define PSW_C 0x4 |
| 102 | #define PSW_V 0x8 |
| 103 | #define PSW_IE LSBIT (11) |
| 104 | #define PSW_LM LSMASK (10, 8) |
| 105 | |
| 106 | #define EXTRACT_PSW_LM LSEXTRACTED16 (PSW, 10, 8) |
| 107 | #define INSERT_PSW_LM(l) LSINSERTED16 ((l), 10, 8) |
| 108 | |
| 109 | #define REG_D0 0 |
| 110 | #define REG_A0 4 |
| 111 | #define REG_SP 8 |
| 112 | #define REG_PC 9 |
| 113 | #define REG_MDR 10 |
| 114 | #define REG_PSW 11 |
| 115 | #define REG_LIR 12 |
| 116 | #define REG_LAR 13 |
| 117 | #define REG_MDRQ 14 |
| 118 | #define REG_E0 15 |
| 119 | #define REG_SSP 23 |
| 120 | #define REG_MSP 24 |
| 121 | #define REG_USP 25 |
| 122 | #define REG_MCRH 26 |
| 123 | #define REG_MCRL 27 |
| 124 | #define REG_MCVF 28 |
| 125 | |
| 126 | #ifdef _WIN32 |
| 127 | #define SIGTRAP 5 |
| 128 | #define SIGQUIT 3 |
| 129 | #endif |
| 130 | |
| 131 | #define FETCH32(a,b,c,d) \ |
| 132 | ((a)+((b)<<8)+((c)<<16)+((d)<<24)) |
| 133 | |
| 134 | #define FETCH24(a,b,c) \ |
| 135 | ((a)+((b)<<8)+((c)<<16)) |
| 136 | |
| 137 | #define FETCH16(a,b) ((a)+((b)<<8)) |
| 138 | |
| 139 | #define load_byte(ADDR) \ |
| 140 | sim_core_read_unaligned_1 (STATE_CPU (simulator, 0), PC, read_map, (ADDR)) |
| 141 | |
| 142 | #define load_half(ADDR) \ |
| 143 | sim_core_read_unaligned_2 (STATE_CPU (simulator, 0), PC, read_map, (ADDR)) |
| 144 | |
| 145 | #define load_word(ADDR) \ |
| 146 | sim_core_read_unaligned_4 (STATE_CPU (simulator, 0), PC, read_map, (ADDR)) |
| 147 | |
| 148 | #define store_byte(ADDR, DATA) \ |
| 149 | sim_core_write_unaligned_1 (STATE_CPU (simulator, 0), \ |
| 150 | PC, write_map, (ADDR), (DATA)) |
| 151 | |
| 152 | |
| 153 | #define store_half(ADDR, DATA) \ |
| 154 | sim_core_write_unaligned_2 (STATE_CPU (simulator, 0), \ |
| 155 | PC, write_map, (ADDR), (DATA)) |
| 156 | |
| 157 | |
| 158 | #define store_word(ADDR, DATA) \ |
| 159 | sim_core_write_unaligned_4 (STATE_CPU (simulator, 0), \ |
| 160 | PC, write_map, (ADDR), (DATA)) |
| 161 | |
| 162 | /* Function declarations. */ |
| 163 | |
| 164 | uint32 get_word PARAMS ((uint8 *)); |
| 165 | uint16 get_half PARAMS ((uint8 *)); |
| 166 | uint8 get_byte PARAMS ((uint8 *)); |
| 167 | void put_word PARAMS ((uint8 *, uint32)); |
| 168 | void put_half PARAMS ((uint8 *, uint16)); |
| 169 | void put_byte PARAMS ((uint8 *, uint8)); |
| 170 | |
| 171 | extern uint8 *map PARAMS ((SIM_ADDR addr)); |
| 172 | |
| 173 | INLINE_SIM_MAIN (void) genericAdd PARAMS ((unsigned32 source, unsigned32 destReg)); |
| 174 | INLINE_SIM_MAIN (void) genericSub PARAMS ((unsigned32 source, unsigned32 destReg)); |
| 175 | INLINE_SIM_MAIN (void) genericCmp PARAMS ((unsigned32 leftOpnd, unsigned32 rightOpnd)); |
| 176 | INLINE_SIM_MAIN (void) genericOr PARAMS ((unsigned32 source, unsigned32 destReg)); |
| 177 | INLINE_SIM_MAIN (void) genericXor PARAMS ((unsigned32 source, unsigned32 destReg)); |
| 178 | INLINE_SIM_MAIN (void) genericBtst PARAMS ((unsigned32 leftOpnd, unsigned32 rightOpnd)); |
| 179 | INLINE_SIM_MAIN (int) syscall_read_mem PARAMS ((host_callback *cb, |
| 180 | struct cb_syscall *sc, |
| 181 | unsigned long taddr, |
| 182 | char *buf, |
| 183 | int bytes)); |
| 184 | INLINE_SIM_MAIN (int) syscall_write_mem PARAMS ((host_callback *cb, |
| 185 | struct cb_syscall *sc, |
| 186 | unsigned long taddr, |
| 187 | const char *buf, |
| 188 | int bytes)); |
| 189 | INLINE_SIM_MAIN (void) do_syscall PARAMS ((void)); |
| 190 | void program_interrupt (SIM_DESC sd, sim_cpu *cpu, sim_cia cia, SIM_SIGNAL sig); |
| 191 | |
| 192 | void mn10300_cpu_exception_trigger(SIM_DESC sd, sim_cpu* cpu, address_word pc); |
| 193 | void mn10300_cpu_exception_suspend(SIM_DESC sd, sim_cpu* cpu, int exception); |
| 194 | void mn10300_cpu_exception_resume(SIM_DESC sd, sim_cpu* cpu, int exception); |