1 The MSI Driver Guide HOWTO
2 Tom L Nguyen tom.l.nguyen@intel.com
4 Revised Feb 12, 2004 by Martine Silbermann
5 email: Martine.Silbermann@hp.com
6 Revised Jun 25, 2004 by Tom L Nguyen
7 Revised Jul 9, 2008 by Matthew Wilcox <willy@linux.intel.com>
8 Copyright 2003, 2008 Intel Corporation
12 This guide describes the basics of Message Signaled Interrupts (MSIs),
13 the advantages of using MSI over traditional interrupt mechanisms, how
14 to change your driver to use MSI or MSI-X and some basic diagnostics to
15 try if a device doesn't support MSIs.
20 A Message Signaled Interrupt is a write from the device to a special
21 address which causes an interrupt to be received by the CPU.
23 The MSI capability was first specified in PCI 2.2 and was later enhanced
24 in PCI 3.0 to allow each interrupt to be masked individually. The MSI-X
25 capability was also introduced with PCI 3.0. It supports more interrupts
26 per device than MSI and allows interrupts to be independently configured.
28 Devices may support both MSI and MSI-X, but only one can be enabled at
34 There are three reasons why using MSIs can give an advantage over
35 traditional pin-based interrupts.
37 Pin-based PCI interrupts are often shared amongst several devices.
38 To support this, the kernel must call each interrupt handler associated
39 with an interrupt, which leads to reduced performance for the system as
40 a whole. MSIs are never shared, so this problem cannot arise.
42 When a device writes data to memory, then raises a pin-based interrupt,
43 it is possible that the interrupt may arrive before all the data has
44 arrived in memory (this becomes more likely with devices behind PCI-PCI
45 bridges). In order to ensure that all the data has arrived in memory,
46 the interrupt handler must read a register on the device which raised
47 the interrupt. PCI transaction ordering rules require that all the data
48 arrive in memory before the value may be returned from the register.
49 Using MSIs avoids this problem as the interrupt-generating write cannot
50 pass the data writes, so by the time the interrupt is raised, the driver
51 knows that all the data has arrived in memory.
53 PCI devices can only support a single pin-based interrupt per function.
54 Often drivers have to query the device to find out what event has
55 occurred, slowing down interrupt handling for the common case. With
56 MSIs, a device can support more interrupts, allowing each interrupt
57 to be specialised to a different purpose. One possible design gives
58 infrequent conditions (such as errors) their own interrupt which allows
59 the driver to handle the normal interrupt handling path more efficiently.
60 Other possible designs include giving one interrupt to each packet queue
61 in a network card or each port in a storage controller.
66 PCI devices are initialised to use pin-based interrupts. The device
67 driver has to set up the device to use MSI or MSI-X. Not all machines
68 support MSIs correctly, and for those machines, the APIs described below
69 will simply fail and the device will continue to use pin-based interrupts.
71 4.1 Include kernel support for MSIs
73 To support MSI or MSI-X, the kernel must be built with the CONFIG_PCI_MSI
74 option enabled. This option is only available on some architectures,
75 and it may depend on some other options also being set. For example,
76 on x86, you must also enable X86_UP_APIC or SMP in order to see the
77 CONFIG_PCI_MSI option.
81 Most of the hard work is done for the driver in the PCI layer. It simply
82 has to request that the PCI layer set up the MSI capability for this
87 int pci_enable_msi(struct pci_dev *dev)
89 A successful call allocates ONE interrupt to the device, regardless
90 of how many MSIs the device supports. The device is switched from
91 pin-based interrupt mode to MSI mode. The dev->irq number is changed
92 to a new number which represents the message signaled interrupt;
93 consequently, this function should be called before the driver calls
94 request_irq(), because an MSI is delivered via a vector that is
95 different from the vector of a pin-based interrupt.
97 4.2.2 pci_enable_msi_range
99 int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec)
101 This function allows a device driver to request any number of MSI
102 interrupts within specified range from 'minvec' to 'maxvec'.
104 If this function returns a positive number it indicates the number of
105 MSI interrupts that have been successfully allocated. In this case
106 the device is switched from pin-based interrupt mode to MSI mode and
107 updates dev->irq to be the lowest of the new interrupts assigned to it.
108 The other interrupts assigned to the device are in the range dev->irq
109 to dev->irq + returned value - 1. Device driver can use the returned
110 number of successfully allocated MSI interrupts to further allocate
111 and initialize device resources.
113 If this function returns a negative number, it indicates an error and
114 the driver should not attempt to request any more MSI interrupts for
117 This function should be called before the driver calls request_irq(),
118 because MSI interrupts are delivered via vectors that are different
119 from the vector of a pin-based interrupt.
121 It is ideal if drivers can cope with a variable number of MSI interrupts;
122 there are many reasons why the platform may not be able to provide the
123 exact number that a driver asks for.
125 There could be devices that can not operate with just any number of MSI
126 interrupts within a range. See chapter 4.3.1.3 to get the idea how to
127 handle such devices for MSI-X - the same logic applies to MSI.
129 4.2.1.1 Maximum possible number of MSI interrupts
131 The typical usage of MSI interrupts is to allocate as many vectors as
132 possible, likely up to the limit returned by pci_msi_vec_count() function:
134 static int foo_driver_enable_msi(struct pci_dev *pdev, int nvec)
136 return pci_enable_msi_range(pdev, 1, nvec);
139 Note the value of 'minvec' parameter is 1. As 'minvec' is inclusive,
140 the value of 0 would be meaningless and could result in error.
142 Some devices have a minimal limit on number of MSI interrupts.
143 In this case the function could look like this:
145 static int foo_driver_enable_msi(struct pci_dev *pdev, int nvec)
147 return pci_enable_msi_range(pdev, FOO_DRIVER_MINIMUM_NVEC, nvec);
150 4.2.1.2 Exact number of MSI interrupts
152 If a driver is unable or unwilling to deal with a variable number of MSI
153 interrupts it could request a particular number of interrupts by passing
154 that number to pci_enable_msi_range() function as both 'minvec' and 'maxvec'
157 static int foo_driver_enable_msi(struct pci_dev *pdev, int nvec)
159 return pci_enable_msi_range(pdev, nvec, nvec);
162 4.2.1.3 Single MSI mode
164 The most notorious example of the request type described above is
165 enabling the single MSI mode for a device. It could be done by passing
166 two 1s as 'minvec' and 'maxvec':
168 static int foo_driver_enable_single_msi(struct pci_dev *pdev)
170 return pci_enable_msi_range(pdev, 1, 1);
173 Note, unlike pci_enable_msi() function, which could be also used to
174 enable the single MSI mode, pci_enable_msi_range() returns either a
175 negative errno or 1 (not negative errno or 0 - as pci_enable_msi()
178 4.2.3 pci_disable_msi
180 void pci_disable_msi(struct pci_dev *dev)
182 This function should be used to undo the effect of pci_enable_msi_range().
183 Calling it restores dev->irq to the pin-based interrupt number and frees
184 the previously allocated MSIs. The interrupts may subsequently be assigned
185 to another device, so drivers should not cache the value of dev->irq.
187 Before calling this function, a device driver must always call free_irq()
188 on any interrupt for which it previously called request_irq().
189 Failure to do so results in a BUG_ON(), leaving the device with
190 MSI enabled and thus leaking its vector.
192 4.2.4 pci_msi_vec_count
194 int pci_msi_vec_count(struct pci_dev *dev)
196 This function could be used to retrieve the number of MSI vectors the
197 device requested (via the Multiple Message Capable register). The MSI
198 specification only allows the returned value to be a power of two,
199 up to a maximum of 2^5 (32).
201 If this function returns a negative number, it indicates the device is
202 not capable of sending MSIs.
204 If this function returns a positive number, it indicates the maximum
205 number of MSI interrupt vectors that could be allocated.
209 The MSI-X capability is much more flexible than the MSI capability.
210 It supports up to 2048 interrupts, each of which can be controlled
211 independently. To support this flexibility, drivers must use an array of
215 u16 vector; /* kernel uses to write alloc vector */
216 u16 entry; /* driver uses to specify entry */
219 This allows for the device to use these interrupts in a sparse fashion;
220 for example, it could use interrupts 3 and 1027 and yet allocate only a
221 two-element array. The driver is expected to fill in the 'entry' value
222 in each element of the array to indicate for which entries the kernel
223 should assign interrupts; it is invalid to fill in two entries with the
226 4.3.1 pci_enable_msix_range
228 int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
229 int minvec, int maxvec)
231 Calling this function asks the PCI subsystem to allocate any number of
232 MSI-X interrupts within specified range from 'minvec' to 'maxvec'.
233 The 'entries' argument is a pointer to an array of msix_entry structs
234 which should be at least 'maxvec' entries in size.
236 On success, the device is switched into MSI-X mode and the function
237 returns the number of MSI-X interrupts that have been successfully
238 allocated. In this case the 'vector' member in entries numbered from
239 0 to the returned value - 1 is populated with the interrupt number;
240 the driver should then call request_irq() for each 'vector' that it
241 decides to use. The device driver is responsible for keeping track of the
242 interrupts assigned to the MSI-X vectors so it can free them again later.
243 Device driver can use the returned number of successfully allocated MSI-X
244 interrupts to further allocate and initialize device resources.
246 If this function returns a negative number, it indicates an error and
247 the driver should not attempt to allocate any more MSI-X interrupts for
250 This function, in contrast with pci_enable_msi_range(), does not adjust
251 dev->irq. The device will not generate interrupts for this interrupt
252 number once MSI-X is enabled.
254 Device drivers should normally call this function once per device
255 during the initialization phase.
257 It is ideal if drivers can cope with a variable number of MSI-X interrupts;
258 there are many reasons why the platform may not be able to provide the
259 exact number that a driver asks for.
261 There could be devices that can not operate with just any number of MSI-X
262 interrupts within a range. E.g., an network adapter might need let's say
263 four vectors per each queue it provides. Therefore, a number of MSI-X
264 interrupts allocated should be a multiple of four. In this case interface
265 pci_enable_msix_range() can not be used alone to request MSI-X interrupts
266 (since it can allocate any number within the range, without any notion of
267 the multiple of four) and the device driver should master a custom logic
268 to request the required number of MSI-X interrupts.
270 4.3.1.1 Maximum possible number of MSI-X interrupts
272 The typical usage of MSI-X interrupts is to allocate as many vectors as
273 possible, likely up to the limit returned by pci_msix_vec_count() function:
275 static int foo_driver_enable_msix(struct foo_adapter *adapter, int nvec)
277 return pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
281 Note the value of 'minvec' parameter is 1. As 'minvec' is inclusive,
282 the value of 0 would be meaningless and could result in error.
284 Some devices have a minimal limit on number of MSI-X interrupts.
285 In this case the function could look like this:
287 static int foo_driver_enable_msix(struct foo_adapter *adapter, int nvec)
289 return pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
290 FOO_DRIVER_MINIMUM_NVEC, nvec);
293 4.3.1.2 Exact number of MSI-X interrupts
295 If a driver is unable or unwilling to deal with a variable number of MSI-X
296 interrupts it could request a particular number of interrupts by passing
297 that number to pci_enable_msix_range() function as both 'minvec' and 'maxvec'
300 static int foo_driver_enable_msix(struct foo_adapter *adapter, int nvec)
302 return pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
306 4.3.1.3 Specific requirements to the number of MSI-X interrupts
308 As noted above, there could be devices that can not operate with just any
309 number of MSI-X interrupts within a range. E.g., let's assume a device that
310 is only capable sending the number of MSI-X interrupts which is a power of
311 two. A routine that enables MSI-X mode for such device might look like this:
314 * Assume 'minvec' and 'maxvec' are non-zero
316 static int foo_driver_enable_msix(struct foo_adapter *adapter,
317 int minvec, int maxvec)
321 minvec = roundup_pow_of_two(minvec);
322 maxvec = rounddown_pow_of_two(maxvec);
328 rc = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
331 * -ENOSPC is the only error code allowed to be analized
348 Note how pci_enable_msix_range() return value is analized for a fallback -
349 any error code other than -ENOSPC indicates a fatal error and should not
352 4.3.2 pci_disable_msix
354 void pci_disable_msix(struct pci_dev *dev)
356 This function should be used to undo the effect of pci_enable_msix_range().
357 It frees the previously allocated MSI-X interrupts. The interrupts may
358 subsequently be assigned to another device, so drivers should not cache
359 the value of the 'vector' elements over a call to pci_disable_msix().
361 Before calling this function, a device driver must always call free_irq()
362 on any interrupt for which it previously called request_irq().
363 Failure to do so results in a BUG_ON(), leaving the device with
364 MSI-X enabled and thus leaking its vector.
366 4.3.3 The MSI-X Table
368 The MSI-X capability specifies a BAR and offset within that BAR for the
369 MSI-X Table. This address is mapped by the PCI subsystem, and should not
370 be accessed directly by the device driver. If the driver wishes to
371 mask or unmask an interrupt, it should call disable_irq() / enable_irq().
373 4.3.4 pci_msix_vec_count
375 int pci_msix_vec_count(struct pci_dev *dev)
377 This function could be used to retrieve number of entries in the device
380 If this function returns a negative number, it indicates the device is
381 not capable of sending MSI-Xs.
383 If this function returns a positive number, it indicates the maximum
384 number of MSI-X interrupt vectors that could be allocated.
386 4.4 Handling devices implementing both MSI and MSI-X capabilities
388 If a device implements both MSI and MSI-X capabilities, it can
389 run in either MSI mode or MSI-X mode, but not both simultaneously.
390 This is a requirement of the PCI spec, and it is enforced by the
391 PCI layer. Calling pci_enable_msi_range() when MSI-X is already
392 enabled or pci_enable_msix_range() when MSI is already enabled
393 results in an error. If a device driver wishes to switch between MSI
394 and MSI-X at runtime, it must first quiesce the device, then switch
395 it back to pin-interrupt mode, before calling pci_enable_msi_range()
396 or pci_enable_msix_range() and resuming operation. This is not expected
397 to be a common operation but may be useful for debugging or testing
400 4.5 Considerations when using MSIs
402 4.5.1 Choosing between MSI-X and MSI
404 If your device supports both MSI-X and MSI capabilities, you should use
405 the MSI-X facilities in preference to the MSI facilities. As mentioned
406 above, MSI-X supports any number of interrupts between 1 and 2048.
407 In constrast, MSI is restricted to a maximum of 32 interrupts (and
408 must be a power of two). In addition, the MSI interrupt vectors must
409 be allocated consecutively, so the system might not be able to allocate
410 as many vectors for MSI as it could for MSI-X. On some platforms, MSI
411 interrupts must all be targeted at the same set of CPUs whereas MSI-X
412 interrupts can all be targeted at different CPUs.
416 Most device drivers have a per-device spinlock which is taken in the
417 interrupt handler. With pin-based interrupts or a single MSI, it is not
418 necessary to disable interrupts (Linux guarantees the same interrupt will
419 not be re-entered). If a device uses multiple interrupts, the driver
420 must disable interrupts while the lock is held. If the device sends
421 a different interrupt, the driver will deadlock trying to recursively
422 acquire the spinlock.
424 There are two solutions. The first is to take the lock with
425 spin_lock_irqsave() or spin_lock_irq() (see
426 Documentation/DocBook/kernel-locking). The second is to specify
427 IRQF_DISABLED to request_irq() so that the kernel runs the entire
428 interrupt routine with interrupts disabled.
430 If your MSI interrupt routine does not hold the lock for the whole time
431 it is running, the first solution may be best. The second solution is
432 normally preferred as it avoids making two transitions from interrupt
433 disabled to enabled and back again.
435 4.6 How to tell whether MSI/MSI-X is enabled on a device
437 Using 'lspci -v' (as root) may show some devices with "MSI", "Message
438 Signalled Interrupts" or "MSI-X" capabilities. Each of these capabilities
439 has an 'Enable' flag which is followed with either "+" (enabled)
445 Several PCI chipsets or devices are known not to support MSIs.
446 The PCI stack provides three ways to disable MSIs:
449 2. on all devices behind a specific bridge
450 3. on a single device
452 5.1. Disabling MSIs globally
454 Some host chipsets simply don't support MSIs properly. If we're
455 lucky, the manufacturer knows this and has indicated it in the ACPI
456 FADT table. In this case, Linux automatically disables MSIs.
457 Some boards don't include this information in the table and so we have
458 to detect them ourselves. The complete list of these is found near the
459 quirk_disable_all_msi() function in drivers/pci/quirks.c.
461 If you have a board which has problems with MSIs, you can pass pci=nomsi
462 on the kernel command line to disable MSIs on all devices. It would be
463 in your best interests to report the problem to linux-pci@vger.kernel.org
464 including a full 'lspci -v' so we can add the quirks to the kernel.
466 5.2. Disabling MSIs below a bridge
468 Some PCI bridges are not able to route MSIs between busses properly.
469 In this case, MSIs must be disabled on all devices behind the bridge.
471 Some bridges allow you to enable MSIs by changing some bits in their
472 PCI configuration space (especially the Hypertransport chipsets such
473 as the nVidia nForce and Serverworks HT2000). As with host chipsets,
474 Linux mostly knows about them and automatically enables MSIs if it can.
475 If you have a bridge unknown to Linux, you can enable
476 MSIs in configuration space using whatever method you know works, then
477 enable MSIs on that bridge by doing:
479 echo 1 > /sys/bus/pci/devices/$bridge/msi_bus
481 where $bridge is the PCI address of the bridge you've enabled (eg
484 To disable MSIs, echo 0 instead of 1. Changing this value should be
485 done with caution as it could break interrupt handling for all devices
488 Again, please notify linux-pci@vger.kernel.org of any bridges that need
491 5.3. Disabling MSIs on a single device
493 Some devices are known to have faulty MSI implementations. Usually this
494 is handled in the individual device driver, but occasionally it's necessary
495 to handle this with a quirk. Some drivers have an option to disable use
496 of MSI. While this is a convenient workaround for the driver author,
497 it is not good practise, and should not be emulated.
499 5.4. Finding why MSIs are disabled on a device
501 From the above three sections, you can see that there are many reasons
502 why MSIs may not be enabled for a given device. Your first step should
503 be to examine your dmesg carefully to determine whether MSIs are enabled
504 for your machine. You should also check your .config to be sure you
505 have enabled CONFIG_PCI_MSI.
507 Then, 'lspci -t' gives the list of bridges above a device. Reading
508 /sys/bus/pci/devices/*/msi_bus will tell you whether MSIs are enabled (1)
509 or disabled (0). If 0 is found in any of the msi_bus files belonging
510 to bridges between the PCI root and the device, MSIs are disabled.
512 It is also worth checking the device driver to see whether it supports MSIs.
513 For example, it may contain calls to pci_enable_msi_range() or
514 pci_enable_msix_range().