1 Atmel AT91 device tree bindings.
2 ================================
4 Boards with a SoC of the Atmel AT91 or SMART family shall have the following
7 Required root node properties:
8 compatible: must be one of:
11 * "atmel,at91sam9" for SoCs using an ARM926EJ-S core, shall be extended with
12 the specific SoC family or compatible:
16 o "atmel,at91sam9x5" for the 5 series, shall be extended with the specific
28 * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
30 o "atmel,sama5d2" shall be extended with the specific SoC compatible:
32 o "atmel,sama5d3" shall be extended with the specific SoC compatible:
38 o "atmel,sama5d4" shall be extended with the specific SoC compatible:
44 Chipid required properties:
45 - compatible: Should be "atmel,sama5d2-chipid"
46 - reg : Should contain registers location and length
48 PIT Timer required properties:
49 - compatible: Should be "atmel,at91sam9260-pit"
50 - reg: Should contain registers location and length
51 - interrupts: Should contain interrupt for the PIT which is the IRQ line
52 shared across all System Controller members.
54 System Timer (ST) required properties:
55 - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
56 - reg: Should contain registers location and length
57 - interrupts: Should contain interrupt for the ST which is the IRQ line
58 shared across all System Controller members.
59 - clocks: phandle to input clock.
61 - watchdog: compatible should be "atmel,at91rm9200-wdt"
63 TC/TCLIB Timer required properties:
64 - compatible: Should be "atmel,<chip>-tcb".
65 <chip> can be "at91rm9200" or "at91sam9x5"
66 - reg: Should contain registers location and length
67 - interrupts: Should contain all interrupts for the TC block
68 Note that you can specify several interrupt cells if the TC
69 block has one interrupt per channel.
70 - clock-names: tuple listing input clock names.
71 Required elements: "t0_clk", "slow_clk"
72 Optional elements: "t1_clk", "t2_clk"
73 - clocks: phandles to input clocks.
77 One interrupt per TC block:
78 tcb0: timer@fff7c000 {
79 compatible = "atmel,at91rm9200-tcb";
80 reg = <0xfff7c000 0x100>;
83 clock-names = "t0_clk";
86 One interrupt per TC channel in a TC block:
87 tcb1: timer@fffdc000 {
88 compatible = "atmel,at91rm9200-tcb";
89 reg = <0xfffdc000 0x100>;
90 interrupts = <26 4 27 4 28 4>;
92 clock-names = "t0_clk";
95 RSTC Reset Controller required properties:
96 - compatible: Should be "atmel,<chip>-rstc".
97 <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
98 - reg: Should contain registers location and length
99 - clocks: phandle to input clock.
104 compatible = "atmel,at91sam9260-rstc";
105 reg = <0xfffffd00 0x10>;
109 RAMC SDRAM/DDR Controller required properties:
110 - compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
111 "atmel,at91sam9260-sdramc",
112 "atmel,at91sam9g45-ddramc",
113 "atmel,sama5d3-ddramc",
114 - reg: Should contain registers location and length
118 ramc0: ramc@ffffe800 {
119 compatible = "atmel,at91sam9g45-ddramc";
120 reg = <0xffffe800 0x200>;
123 SHDWC Shutdown Controller
126 - compatible: Should be "atmel,<chip>-shdwc".
127 <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
128 - reg: Should contain registers location and length
129 - clocks: phandle to input clock.
132 - atmel,wakeup-mode: String, operation mode of the wakeup mode.
133 Supported values are: "none", "high", "low", "any".
134 - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
136 optional at91sam9260 properties:
137 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
139 optional at91sam9rl properties:
140 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
141 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
143 optional at91sam9x5 properties:
144 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
149 compatible = "atmel,at91sam9260-shdwc";
150 reg = <0xfffffd10 0x10>;
154 SHDWC SAMA5D2-Compatible Shutdown Controller
159 - compatible: should be "atmel,sama5d2-shdwc".
160 - reg: should contain registers location and length
161 - clocks: phandle to input clock.
162 - #address-cells: should be one. The cell is the wake-up input index.
163 - #size-cells: should be zero.
167 - debounce-delay-us: minimum wake-up inputs debouncer period in
168 microseconds. It's usually a board-related property.
169 - atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
171 The node contains child nodes for each wake-up input that the platform uses.
175 Wake-up input nodes are usually described in the "board" part of the Device
176 Tree. Note also that input 0 is linked to the wake-up pin and is frequently
180 - reg: should contain the wake-up input index [0 - 15].
183 - atmel,wakeup-active-high: boolean, the corresponding wake-up input described
184 by the child, forces the wake-up of the core power supply on a high level.
185 The default is to be active low.
191 compatible = "atmel,sama5d2-shdwc";
192 reg = <0xf8048010 0x10>;
194 #address-cells = <1>;
196 atmel,wakeup-rtc-timer;
201 debounce-delay-us = <976>;
209 atmel,wakeup-active-high;
213 Special Function Registers (SFR)
215 Special Function Registers (SFR) manage specific aspects of the integrated
216 memory, bridge implementations, processor and other functionality not controlled
220 - compatible: Should be "atmel,<chip>-sfr", "syscon".
221 <chip> can be "sama5d3", "sama5d4" or "sama5d2".
222 - reg: Should contain registers location and length
225 compatible = "atmel,sama5d3-sfr", "syscon";
226 reg = <0xf0038000 0x60>;