Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt

   1 Rockchip RK3288 specific extensions to the Analogix Display Port
   2 ================================
   3
   4 Required properties:
   5 - compatible: "rockchip,rk3288-edp";
   6
   7 - reg: physical base address of the controller and length
   8
   9 - clocks: from common clock binding: handle to dp clock.
  10           of memory mapped region.
  11
  12 - clock-names: from common clock binding:
  13                Required elements: "dp" "pclk"
  14
  15 - resets: Must contain an entry for each entry in reset-names.
  16           See ../reset/reset.txt for details.
  17
  18 - pinctrl-names: Names corresponding to the chip hotplug pinctrl states.
  19 - pinctrl-0: pin-control mode. should be <&edp_hpd>
  20
  21 - reset-names: Must include the name "dp"
  22
  23 - rockchip,grf: this soc should set GRF regs, so need get grf here.
  24
  25 - ports: there are 2 port nodes with endpoint definitions as defined in
  26   Documentation/devicetree/bindings/media/video-interfaces.txt.
  27     Port 0: contained 2 endpoints, connecting to the output of vop.
  28     Port 1: contained 1 endpoint, connecting to the input of panel.
  29
  30 For the below properties, please refer to Analogix DP binding document:
  31  * Documentation/devicetree/bindings/drm/bridge/analogix_dp.txt
  32 - phys (required)
  33 - phy-names (required)
  34 - hpd-gpios (optional)
  35 - force-hpd (optional)
  36 -------------------------------------------------------------------------------
  37
  38 Example:
  39         dp-controller: dp@ff970000 {
  40                 compatible = "rockchip,rk3288-dp";
  41                 reg = <0xff970000 0x4000>;
  42                 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
  43                 clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>;
  44                 clock-names = "dp", "pclk";
  45                 phys = <&dp_phy>;
  46                 phy-names = "dp";
  47
  48                 rockchip,grf = <&grf>;
  49                 resets = <&cru 111>;
  50                 reset-names = "dp";
  51
  52                 pinctrl-names = "default";
  53                 pinctrl-0 = <&edp_hpd>;
  54
  55                 status = "disabled";
  56
  57                 ports {
  58                         #address-cells = <1>;
  59                         #size-cells = <0>;
  60                         edp_in: port@0 {
  61                                 reg = <0>;
  62                                 #address-cells = <1>;
  63                                 #size-cells = <0>;
  64                                 edp_in_vopb: endpoint@0 {
  65                                         reg = <0>;
  66                                         remote-endpoint = <&vopb_out_edp>;
  67                                 };
  68                                 edp_in_vopl: endpoint@1 {
  69                                         reg = <1>;
  70                                         remote-endpoint = <&vopl_out_edp>;
  71                                 };
  72                         };
  73
  74                         edp_out: port@1 {
  75                                 reg = <1>;
  76                                 #address-cells = <1>;
  77                                 #size-cells = <0>;
  78                                 edp_out_panel: endpoint {
  79                                         reg = <0>;
  80                                         remote-endpoint = <&panel_in_edp>
  81                                 };
  82                         };
  83                 };
  84         };
  85
  86         pinctrl {
  87                 edp {
  88                         edp_hpd: edp-hpd {
  89                                 rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_none>;
  90                         };
  91                 };
  92         };