Documentation/devicetree/bindings/dma/sirfsoc-dma.txt

   1 * CSR SiRFSoC DMA controller
   2
   3 See dma.txt first
   4
   5 Required properties:
   6 - compatible: Should be "sirf,prima2-dmac" or "sirf,marco-dmac"
   7 - reg: Should contain DMA registers location and length.
   8 - interrupts: Should contain one interrupt shared by all channel
   9 - #dma-cells: must be <1>. used to represent the number of integer
  10     cells in the dmas property of client device.
  11 - clocks: clock required
  12
  13 Example:
  14
  15 Controller:
  16 dmac0: dma-controller@b00b0000 {
  17         compatible = "sirf,prima2-dmac";
  18         reg = <0xb00b0000 0x10000>;
  19         interrupts = <12>;
  20         clocks = <&clks 24>;
  21         #dma-cells = <1>;
  22 };
  23
  24
  25 Client:
  26 Fill the specific dma request line in dmas. In the below example, spi0 read
  27 channel request line is 9 of the 2nd dma controller, while write channel uses
  28 4 of the 2nd dma controller; spi1 read channel request line is 12 of the 1st
  29 dma controller, while write channel uses 13 of the 1st dma controller:
  30
  31 spi0: spi@b00d0000 {
  32         compatible = "sirf,prima2-spi";
  33         dmas = <&dmac1 9>,
  34                 <&dmac1 4>;
  35         dma-names = "rx", "tx";
  36 };
  37
  38 spi1: spi@b0170000 {
  39         compatible = "sirf,prima2-spi";
  40         dmas = <&dmac0 12>,
  41                 <&dmac0 13>;
  42         dma-names = "rx", "tx";
  43 };