Documentation/devicetree/bindings/gpio/gpio-mxs.txt

   1 * Freescale MXS GPIO controller
   2
   3 The Freescale MXS GPIO controller is part of MXS PIN controller.  The
   4 GPIOs are organized in port/bank.  Each port consists of 32 GPIOs.
   5
   6 As the GPIO controller is embedded in the PIN controller and all the
   7 GPIO ports share the same IO space with PIN controller, the GPIO node
   8 will be represented as sub-nodes of MXS pinctrl node.
   9
  10 Required properties for GPIO node:
  11 - compatible : Should be "fsl,<soc>-gpio".  The supported SoCs include
  12   imx23 and imx28.
  13 - interrupts : Should be the port interrupt shared by all 32 pins.
  14 - gpio-controller : Marks the device node as a gpio controller.
  15 - #gpio-cells : Should be two.  The first cell is the pin number and
  16   the second cell is used to specify the gpio polarity:
  17       0 = active high
  18       1 = active low
  19 - interrupt-controller: Marks the device node as an interrupt controller.
  20 - #interrupt-cells : Should be 2.  The first cell is the GPIO number.
  21   The second cell bits[3:0] is used to specify trigger type and level flags:
  22       1 = low-to-high edge triggered.
  23       2 = high-to-low edge triggered.
  24       4 = active high level-sensitive.
  25       8 = active low level-sensitive.
  26
  27 Note: Each GPIO port should have an alias correctly numbered in "aliases"
  28 node.
  29
  30 Examples:
  31
  32 aliases {
  33         gpio0 = &gpio0;
  34         gpio1 = &gpio1;
  35         gpio2 = &gpio2;
  36         gpio3 = &gpio3;
  37         gpio4 = &gpio4;
  38 };
  39
  40 pinctrl@80018000 {
  41         compatible = "fsl,imx28-pinctrl", "simple-bus";
  42         reg = <0x80018000 2000>;
  43
  44         gpio0: gpio@0 {
  45                 compatible = "fsl,imx28-gpio";
  46                 interrupts = <127>;
  47                 gpio-controller;
  48                 #gpio-cells = <2>;
  49                 interrupt-controller;
  50                 #interrupt-cells = <2>;
  51         };
  52
  53         gpio1: gpio@1 {
  54                 compatible = "fsl,imx28-gpio";
  55                 interrupts = <126>;
  56                 gpio-controller;
  57                 #gpio-cells = <2>;
  58                 interrupt-controller;
  59                 #interrupt-cells = <2>;
  60         };
  61
  62         gpio2: gpio@2 {
  63                 compatible = "fsl,imx28-gpio";
  64                 interrupts = <125>;
  65                 gpio-controller;
  66                 #gpio-cells = <2>;
  67                 interrupt-controller;
  68                 #interrupt-cells = <2>;
  69         };
  70
  71         gpio3: gpio@3 {
  72                 compatible = "fsl,imx28-gpio";
  73                 interrupts = <124>;
  74                 gpio-controller;
  75                 #gpio-cells = <2>;
  76                 interrupt-controller;
  77                 #interrupt-cells = <2>;
  78         };
  79
  80         gpio4: gpio@4 {
  81                 compatible = "fsl,imx28-gpio";
  82                 interrupts = <123>;
  83                 gpio-controller;
  84                 #gpio-cells = <2>;
  85                 interrupt-controller;
  86                 #interrupt-cells = <2>;
  87         };
  88 };