Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt

   1 APM X-Gene Standby GPIO controller bindings
   2
   3 This is a gpio controller in the standby domain. It also supports interrupt in
   4 some particular pins which are sourced to its parent interrupt controller
   5 as diagram below:
   6                             +-----------------+
   7                             | X-Gene standby  |
   8                             | GPIO controller +------ GPIO_0
   9 +------------+              |                 | ...
  10 | Parent IRQ | EXT_INT_0    |                 +------ GPIO_8/EXT_INT_0
  11 | controller | (SPI40)      |                 | ...
  12 | (GICv2)    +--------------+                 +------ GPIO_[N+8]/EXT_INT_N
  13 |            |   ...        |                 |
  14 |            | EXT_INT_N    |                 +------ GPIO_[N+9]
  15 |            | (SPI[40 + N])|                 | ...
  16 |            +--------------+                 +------ GPIO_MAX
  17 +------------+              +-----------------+
  18
  19 Required properties:
  20 - compatible: "apm,xgene-gpio-sb" for the X-Gene Standby GPIO controller
  21 - reg: Physical base address and size of the controller's registers
  22 - #gpio-cells: Should be two.
  23         - first cell is the pin number
  24         - second cell is used to specify the gpio polarity:
  25                 0 = active high
  26                 1 = active low
  27 - gpio-controller: Marks the device node as a GPIO controller.
  28 - interrupts: The EXT_INT_0 parent interrupt resource must be listed first.
  29 - interrupt-parent: Phandle of the parent interrupt controller.
  30 - interrupt-cells: Should be two.
  31        - first cell is 0-N coresponding for EXT_INT_0 to EXT_INT_N.
  32        - second cell is used to specify flags.
  33 - interrupt-controller: Marks the device node as an interrupt controller.
  34 - apm,nr-gpios: Optional, specify number of gpios pin.
  35 - apm,nr-irqs: Optional, specify number of interrupt pins.
  36 - apm,irq-start: Optional, specify lowest gpio pin support interrupt.
  37
  38 Example:
  39         sbgpio: gpio@17001000{
  40                 compatible = "apm,xgene-gpio-sb";
  41                 reg = <0x0 0x17001000 0x0 0x400>;
  42                 #gpio-cells = <2>;
  43                 gpio-controller;
  44                 interrupts =    <0x0 0x28 0x1>,
  45                                 <0x0 0x29 0x1>,
  46                                 <0x0 0x2a 0x1>,
  47                                 <0x0 0x2b 0x1>,
  48                                 <0x0 0x2c 0x1>,
  49                                 <0x0 0x2d 0x1>;
  50                 interrupt-parent = <&gic>;
  51                 #interrupt-cells = <2>;
  52                 interrupt-controller;
  53                 apm,nr-gpios = <22>;
  54                 apm,nr-irqs = <6>;
  55                 apm,irq-start = <8>;
  56         };
  57
  58         testuser {
  59                 compatible = "example,testuser";
  60                 /* Use the GPIO_13/EXT_INT_5 line as an active high triggered
  61                  * level interrupt
  62                  */
  63                 interrupts = <5 4>;
  64                 interrupt-parent = <&sbgpio>;
  65         };