Documentation/devicetree/bindings/mmc/mmc.txt

   1 These properties are common to multiple MMC host controllers. Any host
   2 that requires the respective functionality should implement them using
   3 these definitions.
   4
   5 Interpreted by the OF core:
   6 - reg: Registers location and length.
   7 - interrupts: Interrupts used by the MMC controller.
   8
   9 Card detection:
  10 If no property below is supplied, host native card detect is used.
  11 Only one of the properties in this section should be supplied:
  12   - broken-cd: There is no card detection available; polling must be used.
  13   - cd-gpios: Specify GPIOs for card detection, see gpio binding
  14   - non-removable: non-removable slot (like eMMC); assume always present.
  15
  16 Optional properties:
  17 - bus-width: Number of data lines, can be <1>, <4>, or <8>.  The default
  18   will be <1> if the property is absent.
  19 - wp-gpios: Specify GPIOs for write protection, see gpio binding
  20 - cd-inverted: when present, polarity on the CD line is inverted. See the note
  21   below for the case, when a GPIO is used for the CD line
  22 - wp-inverted: when present, polarity on the WP line is inverted. See the note
  23   below for the case, when a GPIO is used for the WP line
  24 - disable-wp: When set no physical WP line is present. This property should
  25   only be specified when the controller has a dedicated write-protect
  26   detection logic. If a GPIO is always used for the write-protect detection
  27   logic it is sufficient to not specify wp-gpios property in the absence of a WP
  28   line.
  29 - max-frequency: maximum operating clock frequency
  30 - no-1-8-v: when present, denotes that 1.8v card voltage is not supported on
  31   this system, even if the controller claims it is.
  32 - cap-sd-highspeed: SD high-speed timing is supported
  33 - cap-mmc-highspeed: MMC high-speed timing is supported
  34 - sd-uhs-sdr12: SD UHS SDR12 speed is supported
  35 - sd-uhs-sdr25: SD UHS SDR25 speed is supported
  36 - sd-uhs-sdr50: SD UHS SDR50 speed is supported
  37 - sd-uhs-sdr104: SD UHS SDR104 speed is supported
  38 - sd-uhs-ddr50: SD UHS DDR50 speed is supported
  39 - cap-power-off-card: powering off the card is safe
  40 - cap-sdio-irq: enable SDIO IRQ signalling on this interface
  41 - full-pwr-cycle: full power cycle of the card is supported
  42 - mmc-ddr-1_8v: eMMC high-speed DDR mode(1.8V I/O) is supported
  43 - mmc-ddr-1_2v: eMMC high-speed DDR mode(1.2V I/O) is supported
  44 - mmc-hs200-1_8v: eMMC HS200 mode(1.8V I/O) is supported
  45 - mmc-hs200-1_2v: eMMC HS200 mode(1.2V I/O) is supported
  46 - mmc-hs400-1_8v: eMMC HS400 mode(1.8V I/O) is supported
  47 - mmc-hs400-1_2v: eMMC HS400 mode(1.2V I/O) is supported
  48 - dsr: Value the card's (optional) Driver Stage Register (DSR) should be
  49   programmed with. Valid range: [0 .. 0xffff].
  50
  51 *NOTE* on CD and WP polarity. To use common for all SD/MMC host controllers line
  52 polarity properties, we have to fix the meaning of the "normal" and "inverted"
  53 line levels. We choose to follow the SDHCI standard, which specifies both those
  54 lines as "active low." Therefore, using the "cd-inverted" property means, that
  55 the CD line is active high, i.e. it is high, when a card is inserted. Similar
  56 logic applies to the "wp-inverted" property.
  57
  58 CD and WP lines can be implemented on the hardware in one of two ways: as GPIOs,
  59 specified in cd-gpios and wp-gpios properties, or as dedicated pins. Polarity of
  60 dedicated pins can be specified, using *-inverted properties. GPIO polarity can
  61 also be specified using the OF_GPIO_ACTIVE_LOW flag. This creates an ambiguity
  62 in the latter case. We choose to use the XOR logic for GPIO CD and WP lines.
  63 This means, the two properties are "superimposed," for example leaving the
  64 OF_GPIO_ACTIVE_LOW flag clear and specifying the respective *-inverted
  65 property results in a double-inversion and actually means the "normal" line
  66 polarity is in effect.
  67
  68 Optional SDIO properties:
  69 - keep-power-in-suspend: Preserves card power during a suspend/resume cycle
  70 - enable-sdio-wakeup: Enables wake up of host system on SDIO IRQ assertion
  71
  72
  73 MMC power sequences:
  74 --------------------
  75
  76 System on chip designs may specify a specific MMC power sequence. To
  77 successfully detect an (e)MMC/SD/SDIO card, that power sequence must be
  78 maintained while initializing the card.
  79
  80 Optional property:
  81 - mmc-pwrseq: phandle to the MMC power sequence node. See "mmc-pwrseq-*"
  82         for documentation of MMC power sequence bindings.
  83
  84
  85 Use of Function subnodes
  86 ------------------------
  87
  88 On embedded systems the cards connected to a host may need additional
  89 properties. These can be specified in subnodes to the host controller node.
  90 The subnodes are identified by the standard 'reg' property.
  91 Which information exactly can be specified depends on the bindings for the
  92 SDIO function driver for the subnode, as specified by the compatible string.
  93
  94 Required host node properties when using function subnodes:
  95 - #address-cells: should be one. The cell is the slot id.
  96 - #size-cells: should be zero.
  97
  98 Required function subnode properties:
  99 - compatible: name of SDIO function following generic names recommended practice
 100 - reg: Must contain the SDIO function number of the function this subnode
 101        describes. A value of 0 denotes the memory SD function, values from
 102        1 to 7 denote the SDIO functions.
 103
 104
 105 Examples
 106 --------
 107
 108 Basic example:
 109
 110 sdhci@ab000000 {
 111         compatible = "sdhci";
 112         reg = <0xab000000 0x200>;
 113         interrupts = <23>;
 114         bus-width = <4>;
 115         cd-gpios = <&gpio 69 0>;
 116         cd-inverted;
 117         wp-gpios = <&gpio 70 0>;
 118         max-frequency = <50000000>;
 119         keep-power-in-suspend;
 120         enable-sdio-wakeup;
 121         mmc-pwrseq = <&sdhci0_pwrseq>
 122 }
 123
 124 Example with sdio function subnode:
 125
 126 mmc3: mmc@01c12000 {
 127         #address-cells = <1>;
 128         #size-cells = <0>;
 129
 130         pinctrl-names = "default";
 131         pinctrl-0 = <&mmc3_pins_a>;
 132         vmmc-supply = <&reg_vmmc3>;
 133         bus-width = <4>;
 134         non-removable;
 135         mmc-pwrseq = <&sdhci0_pwrseq>
 136         status = "okay";
 137
 138         brcmf: bcrmf@1 {
 139                 reg = <1>;
 140                 compatible = "brcm,bcm43xx-fmac";
 141                 interrupt-parent = <&pio>;
 142                 interrupts = <10 8>; /* PH10 / EINT10 */
 143                 interrupt-names = "host-wake";
 144         };
 145 };