Documentation/devicetree/bindings/mtd/nxp-spifi.txt

   1 * NXP SPI Flash Interface (SPIFI)
   2
   3 NXP SPIFI is a specialized SPI interface for serial Flash devices.
   4 It supports one Flash device with 1-, 2- and 4-bits width in SPI
   5 mode 0 or 3. The controller operates in either command or memory
   6 mode. In memory mode the Flash is accessible from the CPU as
   7 normal memory.
   8
   9 Required properties:
  10   - compatible : Should be "nxp,lpc1773-spifi"
  11   - reg : the first contains the register location and length,
  12           the second contains the memory mapping address and length
  13   - reg-names: Should contain the reg names "spifi" and "flash"
  14   - interrupts : Should contain the interrupt for the device
  15   - clocks : The clocks needed by the SPIFI controller
  16   - clock-names : Should contain the clock names "spifi" and "reg"
  17
  18 Optional properties:
  19  - resets : phandle + reset specifier
  20
  21 The SPI Flash must be a child of the SPIFI node and must have a
  22 compatible property as specified in bindings/mtd/jedec,spi-nor.txt
  23
  24 Optionally it can also contain the following properties.
  25  - spi-cpol : Controller only supports mode 0 and 3 so either
  26               both spi-cpol and spi-cpha should be present or
  27               none of them
  28  - spi-cpha : See above
  29  - spi-rx-bus-width : Used to select how many pins that are used
  30                       for input on the controller
  31
  32 See bindings/spi/spi-bus.txt for more information.
  33
  34 Example:
  35 spifi: spifi@40003000 {
  36         compatible = "nxp,lpc1773-spifi";
  37         reg = <0x40003000 0x1000>, <0x14000000 0x4000000>;
  38         reg-names = "spifi", "flash";
  39         interrupts = <30>;
  40         clocks = <&ccu1 CLK_SPIFI>, <&ccu1 CLK_CPU_SPIFI>;
  41         clock-names = "spifi", "reg";
  42         resets = <&rgu 53>;
  43
  44         flash@0 {
  45                 compatible = "jedec,spi-nor";
  46                 spi-cpol;
  47                 spi-cpha;
  48                 spi-rx-bus-width = <4>;
  49                 #address-cells = <1>;
  50                 #size-cells = <1>;
  51
  52                 partition@0 {
  53                         label = "data";
  54                         reg = <0 0x200000>;
  55                 };
  56         };
  57 };
  58