pinctrl-tz1090: add TZ1090 pinctrl driver
[deliverable/linux.git] / Documentation / devicetree / bindings / pinctrl / img,tz1090-pinctrl.txt
1 ImgTec TZ1090 pin controller
2
3 Required properties:
4 - compatible: "img,tz1090-pinctrl"
5 - reg: Should contain the register physical address and length of the pad
6 configuration registers (CR_PADS_* and CR_IF_CTL0).
7
8 Please refer to pinctrl-bindings.txt in this directory for details of the
9 common pinctrl bindings used by client devices, including the meaning of the
10 phrase "pin configuration node".
11
12 TZ1090's pin configuration nodes act as a container for an abitrary number of
13 subnodes. Each of these subnodes represents some desired configuration for a
14 pin, a group, or a list of pins or groups. This configuration can include the
15 mux function to select on those pin(s)/group(s), and various pin configuration
16 parameters, such as pull-up, drive strength, etc.
17
18 The name of each subnode is not important; all subnodes should be enumerated
19 and processed purely based on their content.
20
21 Each subnode only affects those parameters that are explicitly listed. In
22 other words, a subnode that lists a mux function but no pin configuration
23 parameters implies no information about any pin configuration parameters.
24 Similarly, a pin subnode that describes a pullup parameter implies no
25 information about e.g. the mux function. For this reason, even seemingly boolean
26 values are actually tristates in this binding: unspecified, off, or on.
27 Unspecified is represented as an absent property, and off/on are represented as
28 integer values 0 and 1.
29
30 Required subnode-properties:
31 - tz1090,pins : An array of strings. Each string contains the name of a pin or
32 group. Valid values for these names are listed below.
33
34 Optional subnode-properties:
35 - tz1090,function: A string containing the name of the function to mux to the
36 pin or group. Valid values for function names are listed below, including
37 which pingroups can be muxed to them.
38 - supported generic pinconfig properties (for further details see
39 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt):
40 - bias-disable
41 - bias-high-impedance
42 - bias-bus-hold
43 - bias-pull-up
44 - bias-pull-down
45 - input-schmitt-enable
46 - input-schmitt-disable
47 - slew-rate: Integer, control slew rate of pins.
48 0: slow (half frequency)
49 1: fast
50 - drive-strength: Integer, control drive strength of pins in mA.
51 2: 2mA
52 4: 4mA
53 8: 8mA
54 12: 12mA
55
56
57 Note that many of these properties are only valid for certain specific pins
58 or groups. See the TZ1090 TRM for complete details regarding which groups
59 support which functionality. The Linux pinctrl driver may also be a useful
60 reference.
61
62 Valid values for pin and group names are:
63
64 gpio pins:
65
66 These all support bias-high-impediance, bias-pull-up, bias-pull-down, and
67 bias-bus-hold (which can also be provided to any of the groups below to set
68 it for all pins in that group).
69
70 They also all support the some form of muxing. Any pins which are contained
71 in one of the mux groups (see below) can be muxed only to the functions
72 supported by the mux group. All other pins can be muxed to the "perip"
73 function which which enables them with their intended peripheral.
74
75 Different pins in the same mux group cannot be muxed to different functions,
76 however it is possible to mux only a subset of the pins in a mux group to a
77 particular function and leave the remaining pins unmuxed. This is useful if
78 the board connects certain pins in a group to other devices to be controlled
79 by GPIO, and you don't want the usual peripheral to have any control of the
80 pin.
81
82 ant_sel0, ant_sel1, gain0, gain1, gain2, gain3, gain4, gain5, gain6, gain7,
83 i2s_bclk_out, i2s_din, i2s_dout0, i2s_dout1, i2s_dout2, i2s_lrclk_out,
84 i2s_mclk, pa_on, pdm_a, pdm_b, pdm_c, pdm_d, pll_on, rx_hp, rx_on,
85 scb0_sclk, scb0_sdat, scb1_sclk, scb1_sdat, scb2_sclk, scb2_sdat, sdh_cd,
86 sdh_clk_in, sdh_wp, sdio_clk, sdio_cmd, sdio_d0, sdio_d1, sdio_d2, sdio_d3,
87 spi0_cs0, spi0_cs1, spi0_cs2, spi0_din, spi0_dout, spi0_mclk, spi1_cs0,
88 spi1_cs1, spi1_cs2, spi1_din, spi1_dout, spi1_mclk, tft_blank_ls, tft_blue0,
89 tft_blue1, tft_blue2, tft_blue3, tft_blue4, tft_blue5, tft_blue6, tft_blue7,
90 tft_green0, tft_green1, tft_green2, tft_green3, tft_green4, tft_green5,
91 tft_green6, tft_green7, tft_hsync_nr, tft_panelclk, tft_pwrsave, tft_red0,
92 tft_red1, tft_red2, tft_red3, tft_red4, tft_red5, tft_red6, tft_red7,
93 tft_vd12acb, tft_vdden_gd, tft_vsync_ns, tx_on, uart0_cts, uart0_rts,
94 uart0_rxd, uart0_txd, uart1_rxd, uart1_txd.
95
96 bias-high-impediance: supported.
97 bias-pull-up: supported.
98 bias-pull-down: supported.
99 bias-bus-hold: supported.
100 function: perip or those supported by pin's mux group.
101
102 other pins:
103
104 These other pins are part of various pin groups below, but can't be
105 controlled as GPIOs. They do however support bias-high-impediance,
106 bias-pull-up, bias-pull-down, and bias-bus-hold (which can also be provided
107 to any of the groups below to set it for all pins in that group).
108
109 clk_out0, clk_out1, tck, tdi, tdo, tms, trst.
110
111 bias-high-impediance: supported.
112 bias-pull-up: supported.
113 bias-pull-down: supported.
114 bias-bus-hold: supported.
115
116 mux groups:
117
118 These all support function, and some support drive configs.
119
120 afe
121 pins: tx_on, rx_on, pll_on, pa_on, rx_hp, ant_sel0,
122 ant_sel1, gain0, gain1, gain2, gain3, gain4,
123 gain5, gain6, gain7.
124 function: afe, ts_out_0.
125 input-schmitt-enable: supported.
126 input-schmitt-disable: supported.
127 slew-rate: supported.
128 drive-strength: supported.
129 pdm_d
130 pins: pdm_d.
131 function: pdm_dac, usb_vbus.
132 sdh
133 pins: sdh_cd, sdh_wp, sdh_clk_in.
134 function: sdh, sdio.
135 sdio
136 pins: sdio_clk, sdio_cmd, sdio_d0, sdio_d1, sdio_d2,
137 sdio_d3.
138 function: sdio, sdh.
139 spi1_cs2
140 pins: spi1_cs2.
141 function: spi1_cs2, usb_vbus.
142 tft
143 pins: tft_red0, tft_red1, tft_red2, tft_red3,
144 tft_red4, tft_red5, tft_red6, tft_red7,
145 tft_green0, tft_green1, tft_green2, tft_green3,
146 tft_green4, tft_green5, tft_green6, tft_green7,
147 tft_blue0, tft_blue1, tft_blue2, tft_blue3,
148 tft_blue4, tft_blue5, tft_blue6, tft_blue7,
149 tft_vdden_gd, tft_panelclk, tft_blank_ls,
150 tft_vsync_ns, tft_hsync_nr, tft_vd12acb,
151 tft_pwrsave.
152 function: tft, ext_dac, not_iqadc_stb, iqdac_stb, ts_out_1,
153 lcd_trace, phy_ringosc.
154 input-schmitt-enable: supported.
155 input-schmitt-disable: supported.
156 slew-rate: supported.
157 drive-strength: supported.
158
159 drive groups:
160
161 These all support input-schmitt-enable, input-schmitt-disable, slew-rate,
162 and drive-strength.
163
164 jtag
165 pins: tck, trst, tdi, tdo, tms.
166 scb1
167 pins: scb1_sdat, scb1_sclk.
168 scb2
169 pins: scb2_sdat, scb2_sclk.
170 spi0
171 pins: spi0_mclk, spi0_cs0, spi0_cs1, spi0_cs2, spi0_dout, spi0_din.
172 spi1
173 pins: spi1_mclk, spi1_cs0, spi1_cs1, spi1_cs2, spi1_dout, spi1_din.
174 uart
175 pins: uart0_txd, uart0_rxd, uart0_rts, uart0_cts,
176 uart1_txd, uart1_rxd.
177 drive_i2s
178 pins: clk_out1, i2s_din, i2s_dout0, i2s_dout1, i2s_dout2,
179 i2s_lrclk_out, i2s_bclk_out, i2s_mclk.
180 drive_pdm
181 pins: clk_out0, pdm_b, pdm_a.
182 drive_scb0
183 pins: scb0_sclk, scb0_sdat, pdm_d, pdm_c.
184 drive_sdio
185 pins: sdio_clk, sdio_cmd, sdio_d0, sdio_d1, sdio_d2, sdio_d3,
186 sdh_wp, sdh_cd, sdh_clk_in.
187
188 convenience groups:
189
190 These are just convenient groupings of pins and don't support any drive
191 configs.
192
193 uart0
194 pins: uart0_cts, uart0_rts, uart0_rxd, uart0_txd.
195 uart1
196 pins: uart1_rxd, uart1_txd.
197 scb0
198 pins: scb0_sclk, scb0_sdat.
199 i2s
200 pins: i2s_bclk_out, i2s_din, i2s_dout0, i2s_dout1, i2s_dout2,
201 i2s_lrclk_out, i2s_mclk.
202
203 Example:
204
205 pinctrl: pinctrl@02005800 {
206 #gpio-range-cells = <3>;
207 compatible = "img,tz1090-pinctrl";
208 reg = <0x02005800 0xe4>;
209 };
210
211 Example board file extract:
212
213 &pinctrl {
214 uart0_default: uart0 {
215 uart0_cfg {
216 tz1090,pins = "uart0_rxd",
217 "uart0_txd";
218 tz1090,function = "perip";
219 };
220 };
221 tft_default: tft {
222 tft_cfg {
223 tz1090,pins = "tft";
224 tz1090,function = "tft";
225 };
226 };
227 };
228
229 uart@02004b00 {
230 pinctrl-names = "default";
231 pinctrl-0 = <&uart0_default>;
232 };
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