Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt

   1 Samsung GPIO and Pin Mux/Config controller
   2
   3 Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
   4 controller. It controls the input/output settings on the available pads/pins
   5 and also provides ability to multiplex and configure the output of various
   6 on-chip controllers onto these pads.
   7
   8 Required Properties:
   9 - compatible: should be one of the following.
  10   - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
  11   - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
  12   - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
  13   - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
  14   - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
  15   - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
  16   - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller.
  17   - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller.
  18   - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller.
  19   - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller.
  20
  21 - reg: Base address of the pin controller hardware module and length of
  22   the address space it occupies.
  23
  24 - Pin banks as child nodes: Pin banks of the controller are represented by child
  25   nodes of the controller node. Bank name is taken from name of the node. Each
  26   bank node must contain following properties:
  27
  28   - gpio-controller: identifies the node as a gpio controller and pin bank.
  29   - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
  30     binding is used, the amount of cells must be specified as 2. See the below
  31     mentioned gpio binding representation for description of particular cells.
  32
  33         Eg: <&gpx2 6 0>
  34         <[phandle of the gpio controller node]
  35         [pin number within the gpio controller]
  36         [flags]>
  37
  38         Values for gpio specifier:
  39         - Pin number: is a value between 0 to 7.
  40         - Flags: 0 - Active High
  41                  1 - Active Low
  42
  43 - Pin mux/config groups as child nodes: The pin mux (selecting pin function
  44   mode) and pin config (pull up/down, driver strength) settings are represented
  45   as child nodes of the pin-controller node. There should be atleast one
  46   child node and there is no limit on the count of these child nodes.
  47
  48   The child node should contain a list of pin(s) on which a particular pin
  49   function selection or pin configuration (or both) have to applied. This
  50   list of pins is specified using the property name "samsung,pins". There
  51   should be atleast one pin specfied for this property and there is no upper
  52   limit on the count of pins that can be specified. The pins are specified
  53   using pin names which are derived from the hardware manual of the SoC. As
  54   an example, the pins in GPA0 bank of the pin controller can be represented
  55   as "gpa0-0", "gpa0-1", "gpa0-2" and so on. The names should be in lower case.
  56   The format of the pin names should be (as per the hardware manual)
  57   "[pin bank name]-[pin number within the bank]".
  58
  59   The pin function selection that should be applied on the pins listed in the
  60   child node is specified using the "samsung,pin-function" property. The value
  61   of this property that should be applied to each of the pins listed in the
  62   "samsung,pins" property should be picked from the hardware manual of the SoC
  63   for the specified pin group. This property is optional in the child node if
  64   no specific function selection is desired for the pins listed in the child
  65   node. The value of this property is used as-is to program the pin-controller
  66   function selector register of the pin-bank.
  67
  68   The child node can also optionally specify one or more of the pin
  69   configuration that should be applied on all the pins listed in the
  70   "samsung,pins" property of the child node. The following pin configuration
  71   properties are supported.
  72
  73   - samsung,pin-pud: Pull up/down configuration.
  74   - samsung,pin-drv: Drive strength configuration.
  75   - samsung,pin-pud-pdn: Pull up/down configuration in power down mode.
  76   - samsung,pin-drv-pdn: Drive strength configuration in power down mode.
  77
  78   The values specified by these config properties should be derived from the
  79   hardware manual and these values are programmed as-is into the pin
  80   pull up/down and driver strength register of the pin-controller.
  81
  82   Note: A child should include atleast a pin function selection property or
  83   pin configuration property (one or more) or both.
  84
  85   The client nodes that require a particular pin function selection and/or
  86   pin configuration should use the bindings listed in the "pinctrl-bindings.txt"
  87   file.
  88
  89 External GPIO and Wakeup Interrupts:
  90
  91 The controller supports two types of external interrupts over gpio. The first
  92 is the external gpio interrupt and second is the external wakeup interrupts.
  93 The difference between the two is that the external wakeup interrupts can be
  94 used as system wakeup events.
  95
  96 A. External GPIO Interrupts: For supporting external gpio interrupts, the
  97    following properties should be specified in the pin-controller device node.
  98
  99    - interrupt-parent: phandle of the interrupt parent to which the external
 100      GPIO interrupts are forwarded to.
 101    - interrupts: interrupt specifier for the controller. The format and value of
 102      the interrupt specifier depends on the interrupt parent for the controller.
 103
 104    In addition, following properties must be present in node of every bank
 105    of pins supporting GPIO interrupts:
 106
 107    - interrupt-controller: identifies the controller node as interrupt-parent.
 108    - #interrupt-cells: the value of this property should be 2.
 109      - First Cell: represents the external gpio interrupt number local to the
 110        external gpio interrupt space of the controller.
 111      - Second Cell: flags to identify the type of the interrupt
 112        - 1 = rising edge triggered
 113        - 2 = falling edge triggered
 114        - 3 = rising and falling edge triggered
 115        - 4 = high level triggered
 116        - 8 = low level triggered
 117
 118 B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
 119    child node representing the external wakeup interrupt controller should be
 120    included in the pin-controller device node. This child node should include
 121    the following properties.
 122
 123    - compatible: identifies the type of the external wakeup interrupt controller
 124      The possible values are:
 125      - samsung,s3c2410-wakeup-eint: represents wakeup interrupt controller
 126        found on Samsung S3C24xx SoCs except S3C2412 and S3C2413,
 127      - samsung,s3c2412-wakeup-eint: represents wakeup interrupt controller
 128        found on Samsung S3C2412 and S3C2413 SoCs,
 129      - samsung,s3c64xx-wakeup-eint: represents wakeup interrupt controller
 130        found on Samsung S3C64xx SoCs,
 131      - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
 132        found on Samsung Exynos4210 and S5PC110/S5PV210 SoCs.
 133    - interrupt-parent: phandle of the interrupt parent to which the external
 134      wakeup interrupts are forwarded to.
 135    - interrupts: interrupt used by multiplexed wakeup interrupts.
 136
 137    In addition, following properties must be present in node of every bank
 138    of pins supporting wake-up interrupts:
 139
 140    - interrupt-controller: identifies the node as interrupt-parent.
 141    - #interrupt-cells: the value of this property should be 2
 142      - First Cell: represents the external wakeup interrupt number local to
 143        the external wakeup interrupt space of the controller.
 144      - Second Cell: flags to identify the type of the interrupt
 145        - 1 = rising edge triggered
 146        - 2 = falling edge triggered
 147        - 3 = rising and falling edge triggered
 148        - 4 = high level triggered
 149        - 8 = low level triggered
 150
 151    Node of every bank of pins supporting direct wake-up interrupts (without
 152    multiplexing) must contain following properties:
 153
 154    - interrupt-parent: phandle of the interrupt parent to which the external
 155      wakeup interrupts are forwarded to.
 156    - interrupts: interrupts of the interrupt parent which are used for external
 157      wakeup interrupts from pins of the bank, must contain interrupts for all
 158      pins of the bank.
 159
 160 Aliases:
 161
 162 All the pin controller nodes should be represented in the aliases node using
 163 the following format 'pinctrl{n}' where n is a unique number for the alias.
 164
 165 Example: A pin-controller node with pin banks:
 166
 167         pinctrl_0: pinctrl@11400000 {
 168                 compatible = "samsung,exynos4210-pinctrl";
 169                 reg = <0x11400000 0x1000>;
 170                 interrupts = <0 47 0>;
 171
 172                 /* ... */
 173
 174                 /* Pin bank without external interrupts */
 175                 gpy0: gpy0 {
 176                         gpio-controller;
 177                         #gpio-cells = <2>;
 178                 };
 179
 180                 /* ... */
 181
 182                 /* Pin bank with external GPIO or muxed wake-up interrupts */
 183                 gpj0: gpj0 {
 184                         gpio-controller;
 185                         #gpio-cells = <2>;
 186
 187                         interrupt-controller;
 188                         #interrupt-cells = <2>;
 189                 };
 190
 191                 /* ... */
 192
 193                 /* Pin bank with external direct wake-up interrupts */
 194                 gpx0: gpx0 {
 195                         gpio-controller;
 196                         #gpio-cells = <2>;
 197
 198                         interrupt-controller;
 199                         interrupt-parent = <&gic>;
 200                         interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
 201                                      <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>;
 202                         #interrupt-cells = <2>;
 203                 };
 204
 205                 /* ... */
 206         };
 207
 208 Example 1: A pin-controller node with pin groups.
 209
 210         pinctrl_0: pinctrl@11400000 {
 211                 compatible = "samsung,exynos4210-pinctrl";
 212                 reg = <0x11400000 0x1000>;
 213                 interrupts = <0 47 0>;
 214
 215                 /* ... */
 216
 217                 uart0_data: uart0-data {
 218                         samsung,pins = "gpa0-0", "gpa0-1";
 219                         samsung,pin-function = <2>;
 220                         samsung,pin-pud = <0>;
 221                         samsung,pin-drv = <0>;
 222                 };
 223
 224                 uart0_fctl: uart0-fctl {
 225                         samsung,pins = "gpa0-2", "gpa0-3";
 226                         samsung,pin-function = <2>;
 227                         samsung,pin-pud = <0>;
 228                         samsung,pin-drv = <0>;
 229                 };
 230
 231                 uart1_data: uart1-data {
 232                         samsung,pins = "gpa0-4", "gpa0-5";
 233                         samsung,pin-function = <2>;
 234                         samsung,pin-pud = <0>;
 235                         samsung,pin-drv = <0>;
 236                 };
 237
 238                 uart1_fctl: uart1-fctl {
 239                         samsung,pins = "gpa0-6", "gpa0-7";
 240                         samsung,pin-function = <2>;
 241                         samsung,pin-pud = <0>;
 242                         samsung,pin-drv = <0>;
 243                 };
 244
 245                 i2c2_bus: i2c2-bus {
 246                         samsung,pins = "gpa0-6", "gpa0-7";
 247                         samsung,pin-function = <3>;
 248                         samsung,pin-pud = <3>;
 249                         samsung,pin-drv = <0>;
 250                 };
 251         };
 252
 253 Example 2: A pin-controller node with external wakeup interrupt controller node.
 254
 255         pinctrl_1: pinctrl@11000000 {
 256                 compatible = "samsung,exynos4210-pinctrl";
 257                 reg = <0x11000000 0x1000>;
 258                 interrupts = <0 46 0>
 259
 260                 /* ... */
 261
 262                 wakeup-interrupt-controller {
 263                         compatible = "samsung,exynos4210-wakeup-eint";
 264                         interrupt-parent = <&gic>;
 265                         interrupts = <0 32 0>;
 266                 };
 267         };
 268
 269 Example 3: A uart client node that supports 'default' and 'flow-control' states.
 270
 271         uart@13800000 {
 272                 compatible = "samsung,exynos4210-uart";
 273                 reg = <0x13800000 0x100>;
 274                 interrupts = <0 52 0>;
 275                 pinctrl-names = "default", "flow-control;
 276                 pinctrl-0 = <&uart0_data>;
 277                 pinctrl-1 = <&uart0_data &uart0_fctl>;
 278         };
 279
 280 Example 4: Set up the default pin state for uart controller.
 281
 282         static int s3c24xx_serial_probe(struct platform_device *pdev) {
 283                 struct pinctrl *pinctrl;
 284
 285                 /* ... */
 286
 287                 pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
 288         }
 289
 290 Example 5: A display port client node that supports 'default' pinctrl state
 291            and gpio binding.
 292
 293         display-port-controller {
 294                 /* ... */
 295
 296                 samsung,hpd-gpio = <&gpx2 6 0>;
 297                 pinctrl-names = "default";
 298                 pinctrl-0 = <&dp_hpd>;
 299         };
 300
 301 Example 6: Request the gpio for display port controller
 302
 303         static int exynos_dp_probe(struct platform_device *pdev)
 304         {
 305                 int hpd_gpio, ret;
 306                 struct device *dev = &pdev->dev;
 307                 struct device_node *dp_node = dev->of_node;
 308
 309                 /* ... */
 310
 311                 hpd_gpio = of_get_named_gpio(dp_node, "samsung,hpd-gpio", 0);
 312
 313                 /* ... */
 314
 315                 ret = devm_gpio_request_one(&pdev->dev, hpd_gpio, GPIOF_IN,
 316                                             "hpd_gpio");
 317                 /* ... */
 318         }