Documentation/devicetree/bindings/serial/sirf-uart.txt

   1 * CSR SiRFprimaII/atlasVI Universal Synchronous Asynchronous Receiver/Transmitter *
   2
   3 Required properties:
   4 - compatible : Should be "sirf,prima2-uart" or "sirf, prima2-usp-uart"
   5 - reg : Offset and length of the register set for the device
   6 - interrupts : Should contain uart interrupt
   7 - fifosize : Should define hardware rx/tx fifo size
   8 - clocks : Should contain uart clock number
   9
  10 Optional properties:
  11 - sirf,uart-has-rtscts: we have hardware flow controller pins in hardware
  12 - rts-gpios: RTS pin for USP-based UART if sirf,uart-has-rtscts is true
  13 - cts-gpios: CTS pin for USP-based UART if sirf,uart-has-rtscts is true
  14
  15 Example:
  16
  17 uart0: uart@b0050000 {
  18         cell-index = <0>;
  19         compatible = "sirf,prima2-uart";
  20         reg = <0xb0050000 0x1000>;
  21         interrupts = <17>;
  22         fifosize = <128>;
  23         clocks = <&clks 13>;
  24 };
  25
  26 On the board-specific dts, we can put rts-gpios and cts-gpios like
  27
  28 usp@b0090000 {
  29         compatible = "sirf,prima2-usp-uart";
  30         sirf,uart-has-rtscts;
  31         rts-gpios = <&gpio 15 0>;
  32         cts-gpios = <&gpio 46 0>;
  33 };