Documentation/devicetree/bindings/serial/sirf-uart.txt

   1 * CSR SiRFprimaII/atlasVI Universal Synchronous Asynchronous Receiver/Transmitter *
   2
   3 Required properties:
   4 - compatible : Should be "sirf,prima2-uart", "sirf, prima2-usp-uart",
   5                 "sirf,atlas7-uart" or "sirf,atlas7-bt-uart" which means
   6                 uart located in BT module and used for BT.
   7 - reg : Offset and length of the register set for the device
   8 - interrupts : Should contain uart interrupt
   9 - fifosize : Should define hardware rx/tx fifo size
  10 - clocks : Should contain uart clock number
  11
  12 Optional properties:
  13 - sirf,uart-has-rtscts: we have hardware flow controller pins in hardware
  14 - rts-gpios: RTS pin for USP-based UART if sirf,uart-has-rtscts is true
  15 - cts-gpios: CTS pin for USP-based UART if sirf,uart-has-rtscts is true
  16
  17 Example:
  18
  19 uart0: uart@b0050000 {
  20         cell-index = <0>;
  21         compatible = "sirf,prima2-uart";
  22         reg = <0xb0050000 0x1000>;
  23         interrupts = <17>;
  24         fifosize = <128>;
  25         clocks = <&clks 13>;
  26 };
  27
  28 On the board-specific dts, we can put rts-gpios and cts-gpios like
  29
  30 usp@b0090000 {
  31         compatible = "sirf,prima2-usp-uart";
  32         sirf,uart-has-rtscts;
  33         rts-gpios = <&gpio 15 0>;
  34         cts-gpios = <&gpio 46 0>;
  35 };
  36
  37 for uart use in BT module,
  38 uart6: uart@11000000 {
  39         cell-index = <6>;
  40         compatible = "sirf,atlas7-bt-uart", "sirf,atlas7-uart";
  41         reg = <0x11000000 0x1000>;
  42         interrupts = <0 100 0>;
  43         clocks = <&clks 138>, <&clks 140>, <&clks 141>;
  44         clock-names = "uart", "general", "noc";
  45         fifosize = <128>;
  46         status = "disabled";
  47 }