Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt

   1 * Qualcomm Technologies LPASS CPU DAI
   2
   3 This node models the Qualcomm Technologies Low-Power Audio SubSystem (LPASS).
   4
   5 Required properties:
   6
   7 - compatible            : "qcom,lpass-cpu" or "qcom,apq8016-lpass-cpu"
   8 - clocks                : Must contain an entry for each entry in clock-names.
   9 - clock-names           : A list which must include the following entries:
  10                                 * "ahbix-clk"
  11                                 * "mi2s-osr-clk"
  12                                 * "mi2s-bit-clk"
  13                         : required clocks for "qcom,lpass-cpu-apq8016"
  14                                 * "ahbix-clk"
  15                                 * "mi2s-bit-clk0"
  16                                 * "mi2s-bit-clk1"
  17                                 * "mi2s-bit-clk2"
  18                                 * "mi2s-bit-clk3"
  19                                 * "pcnoc-mport-clk"
  20                                 * "pcnoc-sway-clk"
  21
  22 - interrupts            : Must contain an entry for each entry in
  23                           interrupt-names.
  24 - interrupt-names       : A list which must include the following entries:
  25                                 * "lpass-irq-lpaif"
  26 - pinctrl-N             : One property must exist for each entry in
  27                           pinctrl-names.  See ../pinctrl/pinctrl-bindings.txt
  28                           for details of the property values.
  29 - pinctrl-names         : Must contain a "default" entry.
  30 - reg                   : Must contain an address for each entry in reg-names.
  31 - reg-names             : A list which must include the following entries:
  32                                 * "lpass-lpaif"
  33
  34
  35
  36 Optional properties:
  37
  38 - qcom,adsp             : Phandle for the audio DSP node
  39
  40 Example:
  41
  42 lpass@28100000 {
  43         compatible = "qcom,lpass-cpu";
  44         clocks = <&lcc AHBIX_CLK>, <&lcc MI2S_OSR_CLK>, <&lcc MI2S_BIT_CLK>;
  45         clock-names = "ahbix-clk", "mi2s-osr-clk", "mi2s-bit-clk";
  46         interrupts = <0 85 1>;
  47         interrupt-names = "lpass-irq-lpaif";
  48         pinctrl-names = "default", "idle";
  49         pinctrl-0 = <&mi2s_default>;
  50         pinctrl-1 = <&mi2s_idle>;
  51         reg = <0x28100000 0x10000>;
  52         reg-names = "lpass-lpaif";
  53         qcom,adsp = <&adsp>;
  54 };