Documentation/devicetree/bindings/video/exynos_dsim.txt

   1 Exynos MIPI DSI Master
   2
   3 Required properties:
   4   - compatible: "samsung,exynos4210-mipi-dsi"
   5   - reg: physical base address and length of the registers set for the device
   6   - interrupts: should contain DSI interrupt
   7   - clocks: list of clock specifiers, must contain an entry for each required
   8     entry in clock-names
   9   - clock-names: should include "bus_clk"and "pll_clk" entries
  10   - phys: list of phy specifiers, must contain an entry for each required
  11     entry in phy-names
  12   - phy-names: should include "dsim" entry
  13   - vddcore-supply: MIPI DSIM Core voltage supply (e.g. 1.1V)
  14   - vddio-supply: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V)
  15   - samsung,pll-clock-frequency: specifies frequency of the "pll_clk" clock
  16   - #address-cells, #size-cells: should be set respectively to <1> and <0>
  17     according to DSI host bindings (see MIPI DSI bindings [1])
  18
  19 Optional properties:
  20   - samsung,power-domain: a phandle to DSIM power domain node
  21
  22 Child nodes:
  23   Should contain DSI peripheral nodes (see MIPI DSI bindings [1]).
  24
  25 Video interfaces:
  26   Device node can contain video interface port nodes according to [2].
  27   The following are properties specific to those nodes:
  28
  29   port node:
  30     - reg: (required) can be 0 for input RGB/I80 port or 1 for DSI port;
  31
  32   endpoint node of DSI port (reg = 1):
  33     - samsung,burst-clock-frequency: specifies DSI frequency in high-speed burst
  34       mode
  35     - samsung,esc-clock-frequency: specifies DSI frequency in escape mode
  36
  37 [1]: Documentation/devicetree/bindings/mipi/dsi/mipi-dsi-bus.txt
  38 [2]: Documentation/devicetree/bindings/media/video-interfaces.txt
  39
  40 Example:
  41
  42         dsi@11C80000 {
  43                 compatible = "samsung,exynos4210-mipi-dsi";
  44                 reg = <0x11C80000 0x10000>;
  45                 interrupts = <0 79 0>;
  46                 clocks = <&clock 286>, <&clock 143>;
  47                 clock-names = "bus_clk", "pll_clk";
  48                 phys = <&mipi_phy 1>;
  49                 phy-names = "dsim";
  50                 vddcore-supply = <&vusb_reg>;
  51                 vddio-supply = <&vmipi_reg>;
  52                 samsung,power-domain = <&pd_lcd0>;
  53                 #address-cells = <1>;
  54                 #size-cells = <0>;
  55                 samsung,pll-clock-frequency = <24000000>;
  56
  57                 panel@1 {
  58                         reg = <0>;
  59                         ...
  60                         port {
  61                                 panel_ep: endpoint {
  62                                         remote-endpoint = <&dsi_ep>;
  63                                 };
  64                         };
  65                 };
  66
  67                 ports {
  68                         #address-cells = <1>;
  69                         #size-cells = <0>;
  70
  71                         port@1 {
  72                                 dsi_ep: endpoint {
  73                                         reg = <0>;
  74                                         samsung,burst-clock-frequency = <500000000>;
  75                                         samsung,esc-clock-frequency = <20000000>;
  76                                         remote-endpoint = <&panel_ep>;
  77                                 };
  78                         };
  79                 };
  80         };