dt-bindings: video: Add documentation for rockchip vop
[deliverable/linux.git] / Documentation / devicetree / bindings / video / rockchip-vop.txt
1 device-tree bindings for rockchip soc display controller (vop)
2
3 VOP (Visual Output Processor) is the Display Controller for the Rockchip
4 series of SoCs which transfers the image data from a video memory
5 buffer to an external LCD interface.
6
7 Required properties:
8 - compatible: value should be one of the following
9 "rockchip,rk3288-vop";
10
11 - interrupts: should contain a list of all VOP IP block interrupts in the
12 order: VSYNC, LCD_SYSTEM. The interrupt specifier
13 format depends on the interrupt controller used.
14
15 - clocks: must include clock specifiers corresponding to entries in the
16 clock-names property.
17
18 - clock-names: Must contain
19 aclk_vop: for ddr buffer transfer.
20 hclk_vop: for ahb bus to R/W the phy regs.
21 dclk_vop: pixel clock.
22
23 - resets: Must contain an entry for each entry in reset-names.
24 See ../reset/reset.txt for details.
25 - reset-names: Must include the following entries:
26 - axi
27 - ahb
28 - dclk
29
30 - iommus: required a iommu node
31
32 - port: A port node with endpoint definitions as defined in
33 Documentation/devicetree/bindings/media/video-interfaces.txt.
34
35 Example:
36 SoC specific DT entry:
37 vopb: vopb@ff930000 {
38 compatible = "rockchip,rk3288-vop";
39 reg = <0xff930000 0x19c>;
40 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
41 clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
42 clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
43 resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>;
44 reset-names = "axi", "ahb", "dclk";
45 iommus = <&vopb_mmu>;
46 vopb_out: port {
47 #address-cells = <1>;
48 #size-cells = <0>;
49 vopb_out_edp: endpoint@0 {
50 reg = <0>;
51 remote-endpoint=<&edp_in_vopb>;
52 };
53 vopb_out_hdmi: endpoint@1 {
54 reg = <1>;
55 remote-endpoint=<&hdmi_in_vopb>;
56 };
57 };
58 };
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