arch/alpha/kernel/head.S

   1 /*
   2  * arch/alpha/kernel/head.S
   3  *
   4  * initial boot stuff.. At this point, the bootloader has already
   5  * switched into OSF/1 PAL-code, and loaded us at the correct address
   6  * (START_ADDR).  So there isn't much left for us to do: just set up
   7  * the kernel global pointer and jump to the kernel entry-point.
   8  */
   9
  10 #include <linux/init.h>
  11 #include <asm/system.h>
  12 #include <asm/asm-offsets.h>
  13
  14 __HEAD
  15 .globl swapper_pg_dir
  16 .globl _stext
  17 swapper_pg_dir=SWAPPER_PGD
  18
  19         .set noreorder
  20         .globl  __start
  21         .ent    __start
  22 _stext:
  23 __start:
  24         .prologue 0
  25         br      $27,1f
  26 1:      ldgp    $29,0($27)
  27         /* We need to get current_task_info loaded up...  */
  28         lda     $8,init_thread_union
  29         /* ... and find our stack ... */
  30         lda     $30,0x4000 - SIZEOF_PT_REGS($8)
  31         /* ... and then we can start the kernel.  */
  32         jsr     $26,start_kernel
  33         call_pal PAL_halt
  34         .end __start
  35
  36 #ifdef CONFIG_SMP
  37         .align 3
  38         .globl  __smp_callin
  39         .ent    __smp_callin
  40         /* On entry here from SRM console, the HWPCB of the per-cpu
  41            slot for this processor has been loaded.  We've arranged
  42            for the UNIQUE value for this process to contain the PCBB
  43            of the target idle task.  */
  44 __smp_callin:
  45         .prologue 1
  46         ldgp    $29,0($27)      # First order of business, load the GP.
  47
  48         call_pal PAL_rduniq     # Grab the target PCBB.
  49         mov     $0,$16          # Install it.
  50         call_pal PAL_swpctx
  51
  52         lda     $8,0x3fff       # Find "current".
  53         bic     $30,$8,$8
  54
  55         jsr     $26,smp_callin
  56         call_pal PAL_halt
  57         .end __smp_callin
  58 #endif /* CONFIG_SMP */
  59
  60         #
  61         # The following two functions are needed for supporting SRM PALcode
  62         # on the PC164 (at least), since that PALcode manages the interrupt
  63         # masking, and we cannot duplicate the effort without causing problems
  64         #
  65
  66         .align 3
  67         .globl  cserve_ena
  68         .ent    cserve_ena
  69 cserve_ena:
  70         .prologue 0
  71         bis     $16,$16,$17
  72         lda     $16,52($31)
  73         call_pal PAL_cserve
  74         ret     ($26)
  75         .end    cserve_ena
  76
  77         .align 3
  78         .globl  cserve_dis
  79         .ent    cserve_dis
  80 cserve_dis:
  81         .prologue 0
  82         bis     $16,$16,$17
  83         lda     $16,53($31)
  84         call_pal PAL_cserve
  85         ret     ($26)
  86         .end    cserve_dis
  87
  88         #
  89         # It is handy, on occasion, to make halt actually just loop.
  90         # Putting it here means we dont have to recompile the whole
  91         # kernel.
  92         #
  93
  94         .align 3
  95         .globl  halt
  96         .ent    halt
  97 halt:
  98         .prologue 0
  99         call_pal PAL_halt
 100         .end    halt