arch/arc/Kconfig

   1 #
   2 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   3 #
   4 # This program is free software; you can redistribute it and/or modify
   5 # it under the terms of the GNU General Public License version 2 as
   6 # published by the Free Software Foundation.
   7 #
   8
   9 config ARC
  10         def_bool y
  11         select BUILDTIME_EXTABLE_SORT
  12         select COMMON_CLK
  13         select CLONE_BACKWARDS
  14         # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
  15         select DEVTMPFS if !INITRAMFS_SOURCE=""
  16         select GENERIC_ATOMIC64
  17         select GENERIC_CLOCKEVENTS
  18         select GENERIC_FIND_FIRST_BIT
  19         # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
  20         select GENERIC_IRQ_SHOW
  21         select GENERIC_PENDING_IRQ if SMP
  22         select GENERIC_SMP_IDLE_THREAD
  23         select HAVE_ARCH_KGDB
  24         select HAVE_ARCH_TRACEHOOK
  25         select HAVE_IOREMAP_PROT
  26         select HAVE_KPROBES
  27         select HAVE_KRETPROBES
  28         select HAVE_MEMBLOCK
  29         select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
  30         select HAVE_OPROFILE
  31         select HAVE_PERF_EVENTS
  32         select IRQ_DOMAIN
  33         select MODULES_USE_ELF_RELA
  34         select NO_BOOTMEM
  35         select OF
  36         select OF_EARLY_FLATTREE
  37         select PERF_USE_VMALLOC
  38         select HAVE_DEBUG_STACKOVERFLOW
  39
  40 config TRACE_IRQFLAGS_SUPPORT
  41         def_bool y
  42
  43 config LOCKDEP_SUPPORT
  44         def_bool y
  45
  46 config SCHED_OMIT_FRAME_POINTER
  47         def_bool y
  48
  49 config GENERIC_CSUM
  50         def_bool y
  51
  52 config RWSEM_GENERIC_SPINLOCK
  53         def_bool y
  54
  55 config ARCH_FLATMEM_ENABLE
  56         def_bool y
  57
  58 config MMU
  59         def_bool y
  60
  61 config NO_IOPORT_MAP
  62         def_bool y
  63
  64 config GENERIC_CALIBRATE_DELAY
  65         def_bool y
  66
  67 config GENERIC_HWEIGHT
  68         def_bool y
  69
  70 config STACKTRACE_SUPPORT
  71         def_bool y
  72         select STACKTRACE
  73
  74 config HAVE_LATENCYTOP_SUPPORT
  75         def_bool y
  76
  77 source "init/Kconfig"
  78 source "kernel/Kconfig.freezer"
  79
  80 menu "ARC Architecture Configuration"
  81
  82 menu "ARC Platform/SoC/Board"
  83
  84 source "arch/arc/plat-sim/Kconfig"
  85 source "arch/arc/plat-tb10x/Kconfig"
  86 source "arch/arc/plat-axs10x/Kconfig"
  87 #New platform adds here
  88
  89 endmenu
  90
  91 choice
  92         prompt "ARC Instruction Set"
  93         default ISA_ARCOMPACT
  94
  95 config ISA_ARCOMPACT
  96         bool "ARCompact ISA"
  97         help
  98           The original ARC ISA of ARC600/700 cores
  99
 100 ### For bisectability, disable ARCv2 support until we have all the bits in place
 101 #config ISA_ARCV2
 102 #       bool "ARC ISA v2"
 103 #       help
 104 #         ISA for the Next Generation ARC-HS cores
 105
 106 endchoice
 107
 108 menu "ARC CPU Configuration"
 109
 110 choice
 111         prompt "ARC Core"
 112         default ARC_CPU_770 if ISA_ARCOMPACT
 113         default ARC_CPU_HS if ISA_ARCV2
 114
 115 if ISA_ARCOMPACT
 116
 117 config ARC_CPU_750D
 118         bool "ARC750D"
 119         help
 120           Support for ARC750 core
 121
 122 config ARC_CPU_770
 123         bool "ARC770"
 124         select ARC_HAS_SWAPE
 125         help
 126           Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
 127           This core has a bunch of cool new features:
 128           -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
 129                    Shared Address Spaces (for sharing TLB entires in MMU)
 130           -Caches: New Prog Model, Region Flush
 131           -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
 132
 133 endif   #ISA_ARCOMPACT
 134
 135 config ARC_CPU_HS
 136         bool "ARC-HS"
 137         depends on ISA_ARCV2
 138         help
 139           Support for ARC HS38x Cores based on ARCv2 ISA
 140           The notable features are:
 141             - SMP configurations of upto 4 core with coherency
 142             - Optional L2 Cache and IO-Coherency
 143             - Revised Interrupt Architecture (multiple priorites, reg banks,
 144                 auto stack switch, auto regfile save/restore)
 145             - MMUv4 (PIPT dcache, Huge Pages)
 146             - Instructions for
 147                 * 64bit load/store: LDD, STD
 148                 * Hardware assisted divide/remainder: DIV, REM
 149                 * Function prologue/epilogue: ENTER_S, LEAVE_S
 150                 * IRQ enable/disable: CLRI, SETI
 151                 * pop count: FFS, FLS
 152                 * SETcc, BMSKN, XBFU...
 153
 154 endchoice
 155
 156 config CPU_BIG_ENDIAN
 157         bool "Enable Big Endian Mode"
 158         default n
 159         help
 160           Build kernel for Big Endian Mode of ARC CPU
 161
 162 config SMP
 163         bool "Symmetric Multi-Processing (Incomplete)"
 164         default n
 165         help
 166           This enables support for systems with more than one CPU. If you have
 167           a system with only one CPU, say N. If you have a system with more
 168           than one CPU, say Y.
 169
 170 if SMP
 171
 172 config ARC_HAS_COH_CACHES
 173         def_bool n
 174
 175 config ARC_HAS_REENTRANT_IRQ_LV2
 176         def_bool n
 177
 178 endif   #SMP
 179
 180 config NR_CPUS
 181         int "Maximum number of CPUs (2-4096)"
 182         range 2 4096
 183         depends on SMP
 184         default "2"
 185
 186 menuconfig ARC_CACHE
 187         bool "Enable Cache Support"
 188         default y
 189         # if SMP, cache enabled ONLY if ARC implementation has cache coherency
 190         depends on !SMP || ARC_HAS_COH_CACHES
 191
 192 if ARC_CACHE
 193
 194 config ARC_CACHE_LINE_SHIFT
 195         int "Cache Line Length (as power of 2)"
 196         range 5 7
 197         default "6"
 198         help
 199           Starting with ARC700 4.9, Cache line length is configurable,
 200           This option specifies "N", with Line-len = 2 power N
 201           So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
 202           Linux only supports same line lengths for I and D caches.
 203
 204 config ARC_HAS_ICACHE
 205         bool "Use Instruction Cache"
 206         default y
 207
 208 config ARC_HAS_DCACHE
 209         bool "Use Data Cache"
 210         default y
 211
 212 config ARC_CACHE_PAGES
 213         bool "Per Page Cache Control"
 214         default y
 215         depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
 216         help
 217           This can be used to over-ride the global I/D Cache Enable on a
 218           per-page basis (but only for pages accessed via MMU such as
 219           Kernel Virtual address or User Virtual Address)
 220           TLB entries have a per-page Cache Enable Bit.
 221           Note that Global I/D ENABLE + Per Page DISABLE works but corollary
 222           Global DISABLE + Per Page ENABLE won't work
 223
 224 config ARC_CACHE_VIPT_ALIASING
 225         bool "Support VIPT Aliasing D$"
 226         depends on ARC_HAS_DCACHE
 227         default n
 228
 229 endif   #ARC_CACHE
 230
 231 config ARC_HAS_ICCM
 232         bool "Use ICCM"
 233         help
 234           Single Cycle RAMS to store Fast Path Code
 235         default n
 236
 237 config ARC_ICCM_SZ
 238         int "ICCM Size in KB"
 239         default "64"
 240         depends on ARC_HAS_ICCM
 241
 242 config ARC_HAS_DCCM
 243         bool "Use DCCM"
 244         help
 245           Single Cycle RAMS to store Fast Path Data
 246         default n
 247
 248 config ARC_DCCM_SZ
 249         int "DCCM Size in KB"
 250         default "64"
 251         depends on ARC_HAS_DCCM
 252
 253 config ARC_DCCM_BASE
 254         hex "DCCM map address"
 255         default "0xA0000000"
 256         depends on ARC_HAS_DCCM
 257
 258 config ARC_HAS_HW_MPY
 259         bool "Use Hardware Multiplier (Normal or Faster XMAC)"
 260         default y
 261         help
 262           Influences how gcc generates code for MPY operations.
 263           If enabled, MPYxx insns are generated, provided by Standard/XMAC
 264           Multipler. Otherwise software multipy lib is used
 265
 266 choice
 267         prompt "MMU Version"
 268         default ARC_MMU_V3 if ARC_CPU_770
 269         default ARC_MMU_V2 if ARC_CPU_750D
 270
 271 config ARC_MMU_V1
 272         bool "MMU v1"
 273         help
 274           Orig ARC700 MMU
 275
 276 config ARC_MMU_V2
 277         bool "MMU v2"
 278         help
 279           Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
 280           when 2 D-TLB and 1 I-TLB entries index into same 2way set.
 281
 282 config ARC_MMU_V3
 283         bool "MMU v3"
 284         depends on ARC_CPU_770
 285         help
 286           Introduced with ARC700 4.10: New Features
 287           Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
 288           Shared Address Spaces (SASID)
 289
 290 endchoice
 291
 292
 293 choice
 294         prompt "MMU Page Size"
 295         default ARC_PAGE_SIZE_8K
 296
 297 config ARC_PAGE_SIZE_8K
 298         bool "8KB"
 299         help
 300           Choose between 8k vs 16k
 301
 302 config ARC_PAGE_SIZE_16K
 303         bool "16KB"
 304         depends on ARC_MMU_V3
 305
 306 config ARC_PAGE_SIZE_4K
 307         bool "4KB"
 308         depends on ARC_MMU_V3
 309
 310 endchoice
 311
 312 if ISA_ARCOMPACT
 313
 314 config ARC_COMPACT_IRQ_LEVELS
 315         bool "ARCompact IRQ Priorities: High(2)/Low(1)"
 316         default n
 317         # Timer HAS to be high priority, for any other high priority config
 318         select ARC_IRQ3_LV2
 319         # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
 320         depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2
 321
 322 if ARC_COMPACT_IRQ_LEVELS
 323
 324 config ARC_IRQ3_LV2
 325         bool
 326
 327 config ARC_IRQ5_LV2
 328         bool
 329
 330 config ARC_IRQ6_LV2
 331         bool
 332
 333 endif   #ARC_COMPACT_IRQ_LEVELS
 334
 335 config ARC_FPU_SAVE_RESTORE
 336         bool "Enable FPU state persistence across context switch"
 337         default n
 338         help
 339           Double Precision Floating Point unit had dedictaed regs which
 340           need to be saved/restored across context-switch.
 341           Note that ARC FPU is overly simplistic, unlike say x86, which has
 342           hardware pieces to allow software to conditionally save/restore,
 343           based on actual usage of FPU by a task. Thus our implemn does
 344           this for all tasks in system.
 345
 346 endif   #ISA_ARCOMPACT
 347
 348 config ARC_CANT_LLSC
 349         def_bool n
 350
 351 config ARC_HAS_LLSC
 352         bool "Insn: LLOCK/SCOND (efficient atomic ops)"
 353         default y
 354         depends on !ARC_CPU_750D && !ARC_CANT_LLSC
 355
 356 config ARC_HAS_SWAPE
 357         bool "Insn: SWAPE (endian-swap)"
 358         default y
 359
 360 if ISA_ARCV2
 361
 362 config ARC_HAS_LL64
 363         bool "Insn: 64bit LDD/STD"
 364         help
 365           Enable gcc to generate 64-bit load/store instructions
 366           ISA mandates even/odd registers to allow encoding of two
 367           dest operands with 2 possible source operands.
 368         default y
 369
 370 config ARC_NUMBER_OF_INTERRUPTS
 371         int "Number of interrupts"
 372         range 8 240
 373         default 32
 374         help
 375           This defines the number of interrupts on the ARCv2HS core.
 376           It affects the size of vector table.
 377           The initial 8 IRQs are fixed (Timer, ICI etc) and although configurable
 378           in hardware, it keep things simple for Linux to assume they are always
 379           present.
 380
 381 endif   # ISA_ARCV2
 382
 383 endmenu   # "ARC CPU Configuration"
 384
 385 config LINUX_LINK_BASE
 386         hex "Linux Link Address"
 387         default "0x80000000"
 388         help
 389           ARC700 divides the 32 bit phy address space into two equal halves
 390           -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
 391           -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
 392           Typically Linux kernel is linked at the start of untransalted addr,
 393           hence the default value of 0x8zs.
 394           However some customers have peripherals mapped at this addr, so
 395           Linux needs to be scooted a bit.
 396           If you don't know what the above means, leave this setting alone.
 397
 398 config ARC_CURR_IN_REG
 399         bool "Dedicate Register r25 for current_task pointer"
 400         default y
 401         help
 402           This reserved Register R25 to point to Current Task in
 403           kernel mode. This saves memory access for each such access
 404
 405
 406 config ARC_EMUL_UNALIGNED
 407         bool "Emulate unaligned memory access (userspace only)"
 408         default N
 409         select SYSCTL_ARCH_UNALIGN_NO_WARN
 410         select SYSCTL_ARCH_UNALIGN_ALLOW
 411         depends on ISA_ARCOMPACT
 412         help
 413           This enables misaligned 16 & 32 bit memory access from user space.
 414           Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
 415           potential bugs in code
 416
 417 config HZ
 418         int "Timer Frequency"
 419         default 100
 420
 421 config ARC_METAWARE_HLINK
 422         bool "Support for Metaware debugger assisted Host access"
 423         default n
 424         help
 425           This options allows a Linux userland apps to directly access
 426           host file system (open/creat/read/write etc) with help from
 427           Metaware Debugger. This can come in handy for Linux-host communication
 428           when there is no real usable peripheral such as EMAC.
 429
 430 menuconfig ARC_DBG
 431         bool "ARC debugging"
 432         default y
 433
 434 config ARC_DW2_UNWIND
 435         bool "Enable DWARF specific kernel stack unwind"
 436         depends on ARC_DBG
 437         default y
 438         select KALLSYMS
 439         help
 440           Compiles the kernel with DWARF unwind information and can be used
 441           to get stack backtraces.
 442
 443           If you say Y here the resulting kernel image will be slightly larger
 444           but not slower, and it will give very useful debugging information.
 445           If you don't debug the kernel, you can say N, but we may not be able
 446           to solve problems without frame unwind information
 447
 448 config ARC_DBG_TLB_PARANOIA
 449         bool "Paranoia Checks in Low Level TLB Handlers"
 450         depends on ARC_DBG
 451         default n
 452
 453 config ARC_DBG_TLB_MISS_COUNT
 454         bool "Profile TLB Misses"
 455         default n
 456         select DEBUG_FS
 457         depends on ARC_DBG
 458         help
 459           Counts number of I and D TLB Misses and exports them via Debugfs
 460           The counters can be cleared via Debugfs as well
 461
 462 config ARC_UBOOT_SUPPORT
 463         bool "Support uboot arg Handling"
 464         default n
 465         help
 466           ARC Linux by default checks for uboot provided args as pointers to
 467           external cmdline or DTB. This however breaks in absence of uboot,
 468           when booting from Metaware debugger directly, as the registers are
 469           not zeroed out on reset by mdb and/or ARCv2 based cores. The bogus
 470           registers look like uboot args to kernel which then chokes.
 471           So only enable the uboot arg checking/processing if users are sure
 472           of uboot being in play.
 473
 474 config ARC_BUILTIN_DTB_NAME
 475         string "Built in DTB"
 476         help
 477           Set the name of the DTB to embed in the vmlinux binary
 478           Leaving it blank selects the minimal "skeleton" dtb
 479
 480 source "kernel/Kconfig.preempt"
 481
 482 menu "Executable file formats"
 483 source "fs/Kconfig.binfmt"
 484 endmenu
 485
 486 endmenu  # "ARC Architecture Configuration"
 487
 488 source "mm/Kconfig"
 489 source "net/Kconfig"
 490 source "drivers/Kconfig"
 491 source "fs/Kconfig"
 492 source "arch/arc/Kconfig.debug"
 493 source "security/Kconfig"
 494 source "crypto/Kconfig"
 495 source "lib/Kconfig"
 496 source "kernel/power/Kconfig"