arch/arc/Kconfig

   1 #
   2 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   3 #
   4 # This program is free software; you can redistribute it and/or modify
   5 # it under the terms of the GNU General Public License version 2 as
   6 # published by the Free Software Foundation.
   7 #
   8
   9 config ARC
  10         def_bool y
  11         select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC
  12         select BUILDTIME_EXTABLE_SORT
  13         select CLKSRC_OF
  14         select CLONE_BACKWARDS
  15         select COMMON_CLK
  16         select GENERIC_ATOMIC64
  17         select GENERIC_CLOCKEVENTS
  18         select GENERIC_FIND_FIRST_BIT
  19         # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
  20         select GENERIC_IRQ_SHOW
  21         select GENERIC_PCI_IOMAP
  22         select GENERIC_PENDING_IRQ if SMP
  23         select GENERIC_SMP_IDLE_THREAD
  24         select HAVE_ARCH_KGDB
  25         select HAVE_ARCH_TRACEHOOK
  26         select HAVE_FUTEX_CMPXCHG
  27         select HAVE_IOREMAP_PROT
  28         select HAVE_KPROBES
  29         select HAVE_KRETPROBES
  30         select HAVE_MEMBLOCK
  31         select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
  32         select HAVE_OPROFILE
  33         select HAVE_PERF_EVENTS
  34         select HANDLE_DOMAIN_IRQ
  35         select IRQ_DOMAIN
  36         select MODULES_USE_ELF_RELA
  37         select NO_BOOTMEM
  38         select OF
  39         select OF_EARLY_FLATTREE
  40         select OF_RESERVED_MEM
  41         select PERF_USE_VMALLOC
  42         select HAVE_DEBUG_STACKOVERFLOW
  43         select HAVE_GENERIC_DMA_COHERENT
  44
  45 config MIGHT_HAVE_PCI
  46         bool
  47
  48 config TRACE_IRQFLAGS_SUPPORT
  49         def_bool y
  50
  51 config LOCKDEP_SUPPORT
  52         def_bool y
  53
  54 config SCHED_OMIT_FRAME_POINTER
  55         def_bool y
  56
  57 config GENERIC_CSUM
  58         def_bool y
  59
  60 config RWSEM_GENERIC_SPINLOCK
  61         def_bool y
  62
  63 config ARCH_DISCONTIGMEM_ENABLE
  64         def_bool y
  65
  66 config ARCH_FLATMEM_ENABLE
  67         def_bool y
  68
  69 config MMU
  70         def_bool y
  71
  72 config NO_IOPORT_MAP
  73         def_bool y
  74
  75 config GENERIC_CALIBRATE_DELAY
  76         def_bool y
  77
  78 config GENERIC_HWEIGHT
  79         def_bool y
  80
  81 config STACKTRACE_SUPPORT
  82         def_bool y
  83         select STACKTRACE
  84
  85 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
  86         def_bool y
  87         depends on ARC_MMU_V4
  88
  89 source "init/Kconfig"
  90 source "kernel/Kconfig.freezer"
  91
  92 menu "ARC Architecture Configuration"
  93
  94 menu "ARC Platform/SoC/Board"
  95
  96 source "arch/arc/plat-sim/Kconfig"
  97 source "arch/arc/plat-tb10x/Kconfig"
  98 source "arch/arc/plat-axs10x/Kconfig"
  99 #New platform adds here
 100 source "arch/arc/plat-eznps/Kconfig"
 101
 102 endmenu
 103
 104 choice
 105         prompt "ARC Instruction Set"
 106         default ISA_ARCOMPACT
 107
 108 config ISA_ARCOMPACT
 109         bool "ARCompact ISA"
 110         help
 111           The original ARC ISA of ARC600/700 cores
 112
 113 config ISA_ARCV2
 114         bool "ARC ISA v2"
 115         help
 116           ISA for the Next Generation ARC-HS cores
 117
 118 endchoice
 119
 120 menu "ARC CPU Configuration"
 121
 122 choice
 123         prompt "ARC Core"
 124         default ARC_CPU_770 if ISA_ARCOMPACT
 125         default ARC_CPU_HS if ISA_ARCV2
 126
 127 if ISA_ARCOMPACT
 128
 129 config ARC_CPU_750D
 130         bool "ARC750D"
 131         select ARC_CANT_LLSC
 132         help
 133           Support for ARC750 core
 134
 135 config ARC_CPU_770
 136         bool "ARC770"
 137         select ARC_HAS_SWAPE
 138         help
 139           Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
 140           This core has a bunch of cool new features:
 141           -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
 142                    Shared Address Spaces (for sharing TLB entires in MMU)
 143           -Caches: New Prog Model, Region Flush
 144           -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
 145
 146 endif   #ISA_ARCOMPACT
 147
 148 config ARC_CPU_HS
 149         bool "ARC-HS"
 150         depends on ISA_ARCV2
 151         help
 152           Support for ARC HS38x Cores based on ARCv2 ISA
 153           The notable features are:
 154             - SMP configurations of upto 4 core with coherency
 155             - Optional L2 Cache and IO-Coherency
 156             - Revised Interrupt Architecture (multiple priorites, reg banks,
 157                 auto stack switch, auto regfile save/restore)
 158             - MMUv4 (PIPT dcache, Huge Pages)
 159             - Instructions for
 160                 * 64bit load/store: LDD, STD
 161                 * Hardware assisted divide/remainder: DIV, REM
 162                 * Function prologue/epilogue: ENTER_S, LEAVE_S
 163                 * IRQ enable/disable: CLRI, SETI
 164                 * pop count: FFS, FLS
 165                 * SETcc, BMSKN, XBFU...
 166
 167 endchoice
 168
 169 config CPU_BIG_ENDIAN
 170         bool "Enable Big Endian Mode"
 171         default n
 172         help
 173           Build kernel for Big Endian Mode of ARC CPU
 174
 175 config SMP
 176         bool "Symmetric Multi-Processing"
 177         default n
 178         select ARC_HAS_COH_CACHES if ISA_ARCV2
 179         select ARC_MCIP if ISA_ARCV2
 180         help
 181           This enables support for systems with more than one CPU.
 182
 183 if SMP
 184
 185 config ARC_HAS_COH_CACHES
 186         def_bool n
 187
 188 config ARC_HAS_REENTRANT_IRQ_LV2
 189         def_bool n
 190
 191 config ARC_MCIP
 192         bool "ARConnect Multicore IP (MCIP) Support "
 193         depends on ISA_ARCV2
 194         help
 195           This IP block enables SMP in ARC-HS38 cores.
 196           It provides for cross-core interrupts, multi-core debug
 197           hardware semaphores, shared memory,....
 198
 199 config NR_CPUS
 200         int "Maximum number of CPUs (2-4096)"
 201         range 2 4096
 202         default "4"
 203
 204 config ARC_SMP_HALT_ON_RESET
 205         bool "Enable Halt-on-reset boot mode"
 206         default y if ARC_UBOOT_SUPPORT
 207         help
 208           In SMP configuration cores can be configured as Halt-on-reset
 209           or they could all start at same time. For Halt-on-reset, non
 210           masters are parked until Master kicks them so they can start of
 211           at designated entry point. For other case, all jump to common
 212           entry point and spin wait for Master's signal.
 213
 214 endif   #SMP
 215
 216 menuconfig ARC_CACHE
 217         bool "Enable Cache Support"
 218         default y
 219         # if SMP, cache enabled ONLY if ARC implementation has cache coherency
 220         depends on !SMP || ARC_HAS_COH_CACHES
 221
 222 if ARC_CACHE
 223
 224 config ARC_CACHE_LINE_SHIFT
 225         int "Cache Line Length (as power of 2)"
 226         range 5 7
 227         default "6"
 228         help
 229           Starting with ARC700 4.9, Cache line length is configurable,
 230           This option specifies "N", with Line-len = 2 power N
 231           So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
 232           Linux only supports same line lengths for I and D caches.
 233
 234 config ARC_HAS_ICACHE
 235         bool "Use Instruction Cache"
 236         default y
 237
 238 config ARC_HAS_DCACHE
 239         bool "Use Data Cache"
 240         default y
 241
 242 config ARC_CACHE_PAGES
 243         bool "Per Page Cache Control"
 244         default y
 245         depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
 246         help
 247           This can be used to over-ride the global I/D Cache Enable on a
 248           per-page basis (but only for pages accessed via MMU such as
 249           Kernel Virtual address or User Virtual Address)
 250           TLB entries have a per-page Cache Enable Bit.
 251           Note that Global I/D ENABLE + Per Page DISABLE works but corollary
 252           Global DISABLE + Per Page ENABLE won't work
 253
 254 config ARC_CACHE_VIPT_ALIASING
 255         bool "Support VIPT Aliasing D$"
 256         depends on ARC_HAS_DCACHE && ISA_ARCOMPACT
 257         default n
 258
 259 endif   #ARC_CACHE
 260
 261 config ARC_HAS_ICCM
 262         bool "Use ICCM"
 263         help
 264           Single Cycle RAMS to store Fast Path Code
 265         default n
 266
 267 config ARC_ICCM_SZ
 268         int "ICCM Size in KB"
 269         default "64"
 270         depends on ARC_HAS_ICCM
 271
 272 config ARC_HAS_DCCM
 273         bool "Use DCCM"
 274         help
 275           Single Cycle RAMS to store Fast Path Data
 276         default n
 277
 278 config ARC_DCCM_SZ
 279         int "DCCM Size in KB"
 280         default "64"
 281         depends on ARC_HAS_DCCM
 282
 283 config ARC_DCCM_BASE
 284         hex "DCCM map address"
 285         default "0xA0000000"
 286         depends on ARC_HAS_DCCM
 287
 288 choice
 289         prompt "MMU Version"
 290         default ARC_MMU_V3 if ARC_CPU_770
 291         default ARC_MMU_V2 if ARC_CPU_750D
 292         default ARC_MMU_V4 if ARC_CPU_HS
 293
 294 if ISA_ARCOMPACT
 295
 296 config ARC_MMU_V1
 297         bool "MMU v1"
 298         help
 299           Orig ARC700 MMU
 300
 301 config ARC_MMU_V2
 302         bool "MMU v2"
 303         help
 304           Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
 305           when 2 D-TLB and 1 I-TLB entries index into same 2way set.
 306
 307 config ARC_MMU_V3
 308         bool "MMU v3"
 309         depends on ARC_CPU_770
 310         help
 311           Introduced with ARC700 4.10: New Features
 312           Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
 313           Shared Address Spaces (SASID)
 314
 315 endif
 316
 317 config ARC_MMU_V4
 318         bool "MMU v4"
 319         depends on ISA_ARCV2
 320
 321 endchoice
 322
 323
 324 choice
 325         prompt "MMU Page Size"
 326         default ARC_PAGE_SIZE_8K
 327
 328 config ARC_PAGE_SIZE_8K
 329         bool "8KB"
 330         help
 331           Choose between 8k vs 16k
 332
 333 config ARC_PAGE_SIZE_16K
 334         bool "16KB"
 335         depends on ARC_MMU_V3 || ARC_MMU_V4
 336
 337 config ARC_PAGE_SIZE_4K
 338         bool "4KB"
 339         depends on ARC_MMU_V3 || ARC_MMU_V4
 340
 341 endchoice
 342
 343 choice
 344         prompt "MMU Super Page Size"
 345         depends on ISA_ARCV2 && TRANSPARENT_HUGEPAGE
 346         default ARC_HUGEPAGE_2M
 347
 348 config ARC_HUGEPAGE_2M
 349         bool "2MB"
 350
 351 config ARC_HUGEPAGE_16M
 352         bool "16MB"
 353
 354 endchoice
 355
 356 config NODES_SHIFT
 357         int "Maximum NUMA Nodes (as a power of 2)"
 358         default "1" if !DISCONTIGMEM
 359         default "2" if DISCONTIGMEM
 360         depends on NEED_MULTIPLE_NODES
 361         ---help---
 362           Accessing memory beyond 1GB (with or w/o PAE) requires 2 memory
 363           zones.
 364
 365 if ISA_ARCOMPACT
 366
 367 config ARC_COMPACT_IRQ_LEVELS
 368         bool "ARCompact IRQ Priorities: High(2)/Low(1)"
 369         default n
 370         # Timer HAS to be high priority, for any other high priority config
 371         select ARC_IRQ3_LV2
 372         # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
 373         depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2
 374
 375 if ARC_COMPACT_IRQ_LEVELS
 376
 377 config ARC_IRQ3_LV2
 378         bool
 379
 380 config ARC_IRQ5_LV2
 381         bool
 382
 383 config ARC_IRQ6_LV2
 384         bool
 385
 386 endif   #ARC_COMPACT_IRQ_LEVELS
 387
 388 config ARC_FPU_SAVE_RESTORE
 389         bool "Enable FPU state persistence across context switch"
 390         default n
 391         help
 392           Double Precision Floating Point unit had dedictaed regs which
 393           need to be saved/restored across context-switch.
 394           Note that ARC FPU is overly simplistic, unlike say x86, which has
 395           hardware pieces to allow software to conditionally save/restore,
 396           based on actual usage of FPU by a task. Thus our implemn does
 397           this for all tasks in system.
 398
 399 endif   #ISA_ARCOMPACT
 400
 401 config ARC_CANT_LLSC
 402         def_bool n
 403
 404 config ARC_HAS_LLSC
 405         bool "Insn: LLOCK/SCOND (efficient atomic ops)"
 406         default y
 407         depends on !ARC_CANT_LLSC
 408
 409 config ARC_STAR_9000923308
 410         bool "Workaround for llock/scond livelock"
 411         default n
 412         depends on ISA_ARCV2 && SMP && ARC_HAS_LLSC
 413
 414 config ARC_HAS_SWAPE
 415         bool "Insn: SWAPE (endian-swap)"
 416         default y
 417
 418 if ISA_ARCV2
 419
 420 config ARC_HAS_LL64
 421         bool "Insn: 64bit LDD/STD"
 422         help
 423           Enable gcc to generate 64-bit load/store instructions
 424           ISA mandates even/odd registers to allow encoding of two
 425           dest operands with 2 possible source operands.
 426         default y
 427
 428 config ARC_HAS_DIV_REM
 429         bool "Insn: div, divu, rem, remu"
 430         default y
 431
 432 config ARC_HAS_RTC
 433         bool "Local 64-bit r/o cycle counter"
 434         default n
 435         depends on !SMP
 436
 437 config ARC_HAS_GFRC
 438         bool "SMP synchronized 64-bit cycle counter"
 439         default y
 440         depends on SMP
 441
 442 config ARC_NUMBER_OF_INTERRUPTS
 443         int "Number of interrupts"
 444         range 8 240
 445         default 32
 446         help
 447           This defines the number of interrupts on the ARCv2HS core.
 448           It affects the size of vector table.
 449           The initial 8 IRQs are fixed (Timer, ICI etc) and although configurable
 450           in hardware, it keep things simple for Linux to assume they are always
 451           present.
 452
 453 endif   # ISA_ARCV2
 454
 455 endmenu   # "ARC CPU Configuration"
 456
 457 config LINUX_LINK_BASE
 458         hex "Linux Link Address"
 459         default "0x80000000"
 460         help
 461           ARC700 divides the 32 bit phy address space into two equal halves
 462           -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
 463           -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
 464           Typically Linux kernel is linked at the start of untransalted addr,
 465           hence the default value of 0x8zs.
 466           However some customers have peripherals mapped at this addr, so
 467           Linux needs to be scooted a bit.
 468           If you don't know what the above means, leave this setting alone.
 469           This needs to match memory start address specified in Device Tree
 470
 471 config HIGHMEM
 472         bool "High Memory Support"
 473         select DISCONTIGMEM
 474         help
 475           With ARC 2G:2G address split, only upper 2G is directly addressable by
 476           kernel. Enable this to potentially allow access to rest of 2G and PAE
 477           in future
 478
 479 config ARC_HAS_PAE40
 480         bool "Support for the 40-bit Physical Address Extension"
 481         default n
 482         depends on ISA_ARCV2
 483         help
 484           Enable access to physical memory beyond 4G, only supported on
 485           ARC cores with 40 bit Physical Addressing support
 486
 487 config ARCH_PHYS_ADDR_T_64BIT
 488         def_bool ARC_HAS_PAE40
 489
 490 config ARCH_DMA_ADDR_T_64BIT
 491         bool
 492
 493 config ARC_PLAT_NEEDS_PHYS_TO_DMA
 494         bool
 495
 496 config ARC_KVADDR_SIZE
 497         int "Kernel Virtaul Address Space size (MB)"
 498         range 0 512
 499         default "256"
 500         help
 501           The kernel address space is carved out of 256MB of translated address
 502           space for catering to vmalloc, modules, pkmap, fixmap. This however may
 503           not suffice vmalloc requirements of a 4K CPU EZChip system. So allow
 504           this to be stretched to 512 MB (by extending into the reserved
 505           kernel-user gutter)
 506
 507 config ARC_CURR_IN_REG
 508         bool "Dedicate Register r25 for current_task pointer"
 509         default y
 510         help
 511           This reserved Register R25 to point to Current Task in
 512           kernel mode. This saves memory access for each such access
 513
 514
 515 config ARC_EMUL_UNALIGNED
 516         bool "Emulate unaligned memory access (userspace only)"
 517         default N
 518         select SYSCTL_ARCH_UNALIGN_NO_WARN
 519         select SYSCTL_ARCH_UNALIGN_ALLOW
 520         depends on ISA_ARCOMPACT
 521         help
 522           This enables misaligned 16 & 32 bit memory access from user space.
 523           Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
 524           potential bugs in code
 525
 526 config HZ
 527         int "Timer Frequency"
 528         default 100
 529
 530 config ARC_METAWARE_HLINK
 531         bool "Support for Metaware debugger assisted Host access"
 532         default n
 533         help
 534           This options allows a Linux userland apps to directly access
 535           host file system (open/creat/read/write etc) with help from
 536           Metaware Debugger. This can come in handy for Linux-host communication
 537           when there is no real usable peripheral such as EMAC.
 538
 539 menuconfig ARC_DBG
 540         bool "ARC debugging"
 541         default y
 542
 543 if ARC_DBG
 544
 545 config ARC_DW2_UNWIND
 546         bool "Enable DWARF specific kernel stack unwind"
 547         default y
 548         select KALLSYMS
 549         help
 550           Compiles the kernel with DWARF unwind information and can be used
 551           to get stack backtraces.
 552
 553           If you say Y here the resulting kernel image will be slightly larger
 554           but not slower, and it will give very useful debugging information.
 555           If you don't debug the kernel, you can say N, but we may not be able
 556           to solve problems without frame unwind information
 557
 558 config ARC_DBG_TLB_PARANOIA
 559         bool "Paranoia Checks in Low Level TLB Handlers"
 560         default n
 561
 562 config ARC_DBG_TLB_MISS_COUNT
 563         bool "Profile TLB Misses"
 564         default n
 565         select DEBUG_FS
 566         help
 567           Counts number of I and D TLB Misses and exports them via Debugfs
 568           The counters can be cleared via Debugfs as well
 569
 570 endif
 571
 572 config ARC_UBOOT_SUPPORT
 573         bool "Support uboot arg Handling"
 574         default n
 575         help
 576           ARC Linux by default checks for uboot provided args as pointers to
 577           external cmdline or DTB. This however breaks in absence of uboot,
 578           when booting from Metaware debugger directly, as the registers are
 579           not zeroed out on reset by mdb and/or ARCv2 based cores. The bogus
 580           registers look like uboot args to kernel which then chokes.
 581           So only enable the uboot arg checking/processing if users are sure
 582           of uboot being in play.
 583
 584 config ARC_BUILTIN_DTB_NAME
 585         string "Built in DTB"
 586         help
 587           Set the name of the DTB to embed in the vmlinux binary
 588           Leaving it blank selects the minimal "skeleton" dtb
 589
 590 source "kernel/Kconfig.preempt"
 591
 592 menu "Executable file formats"
 593 source "fs/Kconfig.binfmt"
 594 endmenu
 595
 596 endmenu  # "ARC Architecture Configuration"
 597
 598 source "mm/Kconfig"
 599
 600 config FORCE_MAX_ZONEORDER
 601         int "Maximum zone order"
 602         default "12" if ARC_HUGEPAGE_16M
 603         default "11"
 604
 605 source "net/Kconfig"
 606 source "drivers/Kconfig"
 607
 608 menu "Bus Support"
 609
 610 config PCI
 611         bool "PCI support" if MIGHT_HAVE_PCI
 612         help
 613           PCI is the name of a bus system, i.e., the way the CPU talks to
 614           the other stuff inside your box.  Find out if your board/platform
 615           has PCI.
 616
 617           Note: PCIe support for Synopsys Device will be available only
 618           when HAPS DX is configured with PCIe RC bitmap. If you have PCI,
 619           say Y, otherwise N.
 620
 621 config PCI_SYSCALL
 622         def_bool PCI
 623
 624 source "drivers/pci/Kconfig"
 625
 626 endmenu
 627
 628 source "fs/Kconfig"
 629 source "arch/arc/Kconfig.debug"
 630 source "security/Kconfig"
 631 source "crypto/Kconfig"
 632 source "lib/Kconfig"
 633 source "kernel/power/Kconfig"