ARC: [axs101] Add support for AXS101 SDP (software development platform)
[deliverable/linux.git] / arch / arc / Kconfig
1 #
2 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3 #
4 # This program is free software; you can redistribute it and/or modify
5 # it under the terms of the GNU General Public License version 2 as
6 # published by the Free Software Foundation.
7 #
8
9 config ARC
10 def_bool y
11 select BUILDTIME_EXTABLE_SORT
12 select COMMON_CLK
13 select CLONE_BACKWARDS
14 # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
15 select DEVTMPFS if !INITRAMFS_SOURCE=""
16 select GENERIC_ATOMIC64
17 select GENERIC_CLOCKEVENTS
18 select GENERIC_FIND_FIRST_BIT
19 # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
20 select GENERIC_IRQ_SHOW
21 select GENERIC_PENDING_IRQ if SMP
22 select GENERIC_SMP_IDLE_THREAD
23 select HAVE_ARCH_KGDB
24 select HAVE_ARCH_TRACEHOOK
25 select HAVE_IOREMAP_PROT
26 select HAVE_KPROBES
27 select HAVE_KRETPROBES
28 select HAVE_MEMBLOCK
29 select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
30 select HAVE_OPROFILE
31 select HAVE_PERF_EVENTS
32 select IRQ_DOMAIN
33 select MODULES_USE_ELF_RELA
34 select NO_BOOTMEM
35 select OF
36 select OF_EARLY_FLATTREE
37 select PERF_USE_VMALLOC
38 select HAVE_DEBUG_STACKOVERFLOW
39
40 config TRACE_IRQFLAGS_SUPPORT
41 def_bool y
42
43 config LOCKDEP_SUPPORT
44 def_bool y
45
46 config SCHED_OMIT_FRAME_POINTER
47 def_bool y
48
49 config GENERIC_CSUM
50 def_bool y
51
52 config RWSEM_GENERIC_SPINLOCK
53 def_bool y
54
55 config ARCH_FLATMEM_ENABLE
56 def_bool y
57
58 config MMU
59 def_bool y
60
61 config NO_IOPORT_MAP
62 def_bool y
63
64 config GENERIC_CALIBRATE_DELAY
65 def_bool y
66
67 config GENERIC_HWEIGHT
68 def_bool y
69
70 config STACKTRACE_SUPPORT
71 def_bool y
72 select STACKTRACE
73
74 config HAVE_LATENCYTOP_SUPPORT
75 def_bool y
76
77 source "init/Kconfig"
78 source "kernel/Kconfig.freezer"
79
80 menu "ARC Architecture Configuration"
81
82 menu "ARC Platform/SoC/Board"
83
84 source "arch/arc/plat-sim/Kconfig"
85 source "arch/arc/plat-tb10x/Kconfig"
86 source "arch/arc/plat-axs10x/Kconfig"
87 #New platform adds here
88
89 endmenu
90
91 menu "ARC CPU Configuration"
92
93 choice
94 prompt "ARC Core"
95 default ARC_CPU_770
96
97 config ARC_CPU_750D
98 bool "ARC750D"
99 help
100 Support for ARC750 core
101
102 config ARC_CPU_770
103 bool "ARC770"
104 select ARC_HAS_SWAPE
105 help
106 Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
107 This core has a bunch of cool new features:
108 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
109 Shared Address Spaces (for sharing TLB entires in MMU)
110 -Caches: New Prog Model, Region Flush
111 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
112
113 endchoice
114
115 config CPU_BIG_ENDIAN
116 bool "Enable Big Endian Mode"
117 default n
118 help
119 Build kernel for Big Endian Mode of ARC CPU
120
121 config SMP
122 bool "Symmetric Multi-Processing (Incomplete)"
123 default n
124 help
125 This enables support for systems with more than one CPU. If you have
126 a system with only one CPU, say N. If you have a system with more
127 than one CPU, say Y.
128
129 if SMP
130
131 config ARC_HAS_COH_CACHES
132 def_bool n
133
134 config ARC_HAS_REENTRANT_IRQ_LV2
135 def_bool n
136
137 endif
138
139 config NR_CPUS
140 int "Maximum number of CPUs (2-4096)"
141 range 2 4096
142 depends on SMP
143 default "2"
144
145 menuconfig ARC_CACHE
146 bool "Enable Cache Support"
147 default y
148 # if SMP, cache enabled ONLY if ARC implementation has cache coherency
149 depends on !SMP || ARC_HAS_COH_CACHES
150
151 if ARC_CACHE
152
153 config ARC_CACHE_LINE_SHIFT
154 int "Cache Line Length (as power of 2)"
155 range 5 7
156 default "6"
157 help
158 Starting with ARC700 4.9, Cache line length is configurable,
159 This option specifies "N", with Line-len = 2 power N
160 So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
161 Linux only supports same line lengths for I and D caches.
162
163 config ARC_HAS_ICACHE
164 bool "Use Instruction Cache"
165 default y
166
167 config ARC_HAS_DCACHE
168 bool "Use Data Cache"
169 default y
170
171 config ARC_CACHE_PAGES
172 bool "Per Page Cache Control"
173 default y
174 depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
175 help
176 This can be used to over-ride the global I/D Cache Enable on a
177 per-page basis (but only for pages accessed via MMU such as
178 Kernel Virtual address or User Virtual Address)
179 TLB entries have a per-page Cache Enable Bit.
180 Note that Global I/D ENABLE + Per Page DISABLE works but corollary
181 Global DISABLE + Per Page ENABLE won't work
182
183 config ARC_CACHE_VIPT_ALIASING
184 bool "Support VIPT Aliasing D$"
185 depends on ARC_HAS_DCACHE
186 default n
187
188 endif #ARC_CACHE
189
190 config ARC_HAS_ICCM
191 bool "Use ICCM"
192 help
193 Single Cycle RAMS to store Fast Path Code
194 default n
195
196 config ARC_ICCM_SZ
197 int "ICCM Size in KB"
198 default "64"
199 depends on ARC_HAS_ICCM
200
201 config ARC_HAS_DCCM
202 bool "Use DCCM"
203 help
204 Single Cycle RAMS to store Fast Path Data
205 default n
206
207 config ARC_DCCM_SZ
208 int "DCCM Size in KB"
209 default "64"
210 depends on ARC_HAS_DCCM
211
212 config ARC_DCCM_BASE
213 hex "DCCM map address"
214 default "0xA0000000"
215 depends on ARC_HAS_DCCM
216
217 config ARC_HAS_HW_MPY
218 bool "Use Hardware Multiplier (Normal or Faster XMAC)"
219 default y
220 help
221 Influences how gcc generates code for MPY operations.
222 If enabled, MPYxx insns are generated, provided by Standard/XMAC
223 Multipler. Otherwise software multipy lib is used
224
225 choice
226 prompt "ARC700 MMU Version"
227 default ARC_MMU_V3 if ARC_CPU_770
228 default ARC_MMU_V2 if ARC_CPU_750D
229
230 config ARC_MMU_V1
231 bool "MMU v1"
232 help
233 Orig ARC700 MMU
234
235 config ARC_MMU_V2
236 bool "MMU v2"
237 help
238 Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
239 when 2 D-TLB and 1 I-TLB entries index into same 2way set.
240
241 config ARC_MMU_V3
242 bool "MMU v3"
243 depends on ARC_CPU_770
244 help
245 Introduced with ARC700 4.10: New Features
246 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
247 Shared Address Spaces (SASID)
248
249 endchoice
250
251
252 choice
253 prompt "MMU Page Size"
254 default ARC_PAGE_SIZE_8K
255
256 config ARC_PAGE_SIZE_8K
257 bool "8KB"
258 help
259 Choose between 8k vs 16k
260
261 config ARC_PAGE_SIZE_16K
262 bool "16KB"
263 depends on ARC_MMU_V3
264
265 config ARC_PAGE_SIZE_4K
266 bool "4KB"
267 depends on ARC_MMU_V3
268
269 endchoice
270
271 config ARC_COMPACT_IRQ_LEVELS
272 bool "ARCompact IRQ Priorities: High(2)/Low(1)"
273 default n
274 # Timer HAS to be high priority, for any other high priority config
275 select ARC_IRQ3_LV2
276 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
277 depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2
278
279 if ARC_COMPACT_IRQ_LEVELS
280
281 config ARC_IRQ3_LV2
282 bool
283
284 config ARC_IRQ5_LV2
285 bool
286
287 config ARC_IRQ6_LV2
288 bool
289
290 endif
291
292 config ARC_FPU_SAVE_RESTORE
293 bool "Enable FPU state persistence across context switch"
294 default n
295 help
296 Double Precision Floating Point unit had dedictaed regs which
297 need to be saved/restored across context-switch.
298 Note that ARC FPU is overly simplistic, unlike say x86, which has
299 hardware pieces to allow software to conditionally save/restore,
300 based on actual usage of FPU by a task. Thus our implemn does
301 this for all tasks in system.
302
303 config ARC_CANT_LLSC
304 def_bool n
305
306 config ARC_HAS_LLSC
307 bool "Insn: LLOCK/SCOND (efficient atomic ops)"
308 default y
309 depends on ARC_CPU_770 && !ARC_CANT_LLSC
310
311 config ARC_HAS_SWAPE
312 bool "Insn: SWAPE (endian-swap)"
313 default y
314
315 endmenu # "ARC CPU Configuration"
316
317 config LINUX_LINK_BASE
318 hex "Linux Link Address"
319 default "0x80000000"
320 help
321 ARC700 divides the 32 bit phy address space into two equal halves
322 -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
323 -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
324 Typically Linux kernel is linked at the start of untransalted addr,
325 hence the default value of 0x8zs.
326 However some customers have peripherals mapped at this addr, so
327 Linux needs to be scooted a bit.
328 If you don't know what the above means, leave this setting alone.
329
330 config ARC_CURR_IN_REG
331 bool "Dedicate Register r25 for current_task pointer"
332 default y
333 help
334 This reserved Register R25 to point to Current Task in
335 kernel mode. This saves memory access for each such access
336
337
338 config ARC_EMUL_UNALIGNED
339 bool "Emulate unaligned memory access (userspace only)"
340 select SYSCTL_ARCH_UNALIGN_NO_WARN
341 select SYSCTL_ARCH_UNALIGN_ALLOW
342 help
343 This enables misaligned 16 & 32 bit memory access from user space.
344 Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
345 potential bugs in code
346
347 config HZ
348 int "Timer Frequency"
349 default 100
350
351 config ARC_METAWARE_HLINK
352 bool "Support for Metaware debugger assisted Host access"
353 default n
354 help
355 This options allows a Linux userland apps to directly access
356 host file system (open/creat/read/write etc) with help from
357 Metaware Debugger. This can come in handy for Linux-host communication
358 when there is no real usable peripheral such as EMAC.
359
360 menuconfig ARC_DBG
361 bool "ARC debugging"
362 default y
363
364 config ARC_DW2_UNWIND
365 bool "Enable DWARF specific kernel stack unwind"
366 depends on ARC_DBG
367 default y
368 select KALLSYMS
369 help
370 Compiles the kernel with DWARF unwind information and can be used
371 to get stack backtraces.
372
373 If you say Y here the resulting kernel image will be slightly larger
374 but not slower, and it will give very useful debugging information.
375 If you don't debug the kernel, you can say N, but we may not be able
376 to solve problems without frame unwind information
377
378 config ARC_DBG_TLB_PARANOIA
379 bool "Paranoia Checks in Low Level TLB Handlers"
380 depends on ARC_DBG
381 default n
382
383 config ARC_DBG_TLB_MISS_COUNT
384 bool "Profile TLB Misses"
385 default n
386 select DEBUG_FS
387 depends on ARC_DBG
388 help
389 Counts number of I and D TLB Misses and exports them via Debugfs
390 The counters can be cleared via Debugfs as well
391
392 config ARC_UBOOT_SUPPORT
393 bool "Support uboot arg Handling"
394 default n
395 help
396 ARC Linux by default checks for uboot provided args as pointers to
397 external cmdline or DTB. This however breaks in absence of uboot,
398 when booting from Metaware debugger directly, as the registers are
399 not zeroed out on reset by mdb and/or ARCv2 based cores. The bogus
400 registers look like uboot args to kernel which then chokes.
401 So only enable the uboot arg checking/processing if users are sure
402 of uboot being in play.
403
404 config ARC_BUILTIN_DTB_NAME
405 string "Built in DTB"
406 help
407 Set the name of the DTB to embed in the vmlinux binary
408 Leaving it blank selects the minimal "skeleton" dtb
409
410 source "kernel/Kconfig.preempt"
411
412 menu "Executable file formats"
413 source "fs/Kconfig.binfmt"
414 endmenu
415
416 endmenu # "ARC Architecture Configuration"
417
418 source "mm/Kconfig"
419 source "net/Kconfig"
420 source "drivers/Kconfig"
421 source "fs/Kconfig"
422 source "arch/arc/Kconfig.debug"
423 source "security/Kconfig"
424 source "crypto/Kconfig"
425 source "lib/Kconfig"
426 source "kernel/power/Kconfig"
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