arch/arc/kernel/entry-arcv2.S

   1 /*
   2  * ARCv2 ISA based core Low Level Intr/Traps/Exceptions(non-TLB) Handling
   3  *
   4  * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/linkage.h>   /* ARC_{EXTRY,EXIT} */
  12 #include <asm/entry.h>       /* SAVE_ALL_{INT1,INT2,TRAP...} */
  13 #include <asm/errno.h>
  14 #include <asm/arcregs.h>
  15 #include <asm/irqflags.h>
  16
  17         .cpu HS
  18
  19 #define VECTOR  .word
  20
  21 ;############################ Vector Table #################################
  22
  23         .section .vector,"a",@progbits
  24         .align 4
  25
  26 # Initial 16 slots are Exception Vectors
  27 VECTOR  stext                   ; Restart Vector (jump to entry point)
  28 VECTOR  mem_service             ; Mem exception
  29 VECTOR  instr_service           ; Instrn Error
  30 VECTOR  EV_MachineCheck         ; Fatal Machine check
  31 VECTOR  EV_TLBMissI             ; Intruction TLB miss
  32 VECTOR  EV_TLBMissD             ; Data TLB miss
  33 VECTOR  EV_TLBProtV             ; Protection Violation
  34 VECTOR  EV_PrivilegeV           ; Privilege Violation
  35 VECTOR  EV_SWI                  ; Software Breakpoint
  36 VECTOR  EV_Trap                 ; Trap exception
  37 VECTOR  EV_Extension            ; Extn Instruction Exception
  38 VECTOR  EV_DivZero              ; Divide by Zero
  39 VECTOR  EV_DCError              ; Data Cache Error
  40 VECTOR  EV_Misaligned           ; Misaligned Data Access
  41 VECTOR  reserved                ; Reserved slots
  42 VECTOR  reserved                ; Reserved slots
  43
  44 # Begin Interrupt Vectors
  45 VECTOR  handle_interrupt        ; (16) Timer0
  46 VECTOR  handle_interrupt        ; unused (Timer1)
  47 VECTOR  handle_interrupt        ; unused (WDT)
  48 VECTOR  handle_interrupt        ; (19) ICI (inter core interrupt)
  49 VECTOR  handle_interrupt
  50 VECTOR  handle_interrupt
  51 VECTOR  handle_interrupt
  52 VECTOR  handle_interrupt        ; (23) End of fixed IRQs
  53
  54 .rept CONFIG_ARC_NUMBER_OF_INTERRUPTS - 8
  55         VECTOR  handle_interrupt
  56 .endr
  57
  58         .section .text, "ax",@progbits
  59
  60 res_service:            ; processor restart
  61         flag    0x1     ; not implemented
  62         nop
  63         nop
  64
  65 reserved:               ; processor restart
  66         rtie            ; jump to processor initializations
  67
  68 ;##################### Interrupt Handling ##############################
  69
  70 ENTRY(handle_interrupt)
  71
  72         INTERRUPT_PROLOGUE  irq
  73
  74         clri            ; To make status32.IE agree with CPU internal state
  75
  76         lr  r0, [ICAUSE]
  77
  78         mov   blink, ret_from_exception
  79
  80         b.d  arch_do_IRQ
  81         mov r1, sp
  82
  83 END(handle_interrupt)
  84
  85 ;################### Non TLB Exception Handling #############################
  86
  87 ENTRY(EV_SWI)
  88         flag 1
  89 END(EV_SWI)
  90
  91 ENTRY(EV_DivZero)
  92         flag 1
  93 END(EV_DivZero)
  94
  95 ENTRY(EV_DCError)
  96         flag 1
  97 END(EV_DCError)
  98
  99 ENTRY(EV_Misaligned)
 100
 101         EXCEPTION_PROLOGUE
 102
 103         lr  r0, [efa]   ; Faulting Data address
 104         mov r1, sp
 105
 106         FAKE_RET_FROM_EXCPN
 107
 108         SAVE_CALLEE_SAVED_USER
 109         mov r2, sp              ; callee_regs
 110
 111         bl  do_misaligned_access
 112
 113         ; TBD: optimize - do this only if a callee reg was involved
 114         ; either a dst of emulated LD/ST or src with address-writeback
 115         RESTORE_CALLEE_SAVED_USER
 116
 117         b   ret_from_exception
 118 END(EV_Misaligned)
 119
 120 ; ---------------------------------------------
 121 ; Protection Violation Exception Handler
 122 ; ---------------------------------------------
 123
 124 ENTRY(EV_TLBProtV)
 125
 126         EXCEPTION_PROLOGUE
 127
 128         lr  r0, [efa]   ; Faulting Data address
 129         mov r1, sp      ; pt_regs
 130
 131         FAKE_RET_FROM_EXCPN
 132
 133         mov blink, ret_from_exception
 134         b   do_page_fault
 135
 136 END(EV_TLBProtV)
 137
 138 ; From Linux standpoint Slow Path I/D TLB Miss is same a ProtV as they
 139 ; need to call do_page_fault().
 140 ; ECR in pt_regs provides whether access was R/W/X
 141
 142 .global        call_do_page_fault
 143 .set call_do_page_fault, EV_TLBProtV
 144
 145 ;############# Common Handlers for ARCompact and ARCv2 ##############
 146
 147 #include "entry.S"
 148
 149 ;############# Return from Intr/Excp/Trap (ARCv2 ISA Specifics) ##############
 150 ;
 151 ; Restore the saved sys context (common exit-path for EXCPN/IRQ/Trap)
 152 ; IRQ shd definitely not happen between now and rtie
 153 ; All 2 entry points to here already disable interrupts
 154
 155 .Lrestore_regs:
 156
 157         ld      r0, [sp, PT_status32]   ; U/K mode at time of entry
 158         lr      r10, [AUX_IRQ_ACT]
 159
 160         bmsk    r11, r10, 15    ; AUX_IRQ_ACT.ACTIVE
 161         breq    r11, 0, .Lexcept_ret    ; No intr active, ret from Exception
 162
 163 ;####### Return from Intr #######
 164
 165 debug_marker_l1:
 166         ; Handle special case #1: (Entry via Exception, Return via IRQ)
 167         ;
 168         ; Exception in U mode, preempted in kernel, Intr taken (K mode), orig
 169         ; task now returning to U mode (riding the Intr)
 170         ; AUX_IRQ_ACTIVE won't have U bit set (since intr in K mode), hence SP
 171         ; won't be switched to correct U mode value (from AUX_SP)
 172         ; So force AUX_IRQ_ACT.U for such a case
 173
 174         btst    r0, STATUS_U_BIT                ; Z flag set if K (Z clear for U)
 175         bset.nz r11, r11, AUX_IRQ_ACT_BIT_U     ; NZ means U
 176         sr      r11, [AUX_IRQ_ACT]
 177
 178         INTERRUPT_EPILOGUE  irq
 179         rtie
 180
 181 ;####### Return from Exception / pure kernel mode #######
 182
 183 .Lexcept_ret:   ; Expects r0 has PT_status32
 184
 185 debug_marker_syscall:
 186         EXCEPTION_EPILOGUE
 187         rtie
 188
 189 END(ret_from_exception)