2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <linux/seq_file.h>
11 #include <linux/delay.h>
12 #include <linux/root_dev.h>
13 #include <linux/console.h>
14 #include <linux/module.h>
15 #include <linux/cpu.h>
16 #include <linux/of_fdt.h>
18 #include <linux/cache.h>
19 #include <asm/sections.h>
20 #include <asm/arcregs.h>
22 #include <asm/setup.h>
25 #include <asm/unwind.h>
26 #include <asm/mach_desc.h>
29 #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
31 unsigned int intr_to_DE_cnt
;
33 /* Part of U-boot ABI: see head.S */
34 int __initdata uboot_tag
;
35 char __initdata
*uboot_arg
;
37 const struct machine_desc
*machine_desc
;
39 struct task_struct
*_current_task
[NR_CPUS
]; /* For stack switching */
41 struct cpuinfo_arc cpuinfo_arc700
[NR_CPUS
];
43 static void read_decode_ccm_bcr(struct cpuinfo_arc
*cpu
)
45 if (is_isa_arcompact()) {
46 struct bcr_iccm_arcompact iccm
;
47 struct bcr_dccm_arcompact dccm
;
49 READ_BCR(ARC_REG_ICCM_BUILD
, iccm
);
51 cpu
->iccm
.sz
= 4096 << iccm
.sz
; /* 8K to 512K */
52 cpu
->iccm
.base_addr
= iccm
.base
<< 16;
55 READ_BCR(ARC_REG_DCCM_BUILD
, dccm
);
58 cpu
->dccm
.sz
= 2048 << dccm
.sz
; /* 2K to 256K */
60 base
= read_aux_reg(ARC_REG_DCCM_BASE_BUILD
);
61 cpu
->dccm
.base_addr
= base
& ~0xF;
64 struct bcr_iccm_arcv2 iccm
;
65 struct bcr_dccm_arcv2 dccm
;
68 READ_BCR(ARC_REG_ICCM_BUILD
, iccm
);
70 cpu
->iccm
.sz
= 256 << iccm
.sz00
; /* 512B to 16M */
71 if (iccm
.sz00
== 0xF && iccm
.sz01
> 0)
72 cpu
->iccm
.sz
<<= iccm
.sz01
;
74 region
= read_aux_reg(ARC_REG_AUX_ICCM
);
75 cpu
->iccm
.base_addr
= region
& 0xF0000000;
78 READ_BCR(ARC_REG_DCCM_BUILD
, dccm
);
80 cpu
->dccm
.sz
= 256 << dccm
.sz0
;
81 if (dccm
.sz0
== 0xF && dccm
.sz1
> 0)
82 cpu
->dccm
.sz
<<= dccm
.sz1
;
84 region
= read_aux_reg(ARC_REG_AUX_DCCM
);
85 cpu
->dccm
.base_addr
= region
& 0xF0000000;
90 static void read_arc_build_cfg_regs(void)
92 struct bcr_timer timer
;
93 struct bcr_generic bcr
;
94 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[smp_processor_id()];
97 READ_BCR(AUX_IDENTITY
, cpu
->core
);
98 READ_BCR(ARC_REG_ISA_CFG_BCR
, cpu
->isa
);
100 READ_BCR(ARC_REG_TIMERS_BCR
, timer
);
101 cpu
->extn
.timer0
= timer
.t0
;
102 cpu
->extn
.timer1
= timer
.t1
;
103 cpu
->extn
.rtc
= timer
.rtc
;
105 cpu
->vec_base
= read_aux_reg(AUX_INTR_VEC_BASE
);
107 READ_BCR(ARC_REG_MUL_BCR
, cpu
->extn_mpy
);
109 cpu
->extn
.norm
= read_aux_reg(ARC_REG_NORM_BCR
) > 1 ? 1 : 0; /* 2,3 */
110 cpu
->extn
.barrel
= read_aux_reg(ARC_REG_BARREL_BCR
) > 1 ? 1 : 0; /* 2,3 */
111 cpu
->extn
.swap
= read_aux_reg(ARC_REG_SWAP_BCR
) ? 1 : 0; /* 1,3 */
112 cpu
->extn
.crc
= read_aux_reg(ARC_REG_CRC_BCR
) ? 1 : 0;
113 cpu
->extn
.minmax
= read_aux_reg(ARC_REG_MIXMAX_BCR
) > 1 ? 1 : 0; /* 2 */
114 READ_BCR(ARC_REG_XY_MEM_BCR
, cpu
->extn_xymem
);
116 /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
117 read_decode_ccm_bcr(cpu
);
119 read_decode_mmu_bcr();
120 read_decode_cache_bcr();
122 if (is_isa_arcompact()) {
123 struct bcr_fp_arcompact sp
, dp
;
124 struct bcr_bpu_arcompact bpu
;
126 READ_BCR(ARC_REG_FP_BCR
, sp
);
127 READ_BCR(ARC_REG_DPFP_BCR
, dp
);
128 cpu
->extn
.fpu_sp
= sp
.ver
? 1 : 0;
129 cpu
->extn
.fpu_dp
= dp
.ver
? 1 : 0;
131 READ_BCR(ARC_REG_BPU_BCR
, bpu
);
132 cpu
->bpu
.ver
= bpu
.ver
;
133 cpu
->bpu
.full
= bpu
.fam
? 1 : 0;
135 cpu
->bpu
.num_cache
= 256 << (bpu
.ent
- 1);
136 cpu
->bpu
.num_pred
= 256 << (bpu
.ent
- 1);
139 struct bcr_fp_arcv2 spdp
;
140 struct bcr_bpu_arcv2 bpu
;
142 READ_BCR(ARC_REG_FP_V2_BCR
, spdp
);
143 cpu
->extn
.fpu_sp
= spdp
.sp
? 1 : 0;
144 cpu
->extn
.fpu_dp
= spdp
.dp
? 1 : 0;
146 READ_BCR(ARC_REG_BPU_BCR
, bpu
);
147 cpu
->bpu
.ver
= bpu
.ver
;
148 cpu
->bpu
.full
= bpu
.ft
;
149 cpu
->bpu
.num_cache
= 256 << bpu
.bce
;
150 cpu
->bpu
.num_pred
= 2048 << bpu
.pte
;
153 READ_BCR(ARC_REG_AP_BCR
, bcr
);
154 cpu
->extn
.ap
= bcr
.ver
? 1 : 0;
156 READ_BCR(ARC_REG_SMART_BCR
, bcr
);
157 cpu
->extn
.smart
= bcr
.ver
? 1 : 0;
159 READ_BCR(ARC_REG_RTT_BCR
, bcr
);
160 cpu
->extn
.rtt
= bcr
.ver
? 1 : 0;
162 cpu
->extn
.debug
= cpu
->extn
.ap
| cpu
->extn
.smart
| cpu
->extn
.rtt
;
165 static const struct cpuinfo_data arc_cpu_tbl
[] = {
166 #ifdef CONFIG_ISA_ARCOMPACT
167 { {0x20, "ARC 600" }, 0x2F},
168 { {0x30, "ARC 700" }, 0x33},
169 { {0x34, "ARC 700 R4.10"}, 0x34},
170 { {0x35, "ARC 700 R4.11"}, 0x35},
172 { {0x50, "ARC HS38 R2.0"}, 0x51},
173 { {0x52, "ARC HS38 R2.1"}, 0x52},
174 { {0x53, "ARC HS38 R3.0"}, 0x53},
180 static char *arc_cpu_mumbojumbo(int cpu_id
, char *buf
, int len
)
182 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[cpu_id
];
183 struct bcr_identity
*core
= &cpu
->core
;
184 const struct cpuinfo_data
*tbl
;
191 if (is_isa_arcompact()) {
192 isa_nm
= "ARCompact";
193 be
= IS_ENABLED(CONFIG_CPU_BIG_ENDIAN
);
195 atomic
= cpu
->isa
.atomic1
;
196 if (!cpu
->isa
.ver
) /* ISA BCR absent, use Kconfig info */
197 atomic
= IS_ENABLED(CONFIG_ARC_HAS_LLSC
);
201 atomic
= cpu
->isa
.atomic
;
204 n
+= scnprintf(buf
+ n
, len
- n
,
205 "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
206 core
->family
, core
->cpu_id
, core
->chip_id
);
208 for (tbl
= &arc_cpu_tbl
[0]; tbl
->info
.id
!= 0; tbl
++) {
209 if ((core
->family
>= tbl
->info
.id
) &&
210 (core
->family
<= tbl
->up_range
)) {
211 n
+= scnprintf(buf
+ n
, len
- n
,
212 "processor [%d]\t: %s (%s ISA) %s\n",
213 cpu_id
, tbl
->info
.str
, isa_nm
,
214 IS_AVAIL1(be
, "[Big-Endian]"));
219 if (tbl
->info
.id
== 0)
220 n
+= scnprintf(buf
+ n
, len
- n
, "UNKNOWN ARC Processor\n");
222 n
+= scnprintf(buf
+ n
, len
- n
, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
223 IS_AVAIL1(cpu
->extn
.timer0
, "Timer0 "),
224 IS_AVAIL1(cpu
->extn
.timer1
, "Timer1 "),
225 IS_AVAIL2(cpu
->extn
.rtc
, "Local-64-bit-Ctr ",
226 CONFIG_ARC_HAS_RTC
));
228 n
+= i
= scnprintf(buf
+ n
, len
- n
, "%s%s%s%s%s",
229 IS_AVAIL2(atomic
, "atomic ", CONFIG_ARC_HAS_LLSC
),
230 IS_AVAIL2(cpu
->isa
.ldd
, "ll64 ", CONFIG_ARC_HAS_LL64
),
231 IS_AVAIL1(cpu
->isa
.unalign
, "unalign (not used)"));
234 n
+= scnprintf(buf
+ n
, len
- n
, "\n\t\t: ");
236 if (cpu
->extn_mpy
.ver
) {
237 if (cpu
->extn_mpy
.ver
<= 0x2) { /* ARCompact */
238 n
+= scnprintf(buf
+ n
, len
- n
, "mpy ");
240 int opt
= 2; /* stock MPY/MPYH */
242 if (cpu
->extn_mpy
.dsp
) /* OPT 7-9 */
243 opt
= cpu
->extn_mpy
.dsp
+ 6;
245 n
+= scnprintf(buf
+ n
, len
- n
, "mpy[opt %d] ", opt
);
249 n
+= scnprintf(buf
+ n
, len
- n
, "%s%s%s%s%s%s%s%s\n",
250 IS_AVAIL1(cpu
->isa
.div_rem
, "div_rem "),
251 IS_AVAIL1(cpu
->extn
.norm
, "norm "),
252 IS_AVAIL1(cpu
->extn
.barrel
, "barrel-shift "),
253 IS_AVAIL1(cpu
->extn
.swap
, "swap "),
254 IS_AVAIL1(cpu
->extn
.minmax
, "minmax "),
255 IS_AVAIL1(cpu
->extn
.crc
, "crc "),
256 IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE
));
259 n
+= scnprintf(buf
+ n
, len
- n
,
260 "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
261 IS_AVAIL1(cpu
->bpu
.full
, "full"),
262 IS_AVAIL1(!cpu
->bpu
.full
, "partial"),
263 cpu
->bpu
.num_cache
, cpu
->bpu
.num_pred
);
268 static char *arc_extn_mumbojumbo(int cpu_id
, char *buf
, int len
)
271 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[cpu_id
];
275 n
+= scnprintf(buf
+ n
, len
- n
,
276 "Vector Table\t: %#x\nPeripherals\t: %#lx:%#lx\n",
277 cpu
->vec_base
, perip_base
, perip_end
);
279 if (cpu
->extn
.fpu_sp
|| cpu
->extn
.fpu_dp
)
280 n
+= scnprintf(buf
+ n
, len
- n
, "FPU\t\t: %s%s\n",
281 IS_AVAIL1(cpu
->extn
.fpu_sp
, "SP "),
282 IS_AVAIL1(cpu
->extn
.fpu_dp
, "DP "));
285 n
+= scnprintf(buf
+ n
, len
- n
, "DEBUG\t\t: %s%s%s\n",
286 IS_AVAIL1(cpu
->extn
.ap
, "ActionPoint "),
287 IS_AVAIL1(cpu
->extn
.smart
, "smaRT "),
288 IS_AVAIL1(cpu
->extn
.rtt
, "RTT "));
290 if (cpu
->dccm
.sz
|| cpu
->iccm
.sz
)
291 n
+= scnprintf(buf
+ n
, len
- n
, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
292 cpu
->dccm
.base_addr
, TO_KB(cpu
->dccm
.sz
),
293 cpu
->iccm
.base_addr
, TO_KB(cpu
->iccm
.sz
));
295 n
+= scnprintf(buf
+ n
, len
- n
, "OS ABI [v%d]\t: %s\n",
296 EF_ARC_OSABI_CURRENT
>> 8,
297 EF_ARC_OSABI_CURRENT
== EF_ARC_OSABI_V3
?
298 "no-legacy-syscalls" : "64-bit data any register aligned");
303 static void arc_chk_core_config(void)
305 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[smp_processor_id()];
308 if (!cpu
->extn
.timer0
)
309 panic("Timer0 is not present!\n");
311 if (!cpu
->extn
.timer1
)
312 panic("Timer1 is not present!\n");
314 #ifdef CONFIG_ARC_HAS_DCCM
316 * DCCM can be arbit placed in hardware.
317 * Make sure it's placement/sz matches what Linux is built with
319 if ((unsigned int)__arc_dccm_base
!= cpu
->dccm
.base_addr
)
320 panic("Linux built with incorrect DCCM Base address\n");
322 if (CONFIG_ARC_DCCM_SZ
!= cpu
->dccm
.sz
)
323 panic("Linux built with incorrect DCCM Size\n");
326 #ifdef CONFIG_ARC_HAS_ICCM
327 if (CONFIG_ARC_ICCM_SZ
!= cpu
->iccm
.sz
)
328 panic("Linux built with incorrect ICCM Size\n");
332 * FP hardware/software config sanity
333 * -If hardware contains DPFP, kernel needs to save/restore FPU state
334 * -If not, it will crash trying to save/restore the non-existant regs
336 * (only DPDP checked since SP has no arch visible regs)
338 fpu_enabled
= IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE
);
340 if (cpu
->extn
.fpu_dp
&& !fpu_enabled
)
341 pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
342 else if (!cpu
->extn
.fpu_dp
&& fpu_enabled
)
343 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
347 * Initialize and setup the processor core
348 * This is called by all the CPUs thus should not do special case stuff
349 * such as only for boot CPU etc
352 void setup_processor(void)
355 int cpu_id
= smp_processor_id();
357 read_arc_build_cfg_regs();
360 printk(arc_cpu_mumbojumbo(cpu_id
, str
, sizeof(str
)));
365 printk(arc_extn_mumbojumbo(cpu_id
, str
, sizeof(str
)));
366 printk(arc_platform_smp_cpuinfo());
368 arc_chk_core_config();
371 static inline int is_kernel(unsigned long addr
)
373 if (addr
>= (unsigned long)_stext
&& addr
<= (unsigned long)_end
)
378 void __init
setup_arch(char **cmdline_p
)
380 #ifdef CONFIG_ARC_UBOOT_SUPPORT
381 /* make sure that uboot passed pointer to cmdline/dtb is valid */
382 if (uboot_tag
&& is_kernel((unsigned long)uboot_arg
))
383 panic("Invalid uboot arg\n");
385 /* See if u-boot passed an external Device Tree blob */
386 machine_desc
= setup_machine_fdt(uboot_arg
); /* uboot_tag == 2 */
390 /* No, so try the embedded one */
391 machine_desc
= setup_machine_fdt(__dtb_start
);
393 panic("Embedded DT invalid\n");
396 * If we are here, it is established that @uboot_arg didn't
397 * point to DT blob. Instead if u-boot says it is cmdline,
398 * append to embedded DT cmdline.
399 * setup_machine_fdt() would have populated @boot_command_line
401 if (uboot_tag
== 1) {
402 /* Ensure a whitespace between the 2 cmdlines */
403 strlcat(boot_command_line
, " ", COMMAND_LINE_SIZE
);
404 strlcat(boot_command_line
, uboot_arg
,
409 /* Save unparsed command line copy for /proc/cmdline */
410 *cmdline_p
= boot_command_line
;
412 /* To force early parsing of things like mem=xxx */
415 /* Platform/board specific: e.g. early console registration */
416 if (machine_desc
->init_early
)
417 machine_desc
->init_early();
424 /* copy flat DT out of .init and then unflatten it */
425 unflatten_and_copy_device_tree();
427 /* Can be issue if someone passes cmd line arg "ro"
428 * But that is unlikely so keeping it as it is
430 root_mountflags
&= ~MS_RDONLY
;
432 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
433 conswitchp
= &dummy_con
;
439 static int __init
customize_machine(void)
441 if (machine_desc
->init_machine
)
442 machine_desc
->init_machine();
446 arch_initcall(customize_machine
);
448 static int __init
init_late_machine(void)
450 if (machine_desc
->init_late
)
451 machine_desc
->init_late();
455 late_initcall(init_late_machine
);
457 * Get CPU information for use by the procfs.
460 #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
461 #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
463 static int show_cpuinfo(struct seq_file
*m
, void *v
)
466 int cpu_id
= ptr_to_cpu(v
);
467 struct device_node
*core_clk
= of_find_node_by_name(NULL
, "core_clk");
470 if (!cpu_online(cpu_id
)) {
471 seq_printf(m
, "processor [%d]\t: Offline\n", cpu_id
);
475 str
= (char *)__get_free_page(GFP_TEMPORARY
);
479 seq_printf(m
, arc_cpu_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
481 of_property_read_u32(core_clk
, "clock-frequency", &freq
);
483 seq_printf(m
, "CPU speed\t: %u.%02u Mhz\n",
484 freq
/ 1000000, (freq
/ 10000) % 100);
486 seq_printf(m
, "Bogo MIPS\t: %lu.%02lu\n",
487 loops_per_jiffy
/ (500000 / HZ
),
488 (loops_per_jiffy
/ (5000 / HZ
)) % 100);
490 seq_printf(m
, arc_mmu_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
491 seq_printf(m
, arc_cache_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
492 seq_printf(m
, arc_extn_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
493 seq_printf(m
, arc_platform_smp_cpuinfo());
495 free_page((unsigned long)str
);
502 static void *c_start(struct seq_file
*m
, loff_t
*pos
)
505 * Callback returns cpu-id to iterator for show routine, NULL to stop.
506 * However since NULL is also a valid cpu-id (0), we use a round-about
507 * way to pass it w/o having to kmalloc/free a 2 byte string.
508 * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
510 return *pos
< num_possible_cpus() ? cpu_to_ptr(*pos
) : NULL
;
513 static void *c_next(struct seq_file
*m
, void *v
, loff_t
*pos
)
516 return c_start(m
, pos
);
519 static void c_stop(struct seq_file
*m
, void *v
)
523 const struct seq_operations cpuinfo_op
= {
530 static DEFINE_PER_CPU(struct cpu
, cpu_topology
);
532 static int __init
topology_init(void)
536 for_each_present_cpu(cpu
)
537 register_cpu(&per_cpu(cpu_topology
, cpu
), cpu
);
542 subsys_initcall(topology_init
);