arch/arc/plat-arcfpga/platform.c

   1 /*
   2  * ARC FPGA Platform support code
   3  *
   4  * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/types.h>
  12 #include <linux/init.h>
  13 #include <linux/device.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/io.h>
  16 #include <linux/console.h>
  17 #include <linux/of_platform.h>
  18 #include <asm/setup.h>
  19 #include <asm/irq.h>
  20 #include <asm/clk.h>
  21 #include <plat/memmap.h>
  22
  23 /*-----------------------BVCI Latency Unit -----------------------------*/
  24
  25 #ifdef CONFIG_ARC_HAS_BVCI_LAT_UNIT
  26
  27 int lat_cycles = CONFIG_BVCI_LAT_CYCLES;
  28
  29 /* BVCI Bus Profiler: Latency Unit */
  30 static void __init setup_bvci_lat_unit(void)
  31 {
  32 #define MAX_BVCI_UNITS 12
  33
  34         unsigned int i;
  35         unsigned int *base = (unsigned int *)BVCI_LAT_UNIT_BASE;
  36         const unsigned long units_req = CONFIG_BVCI_LAT_UNITS;
  37         const unsigned int REG_UNIT = 21;
  38         const unsigned int REG_VAL = 22;
  39
  40         /*
  41          * There are multiple Latency Units corresponding to the many
  42          * interfaces of the system bus arbiter (both CPU side as well as
  43          * the peripheral side).
  44          *
  45          * Unit  0 - System Arb and Mem Controller - adds latency to all
  46          *          memory trasactions
  47          * Unit  1 - I$ and System Bus
  48          * Unit  2 - D$ and System Bus
  49          * ..
  50          * Unit 12 - IDE Disk controller and System Bus
  51          *
  52          * The programmers model requires writing to lat_unit reg first
  53          * and then the latency value (cycles) to lat_value reg
  54          */
  55
  56         if (CONFIG_BVCI_LAT_UNITS == 0) {
  57                 writel(0, base + REG_UNIT);
  58                 writel(lat_cycles, base + REG_VAL);
  59                 pr_info("BVCI Latency for all Memory Transactions %d cycles\n",
  60                         lat_cycles);
  61         } else {
  62                 for_each_set_bit(i, &units_req, MAX_BVCI_UNITS) {
  63                         writel(i + 1, base + REG_UNIT); /* loop is 0 based */
  64                         writel(lat_cycles, base + REG_VAL);
  65                         pr_info("BVCI Latency for Unit[%d] = %d cycles\n",
  66                                 (i + 1), lat_cycles);
  67                 }
  68         }
  69 }
  70 #else
  71 static void __init setup_bvci_lat_unit(void)
  72 {
  73 }
  74 #endif
  75
  76 /*----------------------- Platform Devices -----------------------------*/
  77
  78 static unsigned long arc_uart_info[] = {
  79         0,      /* uart->is_emulated (runtime @running_on_hw) */
  80         0,      /* uart->port.uartclk */
  81         0,      /* uart->baud */
  82         0
  83 };
  84
  85 #if defined(CONFIG_SERIAL_ARC_CONSOLE)
  86 /*
  87  * static platform data - but only for early serial
  88  * TBD: derive this from a special DT node
  89  */
  90 static struct resource arc_uart0_res[] = {
  91         {
  92                 .start = UART0_BASE,
  93                 .end   = UART0_BASE + 0xFF,
  94                 .flags = IORESOURCE_MEM,
  95         },
  96         {
  97                 .start = UART0_IRQ,
  98                 .end   = UART0_IRQ,
  99                 .flags = IORESOURCE_IRQ,
 100         },
 101 };
 102
 103 static struct platform_device arc_uart0_dev = {
 104         .name = "arc-uart",
 105         .id = 0,
 106         .num_resources = ARRAY_SIZE(arc_uart0_res),
 107         .resource = arc_uart0_res,
 108         .dev = {
 109                 .platform_data = &arc_uart_info,
 110         },
 111 };
 112
 113 static struct platform_device *fpga_early_devs[] __initdata = {
 114         &arc_uart0_dev,
 115 };
 116 #endif
 117
 118 static void arc_fpga_serial_init(void)
 119 {
 120         /* To let driver workaround ISS bug: baudh Reg can't be set to 0 */
 121         arc_uart_info[0] = !running_on_hw;
 122
 123         arc_uart_info[1] = arc_get_core_freq();
 124
 125         arc_uart_info[2] = CONFIG_ARC_SERIAL_BAUD;
 126
 127 #if defined(CONFIG_SERIAL_ARC_CONSOLE)
 128         early_platform_add_devices(fpga_early_devs,
 129                                    ARRAY_SIZE(fpga_early_devs));
 130
 131         /*
 132          * ARC console driver registers itself as an early platform driver
 133          * of class "earlyprintk".
 134          * Install it here, followed by probe of devices.
 135          * The installation here doesn't require earlyprintk in command line
 136          * To do so however, replace the lines below with
 137          *      parse_early_param();
 138          *      early_platform_driver_probe("earlyprintk", 1, 1);
 139          *                                                    ^^
 140          */
 141         early_platform_driver_register_all("earlyprintk");
 142         early_platform_driver_probe("earlyprintk", 1, 0);
 143
 144         /*
 145          * This is to make sure that arc uart would be preferred console
 146          * despite one/more of following:
 147          *   -command line lacked "console=ttyARC0" or
 148          *   -CONFIG_VT_CONSOLE was enabled (for no reason whatsoever)
 149          * Note that this needs to be done after above early console is reg,
 150          * otherwise the early console never gets a chance to run.
 151          */
 152         add_preferred_console("ttyARC", 0, "115200");
 153 #endif
 154 }
 155
 156 /*
 157  * Early Platform Initialization called from setup_arch()
 158  */
 159 void __init arc_platform_early_init(void)
 160 {
 161         pr_info("[plat-arcfpga]: registering early dev resources\n");
 162
 163         setup_bvci_lat_unit();
 164
 165         arc_fpga_serial_init();
 166 }
 167
 168 static struct of_dev_auxdata plat_auxdata_lookup[] __initdata = {
 169 #if defined(CONFIG_SERIAL_ARC) || defined(CONFIG_SERIAL_ARC_MODULE)
 170         OF_DEV_AUXDATA("snps,arc-uart", UART0_BASE, "arc-uart", arc_uart_info),
 171 #endif
 172         {}
 173 };
 174
 175 int __init fpga_plat_init(void)
 176 {
 177         pr_info("[plat-arcfpga]: registering device resources\n");
 178
 179         /*
 180          * Traverses flattened DeviceTree - registering platform devices
 181          * complete with their resources
 182          */
 183         of_platform_populate(NULL, of_default_bus_match_table,
 184                              plat_auxdata_lookup, NULL);
 185
 186         return 0;
 187 }
 188 arch_initcall(fpga_plat_init);