arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
   5         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   6         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
   7         select ARCH_HAVE_CUSTOM_GPIO_H
   8         select ARCH_MIGHT_HAVE_PC_PARPORT
   9         select ARCH_SUPPORTS_ATOMIC_RMW
  10         select ARCH_USE_BUILTIN_BSWAP
  11         select ARCH_USE_CMPXCHG_LOCKREF
  12         select ARCH_WANT_IPC_PARSE_VERSION
  13         select BUILDTIME_EXTABLE_SORT if MMU
  14         select CLONE_BACKWARDS
  15         select CPU_PM if (SUSPEND || CPU_IDLE)
  16         select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
  17         select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI)
  18         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  19         select GENERIC_IDLE_POLL_SETUP
  20         select GENERIC_IRQ_PROBE
  21         select GENERIC_IRQ_SHOW
  22         select GENERIC_PCI_IOMAP
  23         select GENERIC_SCHED_CLOCK
  24         select GENERIC_SMP_IDLE_THREAD
  25         select GENERIC_STRNCPY_FROM_USER
  26         select GENERIC_STRNLEN_USER
  27         select HARDIRQS_SW_RESEND
  28         select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT)
  29         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  30         select HAVE_ARCH_KGDB
  31         select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
  32         select HAVE_ARCH_TRACEHOOK
  33         select HAVE_BPF_JIT
  34         select HAVE_CC_STACKPROTECTOR
  35         select HAVE_CONTEXT_TRACKING
  36         select HAVE_C_RECORDMCOUNT
  37         select HAVE_DEBUG_KMEMLEAK
  38         select HAVE_DMA_API_DEBUG
  39         select HAVE_DMA_ATTRS
  40         select HAVE_DMA_CONTIGUOUS if MMU
  41         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  42         select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
  43         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  44         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  45         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  46         select HAVE_GENERIC_DMA_COHERENT
  47         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  48         select HAVE_IDE if PCI || ISA || PCMCIA
  49         select HAVE_IRQ_TIME_ACCOUNTING
  50         select HAVE_KERNEL_GZIP
  51         select HAVE_KERNEL_LZ4
  52         select HAVE_KERNEL_LZMA
  53         select HAVE_KERNEL_LZO
  54         select HAVE_KERNEL_XZ
  55         select HAVE_KPROBES if !XIP_KERNEL
  56         select HAVE_KRETPROBES if (HAVE_KPROBES)
  57         select HAVE_MEMBLOCK
  58         select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
  59         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  60         select HAVE_PERF_EVENTS
  61         select HAVE_PERF_REGS
  62         select HAVE_PERF_USER_STACK_DUMP
  63         select HAVE_REGS_AND_STACK_ACCESS_API
  64         select HAVE_SYSCALL_TRACEPOINTS
  65         select HAVE_UID16
  66         select HAVE_VIRT_CPU_ACCOUNTING_GEN
  67         select IRQ_FORCED_THREADING
  68         select KTIME_SCALAR
  69         select MODULES_USE_ELF_REL
  70         select NO_BOOTMEM
  71         select OLD_SIGACTION
  72         select OLD_SIGSUSPEND3
  73         select PERF_USE_VMALLOC
  74         select RTC_LIB
  75         select SYS_SUPPORTS_APM_EMULATION
  76         # Above selects are sorted alphabetically; please add new ones
  77         # according to that.  Thanks.
  78         help
  79           The ARM series is a line of low-power-consumption RISC chip designs
  80           licensed by ARM Ltd and targeted at embedded applications and
  81           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  82           manufactured, but legacy ARM-based PC hardware remains popular in
  83           Europe.  There is an ARM Linux project with a web page at
  84           <http://www.arm.linux.org.uk/>.
  85
  86 config ARM_HAS_SG_CHAIN
  87         bool
  88
  89 config NEED_SG_DMA_LENGTH
  90         bool
  91
  92 config ARM_DMA_USE_IOMMU
  93         bool
  94         select ARM_HAS_SG_CHAIN
  95         select NEED_SG_DMA_LENGTH
  96
  97 if ARM_DMA_USE_IOMMU
  98
  99 config ARM_DMA_IOMMU_ALIGNMENT
 100         int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
 101         range 4 9
 102         default 8
 103         help
 104           DMA mapping framework by default aligns all buffers to the smallest
 105           PAGE_SIZE order which is greater than or equal to the requested buffer
 106           size. This works well for buffers up to a few hundreds kilobytes, but
 107           for larger buffers it just a waste of address space. Drivers which has
 108           relatively small addressing window (like 64Mib) might run out of
 109           virtual space with just a few allocations.
 110
 111           With this parameter you can specify the maximum PAGE_SIZE order for
 112           DMA IOMMU buffers. Larger buffers will be aligned only to this
 113           specified order. The order is expressed as a power of two multiplied
 114           by the PAGE_SIZE.
 115
 116 endif
 117
 118 config MIGHT_HAVE_PCI
 119         bool
 120
 121 config SYS_SUPPORTS_APM_EMULATION
 122         bool
 123
 124 config HAVE_TCM
 125         bool
 126         select GENERIC_ALLOCATOR
 127
 128 config HAVE_PROC_CPU
 129         bool
 130
 131 config NO_IOPORT_MAP
 132         bool
 133
 134 config EISA
 135         bool
 136         ---help---
 137           The Extended Industry Standard Architecture (EISA) bus was
 138           developed as an open alternative to the IBM MicroChannel bus.
 139
 140           The EISA bus provided some of the features of the IBM MicroChannel
 141           bus while maintaining backward compatibility with cards made for
 142           the older ISA bus.  The EISA bus saw limited use between 1988 and
 143           1995 when it was made obsolete by the PCI bus.
 144
 145           Say Y here if you are building a kernel for an EISA-based machine.
 146
 147           Otherwise, say N.
 148
 149 config SBUS
 150         bool
 151
 152 config STACKTRACE_SUPPORT
 153         bool
 154         default y
 155
 156 config HAVE_LATENCYTOP_SUPPORT
 157         bool
 158         depends on !SMP
 159         default y
 160
 161 config LOCKDEP_SUPPORT
 162         bool
 163         default y
 164
 165 config TRACE_IRQFLAGS_SUPPORT
 166         bool
 167         default y
 168
 169 config RWSEM_XCHGADD_ALGORITHM
 170         bool
 171         default y
 172
 173 config ARCH_HAS_ILOG2_U32
 174         bool
 175
 176 config ARCH_HAS_ILOG2_U64
 177         bool
 178
 179 config ARCH_HAS_BANDGAP
 180         bool
 181
 182 config GENERIC_HWEIGHT
 183         bool
 184         default y
 185
 186 config GENERIC_CALIBRATE_DELAY
 187         bool
 188         default y
 189
 190 config ARCH_MAY_HAVE_PC_FDC
 191         bool
 192
 193 config ZONE_DMA
 194         bool
 195
 196 config NEED_DMA_MAP_STATE
 197        def_bool y
 198
 199 config ARCH_SUPPORTS_UPROBES
 200         def_bool y
 201
 202 config ARCH_HAS_DMA_SET_COHERENT_MASK
 203         bool
 204
 205 config GENERIC_ISA_DMA
 206         bool
 207
 208 config FIQ
 209         bool
 210
 211 config NEED_RET_TO_USER
 212         bool
 213
 214 config ARCH_MTD_XIP
 215         bool
 216
 217 config VECTORS_BASE
 218         hex
 219         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 220         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 221         default 0x00000000
 222         help
 223           The base address of exception vectors.  This must be two pages
 224           in size.
 225
 226 config ARM_PATCH_PHYS_VIRT
 227         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 228         default y
 229         depends on !XIP_KERNEL && MMU
 230         depends on !ARCH_REALVIEW || !SPARSEMEM
 231         help
 232           Patch phys-to-virt and virt-to-phys translation functions at
 233           boot and module load time according to the position of the
 234           kernel in system memory.
 235
 236           This can only be used with non-XIP MMU kernels where the base
 237           of physical memory is at a 16MB boundary.
 238
 239           Only disable this option if you know that you do not require
 240           this feature (eg, building a kernel for a single machine) and
 241           you need to shrink the kernel to the minimal size.
 242
 243 config NEED_MACH_GPIO_H
 244         bool
 245         help
 246           Select this when mach/gpio.h is required to provide special
 247           definitions for this platform. The need for mach/gpio.h should
 248           be avoided when possible.
 249
 250 config NEED_MACH_IO_H
 251         bool
 252         help
 253           Select this when mach/io.h is required to provide special
 254           definitions for this platform.  The need for mach/io.h should
 255           be avoided when possible.
 256
 257 config NEED_MACH_MEMORY_H
 258         bool
 259         help
 260           Select this when mach/memory.h is required to provide special
 261           definitions for this platform.  The need for mach/memory.h should
 262           be avoided when possible.
 263
 264 config PHYS_OFFSET
 265         hex "Physical address of main memory" if MMU
 266         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 267         default DRAM_BASE if !MMU
 268         help
 269           Please provide the physical address corresponding to the
 270           location of main memory in your system.
 271
 272 config GENERIC_BUG
 273         def_bool y
 274         depends on BUG
 275
 276 source "init/Kconfig"
 277
 278 source "kernel/Kconfig.freezer"
 279
 280 menu "System Type"
 281
 282 config MMU
 283         bool "MMU-based Paged Memory Management Support"
 284         default y
 285         help
 286           Select if you want MMU-based virtualised addressing space
 287           support by paged memory management. If unsure, say 'Y'.
 288
 289 #
 290 # The "ARM system type" choice list is ordered alphabetically by option
 291 # text.  Please add new entries in the option alphabetic order.
 292 #
 293 choice
 294         prompt "ARM system type"
 295         default ARCH_VERSATILE if !MMU
 296         default ARCH_MULTIPLATFORM if MMU
 297
 298 config ARCH_MULTIPLATFORM
 299         bool "Allow multiple platforms to be selected"
 300         depends on MMU
 301         select ARCH_WANT_OPTIONAL_GPIOLIB
 302         select ARM_HAS_SG_CHAIN
 303         select ARM_PATCH_PHYS_VIRT
 304         select AUTO_ZRELADDR
 305         select CLKSRC_OF
 306         select COMMON_CLK
 307         select GENERIC_CLOCKEVENTS
 308         select MIGHT_HAVE_PCI
 309         select MULTI_IRQ_HANDLER
 310         select SPARSE_IRQ
 311         select USE_OF
 312
 313 config ARCH_INTEGRATOR
 314         bool "ARM Ltd. Integrator family"
 315         select ARM_AMBA
 316         select ARM_PATCH_PHYS_VIRT
 317         select AUTO_ZRELADDR
 318         select COMMON_CLK
 319         select COMMON_CLK_VERSATILE
 320         select GENERIC_CLOCKEVENTS
 321         select HAVE_TCM
 322         select ICST
 323         select MULTI_IRQ_HANDLER
 324         select NEED_MACH_MEMORY_H
 325         select PLAT_VERSATILE
 326         select SPARSE_IRQ
 327         select USE_OF
 328         select VERSATILE_FPGA_IRQ
 329         help
 330           Support for ARM's Integrator platform.
 331
 332 config ARCH_REALVIEW
 333         bool "ARM Ltd. RealView family"
 334         select ARCH_WANT_OPTIONAL_GPIOLIB
 335         select ARM_AMBA
 336         select ARM_TIMER_SP804
 337         select COMMON_CLK
 338         select COMMON_CLK_VERSATILE
 339         select GENERIC_CLOCKEVENTS
 340         select GPIO_PL061 if GPIOLIB
 341         select ICST
 342         select NEED_MACH_MEMORY_H
 343         select PLAT_VERSATILE
 344         select PLAT_VERSATILE_CLCD
 345         help
 346           This enables support for ARM Ltd RealView boards.
 347
 348 config ARCH_VERSATILE
 349         bool "ARM Ltd. Versatile family"
 350         select ARCH_WANT_OPTIONAL_GPIOLIB
 351         select ARM_AMBA
 352         select ARM_TIMER_SP804
 353         select ARM_VIC
 354         select CLKDEV_LOOKUP
 355         select GENERIC_CLOCKEVENTS
 356         select HAVE_MACH_CLKDEV
 357         select ICST
 358         select PLAT_VERSATILE
 359         select PLAT_VERSATILE_CLCD
 360         select PLAT_VERSATILE_CLOCK
 361         select VERSATILE_FPGA_IRQ
 362         help
 363           This enables support for ARM Ltd Versatile board.
 364
 365 config ARCH_AT91
 366         bool "Atmel AT91"
 367         select ARCH_REQUIRE_GPIOLIB
 368         select CLKDEV_LOOKUP
 369         select IRQ_DOMAIN
 370         select NEED_MACH_IO_H if PCCARD
 371         select PINCTRL
 372         select PINCTRL_AT91 if USE_OF
 373         help
 374           This enables support for systems based on Atmel
 375           AT91RM9200 and AT91SAM9* processors.
 376
 377 config ARCH_CLPS711X
 378         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 379         select ARCH_REQUIRE_GPIOLIB
 380         select AUTO_ZRELADDR
 381         select CLKSRC_MMIO
 382         select COMMON_CLK
 383         select CPU_ARM720T
 384         select GENERIC_CLOCKEVENTS
 385         select MFD_SYSCON
 386         help
 387           Support for Cirrus Logic 711x/721x/731x based boards.
 388
 389 config ARCH_GEMINI
 390         bool "Cortina Systems Gemini"
 391         select ARCH_REQUIRE_GPIOLIB
 392         select CLKSRC_MMIO
 393         select CPU_FA526
 394         select GENERIC_CLOCKEVENTS
 395         help
 396           Support for the Cortina Systems Gemini family SoCs
 397
 398 config ARCH_EBSA110
 399         bool "EBSA-110"
 400         select ARCH_USES_GETTIMEOFFSET
 401         select CPU_SA110
 402         select ISA
 403         select NEED_MACH_IO_H
 404         select NEED_MACH_MEMORY_H
 405         select NO_IOPORT_MAP
 406         help
 407           This is an evaluation board for the StrongARM processor available
 408           from Digital. It has limited hardware on-board, including an
 409           Ethernet interface, two PCMCIA sockets, two serial ports and a
 410           parallel port.
 411
 412 config ARCH_EFM32
 413         bool "Energy Micro efm32"
 414         depends on !MMU
 415         select ARCH_REQUIRE_GPIOLIB
 416         select ARM_NVIC
 417         select AUTO_ZRELADDR
 418         select CLKSRC_OF
 419         select COMMON_CLK
 420         select CPU_V7M
 421         select GENERIC_CLOCKEVENTS
 422         select NO_DMA
 423         select NO_IOPORT_MAP
 424         select SPARSE_IRQ
 425         select USE_OF
 426         help
 427           Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
 428           processors.
 429
 430 config ARCH_EP93XX
 431         bool "EP93xx-based"
 432         select ARCH_HAS_HOLES_MEMORYMODEL
 433         select ARCH_REQUIRE_GPIOLIB
 434         select ARCH_USES_GETTIMEOFFSET
 435         select ARM_AMBA
 436         select ARM_VIC
 437         select CLKDEV_LOOKUP
 438         select CPU_ARM920T
 439         select NEED_MACH_MEMORY_H
 440         help
 441           This enables support for the Cirrus EP93xx series of CPUs.
 442
 443 config ARCH_FOOTBRIDGE
 444         bool "FootBridge"
 445         select CPU_SA110
 446         select FOOTBRIDGE
 447         select GENERIC_CLOCKEVENTS
 448         select HAVE_IDE
 449         select NEED_MACH_IO_H if !MMU
 450         select NEED_MACH_MEMORY_H
 451         help
 452           Support for systems based on the DC21285 companion chip
 453           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 454
 455 config ARCH_NETX
 456         bool "Hilscher NetX based"
 457         select ARM_VIC
 458         select CLKSRC_MMIO
 459         select CPU_ARM926T
 460         select GENERIC_CLOCKEVENTS
 461         help
 462           This enables support for systems based on the Hilscher NetX Soc
 463
 464 config ARCH_IOP13XX
 465         bool "IOP13xx-based"
 466         depends on MMU
 467         select CPU_XSC3
 468         select NEED_MACH_MEMORY_H
 469         select NEED_RET_TO_USER
 470         select PCI
 471         select PLAT_IOP
 472         select VMSPLIT_1G
 473         select SPARSE_IRQ
 474         help
 475           Support for Intel's IOP13XX (XScale) family of processors.
 476
 477 config ARCH_IOP32X
 478         bool "IOP32x-based"
 479         depends on MMU
 480         select ARCH_REQUIRE_GPIOLIB
 481         select CPU_XSCALE
 482         select GPIO_IOP
 483         select NEED_RET_TO_USER
 484         select PCI
 485         select PLAT_IOP
 486         help
 487           Support for Intel's 80219 and IOP32X (XScale) family of
 488           processors.
 489
 490 config ARCH_IOP33X
 491         bool "IOP33x-based"
 492         depends on MMU
 493         select ARCH_REQUIRE_GPIOLIB
 494         select CPU_XSCALE
 495         select GPIO_IOP
 496         select NEED_RET_TO_USER
 497         select PCI
 498         select PLAT_IOP
 499         help
 500           Support for Intel's IOP33X (XScale) family of processors.
 501
 502 config ARCH_IXP4XX
 503         bool "IXP4xx-based"
 504         depends on MMU
 505         select ARCH_HAS_DMA_SET_COHERENT_MASK
 506         select ARCH_REQUIRE_GPIOLIB
 507         select ARCH_SUPPORTS_BIG_ENDIAN
 508         select CLKSRC_MMIO
 509         select CPU_XSCALE
 510         select DMABOUNCE if PCI
 511         select GENERIC_CLOCKEVENTS
 512         select MIGHT_HAVE_PCI
 513         select NEED_MACH_IO_H
 514         select USB_EHCI_BIG_ENDIAN_DESC
 515         select USB_EHCI_BIG_ENDIAN_MMIO
 516         help
 517           Support for Intel's IXP4XX (XScale) family of processors.
 518
 519 config ARCH_DOVE
 520         bool "Marvell Dove"
 521         select ARCH_REQUIRE_GPIOLIB
 522         select CPU_PJ4
 523         select GENERIC_CLOCKEVENTS
 524         select MIGHT_HAVE_PCI
 525         select MVEBU_MBUS
 526         select PINCTRL
 527         select PINCTRL_DOVE
 528         select PLAT_ORION_LEGACY
 529         help
 530           Support for the Marvell Dove SoC 88AP510
 531
 532 config ARCH_MV78XX0
 533         bool "Marvell MV78xx0"
 534         select ARCH_REQUIRE_GPIOLIB
 535         select CPU_FEROCEON
 536         select GENERIC_CLOCKEVENTS
 537         select MVEBU_MBUS
 538         select PCI
 539         select PLAT_ORION_LEGACY
 540         help
 541           Support for the following Marvell MV78xx0 series SoCs:
 542           MV781x0, MV782x0.
 543
 544 config ARCH_ORION5X
 545         bool "Marvell Orion"
 546         depends on MMU
 547         select ARCH_REQUIRE_GPIOLIB
 548         select CPU_FEROCEON
 549         select GENERIC_CLOCKEVENTS
 550         select MVEBU_MBUS
 551         select PCI
 552         select PLAT_ORION_LEGACY
 553         help
 554           Support for the following Marvell Orion 5x series SoCs:
 555           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 556           Orion-2 (5281), Orion-1-90 (6183).
 557
 558 config ARCH_MMP
 559         bool "Marvell PXA168/910/MMP2"
 560         depends on MMU
 561         select ARCH_REQUIRE_GPIOLIB
 562         select CLKDEV_LOOKUP
 563         select GENERIC_ALLOCATOR
 564         select GENERIC_CLOCKEVENTS
 565         select GPIO_PXA
 566         select IRQ_DOMAIN
 567         select MULTI_IRQ_HANDLER
 568         select PINCTRL
 569         select PLAT_PXA
 570         select SPARSE_IRQ
 571         help
 572           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 573
 574 config ARCH_KS8695
 575         bool "Micrel/Kendin KS8695"
 576         select ARCH_REQUIRE_GPIOLIB
 577         select CLKSRC_MMIO
 578         select CPU_ARM922T
 579         select GENERIC_CLOCKEVENTS
 580         select NEED_MACH_MEMORY_H
 581         help
 582           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 583           System-on-Chip devices.
 584
 585 config ARCH_W90X900
 586         bool "Nuvoton W90X900 CPU"
 587         select ARCH_REQUIRE_GPIOLIB
 588         select CLKDEV_LOOKUP
 589         select CLKSRC_MMIO
 590         select CPU_ARM926T
 591         select GENERIC_CLOCKEVENTS
 592         help
 593           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 594           At present, the w90x900 has been renamed nuc900, regarding
 595           the ARM series product line, you can login the following
 596           link address to know more.
 597
 598           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 599                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 600
 601 config ARCH_LPC32XX
 602         bool "NXP LPC32XX"
 603         select ARCH_REQUIRE_GPIOLIB
 604         select ARM_AMBA
 605         select CLKDEV_LOOKUP
 606         select CLKSRC_MMIO
 607         select CPU_ARM926T
 608         select GENERIC_CLOCKEVENTS
 609         select HAVE_IDE
 610         select USE_OF
 611         help
 612           Support for the NXP LPC32XX family of processors
 613
 614 config ARCH_PXA
 615         bool "PXA2xx/PXA3xx-based"
 616         depends on MMU
 617         select ARCH_MTD_XIP
 618         select ARCH_REQUIRE_GPIOLIB
 619         select ARM_CPU_SUSPEND if PM
 620         select AUTO_ZRELADDR
 621         select CLKDEV_LOOKUP
 622         select CLKSRC_MMIO
 623         select GENERIC_CLOCKEVENTS
 624         select GPIO_PXA
 625         select HAVE_IDE
 626         select MULTI_IRQ_HANDLER
 627         select PLAT_PXA
 628         select SPARSE_IRQ
 629         help
 630           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 631
 632 config ARCH_MSM
 633         bool "Qualcomm MSM (non-multiplatform)"
 634         select ARCH_REQUIRE_GPIOLIB
 635         select COMMON_CLK
 636         select GENERIC_CLOCKEVENTS
 637         help
 638           Support for Qualcomm MSM/QSD based systems.  This runs on the
 639           apps processor of the MSM/QSD and depends on a shared memory
 640           interface to the modem processor which runs the baseband
 641           stack and controls some vital subsystems
 642           (clock and power control, etc).
 643
 644 config ARCH_SHMOBILE_LEGACY
 645         bool "Renesas ARM SoCs (non-multiplatform)"
 646         select ARCH_SHMOBILE
 647         select ARM_PATCH_PHYS_VIRT
 648         select CLKDEV_LOOKUP
 649         select GENERIC_CLOCKEVENTS
 650         select HAVE_ARM_SCU if SMP
 651         select HAVE_ARM_TWD if SMP
 652         select HAVE_MACH_CLKDEV
 653         select HAVE_SMP
 654         select MIGHT_HAVE_CACHE_L2X0
 655         select MULTI_IRQ_HANDLER
 656         select NO_IOPORT_MAP
 657         select PINCTRL
 658         select PM_GENERIC_DOMAINS if PM
 659         select SPARSE_IRQ
 660         help
 661           Support for Renesas ARM SoC platforms using a non-multiplatform
 662           kernel. This includes the SH-Mobile, R-Mobile, EMMA-Mobile, R-Car
 663           and RZ families.
 664
 665 config ARCH_RPC
 666         bool "RiscPC"
 667         select ARCH_ACORN
 668         select ARCH_MAY_HAVE_PC_FDC
 669         select ARCH_SPARSEMEM_ENABLE
 670         select ARCH_USES_GETTIMEOFFSET
 671         select CPU_SA110
 672         select FIQ
 673         select HAVE_IDE
 674         select HAVE_PATA_PLATFORM
 675         select ISA_DMA_API
 676         select NEED_MACH_IO_H
 677         select NEED_MACH_MEMORY_H
 678         select NO_IOPORT_MAP
 679         select VIRT_TO_BUS
 680         help
 681           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 682           CD-ROM interface, serial and parallel port, and the floppy drive.
 683
 684 config ARCH_SA1100
 685         bool "SA1100-based"
 686         select ARCH_MTD_XIP
 687         select ARCH_REQUIRE_GPIOLIB
 688         select ARCH_SPARSEMEM_ENABLE
 689         select CLKDEV_LOOKUP
 690         select CLKSRC_MMIO
 691         select CPU_FREQ
 692         select CPU_SA1100
 693         select GENERIC_CLOCKEVENTS
 694         select HAVE_IDE
 695         select ISA
 696         select NEED_MACH_MEMORY_H
 697         select SPARSE_IRQ
 698         help
 699           Support for StrongARM 11x0 based boards.
 700
 701 config ARCH_S3C24XX
 702         bool "Samsung S3C24XX SoCs"
 703         select ARCH_REQUIRE_GPIOLIB
 704         select ATAGS
 705         select CLKDEV_LOOKUP
 706         select CLKSRC_SAMSUNG_PWM
 707         select GENERIC_CLOCKEVENTS
 708         select GPIO_SAMSUNG
 709         select HAVE_S3C2410_I2C if I2C
 710         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 711         select HAVE_S3C_RTC if RTC_CLASS
 712         select MULTI_IRQ_HANDLER
 713         select NEED_MACH_IO_H
 714         select SAMSUNG_ATAGS
 715         help
 716           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 717           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 718           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 719           Samsung SMDK2410 development board (and derivatives).
 720
 721 config ARCH_S3C64XX
 722         bool "Samsung S3C64XX"
 723         select ARCH_REQUIRE_GPIOLIB
 724         select ARM_AMBA
 725         select ARM_VIC
 726         select ATAGS
 727         select CLKDEV_LOOKUP
 728         select CLKSRC_SAMSUNG_PWM
 729         select COMMON_CLK_SAMSUNG
 730         select CPU_V6K
 731         select GENERIC_CLOCKEVENTS
 732         select GPIO_SAMSUNG
 733         select HAVE_S3C2410_I2C if I2C
 734         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 735         select HAVE_TCM
 736         select NO_IOPORT_MAP
 737         select PLAT_SAMSUNG
 738         select PM_GENERIC_DOMAINS if PM
 739         select S3C_DEV_NAND
 740         select S3C_GPIO_TRACK
 741         select SAMSUNG_ATAGS
 742         select SAMSUNG_WAKEMASK
 743         select SAMSUNG_WDT_RESET
 744         help
 745           Samsung S3C64XX series based systems
 746
 747 config ARCH_S5PV210
 748         bool "Samsung S5PV210/S5PC110"
 749         select ARCH_HAS_HOLES_MEMORYMODEL
 750         select ARCH_SPARSEMEM_ENABLE
 751         select ATAGS
 752         select CLKDEV_LOOKUP
 753         select CLKSRC_SAMSUNG_PWM
 754         select CPU_V7
 755         select GENERIC_CLOCKEVENTS
 756         select GPIO_SAMSUNG
 757         select HAVE_S3C2410_I2C if I2C
 758         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 759         select HAVE_S3C_RTC if RTC_CLASS
 760         select NEED_MACH_GPIO_H
 761         select NEED_MACH_MEMORY_H
 762         select SAMSUNG_ATAGS
 763         help
 764           Samsung S5PV210/S5PC110 series based systems
 765
 766 config ARCH_DAVINCI
 767         bool "TI DaVinci"
 768         select ARCH_HAS_HOLES_MEMORYMODEL
 769         select ARCH_REQUIRE_GPIOLIB
 770         select CLKDEV_LOOKUP
 771         select GENERIC_ALLOCATOR
 772         select GENERIC_CLOCKEVENTS
 773         select GENERIC_IRQ_CHIP
 774         select HAVE_IDE
 775         select TI_PRIV_EDMA
 776         select USE_OF
 777         select ZONE_DMA
 778         help
 779           Support for TI's DaVinci platform.
 780
 781 config ARCH_OMAP1
 782         bool "TI OMAP1"
 783         depends on MMU
 784         select ARCH_HAS_HOLES_MEMORYMODEL
 785         select ARCH_OMAP
 786         select ARCH_REQUIRE_GPIOLIB
 787         select CLKDEV_LOOKUP
 788         select CLKSRC_MMIO
 789         select GENERIC_CLOCKEVENTS
 790         select GENERIC_IRQ_CHIP
 791         select HAVE_IDE
 792         select IRQ_DOMAIN
 793         select NEED_MACH_IO_H if PCCARD
 794         select NEED_MACH_MEMORY_H
 795         help
 796           Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
 797
 798 endchoice
 799
 800 menu "Multiple platform selection"
 801         depends on ARCH_MULTIPLATFORM
 802
 803 comment "CPU Core family selection"
 804
 805 config ARCH_MULTI_V4
 806         bool "ARMv4 based platforms (FA526)"
 807         depends on !ARCH_MULTI_V6_V7
 808         select ARCH_MULTI_V4_V5
 809         select CPU_FA526
 810
 811 config ARCH_MULTI_V4T
 812         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
 813         depends on !ARCH_MULTI_V6_V7
 814         select ARCH_MULTI_V4_V5
 815         select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \
 816                 CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \
 817                 CPU_ARM925T || CPU_ARM940T)
 818
 819 config ARCH_MULTI_V5
 820         bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
 821         depends on !ARCH_MULTI_V6_V7
 822         select ARCH_MULTI_V4_V5
 823         select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
 824                 CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
 825                 CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
 826
 827 config ARCH_MULTI_V4_V5
 828         bool
 829
 830 config ARCH_MULTI_V6
 831         bool "ARMv6 based platforms (ARM11)"
 832         select ARCH_MULTI_V6_V7
 833         select CPU_V6K
 834
 835 config ARCH_MULTI_V7
 836         bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
 837         default y
 838         select ARCH_MULTI_V6_V7
 839         select CPU_V7
 840         select HAVE_SMP
 841
 842 config ARCH_MULTI_V6_V7
 843         bool
 844         select MIGHT_HAVE_CACHE_L2X0
 845
 846 config ARCH_MULTI_CPU_AUTO
 847         def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
 848         select ARCH_MULTI_V5
 849
 850 endmenu
 851
 852 config ARCH_VIRT
 853         bool "Dummy Virtual Machine" if ARCH_MULTI_V7
 854         select ARM_AMBA
 855         select ARM_GIC
 856         select ARM_PSCI
 857         select HAVE_ARM_ARCH_TIMER
 858
 859 #
 860 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 861 # Kconfigs may be included either alphabetically (according to the
 862 # plat- suffix) or along side the corresponding mach-* source.
 863 #
 864 source "arch/arm/mach-mvebu/Kconfig"
 865
 866 source "arch/arm/mach-at91/Kconfig"
 867
 868 source "arch/arm/mach-axxia/Kconfig"
 869
 870 source "arch/arm/mach-bcm/Kconfig"
 871
 872 source "arch/arm/mach-berlin/Kconfig"
 873
 874 source "arch/arm/mach-clps711x/Kconfig"
 875
 876 source "arch/arm/mach-cns3xxx/Kconfig"
 877
 878 source "arch/arm/mach-davinci/Kconfig"
 879
 880 source "arch/arm/mach-dove/Kconfig"
 881
 882 source "arch/arm/mach-ep93xx/Kconfig"
 883
 884 source "arch/arm/mach-footbridge/Kconfig"
 885
 886 source "arch/arm/mach-gemini/Kconfig"
 887
 888 source "arch/arm/mach-highbank/Kconfig"
 889
 890 source "arch/arm/mach-hisi/Kconfig"
 891
 892 source "arch/arm/mach-integrator/Kconfig"
 893
 894 source "arch/arm/mach-iop32x/Kconfig"
 895
 896 source "arch/arm/mach-iop33x/Kconfig"
 897
 898 source "arch/arm/mach-iop13xx/Kconfig"
 899
 900 source "arch/arm/mach-ixp4xx/Kconfig"
 901
 902 source "arch/arm/mach-keystone/Kconfig"
 903
 904 source "arch/arm/mach-ks8695/Kconfig"
 905
 906 source "arch/arm/mach-msm/Kconfig"
 907
 908 source "arch/arm/mach-moxart/Kconfig"
 909
 910 source "arch/arm/mach-mv78xx0/Kconfig"
 911
 912 source "arch/arm/mach-imx/Kconfig"
 913
 914 source "arch/arm/mach-mediatek/Kconfig"
 915
 916 source "arch/arm/mach-mxs/Kconfig"
 917
 918 source "arch/arm/mach-netx/Kconfig"
 919
 920 source "arch/arm/mach-nomadik/Kconfig"
 921
 922 source "arch/arm/mach-nspire/Kconfig"
 923
 924 source "arch/arm/plat-omap/Kconfig"
 925
 926 source "arch/arm/mach-omap1/Kconfig"
 927
 928 source "arch/arm/mach-omap2/Kconfig"
 929
 930 source "arch/arm/mach-orion5x/Kconfig"
 931
 932 source "arch/arm/mach-picoxcell/Kconfig"
 933
 934 source "arch/arm/mach-pxa/Kconfig"
 935 source "arch/arm/plat-pxa/Kconfig"
 936
 937 source "arch/arm/mach-mmp/Kconfig"
 938
 939 source "arch/arm/mach-qcom/Kconfig"
 940
 941 source "arch/arm/mach-realview/Kconfig"
 942
 943 source "arch/arm/mach-rockchip/Kconfig"
 944
 945 source "arch/arm/mach-sa1100/Kconfig"
 946
 947 source "arch/arm/mach-socfpga/Kconfig"
 948
 949 source "arch/arm/mach-spear/Kconfig"
 950
 951 source "arch/arm/mach-sti/Kconfig"
 952
 953 source "arch/arm/mach-s3c24xx/Kconfig"
 954
 955 source "arch/arm/mach-s3c64xx/Kconfig"
 956
 957 source "arch/arm/mach-s5pv210/Kconfig"
 958
 959 source "arch/arm/mach-exynos/Kconfig"
 960 source "arch/arm/plat-samsung/Kconfig"
 961
 962 source "arch/arm/mach-shmobile/Kconfig"
 963
 964 source "arch/arm/mach-sunxi/Kconfig"
 965
 966 source "arch/arm/mach-prima2/Kconfig"
 967
 968 source "arch/arm/mach-tegra/Kconfig"
 969
 970 source "arch/arm/mach-u300/Kconfig"
 971
 972 source "arch/arm/mach-ux500/Kconfig"
 973
 974 source "arch/arm/mach-versatile/Kconfig"
 975
 976 source "arch/arm/mach-vexpress/Kconfig"
 977 source "arch/arm/plat-versatile/Kconfig"
 978
 979 source "arch/arm/mach-vt8500/Kconfig"
 980
 981 source "arch/arm/mach-w90x900/Kconfig"
 982
 983 source "arch/arm/mach-zynq/Kconfig"
 984
 985 # Definitions to make life easier
 986 config ARCH_ACORN
 987         bool
 988
 989 config PLAT_IOP
 990         bool
 991         select GENERIC_CLOCKEVENTS
 992
 993 config PLAT_ORION
 994         bool
 995         select CLKSRC_MMIO
 996         select COMMON_CLK
 997         select GENERIC_IRQ_CHIP
 998         select IRQ_DOMAIN
 999
1000 config PLAT_ORION_LEGACY
1001         bool
1002         select PLAT_ORION
1003
1004 config PLAT_PXA
1005         bool
1006
1007 config PLAT_VERSATILE
1008         bool
1009
1010 config ARM_TIMER_SP804
1011         bool
1012         select CLKSRC_MMIO
1013         select CLKSRC_OF if OF
1014
1015 source "arch/arm/firmware/Kconfig"
1016
1017 source arch/arm/mm/Kconfig
1018
1019 config IWMMXT
1020         bool "Enable iWMMXt support"
1021         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
1022         default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
1023         help
1024           Enable support for iWMMXt context switching at run time if
1025           running on a CPU that supports it.
1026
1027 config MULTI_IRQ_HANDLER
1028         bool
1029         help
1030           Allow each machine to specify it's own IRQ handler at run time.
1031
1032 if !MMU
1033 source "arch/arm/Kconfig-nommu"
1034 endif
1035
1036 config PJ4B_ERRATA_4742
1037         bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
1038         depends on CPU_PJ4B && MACH_ARMADA_370
1039         default y
1040         help
1041           When coming out of either a Wait for Interrupt (WFI) or a Wait for
1042           Event (WFE) IDLE states, a specific timing sensitivity exists between
1043           the retiring WFI/WFE instructions and the newly issued subsequent
1044           instructions.  This sensitivity can result in a CPU hang scenario.
1045           Workaround:
1046           The software must insert either a Data Synchronization Barrier (DSB)
1047           or Data Memory Barrier (DMB) command immediately after the WFI/WFE
1048           instruction
1049
1050 config ARM_ERRATA_326103
1051         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1052         depends on CPU_V6
1053         help
1054           Executing a SWP instruction to read-only memory does not set bit 11
1055           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1056           treat the access as a read, preventing a COW from occurring and
1057           causing the faulting task to livelock.
1058
1059 config ARM_ERRATA_411920
1060         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1061         depends on CPU_V6 || CPU_V6K
1062         help
1063           Invalidation of the Instruction Cache operation can
1064           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1065           It does not affect the MPCore. This option enables the ARM Ltd.
1066           recommended workaround.
1067
1068 config ARM_ERRATA_430973
1069         bool "ARM errata: Stale prediction on replaced interworking branch"
1070         depends on CPU_V7
1071         help
1072           This option enables the workaround for the 430973 Cortex-A8
1073           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1074           interworking branch is replaced with another code sequence at the
1075           same virtual address, whether due to self-modifying code or virtual
1076           to physical address re-mapping, Cortex-A8 does not recover from the
1077           stale interworking branch prediction. This results in Cortex-A8
1078           executing the new code sequence in the incorrect ARM or Thumb state.
1079           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1080           and also flushes the branch target cache at every context switch.
1081           Note that setting specific bits in the ACTLR register may not be
1082           available in non-secure mode.
1083
1084 config ARM_ERRATA_458693
1085         bool "ARM errata: Processor deadlock when a false hazard is created"
1086         depends on CPU_V7
1087         depends on !ARCH_MULTIPLATFORM
1088         help
1089           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1090           erratum. For very specific sequences of memory operations, it is
1091           possible for a hazard condition intended for a cache line to instead
1092           be incorrectly associated with a different cache line. This false
1093           hazard might then cause a processor deadlock. The workaround enables
1094           the L1 caching of the NEON accesses and disables the PLD instruction
1095           in the ACTLR register. Note that setting specific bits in the ACTLR
1096           register may not be available in non-secure mode.
1097
1098 config ARM_ERRATA_460075
1099         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1100         depends on CPU_V7
1101         depends on !ARCH_MULTIPLATFORM
1102         help
1103           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1104           erratum. Any asynchronous access to the L2 cache may encounter a
1105           situation in which recent store transactions to the L2 cache are lost
1106           and overwritten with stale memory contents from external memory. The
1107           workaround disables the write-allocate mode for the L2 cache via the
1108           ACTLR register. Note that setting specific bits in the ACTLR register
1109           may not be available in non-secure mode.
1110
1111 config ARM_ERRATA_742230
1112         bool "ARM errata: DMB operation may be faulty"
1113         depends on CPU_V7 && SMP
1114         depends on !ARCH_MULTIPLATFORM
1115         help
1116           This option enables the workaround for the 742230 Cortex-A9
1117           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1118           between two write operations may not ensure the correct visibility
1119           ordering of the two writes. This workaround sets a specific bit in
1120           the diagnostic register of the Cortex-A9 which causes the DMB
1121           instruction to behave as a DSB, ensuring the correct behaviour of
1122           the two writes.
1123
1124 config ARM_ERRATA_742231
1125         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1126         depends on CPU_V7 && SMP
1127         depends on !ARCH_MULTIPLATFORM
1128         help
1129           This option enables the workaround for the 742231 Cortex-A9
1130           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1131           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1132           accessing some data located in the same cache line, may get corrupted
1133           data due to bad handling of the address hazard when the line gets
1134           replaced from one of the CPUs at the same time as another CPU is
1135           accessing it. This workaround sets specific bits in the diagnostic
1136           register of the Cortex-A9 which reduces the linefill issuing
1137           capabilities of the processor.
1138
1139 config ARM_ERRATA_643719
1140         bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
1141         depends on CPU_V7 && SMP
1142         help
1143           This option enables the workaround for the 643719 Cortex-A9 (prior to
1144           r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
1145           register returns zero when it should return one. The workaround
1146           corrects this value, ensuring cache maintenance operations which use
1147           it behave as intended and avoiding data corruption.
1148
1149 config ARM_ERRATA_720789
1150         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1151         depends on CPU_V7
1152         help
1153           This option enables the workaround for the 720789 Cortex-A9 (prior to
1154           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1155           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1156           As a consequence of this erratum, some TLB entries which should be
1157           invalidated are not, resulting in an incoherency in the system page
1158           tables. The workaround changes the TLB flushing routines to invalidate
1159           entries regardless of the ASID.
1160
1161 config ARM_ERRATA_743622
1162         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1163         depends on CPU_V7
1164         depends on !ARCH_MULTIPLATFORM
1165         help
1166           This option enables the workaround for the 743622 Cortex-A9
1167           (r2p*) erratum. Under very rare conditions, a faulty
1168           optimisation in the Cortex-A9 Store Buffer may lead to data
1169           corruption. This workaround sets a specific bit in the diagnostic
1170           register of the Cortex-A9 which disables the Store Buffer
1171           optimisation, preventing the defect from occurring. This has no
1172           visible impact on the overall performance or power consumption of the
1173           processor.
1174
1175 config ARM_ERRATA_751472
1176         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1177         depends on CPU_V7
1178         depends on !ARCH_MULTIPLATFORM
1179         help
1180           This option enables the workaround for the 751472 Cortex-A9 (prior
1181           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1182           completion of a following broadcasted operation if the second
1183           operation is received by a CPU before the ICIALLUIS has completed,
1184           potentially leading to corrupted entries in the cache or TLB.
1185
1186 config ARM_ERRATA_754322
1187         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1188         depends on CPU_V7
1189         help
1190           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1191           r3p*) erratum. A speculative memory access may cause a page table walk
1192           which starts prior to an ASID switch but completes afterwards. This
1193           can populate the micro-TLB with a stale entry which may be hit with
1194           the new ASID. This workaround places two dsb instructions in the mm
1195           switching code so that no page table walks can cross the ASID switch.
1196
1197 config ARM_ERRATA_754327
1198         bool "ARM errata: no automatic Store Buffer drain"
1199         depends on CPU_V7 && SMP
1200         help
1201           This option enables the workaround for the 754327 Cortex-A9 (prior to
1202           r2p0) erratum. The Store Buffer does not have any automatic draining
1203           mechanism and therefore a livelock may occur if an external agent
1204           continuously polls a memory location waiting to observe an update.
1205           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1206           written polling loops from denying visibility of updates to memory.
1207
1208 config ARM_ERRATA_364296
1209         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1210         depends on CPU_V6
1211         help
1212           This options enables the workaround for the 364296 ARM1136
1213           r0p2 erratum (possible cache data corruption with
1214           hit-under-miss enabled). It sets the undocumented bit 31 in
1215           the auxiliary control register and the FI bit in the control
1216           register, thus disabling hit-under-miss without putting the
1217           processor into full low interrupt latency mode. ARM11MPCore
1218           is not affected.
1219
1220 config ARM_ERRATA_764369
1221         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1222         depends on CPU_V7 && SMP
1223         help
1224           This option enables the workaround for erratum 764369
1225           affecting Cortex-A9 MPCore with two or more processors (all
1226           current revisions). Under certain timing circumstances, a data
1227           cache line maintenance operation by MVA targeting an Inner
1228           Shareable memory region may fail to proceed up to either the
1229           Point of Coherency or to the Point of Unification of the
1230           system. This workaround adds a DSB instruction before the
1231           relevant cache maintenance functions and sets a specific bit
1232           in the diagnostic control register of the SCU.
1233
1234 config ARM_ERRATA_775420
1235        bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1236        depends on CPU_V7
1237        help
1238          This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1239          r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1240          operation aborts with MMU exception, it might cause the processor
1241          to deadlock. This workaround puts DSB before executing ISB if
1242          an abort may occur on cache maintenance.
1243
1244 config ARM_ERRATA_798181
1245         bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1246         depends on CPU_V7 && SMP
1247         help
1248           On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1249           adequately shooting down all use of the old entries. This
1250           option enables the Linux kernel workaround for this erratum
1251           which sends an IPI to the CPUs that are running the same ASID
1252           as the one being invalidated.
1253
1254 config ARM_ERRATA_773022
1255         bool "ARM errata: incorrect instructions may be executed from loop buffer"
1256         depends on CPU_V7
1257         help
1258           This option enables the workaround for the 773022 Cortex-A15
1259           (up to r0p4) erratum. In certain rare sequences of code, the
1260           loop buffer may deliver incorrect instructions. This
1261           workaround disables the loop buffer to avoid the erratum.
1262
1263 endmenu
1264
1265 source "arch/arm/common/Kconfig"
1266
1267 menu "Bus support"
1268
1269 config ARM_AMBA
1270         bool
1271
1272 config ISA
1273         bool
1274         help
1275           Find out whether you have ISA slots on your motherboard.  ISA is the
1276           name of a bus system, i.e. the way the CPU talks to the other stuff
1277           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1278           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1279           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1280
1281 # Select ISA DMA controller support
1282 config ISA_DMA
1283         bool
1284         select ISA_DMA_API
1285
1286 # Select ISA DMA interface
1287 config ISA_DMA_API
1288         bool
1289
1290 config PCI
1291         bool "PCI support" if MIGHT_HAVE_PCI
1292         help
1293           Find out whether you have a PCI motherboard. PCI is the name of a
1294           bus system, i.e. the way the CPU talks to the other stuff inside
1295           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1296           VESA. If you have PCI, say Y, otherwise N.
1297
1298 config PCI_DOMAINS
1299         bool
1300         depends on PCI
1301
1302 config PCI_NANOENGINE
1303         bool "BSE nanoEngine PCI support"
1304         depends on SA1100_NANOENGINE
1305         help
1306           Enable PCI on the BSE nanoEngine board.
1307
1308 config PCI_SYSCALL
1309         def_bool PCI
1310
1311 config PCI_HOST_ITE8152
1312         bool
1313         depends on PCI && MACH_ARMCORE
1314         default y
1315         select DMABOUNCE
1316
1317 source "drivers/pci/Kconfig"
1318 source "drivers/pci/pcie/Kconfig"
1319
1320 source "drivers/pcmcia/Kconfig"
1321
1322 endmenu
1323
1324 menu "Kernel Features"
1325
1326 config HAVE_SMP
1327         bool
1328         help
1329           This option should be selected by machines which have an SMP-
1330           capable CPU.
1331
1332           The only effect of this option is to make the SMP-related
1333           options available to the user for configuration.
1334
1335 config SMP
1336         bool "Symmetric Multi-Processing"
1337         depends on CPU_V6K || CPU_V7
1338         depends on GENERIC_CLOCKEVENTS
1339         depends on HAVE_SMP
1340         depends on MMU || ARM_MPU
1341         help
1342           This enables support for systems with more than one CPU. If you have
1343           a system with only one CPU, say N. If you have a system with more
1344           than one CPU, say Y.
1345
1346           If you say N here, the kernel will run on uni- and multiprocessor
1347           machines, but will use only one CPU of a multiprocessor machine. If
1348           you say Y here, the kernel will run on many, but not all,
1349           uniprocessor machines. On a uniprocessor machine, the kernel
1350           will run faster if you say N here.
1351
1352           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1353           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1354           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1355
1356           If you don't know what to do here, say N.
1357
1358 config SMP_ON_UP
1359         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1360         depends on SMP && !XIP_KERNEL && MMU
1361         default y
1362         help
1363           SMP kernels contain instructions which fail on non-SMP processors.
1364           Enabling this option allows the kernel to modify itself to make
1365           these instructions safe.  Disabling it allows about 1K of space
1366           savings.
1367
1368           If you don't know what to do here, say Y.
1369
1370 config ARM_CPU_TOPOLOGY
1371         bool "Support cpu topology definition"
1372         depends on SMP && CPU_V7
1373         default y
1374         help
1375           Support ARM cpu topology definition. The MPIDR register defines
1376           affinity between processors which is then used to describe the cpu
1377           topology of an ARM System.
1378
1379 config SCHED_MC
1380         bool "Multi-core scheduler support"
1381         depends on ARM_CPU_TOPOLOGY
1382         help
1383           Multi-core scheduler support improves the CPU scheduler's decision
1384           making when dealing with multi-core CPU chips at a cost of slightly
1385           increased overhead in some places. If unsure say N here.
1386
1387 config SCHED_SMT
1388         bool "SMT scheduler support"
1389         depends on ARM_CPU_TOPOLOGY
1390         help
1391           Improves the CPU scheduler's decision making when dealing with
1392           MultiThreading at a cost of slightly increased overhead in some
1393           places. If unsure say N here.
1394
1395 config HAVE_ARM_SCU
1396         bool
1397         help
1398           This option enables support for the ARM system coherency unit
1399
1400 config HAVE_ARM_ARCH_TIMER
1401         bool "Architected timer support"
1402         depends on CPU_V7
1403         select ARM_ARCH_TIMER
1404         select GENERIC_CLOCKEVENTS
1405         help
1406           This option enables support for the ARM architected timer
1407
1408 config HAVE_ARM_TWD
1409         bool
1410         depends on SMP
1411         select CLKSRC_OF if OF
1412         help
1413           This options enables support for the ARM timer and watchdog unit
1414
1415 config MCPM
1416         bool "Multi-Cluster Power Management"
1417         depends on CPU_V7 && SMP
1418         help
1419           This option provides the common power management infrastructure
1420           for (multi-)cluster based systems, such as big.LITTLE based
1421           systems.
1422
1423 config BIG_LITTLE
1424         bool "big.LITTLE support (Experimental)"
1425         depends on CPU_V7 && SMP
1426         select MCPM
1427         help
1428           This option enables support selections for the big.LITTLE
1429           system architecture.
1430
1431 config BL_SWITCHER
1432         bool "big.LITTLE switcher support"
1433         depends on BIG_LITTLE && MCPM && HOTPLUG_CPU
1434         select ARM_CPU_SUSPEND
1435         select CPU_PM
1436         help
1437           The big.LITTLE "switcher" provides the core functionality to
1438           transparently handle transition between a cluster of A15's
1439           and a cluster of A7's in a big.LITTLE system.
1440
1441 config BL_SWITCHER_DUMMY_IF
1442         tristate "Simple big.LITTLE switcher user interface"
1443         depends on BL_SWITCHER && DEBUG_KERNEL
1444         help
1445           This is a simple and dummy char dev interface to control
1446           the big.LITTLE switcher core code.  It is meant for
1447           debugging purposes only.
1448
1449 choice
1450         prompt "Memory split"
1451         depends on MMU
1452         default VMSPLIT_3G
1453         help
1454           Select the desired split between kernel and user memory.
1455
1456           If you are not absolutely sure what you are doing, leave this
1457           option alone!
1458
1459         config VMSPLIT_3G
1460                 bool "3G/1G user/kernel split"
1461         config VMSPLIT_2G
1462                 bool "2G/2G user/kernel split"
1463         config VMSPLIT_1G
1464                 bool "1G/3G user/kernel split"
1465 endchoice
1466
1467 config PAGE_OFFSET
1468         hex
1469         default PHYS_OFFSET if !MMU
1470         default 0x40000000 if VMSPLIT_1G
1471         default 0x80000000 if VMSPLIT_2G
1472         default 0xC0000000
1473
1474 config NR_CPUS
1475         int "Maximum number of CPUs (2-32)"
1476         range 2 32
1477         depends on SMP
1478         default "4"
1479
1480 config HOTPLUG_CPU
1481         bool "Support for hot-pluggable CPUs"
1482         depends on SMP
1483         help
1484           Say Y here to experiment with turning CPUs off and on.  CPUs
1485           can be controlled through /sys/devices/system/cpu.
1486
1487 config ARM_PSCI
1488         bool "Support for the ARM Power State Coordination Interface (PSCI)"
1489         depends on CPU_V7
1490         help
1491           Say Y here if you want Linux to communicate with system firmware
1492           implementing the PSCI specification for CPU-centric power
1493           management operations described in ARM document number ARM DEN
1494           0022A ("Power State Coordination Interface System Software on
1495           ARM processors").
1496
1497 # The GPIO number here must be sorted by descending number. In case of
1498 # a multiplatform kernel, we just want the highest value required by the
1499 # selected platforms.
1500 config ARCH_NR_GPIO
1501         int
1502         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1503         default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX
1504         default 416 if ARCH_SUNXI
1505         default 392 if ARCH_U8500
1506         default 352 if ARCH_VT8500
1507         default 264 if MACH_H4700
1508         default 0
1509         help
1510           Maximum number of GPIOs in the system.
1511
1512           If unsure, leave the default value.
1513
1514 source kernel/Kconfig.preempt
1515
1516 config HZ_FIXED
1517         int
1518         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \
1519                 ARCH_S5PV210 || ARCH_EXYNOS4
1520         default AT91_TIMER_HZ if ARCH_AT91
1521         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
1522         default 0
1523
1524 choice
1525         depends on HZ_FIXED = 0
1526         prompt "Timer frequency"
1527
1528 config HZ_100
1529         bool "100 Hz"
1530
1531 config HZ_200
1532         bool "200 Hz"
1533
1534 config HZ_250
1535         bool "250 Hz"
1536
1537 config HZ_300
1538         bool "300 Hz"
1539
1540 config HZ_500
1541         bool "500 Hz"
1542
1543 config HZ_1000
1544         bool "1000 Hz"
1545
1546 endchoice
1547
1548 config HZ
1549         int
1550         default HZ_FIXED if HZ_FIXED != 0
1551         default 100 if HZ_100
1552         default 200 if HZ_200
1553         default 250 if HZ_250
1554         default 300 if HZ_300
1555         default 500 if HZ_500
1556         default 1000
1557
1558 config SCHED_HRTICK
1559         def_bool HIGH_RES_TIMERS
1560
1561 config THUMB2_KERNEL
1562         bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
1563         depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
1564         default y if CPU_THUMBONLY
1565         select AEABI
1566         select ARM_ASM_UNIFIED
1567         select ARM_UNWIND
1568         help
1569           By enabling this option, the kernel will be compiled in
1570           Thumb-2 mode. A compiler/assembler that understand the unified
1571           ARM-Thumb syntax is needed.
1572
1573           If unsure, say N.
1574
1575 config THUMB2_AVOID_R_ARM_THM_JUMP11
1576         bool "Work around buggy Thumb-2 short branch relocations in gas"
1577         depends on THUMB2_KERNEL && MODULES
1578         default y
1579         help
1580           Various binutils versions can resolve Thumb-2 branches to
1581           locally-defined, preemptible global symbols as short-range "b.n"
1582           branch instructions.
1583
1584           This is a problem, because there's no guarantee the final
1585           destination of the symbol, or any candidate locations for a
1586           trampoline, are within range of the branch.  For this reason, the
1587           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1588           relocation in modules at all, and it makes little sense to add
1589           support.
1590
1591           The symptom is that the kernel fails with an "unsupported
1592           relocation" error when loading some modules.
1593
1594           Until fixed tools are available, passing
1595           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1596           code which hits this problem, at the cost of a bit of extra runtime
1597           stack usage in some cases.
1598
1599           The problem is described in more detail at:
1600               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1601
1602           Only Thumb-2 kernels are affected.
1603
1604           Unless you are sure your tools don't have this problem, say Y.
1605
1606 config ARM_ASM_UNIFIED
1607         bool
1608
1609 config AEABI
1610         bool "Use the ARM EABI to compile the kernel"
1611         help
1612           This option allows for the kernel to be compiled using the latest
1613           ARM ABI (aka EABI).  This is only useful if you are using a user
1614           space environment that is also compiled with EABI.
1615
1616           Since there are major incompatibilities between the legacy ABI and
1617           EABI, especially with regard to structure member alignment, this
1618           option also changes the kernel syscall calling convention to
1619           disambiguate both ABIs and allow for backward compatibility support
1620           (selected with CONFIG_OABI_COMPAT).
1621
1622           To use this you need GCC version 4.0.0 or later.
1623
1624 config OABI_COMPAT
1625         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1626         depends on AEABI && !THUMB2_KERNEL
1627         help
1628           This option preserves the old syscall interface along with the
1629           new (ARM EABI) one. It also provides a compatibility layer to
1630           intercept syscalls that have structure arguments which layout
1631           in memory differs between the legacy ABI and the new ARM EABI
1632           (only for non "thumb" binaries). This option adds a tiny
1633           overhead to all syscalls and produces a slightly larger kernel.
1634
1635           The seccomp filter system will not be available when this is
1636           selected, since there is no way yet to sensibly distinguish
1637           between calling conventions during filtering.
1638
1639           If you know you'll be using only pure EABI user space then you
1640           can say N here. If this option is not selected and you attempt
1641           to execute a legacy ABI binary then the result will be
1642           UNPREDICTABLE (in fact it can be predicted that it won't work
1643           at all). If in doubt say N.
1644
1645 config ARCH_HAS_HOLES_MEMORYMODEL
1646         bool
1647
1648 config ARCH_SPARSEMEM_ENABLE
1649         bool
1650
1651 config ARCH_SPARSEMEM_DEFAULT
1652         def_bool ARCH_SPARSEMEM_ENABLE
1653
1654 config ARCH_SELECT_MEMORY_MODEL
1655         def_bool ARCH_SPARSEMEM_ENABLE
1656
1657 config HAVE_ARCH_PFN_VALID
1658         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1659
1660 config HIGHMEM
1661         bool "High Memory Support"
1662         depends on MMU
1663         help
1664           The address space of ARM processors is only 4 Gigabytes large
1665           and it has to accommodate user address space, kernel address
1666           space as well as some memory mapped IO. That means that, if you
1667           have a large amount of physical memory and/or IO, not all of the
1668           memory can be "permanently mapped" by the kernel. The physical
1669           memory that is not permanently mapped is called "high memory".
1670
1671           Depending on the selected kernel/user memory split, minimum
1672           vmalloc space and actual amount of RAM, you may not need this
1673           option which should result in a slightly faster kernel.
1674
1675           If unsure, say n.
1676
1677 config HIGHPTE
1678         bool "Allocate 2nd-level pagetables from highmem"
1679         depends on HIGHMEM
1680
1681 config HW_PERF_EVENTS
1682         bool "Enable hardware performance counter support for perf events"
1683         depends on PERF_EVENTS
1684         default y
1685         help
1686           Enable hardware performance counter support for perf events. If
1687           disabled, perf events will use software events only.
1688
1689 config SYS_SUPPORTS_HUGETLBFS
1690        def_bool y
1691        depends on ARM_LPAE
1692
1693 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
1694        def_bool y
1695        depends on ARM_LPAE
1696
1697 config ARCH_WANT_GENERAL_HUGETLB
1698         def_bool y
1699
1700 source "mm/Kconfig"
1701
1702 config FORCE_MAX_ZONEORDER
1703         int "Maximum zone order" if ARCH_SHMOBILE_LEGACY
1704         range 11 64 if ARCH_SHMOBILE_LEGACY
1705         default "12" if SOC_AM33XX
1706         default "9" if SA1111 || ARCH_EFM32
1707         default "11"
1708         help
1709           The kernel memory allocator divides physically contiguous memory
1710           blocks into "zones", where each zone is a power of two number of
1711           pages.  This option selects the largest power of two that the kernel
1712           keeps in the memory allocator.  If you need to allocate very large
1713           blocks of physically contiguous memory, then you may need to
1714           increase this value.
1715
1716           This config option is actually maximum order plus one. For example,
1717           a value of 11 means that the largest free memory block is 2^10 pages.
1718
1719 config ALIGNMENT_TRAP
1720         bool
1721         depends on CPU_CP15_MMU
1722         default y if !ARCH_EBSA110
1723         select HAVE_PROC_CPU if PROC_FS
1724         help
1725           ARM processors cannot fetch/store information which is not
1726           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1727           address divisible by 4. On 32-bit ARM processors, these non-aligned
1728           fetch/store instructions will be emulated in software if you say
1729           here, which has a severe performance impact. This is necessary for
1730           correct operation of some network protocols. With an IP-only
1731           configuration it is safe to say N, otherwise say Y.
1732
1733 config UACCESS_WITH_MEMCPY
1734         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1735         depends on MMU
1736         default y if CPU_FEROCEON
1737         help
1738           Implement faster copy_to_user and clear_user methods for CPU
1739           cores where a 8-word STM instruction give significantly higher
1740           memory write throughput than a sequence of individual 32bit stores.
1741
1742           A possible side effect is a slight increase in scheduling latency
1743           between threads sharing the same address space if they invoke
1744           such copy operations with large buffers.
1745
1746           However, if the CPU data cache is using a write-allocate mode,
1747           this option is unlikely to provide any performance gain.
1748
1749 config SECCOMP
1750         bool
1751         prompt "Enable seccomp to safely compute untrusted bytecode"
1752         ---help---
1753           This kernel feature is useful for number crunching applications
1754           that may need to compute untrusted bytecode during their
1755           execution. By using pipes or other transports made available to
1756           the process as file descriptors supporting the read/write
1757           syscalls, it's possible to isolate those applications in
1758           their own address space using seccomp. Once seccomp is
1759           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1760           and the task is only allowed to execute a few safe syscalls
1761           defined by each seccomp mode.
1762
1763 config SWIOTLB
1764         def_bool y
1765
1766 config IOMMU_HELPER
1767         def_bool SWIOTLB
1768
1769 config XEN_DOM0
1770         def_bool y
1771         depends on XEN
1772
1773 config XEN
1774         bool "Xen guest support on ARM (EXPERIMENTAL)"
1775         depends on ARM && AEABI && OF
1776         depends on CPU_V7 && !CPU_V6
1777         depends on !GENERIC_ATOMIC64
1778         depends on MMU
1779         select ARCH_DMA_ADDR_T_64BIT
1780         select ARM_PSCI
1781         select SWIOTLB_XEN
1782         help
1783           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1784
1785 endmenu
1786
1787 menu "Boot options"
1788
1789 config USE_OF
1790         bool "Flattened Device Tree support"
1791         select IRQ_DOMAIN
1792         select OF
1793         select OF_EARLY_FLATTREE
1794         select OF_RESERVED_MEM
1795         help
1796           Include support for flattened device tree machine descriptions.
1797
1798 config ATAGS
1799         bool "Support for the traditional ATAGS boot data passing" if USE_OF
1800         default y
1801         help
1802           This is the traditional way of passing data to the kernel at boot
1803           time. If you are solely relying on the flattened device tree (or
1804           the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1805           to remove ATAGS support from your kernel binary.  If unsure,
1806           leave this to y.
1807
1808 config DEPRECATED_PARAM_STRUCT
1809         bool "Provide old way to pass kernel parameters"
1810         depends on ATAGS
1811         help
1812           This was deprecated in 2001 and announced to live on for 5 years.
1813           Some old boot loaders still use this way.
1814
1815 # Compressed boot loader in ROM.  Yes, we really want to ask about
1816 # TEXT and BSS so we preserve their values in the config files.
1817 config ZBOOT_ROM_TEXT
1818         hex "Compressed ROM boot loader base address"
1819         default "0"
1820         help
1821           The physical address at which the ROM-able zImage is to be
1822           placed in the target.  Platforms which normally make use of
1823           ROM-able zImage formats normally set this to a suitable
1824           value in their defconfig file.
1825
1826           If ZBOOT_ROM is not enabled, this has no effect.
1827
1828 config ZBOOT_ROM_BSS
1829         hex "Compressed ROM boot loader BSS address"
1830         default "0"
1831         help
1832           The base address of an area of read/write memory in the target
1833           for the ROM-able zImage which must be available while the
1834           decompressor is running. It must be large enough to hold the
1835           entire decompressed kernel plus an additional 128 KiB.
1836           Platforms which normally make use of ROM-able zImage formats
1837           normally set this to a suitable value in their defconfig file.
1838
1839           If ZBOOT_ROM is not enabled, this has no effect.
1840
1841 config ZBOOT_ROM
1842         bool "Compressed boot loader in ROM/flash"
1843         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1844         depends on !ARM_APPENDED_DTB && !XIP_KERNEL && !AUTO_ZRELADDR
1845         help
1846           Say Y here if you intend to execute your compressed kernel image
1847           (zImage) directly from ROM or flash.  If unsure, say N.
1848
1849 choice
1850         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1851         depends on ZBOOT_ROM && ARCH_SH7372
1852         default ZBOOT_ROM_NONE
1853         help
1854           Include experimental SD/MMC loading code in the ROM-able zImage.
1855           With this enabled it is possible to write the ROM-able zImage
1856           kernel image to an MMC or SD card and boot the kernel straight
1857           from the reset vector. At reset the processor Mask ROM will load
1858           the first part of the ROM-able zImage which in turn loads the
1859           rest the kernel image to RAM.
1860
1861 config ZBOOT_ROM_NONE
1862         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1863         help
1864           Do not load image from SD or MMC
1865
1866 config ZBOOT_ROM_MMCIF
1867         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1868         help
1869           Load image from MMCIF hardware block.
1870
1871 config ZBOOT_ROM_SH_MOBILE_SDHI
1872         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1873         help
1874           Load image from SDHI hardware block
1875
1876 endchoice
1877
1878 config ARM_APPENDED_DTB
1879         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1880         depends on OF
1881         help
1882           With this option, the boot code will look for a device tree binary
1883           (DTB) appended to zImage
1884           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1885
1886           This is meant as a backward compatibility convenience for those
1887           systems with a bootloader that can't be upgraded to accommodate
1888           the documented boot protocol using a device tree.
1889
1890           Beware that there is very little in terms of protection against
1891           this option being confused by leftover garbage in memory that might
1892           look like a DTB header after a reboot if no actual DTB is appended
1893           to zImage.  Do not leave this option active in a production kernel
1894           if you don't intend to always append a DTB.  Proper passing of the
1895           location into r2 of a bootloader provided DTB is always preferable
1896           to this option.
1897
1898 config ARM_ATAG_DTB_COMPAT
1899         bool "Supplement the appended DTB with traditional ATAG information"
1900         depends on ARM_APPENDED_DTB
1901         help
1902           Some old bootloaders can't be updated to a DTB capable one, yet
1903           they provide ATAGs with memory configuration, the ramdisk address,
1904           the kernel cmdline string, etc.  Such information is dynamically
1905           provided by the bootloader and can't always be stored in a static
1906           DTB.  To allow a device tree enabled kernel to be used with such
1907           bootloaders, this option allows zImage to extract the information
1908           from the ATAG list and store it at run time into the appended DTB.
1909
1910 choice
1911         prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1912         default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1913
1914 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1915         bool "Use bootloader kernel arguments if available"
1916         help
1917           Uses the command-line options passed by the boot loader instead of
1918           the device tree bootargs property. If the boot loader doesn't provide
1919           any, the device tree bootargs property will be used.
1920
1921 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1922         bool "Extend with bootloader kernel arguments"
1923         help
1924           The command-line arguments provided by the boot loader will be
1925           appended to the the device tree bootargs property.
1926
1927 endchoice
1928
1929 config CMDLINE
1930         string "Default kernel command string"
1931         default ""
1932         help
1933           On some architectures (EBSA110 and CATS), there is currently no way
1934           for the boot loader to pass arguments to the kernel. For these
1935           architectures, you should supply some command-line options at build
1936           time by entering them here. As a minimum, you should specify the
1937           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1938
1939 choice
1940         prompt "Kernel command line type" if CMDLINE != ""
1941         default CMDLINE_FROM_BOOTLOADER
1942         depends on ATAGS
1943
1944 config CMDLINE_FROM_BOOTLOADER
1945         bool "Use bootloader kernel arguments if available"
1946         help
1947           Uses the command-line options passed by the boot loader. If
1948           the boot loader doesn't provide any, the default kernel command
1949           string provided in CMDLINE will be used.
1950
1951 config CMDLINE_EXTEND
1952         bool "Extend bootloader kernel arguments"
1953         help
1954           The command-line arguments provided by the boot loader will be
1955           appended to the default kernel command string.
1956
1957 config CMDLINE_FORCE
1958         bool "Always use the default kernel command string"
1959         help
1960           Always use the default kernel command string, even if the boot
1961           loader passes other arguments to the kernel.
1962           This is useful if you cannot or don't want to change the
1963           command-line options your boot loader passes to the kernel.
1964 endchoice
1965
1966 config XIP_KERNEL
1967         bool "Kernel Execute-In-Place from ROM"
1968         depends on !ARM_LPAE && !ARCH_MULTIPLATFORM
1969         help
1970           Execute-In-Place allows the kernel to run from non-volatile storage
1971           directly addressable by the CPU, such as NOR flash. This saves RAM
1972           space since the text section of the kernel is not loaded from flash
1973           to RAM.  Read-write sections, such as the data section and stack,
1974           are still copied to RAM.  The XIP kernel is not compressed since
1975           it has to run directly from flash, so it will take more space to
1976           store it.  The flash address used to link the kernel object files,
1977           and for storing it, is configuration dependent. Therefore, if you
1978           say Y here, you must know the proper physical address where to
1979           store the kernel image depending on your own flash memory usage.
1980
1981           Also note that the make target becomes "make xipImage" rather than
1982           "make zImage" or "make Image".  The final kernel binary to put in
1983           ROM memory will be arch/arm/boot/xipImage.
1984
1985           If unsure, say N.
1986
1987 config XIP_PHYS_ADDR
1988         hex "XIP Kernel Physical Location"
1989         depends on XIP_KERNEL
1990         default "0x00080000"
1991         help
1992           This is the physical address in your flash memory the kernel will
1993           be linked for and stored to.  This address is dependent on your
1994           own flash usage.
1995
1996 config KEXEC
1997         bool "Kexec system call (EXPERIMENTAL)"
1998         depends on (!SMP || PM_SLEEP_SMP)
1999         help
2000           kexec is a system call that implements the ability to shutdown your
2001           current kernel, and to start another kernel.  It is like a reboot
2002           but it is independent of the system firmware.   And like a reboot
2003           you can start any kernel with it, not just Linux.
2004
2005           It is an ongoing process to be certain the hardware in a machine
2006           is properly shutdown, so do not be surprised if this code does not
2007           initially work for you.
2008
2009 config ATAGS_PROC
2010         bool "Export atags in procfs"
2011         depends on ATAGS && KEXEC
2012         default y
2013         help
2014           Should the atags used to boot the kernel be exported in an "atags"
2015           file in procfs. Useful with kexec.
2016
2017 config CRASH_DUMP
2018         bool "Build kdump crash kernel (EXPERIMENTAL)"
2019         help
2020           Generate crash dump after being started by kexec. This should
2021           be normally only set in special crash dump kernels which are
2022           loaded in the main kernel with kexec-tools into a specially
2023           reserved region and then later executed after a crash by
2024           kdump/kexec. The crash dump kernel must be compiled to a
2025           memory address not used by the main kernel
2026
2027           For more details see Documentation/kdump/kdump.txt
2028
2029 config AUTO_ZRELADDR
2030         bool "Auto calculation of the decompressed kernel image address"
2031         help
2032           ZRELADDR is the physical address where the decompressed kernel
2033           image will be placed. If AUTO_ZRELADDR is selected, the address
2034           will be determined at run-time by masking the current IP with
2035           0xf8000000. This assumes the zImage being placed in the first 128MB
2036           from start of memory.
2037
2038 endmenu
2039
2040 menu "CPU Power Management"
2041
2042 source "drivers/cpufreq/Kconfig"
2043
2044 source "drivers/cpuidle/Kconfig"
2045
2046 endmenu
2047
2048 menu "Floating point emulation"
2049
2050 comment "At least one emulation must be selected"
2051
2052 config FPE_NWFPE
2053         bool "NWFPE math emulation"
2054         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2055         ---help---
2056           Say Y to include the NWFPE floating point emulator in the kernel.
2057           This is necessary to run most binaries. Linux does not currently
2058           support floating point hardware so you need to say Y here even if
2059           your machine has an FPA or floating point co-processor podule.
2060
2061           You may say N here if you are going to load the Acorn FPEmulator
2062           early in the bootup.
2063
2064 config FPE_NWFPE_XP
2065         bool "Support extended precision"
2066         depends on FPE_NWFPE
2067         help
2068           Say Y to include 80-bit support in the kernel floating-point
2069           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2070           Note that gcc does not generate 80-bit operations by default,
2071           so in most cases this option only enlarges the size of the
2072           floating point emulator without any good reason.
2073
2074           You almost surely want to say N here.
2075
2076 config FPE_FASTFPE
2077         bool "FastFPE math emulation (EXPERIMENTAL)"
2078         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
2079         ---help---
2080           Say Y here to include the FAST floating point emulator in the kernel.
2081           This is an experimental much faster emulator which now also has full
2082           precision for the mantissa.  It does not support any exceptions.
2083           It is very simple, and approximately 3-6 times faster than NWFPE.
2084
2085           It should be sufficient for most programs.  It may be not suitable
2086           for scientific calculations, but you have to check this for yourself.
2087           If you do not feel you need a faster FP emulation you should better
2088           choose NWFPE.
2089
2090 config VFP
2091         bool "VFP-format floating point maths"
2092         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2093         help
2094           Say Y to include VFP support code in the kernel. This is needed
2095           if your hardware includes a VFP unit.
2096
2097           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2098           release notes and additional status information.
2099
2100           Say N if your target does not have VFP hardware.
2101
2102 config VFPv3
2103         bool
2104         depends on VFP
2105         default y if CPU_V7
2106
2107 config NEON
2108         bool "Advanced SIMD (NEON) Extension support"
2109         depends on VFPv3 && CPU_V7
2110         help
2111           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2112           Extension.
2113
2114 config KERNEL_MODE_NEON
2115         bool "Support for NEON in kernel mode"
2116         depends on NEON && AEABI
2117         help
2118           Say Y to include support for NEON in kernel mode.
2119
2120 endmenu
2121
2122 menu "Userspace binary formats"
2123
2124 source "fs/Kconfig.binfmt"
2125
2126 config ARTHUR
2127         tristate "RISC OS personality"
2128         depends on !AEABI
2129         help
2130           Say Y here to include the kernel code necessary if you want to run
2131           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2132           experimental; if this sounds frightening, say N and sleep in peace.
2133           You can also say M here to compile this support as a module (which
2134           will be called arthur).
2135
2136 endmenu
2137
2138 menu "Power management options"
2139
2140 source "kernel/power/Kconfig"
2141
2142 config ARCH_SUSPEND_POSSIBLE
2143         depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \
2144                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2145         def_bool y
2146
2147 config ARM_CPU_SUSPEND
2148         def_bool PM_SLEEP
2149
2150 config ARCH_HIBERNATION_POSSIBLE
2151         bool
2152         depends on MMU
2153         default y if ARCH_SUSPEND_POSSIBLE
2154
2155 endmenu
2156
2157 source "net/Kconfig"
2158
2159 source "drivers/Kconfig"
2160
2161 source "fs/Kconfig"
2162
2163 source "arch/arm/Kconfig.debug"
2164
2165 source "security/Kconfig"
2166
2167 source "crypto/Kconfig"
2168
2169 source "lib/Kconfig"
2170
2171 source "arch/arm/kvm/Kconfig"