arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         select GENERIC_IRQ_SHOW
  32         help
  33           The ARM series is a line of low-power-consumption RISC chip designs
  34           licensed by ARM Ltd and targeted at embedded applications and
  35           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  36           manufactured, but legacy ARM-based PC hardware remains popular in
  37           Europe.  There is an ARM Linux project with a web page at
  38           <http://www.arm.linux.org.uk/>.
  39
  40 config HAVE_PWM
  41         bool
  42
  43 config MIGHT_HAVE_PCI
  44         bool
  45
  46 config SYS_SUPPORTS_APM_EMULATION
  47         bool
  48
  49 config HAVE_SCHED_CLOCK
  50         bool
  51
  52 config GENERIC_GPIO
  53         bool
  54
  55 config ARCH_USES_GETTIMEOFFSET
  56         bool
  57         default n
  58
  59 config GENERIC_CLOCKEVENTS
  60         bool
  61
  62 config GENERIC_CLOCKEVENTS_BROADCAST
  63         bool
  64         depends on GENERIC_CLOCKEVENTS
  65         default y if SMP
  66
  67 config KTIME_SCALAR
  68         bool
  69         default y
  70
  71 config HAVE_TCM
  72         bool
  73         select GENERIC_ALLOCATOR
  74
  75 config HAVE_PROC_CPU
  76         bool
  77
  78 config NO_IOPORT
  79         bool
  80
  81 config EISA
  82         bool
  83         ---help---
  84           The Extended Industry Standard Architecture (EISA) bus was
  85           developed as an open alternative to the IBM MicroChannel bus.
  86
  87           The EISA bus provided some of the features of the IBM MicroChannel
  88           bus while maintaining backward compatibility with cards made for
  89           the older ISA bus.  The EISA bus saw limited use between 1988 and
  90           1995 when it was made obsolete by the PCI bus.
  91
  92           Say Y here if you are building a kernel for an EISA-based machine.
  93
  94           Otherwise, say N.
  95
  96 config SBUS
  97         bool
  98
  99 config MCA
 100         bool
 101         help
 102           MicroChannel Architecture is found in some IBM PS/2 machines and
 103           laptops.  It is a bus system similar to PCI or ISA. See
 104           <file:Documentation/mca.txt> (and especially the web page given
 105           there) before attempting to build an MCA bus kernel.
 106
 107 config STACKTRACE_SUPPORT
 108         bool
 109         default y
 110
 111 config HAVE_LATENCYTOP_SUPPORT
 112         bool
 113         depends on !SMP
 114         default y
 115
 116 config LOCKDEP_SUPPORT
 117         bool
 118         default y
 119
 120 config TRACE_IRQFLAGS_SUPPORT
 121         bool
 122         default y
 123
 124 config HARDIRQS_SW_RESEND
 125         bool
 126         default y
 127
 128 config GENERIC_IRQ_PROBE
 129         bool
 130         default y
 131
 132 config GENERIC_LOCKBREAK
 133         bool
 134         default y
 135         depends on SMP && PREEMPT
 136
 137 config RWSEM_GENERIC_SPINLOCK
 138         bool
 139         default y
 140
 141 config RWSEM_XCHGADD_ALGORITHM
 142         bool
 143
 144 config ARCH_HAS_ILOG2_U32
 145         bool
 146
 147 config ARCH_HAS_ILOG2_U64
 148         bool
 149
 150 config ARCH_HAS_CPUFREQ
 151         bool
 152         help
 153           Internal node to signify that the ARCH has CPUFREQ support
 154           and that the relevant menu configurations are displayed for
 155           it.
 156
 157 config ARCH_HAS_CPU_IDLE_WAIT
 158        def_bool y
 159
 160 config GENERIC_HWEIGHT
 161         bool
 162         default y
 163
 164 config GENERIC_CALIBRATE_DELAY
 165         bool
 166         default y
 167
 168 config ARCH_MAY_HAVE_PC_FDC
 169         bool
 170
 171 config ZONE_DMA
 172         bool
 173
 174 config NEED_DMA_MAP_STATE
 175        def_bool y
 176
 177 config GENERIC_ISA_DMA
 178         bool
 179
 180 config FIQ
 181         bool
 182
 183 config ARCH_MTD_XIP
 184         bool
 185
 186 config VECTORS_BASE
 187         hex
 188         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 189         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 190         default 0x00000000
 191         help
 192           The base address of exception vectors.
 193
 194 config ARM_PATCH_PHYS_VIRT
 195         bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
 196         depends on EXPERIMENTAL
 197         depends on !XIP_KERNEL && MMU
 198         depends on !ARCH_REALVIEW || !SPARSEMEM
 199         help
 200           Patch phys-to-virt translation functions at runtime according to
 201           the position of the kernel in system memory.
 202
 203           This can only be used with non-XIP with MMU kernels where
 204           the base of physical memory is at a 16MB boundary.
 205
 206 config ARM_PATCH_PHYS_VIRT_16BIT
 207         def_bool y
 208         depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
 209
 210 source "init/Kconfig"
 211
 212 source "kernel/Kconfig.freezer"
 213
 214 menu "System Type"
 215
 216 config MMU
 217         bool "MMU-based Paged Memory Management Support"
 218         default y
 219         help
 220           Select if you want MMU-based virtualised addressing space
 221           support by paged memory management. If unsure, say 'Y'.
 222
 223 #
 224 # The "ARM system type" choice list is ordered alphabetically by option
 225 # text.  Please add new entries in the option alphabetic order.
 226 #
 227 choice
 228         prompt "ARM system type"
 229         default ARCH_VERSATILE
 230
 231 config ARCH_INTEGRATOR
 232         bool "ARM Ltd. Integrator family"
 233         select ARM_AMBA
 234         select ARCH_HAS_CPUFREQ
 235         select CLKDEV_LOOKUP
 236         select ICST
 237         select GENERIC_CLOCKEVENTS
 238         select PLAT_VERSATILE
 239         select PLAT_VERSATILE_FPGA_IRQ
 240         help
 241           Support for ARM's Integrator platform.
 242
 243 config ARCH_REALVIEW
 244         bool "ARM Ltd. RealView family"
 245         select ARM_AMBA
 246         select CLKDEV_LOOKUP
 247         select ICST
 248         select GENERIC_CLOCKEVENTS
 249         select ARCH_WANT_OPTIONAL_GPIOLIB
 250         select PLAT_VERSATILE
 251         select PLAT_VERSATILE_CLCD
 252         select ARM_TIMER_SP804
 253         select GPIO_PL061 if GPIOLIB
 254         help
 255           This enables support for ARM Ltd RealView boards.
 256
 257 config ARCH_VERSATILE
 258         bool "ARM Ltd. Versatile family"
 259         select ARM_AMBA
 260         select ARM_VIC
 261         select CLKDEV_LOOKUP
 262         select ICST
 263         select GENERIC_CLOCKEVENTS
 264         select ARCH_WANT_OPTIONAL_GPIOLIB
 265         select PLAT_VERSATILE
 266         select PLAT_VERSATILE_CLCD
 267         select PLAT_VERSATILE_FPGA_IRQ
 268         select ARM_TIMER_SP804
 269         help
 270           This enables support for ARM Ltd Versatile board.
 271
 272 config ARCH_VEXPRESS
 273         bool "ARM Ltd. Versatile Express family"
 274         select ARCH_WANT_OPTIONAL_GPIOLIB
 275         select ARM_AMBA
 276         select ARM_TIMER_SP804
 277         select CLKDEV_LOOKUP
 278         select GENERIC_CLOCKEVENTS
 279         select HAVE_CLK
 280         select HAVE_PATA_PLATFORM
 281         select ICST
 282         select PLAT_VERSATILE
 283         select PLAT_VERSATILE_CLCD
 284         help
 285           This enables support for the ARM Ltd Versatile Express boards.
 286
 287 config ARCH_AT91
 288         bool "Atmel AT91"
 289         select ARCH_REQUIRE_GPIOLIB
 290         select HAVE_CLK
 291         help
 292           This enables support for systems based on the Atmel AT91RM9200,
 293           AT91SAM9 and AT91CAP9 processors.
 294
 295 config ARCH_BCMRING
 296         bool "Broadcom BCMRING"
 297         depends on MMU
 298         select CPU_V6
 299         select ARM_AMBA
 300         select CLKDEV_LOOKUP
 301         select GENERIC_CLOCKEVENTS
 302         select ARCH_WANT_OPTIONAL_GPIOLIB
 303         help
 304           Support for Broadcom's BCMRing platform.
 305
 306 config ARCH_CLPS711X
 307         bool "Cirrus Logic CLPS711x/EP721x-based"
 308         select CPU_ARM720T
 309         select ARCH_USES_GETTIMEOFFSET
 310         help
 311           Support for Cirrus Logic 711x/721x based boards.
 312
 313 config ARCH_CNS3XXX
 314         bool "Cavium Networks CNS3XXX family"
 315         select CPU_V6
 316         select GENERIC_CLOCKEVENTS
 317         select ARM_GIC
 318         select MIGHT_HAVE_PCI
 319         select PCI_DOMAINS if PCI
 320         help
 321           Support for Cavium Networks CNS3XXX platform.
 322
 323 config ARCH_GEMINI
 324         bool "Cortina Systems Gemini"
 325         select CPU_FA526
 326         select ARCH_REQUIRE_GPIOLIB
 327         select ARCH_USES_GETTIMEOFFSET
 328         help
 329           Support for the Cortina Systems Gemini family SoCs
 330
 331 config ARCH_EBSA110
 332         bool "EBSA-110"
 333         select CPU_SA110
 334         select ISA
 335         select NO_IOPORT
 336         select ARCH_USES_GETTIMEOFFSET
 337         help
 338           This is an evaluation board for the StrongARM processor available
 339           from Digital. It has limited hardware on-board, including an
 340           Ethernet interface, two PCMCIA sockets, two serial ports and a
 341           parallel port.
 342
 343 config ARCH_EP93XX
 344         bool "EP93xx-based"
 345         select CPU_ARM920T
 346         select ARM_AMBA
 347         select ARM_VIC
 348         select CLKDEV_LOOKUP
 349         select ARCH_REQUIRE_GPIOLIB
 350         select ARCH_HAS_HOLES_MEMORYMODEL
 351         select ARCH_USES_GETTIMEOFFSET
 352         help
 353           This enables support for the Cirrus EP93xx series of CPUs.
 354
 355 config ARCH_FOOTBRIDGE
 356         bool "FootBridge"
 357         select CPU_SA110
 358         select FOOTBRIDGE
 359         select GENERIC_CLOCKEVENTS
 360         help
 361           Support for systems based on the DC21285 companion chip
 362           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 363
 364 config ARCH_MXC
 365         bool "Freescale MXC/iMX-based"
 366         select GENERIC_CLOCKEVENTS
 367         select ARCH_REQUIRE_GPIOLIB
 368         select CLKDEV_LOOKUP
 369         select CLKSRC_MMIO
 370         select HAVE_SCHED_CLOCK
 371         help
 372           Support for Freescale MXC/iMX-based family of processors
 373
 374 config ARCH_MXS
 375         bool "Freescale MXS-based"
 376         select GENERIC_CLOCKEVENTS
 377         select ARCH_REQUIRE_GPIOLIB
 378         select CLKDEV_LOOKUP
 379         help
 380           Support for Freescale MXS-based family of processors
 381
 382 config ARCH_STMP3XXX
 383         bool "Freescale STMP3xxx"
 384         select CPU_ARM926T
 385         select CLKDEV_LOOKUP
 386         select ARCH_REQUIRE_GPIOLIB
 387         select GENERIC_CLOCKEVENTS
 388         select USB_ARCH_HAS_EHCI
 389         help
 390           Support for systems based on the Freescale 3xxx CPUs.
 391
 392 config ARCH_NETX
 393         bool "Hilscher NetX based"
 394         select CLKSRC_MMIO
 395         select CPU_ARM926T
 396         select ARM_VIC
 397         select GENERIC_CLOCKEVENTS
 398         help
 399           This enables support for systems based on the Hilscher NetX Soc
 400
 401 config ARCH_H720X
 402         bool "Hynix HMS720x-based"
 403         select CPU_ARM720T
 404         select ISA_DMA_API
 405         select ARCH_USES_GETTIMEOFFSET
 406         help
 407           This enables support for systems based on the Hynix HMS720x
 408
 409 config ARCH_IOP13XX
 410         bool "IOP13xx-based"
 411         depends on MMU
 412         select CPU_XSC3
 413         select PLAT_IOP
 414         select PCI
 415         select ARCH_SUPPORTS_MSI
 416         select VMSPLIT_1G
 417         help
 418           Support for Intel's IOP13XX (XScale) family of processors.
 419
 420 config ARCH_IOP32X
 421         bool "IOP32x-based"
 422         depends on MMU
 423         select CPU_XSCALE
 424         select PLAT_IOP
 425         select PCI
 426         select ARCH_REQUIRE_GPIOLIB
 427         help
 428           Support for Intel's 80219 and IOP32X (XScale) family of
 429           processors.
 430
 431 config ARCH_IOP33X
 432         bool "IOP33x-based"
 433         depends on MMU
 434         select CPU_XSCALE
 435         select PLAT_IOP
 436         select PCI
 437         select ARCH_REQUIRE_GPIOLIB
 438         help
 439           Support for Intel's IOP33X (XScale) family of processors.
 440
 441 config ARCH_IXP23XX
 442         bool "IXP23XX-based"
 443         depends on MMU
 444         select CPU_XSC3
 445         select PCI
 446         select ARCH_USES_GETTIMEOFFSET
 447         help
 448           Support for Intel's IXP23xx (XScale) family of processors.
 449
 450 config ARCH_IXP2000
 451         bool "IXP2400/2800-based"
 452         depends on MMU
 453         select CPU_XSCALE
 454         select PCI
 455         select ARCH_USES_GETTIMEOFFSET
 456         help
 457           Support for Intel's IXP2400/2800 (XScale) family of processors.
 458
 459 config ARCH_IXP4XX
 460         bool "IXP4xx-based"
 461         depends on MMU
 462         select CLKSRC_MMIO
 463         select CPU_XSCALE
 464         select GENERIC_GPIO
 465         select GENERIC_CLOCKEVENTS
 466         select HAVE_SCHED_CLOCK
 467         select MIGHT_HAVE_PCI
 468         select DMABOUNCE if PCI
 469         help
 470           Support for Intel's IXP4XX (XScale) family of processors.
 471
 472 config ARCH_DOVE
 473         bool "Marvell Dove"
 474         select CPU_V6K
 475         select PCI
 476         select ARCH_REQUIRE_GPIOLIB
 477         select GENERIC_CLOCKEVENTS
 478         select PLAT_ORION
 479         help
 480           Support for the Marvell Dove SoC 88AP510
 481
 482 config ARCH_KIRKWOOD
 483         bool "Marvell Kirkwood"
 484         select CPU_FEROCEON
 485         select PCI
 486         select ARCH_REQUIRE_GPIOLIB
 487         select GENERIC_CLOCKEVENTS
 488         select PLAT_ORION
 489         help
 490           Support for the following Marvell Kirkwood series SoCs:
 491           88F6180, 88F6192 and 88F6281.
 492
 493 config ARCH_LOKI
 494         bool "Marvell Loki (88RC8480)"
 495         select CPU_FEROCEON
 496         select GENERIC_CLOCKEVENTS
 497         select PLAT_ORION
 498         help
 499           Support for the Marvell Loki (88RC8480) SoC.
 500
 501 config ARCH_LPC32XX
 502         bool "NXP LPC32XX"
 503         select CLKSRC_MMIO
 504         select CPU_ARM926T
 505         select ARCH_REQUIRE_GPIOLIB
 506         select HAVE_IDE
 507         select ARM_AMBA
 508         select USB_ARCH_HAS_OHCI
 509         select CLKDEV_LOOKUP
 510         select GENERIC_TIME
 511         select GENERIC_CLOCKEVENTS
 512         help
 513           Support for the NXP LPC32XX family of processors
 514
 515 config ARCH_MV78XX0
 516         bool "Marvell MV78xx0"
 517         select CPU_FEROCEON
 518         select PCI
 519         select ARCH_REQUIRE_GPIOLIB
 520         select GENERIC_CLOCKEVENTS
 521         select PLAT_ORION
 522         help
 523           Support for the following Marvell MV78xx0 series SoCs:
 524           MV781x0, MV782x0.
 525
 526 config ARCH_ORION5X
 527         bool "Marvell Orion"
 528         depends on MMU
 529         select CPU_FEROCEON
 530         select PCI
 531         select ARCH_REQUIRE_GPIOLIB
 532         select GENERIC_CLOCKEVENTS
 533         select PLAT_ORION
 534         help
 535           Support for the following Marvell Orion 5x series SoCs:
 536           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 537           Orion-2 (5281), Orion-1-90 (6183).
 538
 539 config ARCH_MMP
 540         bool "Marvell PXA168/910/MMP2"
 541         depends on MMU
 542         select ARCH_REQUIRE_GPIOLIB
 543         select CLKDEV_LOOKUP
 544         select GENERIC_CLOCKEVENTS
 545         select HAVE_SCHED_CLOCK
 546         select TICK_ONESHOT
 547         select PLAT_PXA
 548         select SPARSE_IRQ
 549         help
 550           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 551
 552 config ARCH_KS8695
 553         bool "Micrel/Kendin KS8695"
 554         select CPU_ARM922T
 555         select ARCH_REQUIRE_GPIOLIB
 556         select ARCH_USES_GETTIMEOFFSET
 557         help
 558           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 559           System-on-Chip devices.
 560
 561 config ARCH_NS9XXX
 562         bool "NetSilicon NS9xxx"
 563         select CPU_ARM926T
 564         select GENERIC_GPIO
 565         select GENERIC_CLOCKEVENTS
 566         select HAVE_CLK
 567         help
 568           Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
 569           System.
 570
 571           <http://www.digi.com/products/microprocessors/index.jsp>
 572
 573 config ARCH_W90X900
 574         bool "Nuvoton W90X900 CPU"
 575         select CPU_ARM926T
 576         select ARCH_REQUIRE_GPIOLIB
 577         select CLKDEV_LOOKUP
 578         select GENERIC_CLOCKEVENTS
 579         help
 580           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 581           At present, the w90x900 has been renamed nuc900, regarding
 582           the ARM series product line, you can login the following
 583           link address to know more.
 584
 585           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 586                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 587
 588 config ARCH_NUC93X
 589         bool "Nuvoton NUC93X CPU"
 590         select CPU_ARM926T
 591         select CLKDEV_LOOKUP
 592         help
 593           Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
 594           low-power and high performance MPEG-4/JPEG multimedia controller chip.
 595
 596 config ARCH_TEGRA
 597         bool "NVIDIA Tegra"
 598         select CLKDEV_LOOKUP
 599         select CLKSRC_MMIO
 600         select GENERIC_TIME
 601         select GENERIC_CLOCKEVENTS
 602         select GENERIC_GPIO
 603         select HAVE_CLK
 604         select HAVE_SCHED_CLOCK
 605         select ARCH_HAS_BARRIERS if CACHE_L2X0
 606         select ARCH_HAS_CPUFREQ
 607         help
 608           This enables support for NVIDIA Tegra based systems (Tegra APX,
 609           Tegra 6xx and Tegra 2 series).
 610
 611 config ARCH_PNX4008
 612         bool "Philips Nexperia PNX4008 Mobile"
 613         select CPU_ARM926T
 614         select CLKDEV_LOOKUP
 615         select ARCH_USES_GETTIMEOFFSET
 616         help
 617           This enables support for Philips PNX4008 mobile platform.
 618
 619 config ARCH_PXA
 620         bool "PXA2xx/PXA3xx-based"
 621         depends on MMU
 622         select ARCH_MTD_XIP
 623         select ARCH_HAS_CPUFREQ
 624         select CLKDEV_LOOKUP
 625         select CLKSRC_MMIO
 626         select ARCH_REQUIRE_GPIOLIB
 627         select GENERIC_CLOCKEVENTS
 628         select HAVE_SCHED_CLOCK
 629         select TICK_ONESHOT
 630         select PLAT_PXA
 631         select SPARSE_IRQ
 632         help
 633           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 634
 635 config ARCH_MSM
 636         bool "Qualcomm MSM"
 637         select HAVE_CLK
 638         select GENERIC_CLOCKEVENTS
 639         select ARCH_REQUIRE_GPIOLIB
 640         select CLKDEV_LOOKUP
 641         help
 642           Support for Qualcomm MSM/QSD based systems.  This runs on the
 643           apps processor of the MSM/QSD and depends on a shared memory
 644           interface to the modem processor which runs the baseband
 645           stack and controls some vital subsystems
 646           (clock and power control, etc).
 647
 648 config ARCH_SHMOBILE
 649         bool "Renesas SH-Mobile / R-Mobile"
 650         select HAVE_CLK
 651         select CLKDEV_LOOKUP
 652         select GENERIC_CLOCKEVENTS
 653         select NO_IOPORT
 654         select SPARSE_IRQ
 655         select MULTI_IRQ_HANDLER
 656         help
 657           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 658
 659 config ARCH_RPC
 660         bool "RiscPC"
 661         select ARCH_ACORN
 662         select FIQ
 663         select TIMER_ACORN
 664         select ARCH_MAY_HAVE_PC_FDC
 665         select HAVE_PATA_PLATFORM
 666         select ISA_DMA_API
 667         select NO_IOPORT
 668         select ARCH_SPARSEMEM_ENABLE
 669         select ARCH_USES_GETTIMEOFFSET
 670         help
 671           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 672           CD-ROM interface, serial and parallel port, and the floppy drive.
 673
 674 config ARCH_SA1100
 675         bool "SA1100-based"
 676         select CLKSRC_MMIO
 677         select CPU_SA1100
 678         select ISA
 679         select ARCH_SPARSEMEM_ENABLE
 680         select ARCH_MTD_XIP
 681         select ARCH_HAS_CPUFREQ
 682         select CPU_FREQ
 683         select GENERIC_CLOCKEVENTS
 684         select HAVE_CLK
 685         select HAVE_SCHED_CLOCK
 686         select TICK_ONESHOT
 687         select ARCH_REQUIRE_GPIOLIB
 688         help
 689           Support for StrongARM 11x0 based boards.
 690
 691 config ARCH_S3C2410
 692         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 693         select GENERIC_GPIO
 694         select ARCH_HAS_CPUFREQ
 695         select HAVE_CLK
 696         select ARCH_USES_GETTIMEOFFSET
 697         select HAVE_S3C2410_I2C if I2C
 698         help
 699           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 700           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 701           the Samsung SMDK2410 development board (and derivatives).
 702
 703           Note, the S3C2416 and the S3C2450 are so close that they even share
 704           the same SoC ID code. This means that there is no separate machine
 705           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 706
 707 config ARCH_S3C64XX
 708         bool "Samsung S3C64XX"
 709         select PLAT_SAMSUNG
 710         select CPU_V6
 711         select ARM_VIC
 712         select HAVE_CLK
 713         select NO_IOPORT
 714         select ARCH_USES_GETTIMEOFFSET
 715         select ARCH_HAS_CPUFREQ
 716         select ARCH_REQUIRE_GPIOLIB
 717         select SAMSUNG_CLKSRC
 718         select SAMSUNG_IRQ_VIC_TIMER
 719         select SAMSUNG_IRQ_UART
 720         select S3C_GPIO_TRACK
 721         select S3C_GPIO_PULL_UPDOWN
 722         select S3C_GPIO_CFG_S3C24XX
 723         select S3C_GPIO_CFG_S3C64XX
 724         select S3C_DEV_NAND
 725         select USB_ARCH_HAS_OHCI
 726         select SAMSUNG_GPIOLIB_4BIT
 727         select HAVE_S3C2410_I2C if I2C
 728         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 729         help
 730           Samsung S3C64XX series based systems
 731
 732 config ARCH_S5P64X0
 733         bool "Samsung S5P6440 S5P6450"
 734         select CPU_V6
 735         select GENERIC_GPIO
 736         select HAVE_CLK
 737         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 738         select GENERIC_CLOCKEVENTS
 739         select HAVE_SCHED_CLOCK
 740         select HAVE_S3C2410_I2C if I2C
 741         select HAVE_S3C_RTC if RTC_CLASS
 742         help
 743           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 744           SMDK6450.
 745
 746 config ARCH_S5P6442
 747         bool "Samsung S5P6442"
 748         select CPU_V6
 749         select GENERIC_GPIO
 750         select HAVE_CLK
 751         select ARCH_USES_GETTIMEOFFSET
 752         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 753         help
 754           Samsung S5P6442 CPU based systems
 755
 756 config ARCH_S5PC100
 757         bool "Samsung S5PC100"
 758         select GENERIC_GPIO
 759         select HAVE_CLK
 760         select CPU_V7
 761         select ARM_L1_CACHE_SHIFT_6
 762         select ARCH_USES_GETTIMEOFFSET
 763         select HAVE_S3C2410_I2C if I2C
 764         select HAVE_S3C_RTC if RTC_CLASS
 765         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 766         help
 767           Samsung S5PC100 series based systems
 768
 769 config ARCH_S5PV210
 770         bool "Samsung S5PV210/S5PC110"
 771         select CPU_V7
 772         select ARCH_SPARSEMEM_ENABLE
 773         select GENERIC_GPIO
 774         select HAVE_CLK
 775         select ARM_L1_CACHE_SHIFT_6
 776         select ARCH_HAS_CPUFREQ
 777         select GENERIC_CLOCKEVENTS
 778         select HAVE_SCHED_CLOCK
 779         select HAVE_S3C2410_I2C if I2C
 780         select HAVE_S3C_RTC if RTC_CLASS
 781         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 782         help
 783           Samsung S5PV210/S5PC110 series based systems
 784
 785 config ARCH_EXYNOS4
 786         bool "Samsung EXYNOS4"
 787         select CPU_V7
 788         select ARCH_SPARSEMEM_ENABLE
 789         select GENERIC_GPIO
 790         select HAVE_CLK
 791         select ARCH_HAS_CPUFREQ
 792         select GENERIC_CLOCKEVENTS
 793         select HAVE_S3C_RTC if RTC_CLASS
 794         select HAVE_S3C2410_I2C if I2C
 795         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 796         help
 797           Samsung EXYNOS4 series based systems
 798
 799 config ARCH_SHARK
 800         bool "Shark"
 801         select CPU_SA110
 802         select ISA
 803         select ISA_DMA
 804         select ZONE_DMA
 805         select PCI
 806         select ARCH_USES_GETTIMEOFFSET
 807         help
 808           Support for the StrongARM based Digital DNARD machine, also known
 809           as "Shark" (<http://www.shark-linux.de/shark.html>).
 810
 811 config ARCH_TCC_926
 812         bool "Telechips TCC ARM926-based systems"
 813         select CLKSRC_MMIO
 814         select CPU_ARM926T
 815         select HAVE_CLK
 816         select CLKDEV_LOOKUP
 817         select GENERIC_CLOCKEVENTS
 818         help
 819           Support for Telechips TCC ARM926-based systems.
 820
 821 config ARCH_U300
 822         bool "ST-Ericsson U300 Series"
 823         depends on MMU
 824         select CLKSRC_MMIO
 825         select CPU_ARM926T
 826         select HAVE_SCHED_CLOCK
 827         select HAVE_TCM
 828         select ARM_AMBA
 829         select ARM_VIC
 830         select GENERIC_CLOCKEVENTS
 831         select CLKDEV_LOOKUP
 832         select GENERIC_GPIO
 833         help
 834           Support for ST-Ericsson U300 series mobile platforms.
 835
 836 config ARCH_U8500
 837         bool "ST-Ericsson U8500 Series"
 838         select CPU_V7
 839         select ARM_AMBA
 840         select GENERIC_CLOCKEVENTS
 841         select CLKDEV_LOOKUP
 842         select ARCH_REQUIRE_GPIOLIB
 843         select ARCH_HAS_CPUFREQ
 844         help
 845           Support for ST-Ericsson's Ux500 architecture
 846
 847 config ARCH_NOMADIK
 848         bool "STMicroelectronics Nomadik"
 849         select ARM_AMBA
 850         select ARM_VIC
 851         select CPU_ARM926T
 852         select CLKDEV_LOOKUP
 853         select GENERIC_CLOCKEVENTS
 854         select ARCH_REQUIRE_GPIOLIB
 855         help
 856           Support for the Nomadik platform by ST-Ericsson
 857
 858 config ARCH_DAVINCI
 859         bool "TI DaVinci"
 860         select GENERIC_CLOCKEVENTS
 861         select ARCH_REQUIRE_GPIOLIB
 862         select ZONE_DMA
 863         select HAVE_IDE
 864         select CLKDEV_LOOKUP
 865         select GENERIC_ALLOCATOR
 866         select ARCH_HAS_HOLES_MEMORYMODEL
 867         help
 868           Support for TI's DaVinci platform.
 869
 870 config ARCH_OMAP
 871         bool "TI OMAP"
 872         select HAVE_CLK
 873         select ARCH_REQUIRE_GPIOLIB
 874         select ARCH_HAS_CPUFREQ
 875         select GENERIC_CLOCKEVENTS
 876         select HAVE_SCHED_CLOCK
 877         select ARCH_HAS_HOLES_MEMORYMODEL
 878         help
 879           Support for TI's OMAP platform (OMAP1/2/3/4).
 880
 881 config PLAT_SPEAR
 882         bool "ST SPEAr"
 883         select ARM_AMBA
 884         select ARCH_REQUIRE_GPIOLIB
 885         select CLKDEV_LOOKUP
 886         select GENERIC_CLOCKEVENTS
 887         select HAVE_CLK
 888         help
 889           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 890
 891 config ARCH_VT8500
 892         bool "VIA/WonderMedia 85xx"
 893         select CPU_ARM926T
 894         select GENERIC_GPIO
 895         select ARCH_HAS_CPUFREQ
 896         select GENERIC_CLOCKEVENTS
 897         select ARCH_REQUIRE_GPIOLIB
 898         select HAVE_PWM
 899         help
 900           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 901 endchoice
 902
 903 #
 904 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 905 # Kconfigs may be included either alphabetically (according to the
 906 # plat- suffix) or along side the corresponding mach-* source.
 907 #
 908 source "arch/arm/mach-at91/Kconfig"
 909
 910 source "arch/arm/mach-bcmring/Kconfig"
 911
 912 source "arch/arm/mach-clps711x/Kconfig"
 913
 914 source "arch/arm/mach-cns3xxx/Kconfig"
 915
 916 source "arch/arm/mach-davinci/Kconfig"
 917
 918 source "arch/arm/mach-dove/Kconfig"
 919
 920 source "arch/arm/mach-ep93xx/Kconfig"
 921
 922 source "arch/arm/mach-footbridge/Kconfig"
 923
 924 source "arch/arm/mach-gemini/Kconfig"
 925
 926 source "arch/arm/mach-h720x/Kconfig"
 927
 928 source "arch/arm/mach-integrator/Kconfig"
 929
 930 source "arch/arm/mach-iop32x/Kconfig"
 931
 932 source "arch/arm/mach-iop33x/Kconfig"
 933
 934 source "arch/arm/mach-iop13xx/Kconfig"
 935
 936 source "arch/arm/mach-ixp4xx/Kconfig"
 937
 938 source "arch/arm/mach-ixp2000/Kconfig"
 939
 940 source "arch/arm/mach-ixp23xx/Kconfig"
 941
 942 source "arch/arm/mach-kirkwood/Kconfig"
 943
 944 source "arch/arm/mach-ks8695/Kconfig"
 945
 946 source "arch/arm/mach-loki/Kconfig"
 947
 948 source "arch/arm/mach-lpc32xx/Kconfig"
 949
 950 source "arch/arm/mach-msm/Kconfig"
 951
 952 source "arch/arm/mach-mv78xx0/Kconfig"
 953
 954 source "arch/arm/plat-mxc/Kconfig"
 955
 956 source "arch/arm/mach-mxs/Kconfig"
 957
 958 source "arch/arm/mach-netx/Kconfig"
 959
 960 source "arch/arm/mach-nomadik/Kconfig"
 961 source "arch/arm/plat-nomadik/Kconfig"
 962
 963 source "arch/arm/mach-ns9xxx/Kconfig"
 964
 965 source "arch/arm/mach-nuc93x/Kconfig"
 966
 967 source "arch/arm/plat-omap/Kconfig"
 968
 969 source "arch/arm/mach-omap1/Kconfig"
 970
 971 source "arch/arm/mach-omap2/Kconfig"
 972
 973 source "arch/arm/mach-orion5x/Kconfig"
 974
 975 source "arch/arm/mach-pxa/Kconfig"
 976 source "arch/arm/plat-pxa/Kconfig"
 977
 978 source "arch/arm/mach-mmp/Kconfig"
 979
 980 source "arch/arm/mach-realview/Kconfig"
 981
 982 source "arch/arm/mach-sa1100/Kconfig"
 983
 984 source "arch/arm/plat-samsung/Kconfig"
 985 source "arch/arm/plat-s3c24xx/Kconfig"
 986 source "arch/arm/plat-s5p/Kconfig"
 987
 988 source "arch/arm/plat-spear/Kconfig"
 989
 990 source "arch/arm/plat-tcc/Kconfig"
 991
 992 if ARCH_S3C2410
 993 source "arch/arm/mach-s3c2400/Kconfig"
 994 source "arch/arm/mach-s3c2410/Kconfig"
 995 source "arch/arm/mach-s3c2412/Kconfig"
 996 source "arch/arm/mach-s3c2416/Kconfig"
 997 source "arch/arm/mach-s3c2440/Kconfig"
 998 source "arch/arm/mach-s3c2443/Kconfig"
 999 endif
1000
1001 if ARCH_S3C64XX
1002 source "arch/arm/mach-s3c64xx/Kconfig"
1003 endif
1004
1005 source "arch/arm/mach-s5p64x0/Kconfig"
1006
1007 source "arch/arm/mach-s5p6442/Kconfig"
1008
1009 source "arch/arm/mach-s5pc100/Kconfig"
1010
1011 source "arch/arm/mach-s5pv210/Kconfig"
1012
1013 source "arch/arm/mach-exynos4/Kconfig"
1014
1015 source "arch/arm/mach-shmobile/Kconfig"
1016
1017 source "arch/arm/plat-stmp3xxx/Kconfig"
1018
1019 source "arch/arm/mach-tegra/Kconfig"
1020
1021 source "arch/arm/mach-u300/Kconfig"
1022
1023 source "arch/arm/mach-ux500/Kconfig"
1024
1025 source "arch/arm/mach-versatile/Kconfig"
1026
1027 source "arch/arm/mach-vexpress/Kconfig"
1028 source "arch/arm/plat-versatile/Kconfig"
1029
1030 source "arch/arm/mach-vt8500/Kconfig"
1031
1032 source "arch/arm/mach-w90x900/Kconfig"
1033
1034 # Definitions to make life easier
1035 config ARCH_ACORN
1036         bool
1037
1038 config PLAT_IOP
1039         bool
1040         select GENERIC_CLOCKEVENTS
1041         select HAVE_SCHED_CLOCK
1042
1043 config PLAT_ORION
1044         bool
1045         select CLKSRC_MMIO
1046         select HAVE_SCHED_CLOCK
1047
1048 config PLAT_PXA
1049         bool
1050
1051 config PLAT_VERSATILE
1052         bool
1053
1054 config ARM_TIMER_SP804
1055         bool
1056         select CLKSRC_MMIO
1057
1058 source arch/arm/mm/Kconfig
1059
1060 config IWMMXT
1061         bool "Enable iWMMXt support"
1062         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1063         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1064         help
1065           Enable support for iWMMXt context switching at run time if
1066           running on a CPU that supports it.
1067
1068 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1069 config XSCALE_PMU
1070         bool
1071         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1072         default y
1073
1074 config CPU_HAS_PMU
1075         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1076                    (!ARCH_OMAP3 || OMAP3_EMU)
1077         default y
1078         bool
1079
1080 config MULTI_IRQ_HANDLER
1081         bool
1082         help
1083           Allow each machine to specify it's own IRQ handler at run time.
1084
1085 if !MMU
1086 source "arch/arm/Kconfig-nommu"
1087 endif
1088
1089 config ARM_ERRATA_411920
1090         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1091         depends on CPU_V6 || CPU_V6K
1092         help
1093           Invalidation of the Instruction Cache operation can
1094           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1095           It does not affect the MPCore. This option enables the ARM Ltd.
1096           recommended workaround.
1097
1098 config ARM_ERRATA_430973
1099         bool "ARM errata: Stale prediction on replaced interworking branch"
1100         depends on CPU_V7
1101         help
1102           This option enables the workaround for the 430973 Cortex-A8
1103           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1104           interworking branch is replaced with another code sequence at the
1105           same virtual address, whether due to self-modifying code or virtual
1106           to physical address re-mapping, Cortex-A8 does not recover from the
1107           stale interworking branch prediction. This results in Cortex-A8
1108           executing the new code sequence in the incorrect ARM or Thumb state.
1109           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1110           and also flushes the branch target cache at every context switch.
1111           Note that setting specific bits in the ACTLR register may not be
1112           available in non-secure mode.
1113
1114 config ARM_ERRATA_458693
1115         bool "ARM errata: Processor deadlock when a false hazard is created"
1116         depends on CPU_V7
1117         help
1118           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1119           erratum. For very specific sequences of memory operations, it is
1120           possible for a hazard condition intended for a cache line to instead
1121           be incorrectly associated with a different cache line. This false
1122           hazard might then cause a processor deadlock. The workaround enables
1123           the L1 caching of the NEON accesses and disables the PLD instruction
1124           in the ACTLR register. Note that setting specific bits in the ACTLR
1125           register may not be available in non-secure mode.
1126
1127 config ARM_ERRATA_460075
1128         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1129         depends on CPU_V7
1130         help
1131           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1132           erratum. Any asynchronous access to the L2 cache may encounter a
1133           situation in which recent store transactions to the L2 cache are lost
1134           and overwritten with stale memory contents from external memory. The
1135           workaround disables the write-allocate mode for the L2 cache via the
1136           ACTLR register. Note that setting specific bits in the ACTLR register
1137           may not be available in non-secure mode.
1138
1139 config ARM_ERRATA_742230
1140         bool "ARM errata: DMB operation may be faulty"
1141         depends on CPU_V7 && SMP
1142         help
1143           This option enables the workaround for the 742230 Cortex-A9
1144           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1145           between two write operations may not ensure the correct visibility
1146           ordering of the two writes. This workaround sets a specific bit in
1147           the diagnostic register of the Cortex-A9 which causes the DMB
1148           instruction to behave as a DSB, ensuring the correct behaviour of
1149           the two writes.
1150
1151 config ARM_ERRATA_742231
1152         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1153         depends on CPU_V7 && SMP
1154         help
1155           This option enables the workaround for the 742231 Cortex-A9
1156           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1157           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1158           accessing some data located in the same cache line, may get corrupted
1159           data due to bad handling of the address hazard when the line gets
1160           replaced from one of the CPUs at the same time as another CPU is
1161           accessing it. This workaround sets specific bits in the diagnostic
1162           register of the Cortex-A9 which reduces the linefill issuing
1163           capabilities of the processor.
1164
1165 config PL310_ERRATA_588369
1166         bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1167         depends on CACHE_L2X0
1168         help
1169            The PL310 L2 cache controller implements three types of Clean &
1170            Invalidate maintenance operations: by Physical Address
1171            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1172            They are architecturally defined to behave as the execution of a
1173            clean operation followed immediately by an invalidate operation,
1174            both performing to the same memory location. This functionality
1175            is not correctly implemented in PL310 as clean lines are not
1176            invalidated as a result of these operations.
1177
1178 config ARM_ERRATA_720789
1179         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1180         depends on CPU_V7 && SMP
1181         help
1182           This option enables the workaround for the 720789 Cortex-A9 (prior to
1183           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1184           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1185           As a consequence of this erratum, some TLB entries which should be
1186           invalidated are not, resulting in an incoherency in the system page
1187           tables. The workaround changes the TLB flushing routines to invalidate
1188           entries regardless of the ASID.
1189
1190 config PL310_ERRATA_727915
1191         bool "Background Clean & Invalidate by Way operation can cause data corruption"
1192         depends on CACHE_L2X0
1193         help
1194           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1195           operation (offset 0x7FC). This operation runs in background so that
1196           PL310 can handle normal accesses while it is in progress. Under very
1197           rare circumstances, due to this erratum, write data can be lost when
1198           PL310 treats a cacheable write transaction during a Clean &
1199           Invalidate by Way operation.
1200
1201 config ARM_ERRATA_743622
1202         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1203         depends on CPU_V7
1204         help
1205           This option enables the workaround for the 743622 Cortex-A9
1206           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1207           optimisation in the Cortex-A9 Store Buffer may lead to data
1208           corruption. This workaround sets a specific bit in the diagnostic
1209           register of the Cortex-A9 which disables the Store Buffer
1210           optimisation, preventing the defect from occurring. This has no
1211           visible impact on the overall performance or power consumption of the
1212           processor.
1213
1214 config ARM_ERRATA_751472
1215         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1216         depends on CPU_V7 && SMP
1217         help
1218           This option enables the workaround for the 751472 Cortex-A9 (prior
1219           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1220           completion of a following broadcasted operation if the second
1221           operation is received by a CPU before the ICIALLUIS has completed,
1222           potentially leading to corrupted entries in the cache or TLB.
1223
1224 config ARM_ERRATA_753970
1225         bool "ARM errata: cache sync operation may be faulty"
1226         depends on CACHE_PL310
1227         help
1228           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1229
1230           Under some condition the effect of cache sync operation on
1231           the store buffer still remains when the operation completes.
1232           This means that the store buffer is always asked to drain and
1233           this prevents it from merging any further writes. The workaround
1234           is to replace the normal offset of cache sync operation (0x730)
1235           by another offset targeting an unmapped PL310 register 0x740.
1236           This has the same effect as the cache sync operation: store buffer
1237           drain and waiting for all buffers empty.
1238
1239 config ARM_ERRATA_754322
1240         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1241         depends on CPU_V7
1242         help
1243           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1244           r3p*) erratum. A speculative memory access may cause a page table walk
1245           which starts prior to an ASID switch but completes afterwards. This
1246           can populate the micro-TLB with a stale entry which may be hit with
1247           the new ASID. This workaround places two dsb instructions in the mm
1248           switching code so that no page table walks can cross the ASID switch.
1249
1250 config ARM_ERRATA_754327
1251         bool "ARM errata: no automatic Store Buffer drain"
1252         depends on CPU_V7 && SMP
1253         help
1254           This option enables the workaround for the 754327 Cortex-A9 (prior to
1255           r2p0) erratum. The Store Buffer does not have any automatic draining
1256           mechanism and therefore a livelock may occur if an external agent
1257           continuously polls a memory location waiting to observe an update.
1258           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1259           written polling loops from denying visibility of updates to memory.
1260
1261 endmenu
1262
1263 source "arch/arm/common/Kconfig"
1264
1265 menu "Bus support"
1266
1267 config ARM_AMBA
1268         bool
1269
1270 config ISA
1271         bool
1272         help
1273           Find out whether you have ISA slots on your motherboard.  ISA is the
1274           name of a bus system, i.e. the way the CPU talks to the other stuff
1275           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1276           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1277           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1278
1279 # Select ISA DMA controller support
1280 config ISA_DMA
1281         bool
1282         select ISA_DMA_API
1283
1284 # Select ISA DMA interface
1285 config ISA_DMA_API
1286         bool
1287
1288 config PCI
1289         bool "PCI support" if MIGHT_HAVE_PCI
1290         help
1291           Find out whether you have a PCI motherboard. PCI is the name of a
1292           bus system, i.e. the way the CPU talks to the other stuff inside
1293           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1294           VESA. If you have PCI, say Y, otherwise N.
1295
1296 config PCI_DOMAINS
1297         bool
1298         depends on PCI
1299
1300 config PCI_NANOENGINE
1301         bool "BSE nanoEngine PCI support"
1302         depends on SA1100_NANOENGINE
1303         help
1304           Enable PCI on the BSE nanoEngine board.
1305
1306 config PCI_SYSCALL
1307         def_bool PCI
1308
1309 # Select the host bridge type
1310 config PCI_HOST_VIA82C505
1311         bool
1312         depends on PCI && ARCH_SHARK
1313         default y
1314
1315 config PCI_HOST_ITE8152
1316         bool
1317         depends on PCI && MACH_ARMCORE
1318         default y
1319         select DMABOUNCE
1320
1321 source "drivers/pci/Kconfig"
1322
1323 source "drivers/pcmcia/Kconfig"
1324
1325 endmenu
1326
1327 menu "Kernel Features"
1328
1329 source "kernel/time/Kconfig"
1330
1331 config SMP
1332         bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1333         depends on EXPERIMENTAL
1334         depends on CPU_V6K || CPU_V7
1335         depends on GENERIC_CLOCKEVENTS
1336         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1337                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1338                  ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1339                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1340         select USE_GENERIC_SMP_HELPERS
1341         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1342         help
1343           This enables support for systems with more than one CPU. If you have
1344           a system with only one CPU, like most personal computers, say N. If
1345           you have a system with more than one CPU, say Y.
1346
1347           If you say N here, the kernel will run on single and multiprocessor
1348           machines, but will use only one CPU of a multiprocessor machine. If
1349           you say Y here, the kernel will run on many, but not all, single
1350           processor machines. On a single processor machine, the kernel will
1351           run faster if you say N here.
1352
1353           See also <file:Documentation/i386/IO-APIC.txt>,
1354           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1355           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1356
1357           If you don't know what to do here, say N.
1358
1359 config SMP_ON_UP
1360         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1361         depends on EXPERIMENTAL
1362         depends on SMP && !XIP_KERNEL
1363         default y
1364         help
1365           SMP kernels contain instructions which fail on non-SMP processors.
1366           Enabling this option allows the kernel to modify itself to make
1367           these instructions safe.  Disabling it allows about 1K of space
1368           savings.
1369
1370           If you don't know what to do here, say Y.
1371
1372 config HAVE_ARM_SCU
1373         bool
1374         depends on SMP
1375         help
1376           This option enables support for the ARM system coherency unit
1377
1378 config HAVE_ARM_TWD
1379         bool
1380         depends on SMP
1381         select TICK_ONESHOT
1382         help
1383           This options enables support for the ARM timer and watchdog unit
1384
1385 choice
1386         prompt "Memory split"
1387         default VMSPLIT_3G
1388         help
1389           Select the desired split between kernel and user memory.
1390
1391           If you are not absolutely sure what you are doing, leave this
1392           option alone!
1393
1394         config VMSPLIT_3G
1395                 bool "3G/1G user/kernel split"
1396         config VMSPLIT_2G
1397                 bool "2G/2G user/kernel split"
1398         config VMSPLIT_1G
1399                 bool "1G/3G user/kernel split"
1400 endchoice
1401
1402 config PAGE_OFFSET
1403         hex
1404         default 0x40000000 if VMSPLIT_1G
1405         default 0x80000000 if VMSPLIT_2G
1406         default 0xC0000000
1407
1408 config NR_CPUS
1409         int "Maximum number of CPUs (2-32)"
1410         range 2 32
1411         depends on SMP
1412         default "4"
1413
1414 config HOTPLUG_CPU
1415         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1416         depends on SMP && HOTPLUG && EXPERIMENTAL
1417         depends on !ARCH_MSM
1418         help
1419           Say Y here to experiment with turning CPUs off and on.  CPUs
1420           can be controlled through /sys/devices/system/cpu.
1421
1422 config LOCAL_TIMERS
1423         bool "Use local timer interrupts"
1424         depends on SMP
1425         default y
1426         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1427         help
1428           Enable support for local timers on SMP platforms, rather then the
1429           legacy IPI broadcast method.  Local timers allows the system
1430           accounting to be spread across the timer interval, preventing a
1431           "thundering herd" at every timer tick.
1432
1433 source kernel/Kconfig.preempt
1434
1435 config HZ
1436         int
1437         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1438                 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_EXYNOS4
1439         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1440         default AT91_TIMER_HZ if ARCH_AT91
1441         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1442         default 100
1443
1444 config THUMB2_KERNEL
1445         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1446         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1447         select AEABI
1448         select ARM_ASM_UNIFIED
1449         help
1450           By enabling this option, the kernel will be compiled in
1451           Thumb-2 mode. A compiler/assembler that understand the unified
1452           ARM-Thumb syntax is needed.
1453
1454           If unsure, say N.
1455
1456 config THUMB2_AVOID_R_ARM_THM_JUMP11
1457         bool "Work around buggy Thumb-2 short branch relocations in gas"
1458         depends on THUMB2_KERNEL && MODULES
1459         default y
1460         help
1461           Various binutils versions can resolve Thumb-2 branches to
1462           locally-defined, preemptible global symbols as short-range "b.n"
1463           branch instructions.
1464
1465           This is a problem, because there's no guarantee the final
1466           destination of the symbol, or any candidate locations for a
1467           trampoline, are within range of the branch.  For this reason, the
1468           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1469           relocation in modules at all, and it makes little sense to add
1470           support.
1471
1472           The symptom is that the kernel fails with an "unsupported
1473           relocation" error when loading some modules.
1474
1475           Until fixed tools are available, passing
1476           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1477           code which hits this problem, at the cost of a bit of extra runtime
1478           stack usage in some cases.
1479
1480           The problem is described in more detail at:
1481               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1482
1483           Only Thumb-2 kernels are affected.
1484
1485           Unless you are sure your tools don't have this problem, say Y.
1486
1487 config ARM_ASM_UNIFIED
1488         bool
1489
1490 config AEABI
1491         bool "Use the ARM EABI to compile the kernel"
1492         help
1493           This option allows for the kernel to be compiled using the latest
1494           ARM ABI (aka EABI).  This is only useful if you are using a user
1495           space environment that is also compiled with EABI.
1496
1497           Since there are major incompatibilities between the legacy ABI and
1498           EABI, especially with regard to structure member alignment, this
1499           option also changes the kernel syscall calling convention to
1500           disambiguate both ABIs and allow for backward compatibility support
1501           (selected with CONFIG_OABI_COMPAT).
1502
1503           To use this you need GCC version 4.0.0 or later.
1504
1505 config OABI_COMPAT
1506         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1507         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1508         default y
1509         help
1510           This option preserves the old syscall interface along with the
1511           new (ARM EABI) one. It also provides a compatibility layer to
1512           intercept syscalls that have structure arguments which layout
1513           in memory differs between the legacy ABI and the new ARM EABI
1514           (only for non "thumb" binaries). This option adds a tiny
1515           overhead to all syscalls and produces a slightly larger kernel.
1516           If you know you'll be using only pure EABI user space then you
1517           can say N here. If this option is not selected and you attempt
1518           to execute a legacy ABI binary then the result will be
1519           UNPREDICTABLE (in fact it can be predicted that it won't work
1520           at all). If in doubt say Y.
1521
1522 config ARCH_HAS_HOLES_MEMORYMODEL
1523         bool
1524
1525 config ARCH_SPARSEMEM_ENABLE
1526         bool
1527
1528 config ARCH_SPARSEMEM_DEFAULT
1529         def_bool ARCH_SPARSEMEM_ENABLE
1530
1531 config ARCH_SELECT_MEMORY_MODEL
1532         def_bool ARCH_SPARSEMEM_ENABLE
1533
1534 config HIGHMEM
1535         bool "High Memory Support (EXPERIMENTAL)"
1536         depends on MMU && EXPERIMENTAL
1537         help
1538           The address space of ARM processors is only 4 Gigabytes large
1539           and it has to accommodate user address space, kernel address
1540           space as well as some memory mapped IO. That means that, if you
1541           have a large amount of physical memory and/or IO, not all of the
1542           memory can be "permanently mapped" by the kernel. The physical
1543           memory that is not permanently mapped is called "high memory".
1544
1545           Depending on the selected kernel/user memory split, minimum
1546           vmalloc space and actual amount of RAM, you may not need this
1547           option which should result in a slightly faster kernel.
1548
1549           If unsure, say n.
1550
1551 config HIGHPTE
1552         bool "Allocate 2nd-level pagetables from highmem"
1553         depends on HIGHMEM
1554
1555 config HW_PERF_EVENTS
1556         bool "Enable hardware performance counter support for perf events"
1557         depends on PERF_EVENTS && CPU_HAS_PMU
1558         default y
1559         help
1560           Enable hardware performance counter support for perf events. If
1561           disabled, perf events will use software events only.
1562
1563 source "mm/Kconfig"
1564
1565 config FORCE_MAX_ZONEORDER
1566         int "Maximum zone order" if ARCH_SHMOBILE
1567         range 11 64 if ARCH_SHMOBILE
1568         default "9" if SA1111
1569         default "11"
1570         help
1571           The kernel memory allocator divides physically contiguous memory
1572           blocks into "zones", where each zone is a power of two number of
1573           pages.  This option selects the largest power of two that the kernel
1574           keeps in the memory allocator.  If you need to allocate very large
1575           blocks of physically contiguous memory, then you may need to
1576           increase this value.
1577
1578           This config option is actually maximum order plus one. For example,
1579           a value of 11 means that the largest free memory block is 2^10 pages.
1580
1581 config LEDS
1582         bool "Timer and CPU usage LEDs"
1583         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1584                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1585                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1586                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1587                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1588                    ARCH_AT91 || ARCH_DAVINCI || \
1589                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1590         help
1591           If you say Y here, the LEDs on your machine will be used
1592           to provide useful information about your current system status.
1593
1594           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1595           be able to select which LEDs are active using the options below. If
1596           you are compiling a kernel for the EBSA-110 or the LART however, the
1597           red LED will simply flash regularly to indicate that the system is
1598           still functional. It is safe to say Y here if you have a CATS
1599           system, but the driver will do nothing.
1600
1601 config LEDS_TIMER
1602         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1603                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1604                             || MACH_OMAP_PERSEUS2
1605         depends on LEDS
1606         depends on !GENERIC_CLOCKEVENTS
1607         default y if ARCH_EBSA110
1608         help
1609           If you say Y here, one of the system LEDs (the green one on the
1610           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1611           will flash regularly to indicate that the system is still
1612           operational. This is mainly useful to kernel hackers who are
1613           debugging unstable kernels.
1614
1615           The LART uses the same LED for both Timer LED and CPU usage LED
1616           functions. You may choose to use both, but the Timer LED function
1617           will overrule the CPU usage LED.
1618
1619 config LEDS_CPU
1620         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1621                         !ARCH_OMAP) \
1622                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1623                         || MACH_OMAP_PERSEUS2
1624         depends on LEDS
1625         help
1626           If you say Y here, the red LED will be used to give a good real
1627           time indication of CPU usage, by lighting whenever the idle task
1628           is not currently executing.
1629
1630           The LART uses the same LED for both Timer LED and CPU usage LED
1631           functions. You may choose to use both, but the Timer LED function
1632           will overrule the CPU usage LED.
1633
1634 config ALIGNMENT_TRAP
1635         bool
1636         depends on CPU_CP15_MMU
1637         default y if !ARCH_EBSA110
1638         select HAVE_PROC_CPU if PROC_FS
1639         help
1640           ARM processors cannot fetch/store information which is not
1641           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1642           address divisible by 4. On 32-bit ARM processors, these non-aligned
1643           fetch/store instructions will be emulated in software if you say
1644           here, which has a severe performance impact. This is necessary for
1645           correct operation of some network protocols. With an IP-only
1646           configuration it is safe to say N, otherwise say Y.
1647
1648 config UACCESS_WITH_MEMCPY
1649         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1650         depends on MMU && EXPERIMENTAL
1651         default y if CPU_FEROCEON
1652         help
1653           Implement faster copy_to_user and clear_user methods for CPU
1654           cores where a 8-word STM instruction give significantly higher
1655           memory write throughput than a sequence of individual 32bit stores.
1656
1657           A possible side effect is a slight increase in scheduling latency
1658           between threads sharing the same address space if they invoke
1659           such copy operations with large buffers.
1660
1661           However, if the CPU data cache is using a write-allocate mode,
1662           this option is unlikely to provide any performance gain.
1663
1664 config SECCOMP
1665         bool
1666         prompt "Enable seccomp to safely compute untrusted bytecode"
1667         ---help---
1668           This kernel feature is useful for number crunching applications
1669           that may need to compute untrusted bytecode during their
1670           execution. By using pipes or other transports made available to
1671           the process as file descriptors supporting the read/write
1672           syscalls, it's possible to isolate those applications in
1673           their own address space using seccomp. Once seccomp is
1674           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1675           and the task is only allowed to execute a few safe syscalls
1676           defined by each seccomp mode.
1677
1678 config CC_STACKPROTECTOR
1679         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1680         depends on EXPERIMENTAL
1681         help
1682           This option turns on the -fstack-protector GCC feature. This
1683           feature puts, at the beginning of functions, a canary value on
1684           the stack just before the return address, and validates
1685           the value just before actually returning.  Stack based buffer
1686           overflows (that need to overwrite this return address) now also
1687           overwrite the canary, which gets detected and the attack is then
1688           neutralized via a kernel panic.
1689           This feature requires gcc version 4.2 or above.
1690
1691 config DEPRECATED_PARAM_STRUCT
1692         bool "Provide old way to pass kernel parameters"
1693         help
1694           This was deprecated in 2001 and announced to live on for 5 years.
1695           Some old boot loaders still use this way.
1696
1697 endmenu
1698
1699 menu "Boot options"
1700
1701 # Compressed boot loader in ROM.  Yes, we really want to ask about
1702 # TEXT and BSS so we preserve their values in the config files.
1703 config ZBOOT_ROM_TEXT
1704         hex "Compressed ROM boot loader base address"
1705         default "0"
1706         help
1707           The physical address at which the ROM-able zImage is to be
1708           placed in the target.  Platforms which normally make use of
1709           ROM-able zImage formats normally set this to a suitable
1710           value in their defconfig file.
1711
1712           If ZBOOT_ROM is not enabled, this has no effect.
1713
1714 config ZBOOT_ROM_BSS
1715         hex "Compressed ROM boot loader BSS address"
1716         default "0"
1717         help
1718           The base address of an area of read/write memory in the target
1719           for the ROM-able zImage which must be available while the
1720           decompressor is running. It must be large enough to hold the
1721           entire decompressed kernel plus an additional 128 KiB.
1722           Platforms which normally make use of ROM-able zImage formats
1723           normally set this to a suitable value in their defconfig file.
1724
1725           If ZBOOT_ROM is not enabled, this has no effect.
1726
1727 config ZBOOT_ROM
1728         bool "Compressed boot loader in ROM/flash"
1729         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1730         help
1731           Say Y here if you intend to execute your compressed kernel image
1732           (zImage) directly from ROM or flash.  If unsure, say N.
1733
1734 config ZBOOT_ROM_MMCIF
1735         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1736         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1737         help
1738           Say Y here to include experimental MMCIF loading code in the
1739           ROM-able zImage. With this enabled it is possible to write the
1740           the ROM-able zImage kernel image to an MMC card and boot the
1741           kernel straight from the reset vector. At reset the processor
1742           Mask ROM will load the first part of the the ROM-able zImage
1743           which in turn loads the rest the kernel image to RAM using the
1744           MMCIF hardware block.
1745
1746 config CMDLINE
1747         string "Default kernel command string"
1748         default ""
1749         help
1750           On some architectures (EBSA110 and CATS), there is currently no way
1751           for the boot loader to pass arguments to the kernel. For these
1752           architectures, you should supply some command-line options at build
1753           time by entering them here. As a minimum, you should specify the
1754           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1755
1756 config CMDLINE_FORCE
1757         bool "Always use the default kernel command string"
1758         depends on CMDLINE != ""
1759         help
1760           Always use the default kernel command string, even if the boot
1761           loader passes other arguments to the kernel.
1762           This is useful if you cannot or don't want to change the
1763           command-line options your boot loader passes to the kernel.
1764
1765           If unsure, say N.
1766
1767 config XIP_KERNEL
1768         bool "Kernel Execute-In-Place from ROM"
1769         depends on !ZBOOT_ROM
1770         help
1771           Execute-In-Place allows the kernel to run from non-volatile storage
1772           directly addressable by the CPU, such as NOR flash. This saves RAM
1773           space since the text section of the kernel is not loaded from flash
1774           to RAM.  Read-write sections, such as the data section and stack,
1775           are still copied to RAM.  The XIP kernel is not compressed since
1776           it has to run directly from flash, so it will take more space to
1777           store it.  The flash address used to link the kernel object files,
1778           and for storing it, is configuration dependent. Therefore, if you
1779           say Y here, you must know the proper physical address where to
1780           store the kernel image depending on your own flash memory usage.
1781
1782           Also note that the make target becomes "make xipImage" rather than
1783           "make zImage" or "make Image".  The final kernel binary to put in
1784           ROM memory will be arch/arm/boot/xipImage.
1785
1786           If unsure, say N.
1787
1788 config XIP_PHYS_ADDR
1789         hex "XIP Kernel Physical Location"
1790         depends on XIP_KERNEL
1791         default "0x00080000"
1792         help
1793           This is the physical address in your flash memory the kernel will
1794           be linked for and stored to.  This address is dependent on your
1795           own flash usage.
1796
1797 config KEXEC
1798         bool "Kexec system call (EXPERIMENTAL)"
1799         depends on EXPERIMENTAL
1800         help
1801           kexec is a system call that implements the ability to shutdown your
1802           current kernel, and to start another kernel.  It is like a reboot
1803           but it is independent of the system firmware.   And like a reboot
1804           you can start any kernel with it, not just Linux.
1805
1806           It is an ongoing process to be certain the hardware in a machine
1807           is properly shutdown, so do not be surprised if this code does not
1808           initially work for you.  It may help to enable device hotplugging
1809           support.
1810
1811 config ATAGS_PROC
1812         bool "Export atags in procfs"
1813         depends on KEXEC
1814         default y
1815         help
1816           Should the atags used to boot the kernel be exported in an "atags"
1817           file in procfs. Useful with kexec.
1818
1819 config CRASH_DUMP
1820         bool "Build kdump crash kernel (EXPERIMENTAL)"
1821         depends on EXPERIMENTAL
1822         help
1823           Generate crash dump after being started by kexec. This should
1824           be normally only set in special crash dump kernels which are
1825           loaded in the main kernel with kexec-tools into a specially
1826           reserved region and then later executed after a crash by
1827           kdump/kexec. The crash dump kernel must be compiled to a
1828           memory address not used by the main kernel
1829
1830           For more details see Documentation/kdump/kdump.txt
1831
1832 config AUTO_ZRELADDR
1833         bool "Auto calculation of the decompressed kernel image address"
1834         depends on !ZBOOT_ROM && !ARCH_U300
1835         help
1836           ZRELADDR is the physical address where the decompressed kernel
1837           image will be placed. If AUTO_ZRELADDR is selected, the address
1838           will be determined at run-time by masking the current IP with
1839           0xf8000000. This assumes the zImage being placed in the first 128MB
1840           from start of memory.
1841
1842 endmenu
1843
1844 menu "CPU Power Management"
1845
1846 if ARCH_HAS_CPUFREQ
1847
1848 source "drivers/cpufreq/Kconfig"
1849
1850 config CPU_FREQ_IMX
1851         tristate "CPUfreq driver for i.MX CPUs"
1852         depends on ARCH_MXC && CPU_FREQ
1853         help
1854           This enables the CPUfreq driver for i.MX CPUs.
1855
1856 config CPU_FREQ_SA1100
1857         bool
1858
1859 config CPU_FREQ_SA1110
1860         bool
1861
1862 config CPU_FREQ_INTEGRATOR
1863         tristate "CPUfreq driver for ARM Integrator CPUs"
1864         depends on ARCH_INTEGRATOR && CPU_FREQ
1865         default y
1866         help
1867           This enables the CPUfreq driver for ARM Integrator CPUs.
1868
1869           For details, take a look at <file:Documentation/cpu-freq>.
1870
1871           If in doubt, say Y.
1872
1873 config CPU_FREQ_PXA
1874         bool
1875         depends on CPU_FREQ && ARCH_PXA && PXA25x
1876         default y
1877         select CPU_FREQ_DEFAULT_GOV_USERSPACE
1878
1879 config CPU_FREQ_S3C64XX
1880         bool "CPUfreq support for Samsung S3C64XX CPUs"
1881         depends on CPU_FREQ && CPU_S3C6410
1882
1883 config CPU_FREQ_S3C
1884         bool
1885         help
1886           Internal configuration node for common cpufreq on Samsung SoC
1887
1888 config CPU_FREQ_S3C24XX
1889         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1890         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1891         select CPU_FREQ_S3C
1892         help
1893           This enables the CPUfreq driver for the Samsung S3C24XX family
1894           of CPUs.
1895
1896           For details, take a look at <file:Documentation/cpu-freq>.
1897
1898           If in doubt, say N.
1899
1900 config CPU_FREQ_S3C24XX_PLL
1901         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1902         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1903         help
1904           Compile in support for changing the PLL frequency from the
1905           S3C24XX series CPUfreq driver. The PLL takes time to settle
1906           after a frequency change, so by default it is not enabled.
1907
1908           This also means that the PLL tables for the selected CPU(s) will
1909           be built which may increase the size of the kernel image.
1910
1911 config CPU_FREQ_S3C24XX_DEBUG
1912         bool "Debug CPUfreq Samsung driver core"
1913         depends on CPU_FREQ_S3C24XX
1914         help
1915           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1916
1917 config CPU_FREQ_S3C24XX_IODEBUG
1918         bool "Debug CPUfreq Samsung driver IO timing"
1919         depends on CPU_FREQ_S3C24XX
1920         help
1921           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1922
1923 config CPU_FREQ_S3C24XX_DEBUGFS
1924         bool "Export debugfs for CPUFreq"
1925         depends on CPU_FREQ_S3C24XX && DEBUG_FS
1926         help
1927           Export status information via debugfs.
1928
1929 endif
1930
1931 source "drivers/cpuidle/Kconfig"
1932
1933 endmenu
1934
1935 menu "Floating point emulation"
1936
1937 comment "At least one emulation must be selected"
1938
1939 config FPE_NWFPE
1940         bool "NWFPE math emulation"
1941         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1942         ---help---
1943           Say Y to include the NWFPE floating point emulator in the kernel.
1944           This is necessary to run most binaries. Linux does not currently
1945           support floating point hardware so you need to say Y here even if
1946           your machine has an FPA or floating point co-processor podule.
1947
1948           You may say N here if you are going to load the Acorn FPEmulator
1949           early in the bootup.
1950
1951 config FPE_NWFPE_XP
1952         bool "Support extended precision"
1953         depends on FPE_NWFPE
1954         help
1955           Say Y to include 80-bit support in the kernel floating-point
1956           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
1957           Note that gcc does not generate 80-bit operations by default,
1958           so in most cases this option only enlarges the size of the
1959           floating point emulator without any good reason.
1960
1961           You almost surely want to say N here.
1962
1963 config FPE_FASTFPE
1964         bool "FastFPE math emulation (EXPERIMENTAL)"
1965         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1966         ---help---
1967           Say Y here to include the FAST floating point emulator in the kernel.
1968           This is an experimental much faster emulator which now also has full
1969           precision for the mantissa.  It does not support any exceptions.
1970           It is very simple, and approximately 3-6 times faster than NWFPE.
1971
1972           It should be sufficient for most programs.  It may be not suitable
1973           for scientific calculations, but you have to check this for yourself.
1974           If you do not feel you need a faster FP emulation you should better
1975           choose NWFPE.
1976
1977 config VFP
1978         bool "VFP-format floating point maths"
1979         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1980         help
1981           Say Y to include VFP support code in the kernel. This is needed
1982           if your hardware includes a VFP unit.
1983
1984           Please see <file:Documentation/arm/VFP/release-notes.txt> for
1985           release notes and additional status information.
1986
1987           Say N if your target does not have VFP hardware.
1988
1989 config VFPv3
1990         bool
1991         depends on VFP
1992         default y if CPU_V7
1993
1994 config NEON
1995         bool "Advanced SIMD (NEON) Extension support"
1996         depends on VFPv3 && CPU_V7
1997         help
1998           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1999           Extension.
2000
2001 endmenu
2002
2003 menu "Userspace binary formats"
2004
2005 source "fs/Kconfig.binfmt"
2006
2007 config ARTHUR
2008         tristate "RISC OS personality"
2009         depends on !AEABI
2010         help
2011           Say Y here to include the kernel code necessary if you want to run
2012           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2013           experimental; if this sounds frightening, say N and sleep in peace.
2014           You can also say M here to compile this support as a module (which
2015           will be called arthur).
2016
2017 endmenu
2018
2019 menu "Power management options"
2020
2021 source "kernel/power/Kconfig"
2022
2023 config ARCH_SUSPEND_POSSIBLE
2024         depends on !ARCH_S5P64X0 && !ARCH_S5P6442
2025         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2026                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2027         def_bool y
2028
2029 endmenu
2030
2031 source "net/Kconfig"
2032
2033 source "drivers/Kconfig"
2034
2035 source "fs/Kconfig"
2036
2037 source "arch/arm/Kconfig.debug"
2038
2039 source "security/Kconfig"
2040
2041 source "crypto/Kconfig"
2042
2043 source "lib/Kconfig"