arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if !XIP_KERNEL
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         select GENERIC_IRQ_SHOW
  32         help
  33           The ARM series is a line of low-power-consumption RISC chip designs
  34           licensed by ARM Ltd and targeted at embedded applications and
  35           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  36           manufactured, but legacy ARM-based PC hardware remains popular in
  37           Europe.  There is an ARM Linux project with a web page at
  38           <http://www.arm.linux.org.uk/>.
  39
  40 config ARM_HAS_SG_CHAIN
  41         bool
  42
  43 config HAVE_PWM
  44         bool
  45
  46 config MIGHT_HAVE_PCI
  47         bool
  48
  49 config SYS_SUPPORTS_APM_EMULATION
  50         bool
  51
  52 config HAVE_SCHED_CLOCK
  53         bool
  54
  55 config GENERIC_GPIO
  56         bool
  57
  58 config ARCH_USES_GETTIMEOFFSET
  59         bool
  60         default n
  61
  62 config GENERIC_CLOCKEVENTS
  63         bool
  64
  65 config GENERIC_CLOCKEVENTS_BROADCAST
  66         bool
  67         depends on GENERIC_CLOCKEVENTS
  68         default y if SMP
  69
  70 config KTIME_SCALAR
  71         bool
  72         default y
  73
  74 config HAVE_TCM
  75         bool
  76         select GENERIC_ALLOCATOR
  77
  78 config HAVE_PROC_CPU
  79         bool
  80
  81 config NO_IOPORT
  82         bool
  83
  84 config EISA
  85         bool
  86         ---help---
  87           The Extended Industry Standard Architecture (EISA) bus was
  88           developed as an open alternative to the IBM MicroChannel bus.
  89
  90           The EISA bus provided some of the features of the IBM MicroChannel
  91           bus while maintaining backward compatibility with cards made for
  92           the older ISA bus.  The EISA bus saw limited use between 1988 and
  93           1995 when it was made obsolete by the PCI bus.
  94
  95           Say Y here if you are building a kernel for an EISA-based machine.
  96
  97           Otherwise, say N.
  98
  99 config SBUS
 100         bool
 101
 102 config MCA
 103         bool
 104         help
 105           MicroChannel Architecture is found in some IBM PS/2 machines and
 106           laptops.  It is a bus system similar to PCI or ISA. See
 107           <file:Documentation/mca.txt> (and especially the web page given
 108           there) before attempting to build an MCA bus kernel.
 109
 110 config STACKTRACE_SUPPORT
 111         bool
 112         default y
 113
 114 config HAVE_LATENCYTOP_SUPPORT
 115         bool
 116         depends on !SMP
 117         default y
 118
 119 config LOCKDEP_SUPPORT
 120         bool
 121         default y
 122
 123 config TRACE_IRQFLAGS_SUPPORT
 124         bool
 125         default y
 126
 127 config HARDIRQS_SW_RESEND
 128         bool
 129         default y
 130
 131 config GENERIC_IRQ_PROBE
 132         bool
 133         default y
 134
 135 config GENERIC_LOCKBREAK
 136         bool
 137         default y
 138         depends on SMP && PREEMPT
 139
 140 config RWSEM_GENERIC_SPINLOCK
 141         bool
 142         default y
 143
 144 config RWSEM_XCHGADD_ALGORITHM
 145         bool
 146
 147 config ARCH_HAS_ILOG2_U32
 148         bool
 149
 150 config ARCH_HAS_ILOG2_U64
 151         bool
 152
 153 config ARCH_HAS_CPUFREQ
 154         bool
 155         help
 156           Internal node to signify that the ARCH has CPUFREQ support
 157           and that the relevant menu configurations are displayed for
 158           it.
 159
 160 config ARCH_HAS_CPU_IDLE_WAIT
 161        def_bool y
 162
 163 config GENERIC_HWEIGHT
 164         bool
 165         default y
 166
 167 config GENERIC_CALIBRATE_DELAY
 168         bool
 169         default y
 170
 171 config ARCH_MAY_HAVE_PC_FDC
 172         bool
 173
 174 config ZONE_DMA
 175         bool
 176
 177 config NEED_DMA_MAP_STATE
 178        def_bool y
 179
 180 config GENERIC_ISA_DMA
 181         bool
 182
 183 config FIQ
 184         bool
 185
 186 config ARCH_MTD_XIP
 187         bool
 188
 189 config VECTORS_BASE
 190         hex
 191         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 192         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 193         default 0x00000000
 194         help
 195           The base address of exception vectors.
 196
 197 config ARM_PATCH_PHYS_VIRT
 198         bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
 199         depends on EXPERIMENTAL
 200         depends on !XIP_KERNEL && MMU
 201         depends on !ARCH_REALVIEW || !SPARSEMEM
 202         help
 203           Patch phys-to-virt and virt-to-phys translation functions at
 204           boot and module load time according to the position of the
 205           kernel in system memory.
 206
 207           This can only be used with non-XIP MMU kernels where the base
 208           of physical memory is at a 16MB boundary, or theoretically 64K
 209           for the MSM machine class.
 210
 211 config ARM_PATCH_PHYS_VIRT_16BIT
 212         def_bool y
 213         depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
 214         help
 215           This option extends the physical to virtual translation patching
 216           to allow physical memory down to a theoretical minimum of 64K
 217           boundaries.
 218
 219 source "init/Kconfig"
 220
 221 source "kernel/Kconfig.freezer"
 222
 223 menu "System Type"
 224
 225 config MMU
 226         bool "MMU-based Paged Memory Management Support"
 227         default y
 228         help
 229           Select if you want MMU-based virtualised addressing space
 230           support by paged memory management. If unsure, say 'Y'.
 231
 232 #
 233 # The "ARM system type" choice list is ordered alphabetically by option
 234 # text.  Please add new entries in the option alphabetic order.
 235 #
 236 choice
 237         prompt "ARM system type"
 238         default ARCH_VERSATILE
 239
 240 config ARCH_INTEGRATOR
 241         bool "ARM Ltd. Integrator family"
 242         select ARM_AMBA
 243         select ARCH_HAS_CPUFREQ
 244         select CLKDEV_LOOKUP
 245         select ICST
 246         select GENERIC_CLOCKEVENTS
 247         select PLAT_VERSATILE
 248         select PLAT_VERSATILE_FPGA_IRQ
 249         help
 250           Support for ARM's Integrator platform.
 251
 252 config ARCH_REALVIEW
 253         bool "ARM Ltd. RealView family"
 254         select ARM_AMBA
 255         select CLKDEV_LOOKUP
 256         select ICST
 257         select GENERIC_CLOCKEVENTS
 258         select ARCH_WANT_OPTIONAL_GPIOLIB
 259         select PLAT_VERSATILE
 260         select PLAT_VERSATILE_CLCD
 261         select ARM_TIMER_SP804
 262         select GPIO_PL061 if GPIOLIB
 263         help
 264           This enables support for ARM Ltd RealView boards.
 265
 266 config ARCH_VERSATILE
 267         bool "ARM Ltd. Versatile family"
 268         select ARM_AMBA
 269         select ARM_VIC
 270         select CLKDEV_LOOKUP
 271         select ICST
 272         select GENERIC_CLOCKEVENTS
 273         select ARCH_WANT_OPTIONAL_GPIOLIB
 274         select PLAT_VERSATILE
 275         select PLAT_VERSATILE_CLCD
 276         select PLAT_VERSATILE_FPGA_IRQ
 277         select ARM_TIMER_SP804
 278         help
 279           This enables support for ARM Ltd Versatile board.
 280
 281 config ARCH_VEXPRESS
 282         bool "ARM Ltd. Versatile Express family"
 283         select ARCH_WANT_OPTIONAL_GPIOLIB
 284         select ARM_AMBA
 285         select ARM_TIMER_SP804
 286         select CLKDEV_LOOKUP
 287         select GENERIC_CLOCKEVENTS
 288         select HAVE_CLK
 289         select HAVE_PATA_PLATFORM
 290         select ICST
 291         select PLAT_VERSATILE
 292         select PLAT_VERSATILE_CLCD
 293         help
 294           This enables support for the ARM Ltd Versatile Express boards.
 295
 296 config ARCH_AT91
 297         bool "Atmel AT91"
 298         select ARCH_REQUIRE_GPIOLIB
 299         select HAVE_CLK
 300         select CLKDEV_LOOKUP
 301         select ARM_PATCH_PHYS_VIRT if MMU
 302         help
 303           This enables support for systems based on the Atmel AT91RM9200,
 304           AT91SAM9 and AT91CAP9 processors.
 305
 306 config ARCH_BCMRING
 307         bool "Broadcom BCMRING"
 308         depends on MMU
 309         select CPU_V6
 310         select ARM_AMBA
 311         select ARM_TIMER_SP804
 312         select CLKDEV_LOOKUP
 313         select GENERIC_CLOCKEVENTS
 314         select ARCH_WANT_OPTIONAL_GPIOLIB
 315         help
 316           Support for Broadcom's BCMRing platform.
 317
 318 config ARCH_CLPS711X
 319         bool "Cirrus Logic CLPS711x/EP721x-based"
 320         select CPU_ARM720T
 321         select ARCH_USES_GETTIMEOFFSET
 322         help
 323           Support for Cirrus Logic 711x/721x based boards.
 324
 325 config ARCH_CNS3XXX
 326         bool "Cavium Networks CNS3XXX family"
 327         select CPU_V6
 328         select GENERIC_CLOCKEVENTS
 329         select ARM_GIC
 330         select MIGHT_HAVE_PCI
 331         select PCI_DOMAINS if PCI
 332         help
 333           Support for Cavium Networks CNS3XXX platform.
 334
 335 config ARCH_GEMINI
 336         bool "Cortina Systems Gemini"
 337         select CPU_FA526
 338         select ARCH_REQUIRE_GPIOLIB
 339         select ARCH_USES_GETTIMEOFFSET
 340         help
 341           Support for the Cortina Systems Gemini family SoCs
 342
 343 config ARCH_EBSA110
 344         bool "EBSA-110"
 345         select CPU_SA110
 346         select ISA
 347         select NO_IOPORT
 348         select ARCH_USES_GETTIMEOFFSET
 349         help
 350           This is an evaluation board for the StrongARM processor available
 351           from Digital. It has limited hardware on-board, including an
 352           Ethernet interface, two PCMCIA sockets, two serial ports and a
 353           parallel port.
 354
 355 config ARCH_EP93XX
 356         bool "EP93xx-based"
 357         select CPU_ARM920T
 358         select ARM_AMBA
 359         select ARM_VIC
 360         select CLKDEV_LOOKUP
 361         select ARCH_REQUIRE_GPIOLIB
 362         select ARCH_HAS_HOLES_MEMORYMODEL
 363         select ARCH_USES_GETTIMEOFFSET
 364         help
 365           This enables support for the Cirrus EP93xx series of CPUs.
 366
 367 config ARCH_FOOTBRIDGE
 368         bool "FootBridge"
 369         select CPU_SA110
 370         select FOOTBRIDGE
 371         select GENERIC_CLOCKEVENTS
 372         help
 373           Support for systems based on the DC21285 companion chip
 374           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 375
 376 config ARCH_MXC
 377         bool "Freescale MXC/iMX-based"
 378         select GENERIC_CLOCKEVENTS
 379         select ARCH_REQUIRE_GPIOLIB
 380         select CLKDEV_LOOKUP
 381         select CLKSRC_MMIO
 382         select HAVE_SCHED_CLOCK
 383         help
 384           Support for Freescale MXC/iMX-based family of processors
 385
 386 config ARCH_MXS
 387         bool "Freescale MXS-based"
 388         select GENERIC_CLOCKEVENTS
 389         select ARCH_REQUIRE_GPIOLIB
 390         select CLKDEV_LOOKUP
 391         select CLKSRC_MMIO
 392         help
 393           Support for Freescale MXS-based family of processors
 394
 395 config ARCH_NETX
 396         bool "Hilscher NetX based"
 397         select CLKSRC_MMIO
 398         select CPU_ARM926T
 399         select ARM_VIC
 400         select GENERIC_CLOCKEVENTS
 401         help
 402           This enables support for systems based on the Hilscher NetX Soc
 403
 404 config ARCH_H720X
 405         bool "Hynix HMS720x-based"
 406         select CPU_ARM720T
 407         select ISA_DMA_API
 408         select ARCH_USES_GETTIMEOFFSET
 409         help
 410           This enables support for systems based on the Hynix HMS720x
 411
 412 config ARCH_IOP13XX
 413         bool "IOP13xx-based"
 414         depends on MMU
 415         select CPU_XSC3
 416         select PLAT_IOP
 417         select PCI
 418         select ARCH_SUPPORTS_MSI
 419         select VMSPLIT_1G
 420         help
 421           Support for Intel's IOP13XX (XScale) family of processors.
 422
 423 config ARCH_IOP32X
 424         bool "IOP32x-based"
 425         depends on MMU
 426         select CPU_XSCALE
 427         select PLAT_IOP
 428         select PCI
 429         select ARCH_REQUIRE_GPIOLIB
 430         help
 431           Support for Intel's 80219 and IOP32X (XScale) family of
 432           processors.
 433
 434 config ARCH_IOP33X
 435         bool "IOP33x-based"
 436         depends on MMU
 437         select CPU_XSCALE
 438         select PLAT_IOP
 439         select PCI
 440         select ARCH_REQUIRE_GPIOLIB
 441         help
 442           Support for Intel's IOP33X (XScale) family of processors.
 443
 444 config ARCH_IXP23XX
 445         bool "IXP23XX-based"
 446         depends on MMU
 447         select CPU_XSC3
 448         select PCI
 449         select ARCH_USES_GETTIMEOFFSET
 450         help
 451           Support for Intel's IXP23xx (XScale) family of processors.
 452
 453 config ARCH_IXP2000
 454         bool "IXP2400/2800-based"
 455         depends on MMU
 456         select CPU_XSCALE
 457         select PCI
 458         select ARCH_USES_GETTIMEOFFSET
 459         help
 460           Support for Intel's IXP2400/2800 (XScale) family of processors.
 461
 462 config ARCH_IXP4XX
 463         bool "IXP4xx-based"
 464         depends on MMU
 465         select CLKSRC_MMIO
 466         select CPU_XSCALE
 467         select GENERIC_GPIO
 468         select GENERIC_CLOCKEVENTS
 469         select HAVE_SCHED_CLOCK
 470         select MIGHT_HAVE_PCI
 471         select DMABOUNCE if PCI
 472         help
 473           Support for Intel's IXP4XX (XScale) family of processors.
 474
 475 config ARCH_DOVE
 476         bool "Marvell Dove"
 477         select CPU_V7
 478         select PCI
 479         select ARCH_REQUIRE_GPIOLIB
 480         select GENERIC_CLOCKEVENTS
 481         select PLAT_ORION
 482         help
 483           Support for the Marvell Dove SoC 88AP510
 484
 485 config ARCH_KIRKWOOD
 486         bool "Marvell Kirkwood"
 487         select CPU_FEROCEON
 488         select PCI
 489         select ARCH_REQUIRE_GPIOLIB
 490         select GENERIC_CLOCKEVENTS
 491         select PLAT_ORION
 492         help
 493           Support for the following Marvell Kirkwood series SoCs:
 494           88F6180, 88F6192 and 88F6281.
 495
 496 config ARCH_LOKI
 497         bool "Marvell Loki (88RC8480)"
 498         select CPU_FEROCEON
 499         select GENERIC_CLOCKEVENTS
 500         select PLAT_ORION
 501         help
 502           Support for the Marvell Loki (88RC8480) SoC.
 503
 504 config ARCH_LPC32XX
 505         bool "NXP LPC32XX"
 506         select CLKSRC_MMIO
 507         select CPU_ARM926T
 508         select ARCH_REQUIRE_GPIOLIB
 509         select HAVE_IDE
 510         select ARM_AMBA
 511         select USB_ARCH_HAS_OHCI
 512         select CLKDEV_LOOKUP
 513         select GENERIC_TIME
 514         select GENERIC_CLOCKEVENTS
 515         help
 516           Support for the NXP LPC32XX family of processors
 517
 518 config ARCH_MV78XX0
 519         bool "Marvell MV78xx0"
 520         select CPU_FEROCEON
 521         select PCI
 522         select ARCH_REQUIRE_GPIOLIB
 523         select GENERIC_CLOCKEVENTS
 524         select PLAT_ORION
 525         help
 526           Support for the following Marvell MV78xx0 series SoCs:
 527           MV781x0, MV782x0.
 528
 529 config ARCH_ORION5X
 530         bool "Marvell Orion"
 531         depends on MMU
 532         select CPU_FEROCEON
 533         select PCI
 534         select ARCH_REQUIRE_GPIOLIB
 535         select GENERIC_CLOCKEVENTS
 536         select PLAT_ORION
 537         help
 538           Support for the following Marvell Orion 5x series SoCs:
 539           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 540           Orion-2 (5281), Orion-1-90 (6183).
 541
 542 config ARCH_MMP
 543         bool "Marvell PXA168/910/MMP2"
 544         depends on MMU
 545         select ARCH_REQUIRE_GPIOLIB
 546         select CLKDEV_LOOKUP
 547         select GENERIC_CLOCKEVENTS
 548         select HAVE_SCHED_CLOCK
 549         select TICK_ONESHOT
 550         select PLAT_PXA
 551         select SPARSE_IRQ
 552         help
 553           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 554
 555 config ARCH_KS8695
 556         bool "Micrel/Kendin KS8695"
 557         select CPU_ARM922T
 558         select ARCH_REQUIRE_GPIOLIB
 559         select ARCH_USES_GETTIMEOFFSET
 560         help
 561           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 562           System-on-Chip devices.
 563
 564 config ARCH_W90X900
 565         bool "Nuvoton W90X900 CPU"
 566         select CPU_ARM926T
 567         select ARCH_REQUIRE_GPIOLIB
 568         select CLKDEV_LOOKUP
 569         select CLKSRC_MMIO
 570         select GENERIC_CLOCKEVENTS
 571         help
 572           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 573           At present, the w90x900 has been renamed nuc900, regarding
 574           the ARM series product line, you can login the following
 575           link address to know more.
 576
 577           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 578                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 579
 580 config ARCH_NUC93X
 581         bool "Nuvoton NUC93X CPU"
 582         select CPU_ARM926T
 583         select CLKDEV_LOOKUP
 584         help
 585           Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
 586           low-power and high performance MPEG-4/JPEG multimedia controller chip.
 587
 588 config ARCH_TEGRA
 589         bool "NVIDIA Tegra"
 590         select CLKDEV_LOOKUP
 591         select CLKSRC_MMIO
 592         select GENERIC_TIME
 593         select GENERIC_CLOCKEVENTS
 594         select GENERIC_GPIO
 595         select HAVE_CLK
 596         select HAVE_SCHED_CLOCK
 597         select ARCH_HAS_BARRIERS if CACHE_L2X0
 598         select ARCH_HAS_CPUFREQ
 599         help
 600           This enables support for NVIDIA Tegra based systems (Tegra APX,
 601           Tegra 6xx and Tegra 2 series).
 602
 603 config ARCH_PNX4008
 604         bool "Philips Nexperia PNX4008 Mobile"
 605         select CPU_ARM926T
 606         select CLKDEV_LOOKUP
 607         select ARCH_USES_GETTIMEOFFSET
 608         help
 609           This enables support for Philips PNX4008 mobile platform.
 610
 611 config ARCH_PXA
 612         bool "PXA2xx/PXA3xx-based"
 613         depends on MMU
 614         select ARCH_MTD_XIP
 615         select ARCH_HAS_CPUFREQ
 616         select CLKDEV_LOOKUP
 617         select CLKSRC_MMIO
 618         select ARCH_REQUIRE_GPIOLIB
 619         select GENERIC_CLOCKEVENTS
 620         select HAVE_SCHED_CLOCK
 621         select TICK_ONESHOT
 622         select PLAT_PXA
 623         select SPARSE_IRQ
 624         help
 625           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 626
 627 config ARCH_MSM
 628         bool "Qualcomm MSM"
 629         select HAVE_CLK
 630         select GENERIC_CLOCKEVENTS
 631         select ARCH_REQUIRE_GPIOLIB
 632         select CLKDEV_LOOKUP
 633         help
 634           Support for Qualcomm MSM/QSD based systems.  This runs on the
 635           apps processor of the MSM/QSD and depends on a shared memory
 636           interface to the modem processor which runs the baseband
 637           stack and controls some vital subsystems
 638           (clock and power control, etc).
 639
 640 config ARCH_SHMOBILE
 641         bool "Renesas SH-Mobile / R-Mobile"
 642         select HAVE_CLK
 643         select CLKDEV_LOOKUP
 644         select GENERIC_CLOCKEVENTS
 645         select NO_IOPORT
 646         select SPARSE_IRQ
 647         select MULTI_IRQ_HANDLER
 648         select PM_GENERIC_DOMAINS if PM
 649         help
 650           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 651
 652 config ARCH_RPC
 653         bool "RiscPC"
 654         select ARCH_ACORN
 655         select FIQ
 656         select TIMER_ACORN
 657         select ARCH_MAY_HAVE_PC_FDC
 658         select HAVE_PATA_PLATFORM
 659         select ISA_DMA_API
 660         select NO_IOPORT
 661         select ARCH_SPARSEMEM_ENABLE
 662         select ARCH_USES_GETTIMEOFFSET
 663         help
 664           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 665           CD-ROM interface, serial and parallel port, and the floppy drive.
 666
 667 config ARCH_SA1100
 668         bool "SA1100-based"
 669         select CLKSRC_MMIO
 670         select CPU_SA1100
 671         select ISA
 672         select ARCH_SPARSEMEM_ENABLE
 673         select ARCH_MTD_XIP
 674         select ARCH_HAS_CPUFREQ
 675         select CPU_FREQ
 676         select GENERIC_CLOCKEVENTS
 677         select HAVE_CLK
 678         select HAVE_SCHED_CLOCK
 679         select TICK_ONESHOT
 680         select ARCH_REQUIRE_GPIOLIB
 681         help
 682           Support for StrongARM 11x0 based boards.
 683
 684 config ARCH_S3C2410
 685         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 686         select GENERIC_GPIO
 687         select ARCH_HAS_CPUFREQ
 688         select HAVE_CLK
 689         select ARCH_USES_GETTIMEOFFSET
 690         select HAVE_S3C2410_I2C if I2C
 691         help
 692           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 693           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 694           the Samsung SMDK2410 development board (and derivatives).
 695
 696           Note, the S3C2416 and the S3C2450 are so close that they even share
 697           the same SoC ID code. This means that there is no separate machine
 698           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 699
 700 config ARCH_S3C64XX
 701         bool "Samsung S3C64XX"
 702         select PLAT_SAMSUNG
 703         select CPU_V6
 704         select ARM_VIC
 705         select HAVE_CLK
 706         select NO_IOPORT
 707         select ARCH_USES_GETTIMEOFFSET
 708         select ARCH_HAS_CPUFREQ
 709         select ARCH_REQUIRE_GPIOLIB
 710         select SAMSUNG_CLKSRC
 711         select SAMSUNG_IRQ_VIC_TIMER
 712         select SAMSUNG_IRQ_UART
 713         select S3C_GPIO_TRACK
 714         select S3C_GPIO_PULL_UPDOWN
 715         select S3C_GPIO_CFG_S3C24XX
 716         select S3C_GPIO_CFG_S3C64XX
 717         select S3C_DEV_NAND
 718         select USB_ARCH_HAS_OHCI
 719         select SAMSUNG_GPIOLIB_4BIT
 720         select HAVE_S3C2410_I2C if I2C
 721         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 722         help
 723           Samsung S3C64XX series based systems
 724
 725 config ARCH_S5P64X0
 726         bool "Samsung S5P6440 S5P6450"
 727         select CPU_V6
 728         select GENERIC_GPIO
 729         select HAVE_CLK
 730         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 731         select GENERIC_CLOCKEVENTS
 732         select HAVE_SCHED_CLOCK
 733         select HAVE_S3C2410_I2C if I2C
 734         select HAVE_S3C_RTC if RTC_CLASS
 735         help
 736           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 737           SMDK6450.
 738
 739 config ARCH_S5PC100
 740         bool "Samsung S5PC100"
 741         select GENERIC_GPIO
 742         select HAVE_CLK
 743         select CPU_V7
 744         select ARM_L1_CACHE_SHIFT_6
 745         select ARCH_USES_GETTIMEOFFSET
 746         select HAVE_S3C2410_I2C if I2C
 747         select HAVE_S3C_RTC if RTC_CLASS
 748         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 749         help
 750           Samsung S5PC100 series based systems
 751
 752 config ARCH_S5PV210
 753         bool "Samsung S5PV210/S5PC110"
 754         select CPU_V7
 755         select ARCH_SPARSEMEM_ENABLE
 756         select GENERIC_GPIO
 757         select HAVE_CLK
 758         select ARM_L1_CACHE_SHIFT_6
 759         select ARCH_HAS_CPUFREQ
 760         select GENERIC_CLOCKEVENTS
 761         select HAVE_SCHED_CLOCK
 762         select HAVE_S3C2410_I2C if I2C
 763         select HAVE_S3C_RTC if RTC_CLASS
 764         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 765         help
 766           Samsung S5PV210/S5PC110 series based systems
 767
 768 config ARCH_EXYNOS4
 769         bool "Samsung EXYNOS4"
 770         select CPU_V7
 771         select ARCH_SPARSEMEM_ENABLE
 772         select GENERIC_GPIO
 773         select HAVE_CLK
 774         select ARCH_HAS_CPUFREQ
 775         select GENERIC_CLOCKEVENTS
 776         select HAVE_S3C_RTC if RTC_CLASS
 777         select HAVE_S3C2410_I2C if I2C
 778         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 779         help
 780           Samsung EXYNOS4 series based systems
 781
 782 config ARCH_SHARK
 783         bool "Shark"
 784         select CPU_SA110
 785         select ISA
 786         select ISA_DMA
 787         select ZONE_DMA
 788         select PCI
 789         select ARCH_USES_GETTIMEOFFSET
 790         help
 791           Support for the StrongARM based Digital DNARD machine, also known
 792           as "Shark" (<http://www.shark-linux.de/shark.html>).
 793
 794 config ARCH_TCC_926
 795         bool "Telechips TCC ARM926-based systems"
 796         select CLKSRC_MMIO
 797         select CPU_ARM926T
 798         select HAVE_CLK
 799         select CLKDEV_LOOKUP
 800         select GENERIC_CLOCKEVENTS
 801         help
 802           Support for Telechips TCC ARM926-based systems.
 803
 804 config ARCH_U300
 805         bool "ST-Ericsson U300 Series"
 806         depends on MMU
 807         select CLKSRC_MMIO
 808         select CPU_ARM926T
 809         select HAVE_SCHED_CLOCK
 810         select HAVE_TCM
 811         select ARM_AMBA
 812         select ARM_VIC
 813         select GENERIC_CLOCKEVENTS
 814         select CLKDEV_LOOKUP
 815         select GENERIC_GPIO
 816         help
 817           Support for ST-Ericsson U300 series mobile platforms.
 818
 819 config ARCH_U8500
 820         bool "ST-Ericsson U8500 Series"
 821         select CPU_V7
 822         select ARM_AMBA
 823         select GENERIC_CLOCKEVENTS
 824         select CLKDEV_LOOKUP
 825         select ARCH_REQUIRE_GPIOLIB
 826         select ARCH_HAS_CPUFREQ
 827         help
 828           Support for ST-Ericsson's Ux500 architecture
 829
 830 config ARCH_NOMADIK
 831         bool "STMicroelectronics Nomadik"
 832         select ARM_AMBA
 833         select ARM_VIC
 834         select CPU_ARM926T
 835         select CLKDEV_LOOKUP
 836         select GENERIC_CLOCKEVENTS
 837         select ARCH_REQUIRE_GPIOLIB
 838         help
 839           Support for the Nomadik platform by ST-Ericsson
 840
 841 config ARCH_DAVINCI
 842         bool "TI DaVinci"
 843         select GENERIC_CLOCKEVENTS
 844         select ARCH_REQUIRE_GPIOLIB
 845         select ZONE_DMA
 846         select HAVE_IDE
 847         select CLKDEV_LOOKUP
 848         select GENERIC_ALLOCATOR
 849         select GENERIC_IRQ_CHIP
 850         select ARCH_HAS_HOLES_MEMORYMODEL
 851         help
 852           Support for TI's DaVinci platform.
 853
 854 config ARCH_OMAP
 855         bool "TI OMAP"
 856         select HAVE_CLK
 857         select ARCH_REQUIRE_GPIOLIB
 858         select ARCH_HAS_CPUFREQ
 859         select GENERIC_CLOCKEVENTS
 860         select HAVE_SCHED_CLOCK
 861         select ARCH_HAS_HOLES_MEMORYMODEL
 862         help
 863           Support for TI's OMAP platform (OMAP1/2/3/4).
 864
 865 config PLAT_SPEAR
 866         bool "ST SPEAr"
 867         select ARM_AMBA
 868         select ARCH_REQUIRE_GPIOLIB
 869         select CLKDEV_LOOKUP
 870         select CLKSRC_MMIO
 871         select GENERIC_CLOCKEVENTS
 872         select HAVE_CLK
 873         help
 874           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 875
 876 config ARCH_VT8500
 877         bool "VIA/WonderMedia 85xx"
 878         select CPU_ARM926T
 879         select GENERIC_GPIO
 880         select ARCH_HAS_CPUFREQ
 881         select GENERIC_CLOCKEVENTS
 882         select ARCH_REQUIRE_GPIOLIB
 883         select HAVE_PWM
 884         help
 885           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 886 endchoice
 887
 888 #
 889 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 890 # Kconfigs may be included either alphabetically (according to the
 891 # plat- suffix) or along side the corresponding mach-* source.
 892 #
 893 source "arch/arm/mach-at91/Kconfig"
 894
 895 source "arch/arm/mach-bcmring/Kconfig"
 896
 897 source "arch/arm/mach-clps711x/Kconfig"
 898
 899 source "arch/arm/mach-cns3xxx/Kconfig"
 900
 901 source "arch/arm/mach-davinci/Kconfig"
 902
 903 source "arch/arm/mach-dove/Kconfig"
 904
 905 source "arch/arm/mach-ep93xx/Kconfig"
 906
 907 source "arch/arm/mach-footbridge/Kconfig"
 908
 909 source "arch/arm/mach-gemini/Kconfig"
 910
 911 source "arch/arm/mach-h720x/Kconfig"
 912
 913 source "arch/arm/mach-integrator/Kconfig"
 914
 915 source "arch/arm/mach-iop32x/Kconfig"
 916
 917 source "arch/arm/mach-iop33x/Kconfig"
 918
 919 source "arch/arm/mach-iop13xx/Kconfig"
 920
 921 source "arch/arm/mach-ixp4xx/Kconfig"
 922
 923 source "arch/arm/mach-ixp2000/Kconfig"
 924
 925 source "arch/arm/mach-ixp23xx/Kconfig"
 926
 927 source "arch/arm/mach-kirkwood/Kconfig"
 928
 929 source "arch/arm/mach-ks8695/Kconfig"
 930
 931 source "arch/arm/mach-loki/Kconfig"
 932
 933 source "arch/arm/mach-lpc32xx/Kconfig"
 934
 935 source "arch/arm/mach-msm/Kconfig"
 936
 937 source "arch/arm/mach-mv78xx0/Kconfig"
 938
 939 source "arch/arm/plat-mxc/Kconfig"
 940
 941 source "arch/arm/mach-mxs/Kconfig"
 942
 943 source "arch/arm/mach-netx/Kconfig"
 944
 945 source "arch/arm/mach-nomadik/Kconfig"
 946 source "arch/arm/plat-nomadik/Kconfig"
 947
 948 source "arch/arm/mach-nuc93x/Kconfig"
 949
 950 source "arch/arm/plat-omap/Kconfig"
 951
 952 source "arch/arm/mach-omap1/Kconfig"
 953
 954 source "arch/arm/mach-omap2/Kconfig"
 955
 956 source "arch/arm/mach-orion5x/Kconfig"
 957
 958 source "arch/arm/mach-pxa/Kconfig"
 959 source "arch/arm/plat-pxa/Kconfig"
 960
 961 source "arch/arm/mach-mmp/Kconfig"
 962
 963 source "arch/arm/mach-realview/Kconfig"
 964
 965 source "arch/arm/mach-sa1100/Kconfig"
 966
 967 source "arch/arm/plat-samsung/Kconfig"
 968 source "arch/arm/plat-s3c24xx/Kconfig"
 969 source "arch/arm/plat-s5p/Kconfig"
 970
 971 source "arch/arm/plat-spear/Kconfig"
 972
 973 source "arch/arm/plat-tcc/Kconfig"
 974
 975 if ARCH_S3C2410
 976 source "arch/arm/mach-s3c2400/Kconfig"
 977 source "arch/arm/mach-s3c2410/Kconfig"
 978 source "arch/arm/mach-s3c2412/Kconfig"
 979 source "arch/arm/mach-s3c2416/Kconfig"
 980 source "arch/arm/mach-s3c2440/Kconfig"
 981 source "arch/arm/mach-s3c2443/Kconfig"
 982 endif
 983
 984 if ARCH_S3C64XX
 985 source "arch/arm/mach-s3c64xx/Kconfig"
 986 endif
 987
 988 source "arch/arm/mach-s5p64x0/Kconfig"
 989
 990 source "arch/arm/mach-s5pc100/Kconfig"
 991
 992 source "arch/arm/mach-s5pv210/Kconfig"
 993
 994 source "arch/arm/mach-exynos4/Kconfig"
 995
 996 source "arch/arm/mach-shmobile/Kconfig"
 997
 998 source "arch/arm/mach-tegra/Kconfig"
 999
1000 source "arch/arm/mach-u300/Kconfig"
1001
1002 source "arch/arm/mach-ux500/Kconfig"
1003
1004 source "arch/arm/mach-versatile/Kconfig"
1005
1006 source "arch/arm/mach-vexpress/Kconfig"
1007 source "arch/arm/plat-versatile/Kconfig"
1008
1009 source "arch/arm/mach-vt8500/Kconfig"
1010
1011 source "arch/arm/mach-w90x900/Kconfig"
1012
1013 # Definitions to make life easier
1014 config ARCH_ACORN
1015         bool
1016
1017 config PLAT_IOP
1018         bool
1019         select GENERIC_CLOCKEVENTS
1020         select HAVE_SCHED_CLOCK
1021
1022 config PLAT_ORION
1023         bool
1024         select CLKSRC_MMIO
1025         select GENERIC_IRQ_CHIP
1026         select HAVE_SCHED_CLOCK
1027
1028 config PLAT_PXA
1029         bool
1030
1031 config PLAT_VERSATILE
1032         bool
1033
1034 config ARM_TIMER_SP804
1035         bool
1036         select CLKSRC_MMIO
1037
1038 source arch/arm/mm/Kconfig
1039
1040 config IWMMXT
1041         bool "Enable iWMMXt support"
1042         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1043         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1044         help
1045           Enable support for iWMMXt context switching at run time if
1046           running on a CPU that supports it.
1047
1048 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1049 config XSCALE_PMU
1050         bool
1051         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1052         default y
1053
1054 config CPU_HAS_PMU
1055         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1056                    (!ARCH_OMAP3 || OMAP3_EMU)
1057         default y
1058         bool
1059
1060 config MULTI_IRQ_HANDLER
1061         bool
1062         help
1063           Allow each machine to specify it's own IRQ handler at run time.
1064
1065 if !MMU
1066 source "arch/arm/Kconfig-nommu"
1067 endif
1068
1069 config ARM_ERRATA_411920
1070         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1071         depends on CPU_V6 || CPU_V6K
1072         help
1073           Invalidation of the Instruction Cache operation can
1074           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1075           It does not affect the MPCore. This option enables the ARM Ltd.
1076           recommended workaround.
1077
1078 config ARM_ERRATA_430973
1079         bool "ARM errata: Stale prediction on replaced interworking branch"
1080         depends on CPU_V7
1081         help
1082           This option enables the workaround for the 430973 Cortex-A8
1083           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1084           interworking branch is replaced with another code sequence at the
1085           same virtual address, whether due to self-modifying code or virtual
1086           to physical address re-mapping, Cortex-A8 does not recover from the
1087           stale interworking branch prediction. This results in Cortex-A8
1088           executing the new code sequence in the incorrect ARM or Thumb state.
1089           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1090           and also flushes the branch target cache at every context switch.
1091           Note that setting specific bits in the ACTLR register may not be
1092           available in non-secure mode.
1093
1094 config ARM_ERRATA_458693
1095         bool "ARM errata: Processor deadlock when a false hazard is created"
1096         depends on CPU_V7
1097         help
1098           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1099           erratum. For very specific sequences of memory operations, it is
1100           possible for a hazard condition intended for a cache line to instead
1101           be incorrectly associated with a different cache line. This false
1102           hazard might then cause a processor deadlock. The workaround enables
1103           the L1 caching of the NEON accesses and disables the PLD instruction
1104           in the ACTLR register. Note that setting specific bits in the ACTLR
1105           register may not be available in non-secure mode.
1106
1107 config ARM_ERRATA_460075
1108         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1109         depends on CPU_V7
1110         help
1111           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1112           erratum. Any asynchronous access to the L2 cache may encounter a
1113           situation in which recent store transactions to the L2 cache are lost
1114           and overwritten with stale memory contents from external memory. The
1115           workaround disables the write-allocate mode for the L2 cache via the
1116           ACTLR register. Note that setting specific bits in the ACTLR register
1117           may not be available in non-secure mode.
1118
1119 config ARM_ERRATA_742230
1120         bool "ARM errata: DMB operation may be faulty"
1121         depends on CPU_V7 && SMP
1122         help
1123           This option enables the workaround for the 742230 Cortex-A9
1124           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1125           between two write operations may not ensure the correct visibility
1126           ordering of the two writes. This workaround sets a specific bit in
1127           the diagnostic register of the Cortex-A9 which causes the DMB
1128           instruction to behave as a DSB, ensuring the correct behaviour of
1129           the two writes.
1130
1131 config ARM_ERRATA_742231
1132         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1133         depends on CPU_V7 && SMP
1134         help
1135           This option enables the workaround for the 742231 Cortex-A9
1136           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1137           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1138           accessing some data located in the same cache line, may get corrupted
1139           data due to bad handling of the address hazard when the line gets
1140           replaced from one of the CPUs at the same time as another CPU is
1141           accessing it. This workaround sets specific bits in the diagnostic
1142           register of the Cortex-A9 which reduces the linefill issuing
1143           capabilities of the processor.
1144
1145 config PL310_ERRATA_588369
1146         bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1147         depends on CACHE_L2X0
1148         help
1149            The PL310 L2 cache controller implements three types of Clean &
1150            Invalidate maintenance operations: by Physical Address
1151            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1152            They are architecturally defined to behave as the execution of a
1153            clean operation followed immediately by an invalidate operation,
1154            both performing to the same memory location. This functionality
1155            is not correctly implemented in PL310 as clean lines are not
1156            invalidated as a result of these operations.
1157
1158 config ARM_ERRATA_720789
1159         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1160         depends on CPU_V7 && SMP
1161         help
1162           This option enables the workaround for the 720789 Cortex-A9 (prior to
1163           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1164           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1165           As a consequence of this erratum, some TLB entries which should be
1166           invalidated are not, resulting in an incoherency in the system page
1167           tables. The workaround changes the TLB flushing routines to invalidate
1168           entries regardless of the ASID.
1169
1170 config PL310_ERRATA_727915
1171         bool "Background Clean & Invalidate by Way operation can cause data corruption"
1172         depends on CACHE_L2X0
1173         help
1174           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1175           operation (offset 0x7FC). This operation runs in background so that
1176           PL310 can handle normal accesses while it is in progress. Under very
1177           rare circumstances, due to this erratum, write data can be lost when
1178           PL310 treats a cacheable write transaction during a Clean &
1179           Invalidate by Way operation.
1180
1181 config ARM_ERRATA_743622
1182         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1183         depends on CPU_V7
1184         help
1185           This option enables the workaround for the 743622 Cortex-A9
1186           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1187           optimisation in the Cortex-A9 Store Buffer may lead to data
1188           corruption. This workaround sets a specific bit in the diagnostic
1189           register of the Cortex-A9 which disables the Store Buffer
1190           optimisation, preventing the defect from occurring. This has no
1191           visible impact on the overall performance or power consumption of the
1192           processor.
1193
1194 config ARM_ERRATA_751472
1195         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1196         depends on CPU_V7 && SMP
1197         help
1198           This option enables the workaround for the 751472 Cortex-A9 (prior
1199           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1200           completion of a following broadcasted operation if the second
1201           operation is received by a CPU before the ICIALLUIS has completed,
1202           potentially leading to corrupted entries in the cache or TLB.
1203
1204 config ARM_ERRATA_753970
1205         bool "ARM errata: cache sync operation may be faulty"
1206         depends on CACHE_PL310
1207         help
1208           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1209
1210           Under some condition the effect of cache sync operation on
1211           the store buffer still remains when the operation completes.
1212           This means that the store buffer is always asked to drain and
1213           this prevents it from merging any further writes. The workaround
1214           is to replace the normal offset of cache sync operation (0x730)
1215           by another offset targeting an unmapped PL310 register 0x740.
1216           This has the same effect as the cache sync operation: store buffer
1217           drain and waiting for all buffers empty.
1218
1219 config ARM_ERRATA_754322
1220         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1221         depends on CPU_V7
1222         help
1223           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1224           r3p*) erratum. A speculative memory access may cause a page table walk
1225           which starts prior to an ASID switch but completes afterwards. This
1226           can populate the micro-TLB with a stale entry which may be hit with
1227           the new ASID. This workaround places two dsb instructions in the mm
1228           switching code so that no page table walks can cross the ASID switch.
1229
1230 config ARM_ERRATA_754327
1231         bool "ARM errata: no automatic Store Buffer drain"
1232         depends on CPU_V7 && SMP
1233         help
1234           This option enables the workaround for the 754327 Cortex-A9 (prior to
1235           r2p0) erratum. The Store Buffer does not have any automatic draining
1236           mechanism and therefore a livelock may occur if an external agent
1237           continuously polls a memory location waiting to observe an update.
1238           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1239           written polling loops from denying visibility of updates to memory.
1240
1241 endmenu
1242
1243 source "arch/arm/common/Kconfig"
1244
1245 menu "Bus support"
1246
1247 config ARM_AMBA
1248         bool
1249
1250 config ISA
1251         bool
1252         help
1253           Find out whether you have ISA slots on your motherboard.  ISA is the
1254           name of a bus system, i.e. the way the CPU talks to the other stuff
1255           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1256           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1257           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1258
1259 # Select ISA DMA controller support
1260 config ISA_DMA
1261         bool
1262         select ISA_DMA_API
1263
1264 # Select ISA DMA interface
1265 config ISA_DMA_API
1266         bool
1267
1268 config PCI
1269         bool "PCI support" if MIGHT_HAVE_PCI
1270         help
1271           Find out whether you have a PCI motherboard. PCI is the name of a
1272           bus system, i.e. the way the CPU talks to the other stuff inside
1273           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1274           VESA. If you have PCI, say Y, otherwise N.
1275
1276 config PCI_DOMAINS
1277         bool
1278         depends on PCI
1279
1280 config PCI_NANOENGINE
1281         bool "BSE nanoEngine PCI support"
1282         depends on SA1100_NANOENGINE
1283         help
1284           Enable PCI on the BSE nanoEngine board.
1285
1286 config PCI_SYSCALL
1287         def_bool PCI
1288
1289 # Select the host bridge type
1290 config PCI_HOST_VIA82C505
1291         bool
1292         depends on PCI && ARCH_SHARK
1293         default y
1294
1295 config PCI_HOST_ITE8152
1296         bool
1297         depends on PCI && MACH_ARMCORE
1298         default y
1299         select DMABOUNCE
1300
1301 source "drivers/pci/Kconfig"
1302
1303 source "drivers/pcmcia/Kconfig"
1304
1305 endmenu
1306
1307 menu "Kernel Features"
1308
1309 source "kernel/time/Kconfig"
1310
1311 config SMP
1312         bool "Symmetric Multi-Processing"
1313         depends on CPU_V6K || CPU_V7
1314         depends on GENERIC_CLOCKEVENTS
1315         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1316                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1317                  ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1318                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1319         select USE_GENERIC_SMP_HELPERS
1320         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1321         help
1322           This enables support for systems with more than one CPU. If you have
1323           a system with only one CPU, like most personal computers, say N. If
1324           you have a system with more than one CPU, say Y.
1325
1326           If you say N here, the kernel will run on single and multiprocessor
1327           machines, but will use only one CPU of a multiprocessor machine. If
1328           you say Y here, the kernel will run on many, but not all, single
1329           processor machines. On a single processor machine, the kernel will
1330           run faster if you say N here.
1331
1332           See also <file:Documentation/i386/IO-APIC.txt>,
1333           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1334           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1335
1336           If you don't know what to do here, say N.
1337
1338 config SMP_ON_UP
1339         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1340         depends on EXPERIMENTAL
1341         depends on SMP && !XIP_KERNEL
1342         default y
1343         help
1344           SMP kernels contain instructions which fail on non-SMP processors.
1345           Enabling this option allows the kernel to modify itself to make
1346           these instructions safe.  Disabling it allows about 1K of space
1347           savings.
1348
1349           If you don't know what to do here, say Y.
1350
1351 config HAVE_ARM_SCU
1352         bool
1353         help
1354           This option enables support for the ARM system coherency unit
1355
1356 config HAVE_ARM_TWD
1357         bool
1358         depends on SMP
1359         select TICK_ONESHOT
1360         help
1361           This options enables support for the ARM timer and watchdog unit
1362
1363 choice
1364         prompt "Memory split"
1365         default VMSPLIT_3G
1366         help
1367           Select the desired split between kernel and user memory.
1368
1369           If you are not absolutely sure what you are doing, leave this
1370           option alone!
1371
1372         config VMSPLIT_3G
1373                 bool "3G/1G user/kernel split"
1374         config VMSPLIT_2G
1375                 bool "2G/2G user/kernel split"
1376         config VMSPLIT_1G
1377                 bool "1G/3G user/kernel split"
1378 endchoice
1379
1380 config PAGE_OFFSET
1381         hex
1382         default 0x40000000 if VMSPLIT_1G
1383         default 0x80000000 if VMSPLIT_2G
1384         default 0xC0000000
1385
1386 config NR_CPUS
1387         int "Maximum number of CPUs (2-32)"
1388         range 2 32
1389         depends on SMP
1390         default "4"
1391
1392 config HOTPLUG_CPU
1393         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1394         depends on SMP && HOTPLUG && EXPERIMENTAL
1395         help
1396           Say Y here to experiment with turning CPUs off and on.  CPUs
1397           can be controlled through /sys/devices/system/cpu.
1398
1399 config LOCAL_TIMERS
1400         bool "Use local timer interrupts"
1401         depends on SMP
1402         default y
1403         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1404         help
1405           Enable support for local timers on SMP platforms, rather then the
1406           legacy IPI broadcast method.  Local timers allows the system
1407           accounting to be spread across the timer interval, preventing a
1408           "thundering herd" at every timer tick.
1409
1410 source kernel/Kconfig.preempt
1411
1412 config HZ
1413         int
1414         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1415                 ARCH_S5PV210 || ARCH_EXYNOS4
1416         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1417         default AT91_TIMER_HZ if ARCH_AT91
1418         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1419         default 100
1420
1421 config THUMB2_KERNEL
1422         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1423         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1424         select AEABI
1425         select ARM_ASM_UNIFIED
1426         help
1427           By enabling this option, the kernel will be compiled in
1428           Thumb-2 mode. A compiler/assembler that understand the unified
1429           ARM-Thumb syntax is needed.
1430
1431           If unsure, say N.
1432
1433 config THUMB2_AVOID_R_ARM_THM_JUMP11
1434         bool "Work around buggy Thumb-2 short branch relocations in gas"
1435         depends on THUMB2_KERNEL && MODULES
1436         default y
1437         help
1438           Various binutils versions can resolve Thumb-2 branches to
1439           locally-defined, preemptible global symbols as short-range "b.n"
1440           branch instructions.
1441
1442           This is a problem, because there's no guarantee the final
1443           destination of the symbol, or any candidate locations for a
1444           trampoline, are within range of the branch.  For this reason, the
1445           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1446           relocation in modules at all, and it makes little sense to add
1447           support.
1448
1449           The symptom is that the kernel fails with an "unsupported
1450           relocation" error when loading some modules.
1451
1452           Until fixed tools are available, passing
1453           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1454           code which hits this problem, at the cost of a bit of extra runtime
1455           stack usage in some cases.
1456
1457           The problem is described in more detail at:
1458               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1459
1460           Only Thumb-2 kernels are affected.
1461
1462           Unless you are sure your tools don't have this problem, say Y.
1463
1464 config ARM_ASM_UNIFIED
1465         bool
1466
1467 config AEABI
1468         bool "Use the ARM EABI to compile the kernel"
1469         help
1470           This option allows for the kernel to be compiled using the latest
1471           ARM ABI (aka EABI).  This is only useful if you are using a user
1472           space environment that is also compiled with EABI.
1473
1474           Since there are major incompatibilities between the legacy ABI and
1475           EABI, especially with regard to structure member alignment, this
1476           option also changes the kernel syscall calling convention to
1477           disambiguate both ABIs and allow for backward compatibility support
1478           (selected with CONFIG_OABI_COMPAT).
1479
1480           To use this you need GCC version 4.0.0 or later.
1481
1482 config OABI_COMPAT
1483         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1484         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1485         default y
1486         help
1487           This option preserves the old syscall interface along with the
1488           new (ARM EABI) one. It also provides a compatibility layer to
1489           intercept syscalls that have structure arguments which layout
1490           in memory differs between the legacy ABI and the new ARM EABI
1491           (only for non "thumb" binaries). This option adds a tiny
1492           overhead to all syscalls and produces a slightly larger kernel.
1493           If you know you'll be using only pure EABI user space then you
1494           can say N here. If this option is not selected and you attempt
1495           to execute a legacy ABI binary then the result will be
1496           UNPREDICTABLE (in fact it can be predicted that it won't work
1497           at all). If in doubt say Y.
1498
1499 config ARCH_HAS_HOLES_MEMORYMODEL
1500         bool
1501
1502 config ARCH_SPARSEMEM_ENABLE
1503         bool
1504
1505 config ARCH_SPARSEMEM_DEFAULT
1506         def_bool ARCH_SPARSEMEM_ENABLE
1507
1508 config ARCH_SELECT_MEMORY_MODEL
1509         def_bool ARCH_SPARSEMEM_ENABLE
1510
1511 config HAVE_ARCH_PFN_VALID
1512         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1513
1514 config HIGHMEM
1515         bool "High Memory Support"
1516         depends on MMU
1517         help
1518           The address space of ARM processors is only 4 Gigabytes large
1519           and it has to accommodate user address space, kernel address
1520           space as well as some memory mapped IO. That means that, if you
1521           have a large amount of physical memory and/or IO, not all of the
1522           memory can be "permanently mapped" by the kernel. The physical
1523           memory that is not permanently mapped is called "high memory".
1524
1525           Depending on the selected kernel/user memory split, minimum
1526           vmalloc space and actual amount of RAM, you may not need this
1527           option which should result in a slightly faster kernel.
1528
1529           If unsure, say n.
1530
1531 config HIGHPTE
1532         bool "Allocate 2nd-level pagetables from highmem"
1533         depends on HIGHMEM
1534
1535 config HW_PERF_EVENTS
1536         bool "Enable hardware performance counter support for perf events"
1537         depends on PERF_EVENTS && CPU_HAS_PMU
1538         default y
1539         help
1540           Enable hardware performance counter support for perf events. If
1541           disabled, perf events will use software events only.
1542
1543 source "mm/Kconfig"
1544
1545 config FORCE_MAX_ZONEORDER
1546         int "Maximum zone order" if ARCH_SHMOBILE
1547         range 11 64 if ARCH_SHMOBILE
1548         default "9" if SA1111
1549         default "11"
1550         help
1551           The kernel memory allocator divides physically contiguous memory
1552           blocks into "zones", where each zone is a power of two number of
1553           pages.  This option selects the largest power of two that the kernel
1554           keeps in the memory allocator.  If you need to allocate very large
1555           blocks of physically contiguous memory, then you may need to
1556           increase this value.
1557
1558           This config option is actually maximum order plus one. For example,
1559           a value of 11 means that the largest free memory block is 2^10 pages.
1560
1561 config LEDS
1562         bool "Timer and CPU usage LEDs"
1563         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1564                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1565                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1566                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1567                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1568                    ARCH_AT91 || ARCH_DAVINCI || \
1569                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1570         help
1571           If you say Y here, the LEDs on your machine will be used
1572           to provide useful information about your current system status.
1573
1574           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1575           be able to select which LEDs are active using the options below. If
1576           you are compiling a kernel for the EBSA-110 or the LART however, the
1577           red LED will simply flash regularly to indicate that the system is
1578           still functional. It is safe to say Y here if you have a CATS
1579           system, but the driver will do nothing.
1580
1581 config LEDS_TIMER
1582         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1583                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1584                             || MACH_OMAP_PERSEUS2
1585         depends on LEDS
1586         depends on !GENERIC_CLOCKEVENTS
1587         default y if ARCH_EBSA110
1588         help
1589           If you say Y here, one of the system LEDs (the green one on the
1590           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1591           will flash regularly to indicate that the system is still
1592           operational. This is mainly useful to kernel hackers who are
1593           debugging unstable kernels.
1594
1595           The LART uses the same LED for both Timer LED and CPU usage LED
1596           functions. You may choose to use both, but the Timer LED function
1597           will overrule the CPU usage LED.
1598
1599 config LEDS_CPU
1600         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1601                         !ARCH_OMAP) \
1602                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1603                         || MACH_OMAP_PERSEUS2
1604         depends on LEDS
1605         help
1606           If you say Y here, the red LED will be used to give a good real
1607           time indication of CPU usage, by lighting whenever the idle task
1608           is not currently executing.
1609
1610           The LART uses the same LED for both Timer LED and CPU usage LED
1611           functions. You may choose to use both, but the Timer LED function
1612           will overrule the CPU usage LED.
1613
1614 config ALIGNMENT_TRAP
1615         bool
1616         depends on CPU_CP15_MMU
1617         default y if !ARCH_EBSA110
1618         select HAVE_PROC_CPU if PROC_FS
1619         help
1620           ARM processors cannot fetch/store information which is not
1621           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1622           address divisible by 4. On 32-bit ARM processors, these non-aligned
1623           fetch/store instructions will be emulated in software if you say
1624           here, which has a severe performance impact. This is necessary for
1625           correct operation of some network protocols. With an IP-only
1626           configuration it is safe to say N, otherwise say Y.
1627
1628 config UACCESS_WITH_MEMCPY
1629         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1630         depends on MMU && EXPERIMENTAL
1631         default y if CPU_FEROCEON
1632         help
1633           Implement faster copy_to_user and clear_user methods for CPU
1634           cores where a 8-word STM instruction give significantly higher
1635           memory write throughput than a sequence of individual 32bit stores.
1636
1637           A possible side effect is a slight increase in scheduling latency
1638           between threads sharing the same address space if they invoke
1639           such copy operations with large buffers.
1640
1641           However, if the CPU data cache is using a write-allocate mode,
1642           this option is unlikely to provide any performance gain.
1643
1644 config SECCOMP
1645         bool
1646         prompt "Enable seccomp to safely compute untrusted bytecode"
1647         ---help---
1648           This kernel feature is useful for number crunching applications
1649           that may need to compute untrusted bytecode during their
1650           execution. By using pipes or other transports made available to
1651           the process as file descriptors supporting the read/write
1652           syscalls, it's possible to isolate those applications in
1653           their own address space using seccomp. Once seccomp is
1654           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1655           and the task is only allowed to execute a few safe syscalls
1656           defined by each seccomp mode.
1657
1658 config CC_STACKPROTECTOR
1659         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1660         depends on EXPERIMENTAL
1661         help
1662           This option turns on the -fstack-protector GCC feature. This
1663           feature puts, at the beginning of functions, a canary value on
1664           the stack just before the return address, and validates
1665           the value just before actually returning.  Stack based buffer
1666           overflows (that need to overwrite this return address) now also
1667           overwrite the canary, which gets detected and the attack is then
1668           neutralized via a kernel panic.
1669           This feature requires gcc version 4.2 or above.
1670
1671 config DEPRECATED_PARAM_STRUCT
1672         bool "Provide old way to pass kernel parameters"
1673         help
1674           This was deprecated in 2001 and announced to live on for 5 years.
1675           Some old boot loaders still use this way.
1676
1677 endmenu
1678
1679 menu "Boot options"
1680
1681 config USE_OF
1682         bool "Flattened Device Tree support"
1683         select OF
1684         select OF_EARLY_FLATTREE
1685         help
1686           Include support for flattened device tree machine descriptions.
1687
1688 # Compressed boot loader in ROM.  Yes, we really want to ask about
1689 # TEXT and BSS so we preserve their values in the config files.
1690 config ZBOOT_ROM_TEXT
1691         hex "Compressed ROM boot loader base address"
1692         default "0"
1693         help
1694           The physical address at which the ROM-able zImage is to be
1695           placed in the target.  Platforms which normally make use of
1696           ROM-able zImage formats normally set this to a suitable
1697           value in their defconfig file.
1698
1699           If ZBOOT_ROM is not enabled, this has no effect.
1700
1701 config ZBOOT_ROM_BSS
1702         hex "Compressed ROM boot loader BSS address"
1703         default "0"
1704         help
1705           The base address of an area of read/write memory in the target
1706           for the ROM-able zImage which must be available while the
1707           decompressor is running. It must be large enough to hold the
1708           entire decompressed kernel plus an additional 128 KiB.
1709           Platforms which normally make use of ROM-able zImage formats
1710           normally set this to a suitable value in their defconfig file.
1711
1712           If ZBOOT_ROM is not enabled, this has no effect.
1713
1714 config ZBOOT_ROM
1715         bool "Compressed boot loader in ROM/flash"
1716         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1717         help
1718           Say Y here if you intend to execute your compressed kernel image
1719           (zImage) directly from ROM or flash.  If unsure, say N.
1720
1721 choice
1722         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1723         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1724         default ZBOOT_ROM_NONE
1725         help
1726           Include experimental SD/MMC loading code in the ROM-able zImage.
1727           With this enabled it is possible to write the the ROM-able zImage
1728           kernel image to an MMC or SD card and boot the kernel straight
1729           from the reset vector. At reset the processor Mask ROM will load
1730           the first part of the the ROM-able zImage which in turn loads the
1731           rest the kernel image to RAM.
1732
1733 config ZBOOT_ROM_NONE
1734         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1735         help
1736           Do not load image from SD or MMC
1737
1738 config ZBOOT_ROM_MMCIF
1739         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1740         help
1741           Load image from MMCIF hardware block.
1742
1743 config ZBOOT_ROM_SH_MOBILE_SDHI
1744         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1745         help
1746           Load image from SDHI hardware block
1747
1748 endchoice
1749
1750 config CMDLINE
1751         string "Default kernel command string"
1752         default ""
1753         help
1754           On some architectures (EBSA110 and CATS), there is currently no way
1755           for the boot loader to pass arguments to the kernel. For these
1756           architectures, you should supply some command-line options at build
1757           time by entering them here. As a minimum, you should specify the
1758           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1759
1760 choice
1761         prompt "Kernel command line type" if CMDLINE != ""
1762         default CMDLINE_FROM_BOOTLOADER
1763
1764 config CMDLINE_FROM_BOOTLOADER
1765         bool "Use bootloader kernel arguments if available"
1766         help
1767           Uses the command-line options passed by the boot loader. If
1768           the boot loader doesn't provide any, the default kernel command
1769           string provided in CMDLINE will be used.
1770
1771 config CMDLINE_EXTEND
1772         bool "Extend bootloader kernel arguments"
1773         help
1774           The command-line arguments provided by the boot loader will be
1775           appended to the default kernel command string.
1776
1777 config CMDLINE_FORCE
1778         bool "Always use the default kernel command string"
1779         help
1780           Always use the default kernel command string, even if the boot
1781           loader passes other arguments to the kernel.
1782           This is useful if you cannot or don't want to change the
1783           command-line options your boot loader passes to the kernel.
1784 endchoice
1785
1786 config XIP_KERNEL
1787         bool "Kernel Execute-In-Place from ROM"
1788         depends on !ZBOOT_ROM
1789         help
1790           Execute-In-Place allows the kernel to run from non-volatile storage
1791           directly addressable by the CPU, such as NOR flash. This saves RAM
1792           space since the text section of the kernel is not loaded from flash
1793           to RAM.  Read-write sections, such as the data section and stack,
1794           are still copied to RAM.  The XIP kernel is not compressed since
1795           it has to run directly from flash, so it will take more space to
1796           store it.  The flash address used to link the kernel object files,
1797           and for storing it, is configuration dependent. Therefore, if you
1798           say Y here, you must know the proper physical address where to
1799           store the kernel image depending on your own flash memory usage.
1800
1801           Also note that the make target becomes "make xipImage" rather than
1802           "make zImage" or "make Image".  The final kernel binary to put in
1803           ROM memory will be arch/arm/boot/xipImage.
1804
1805           If unsure, say N.
1806
1807 config XIP_PHYS_ADDR
1808         hex "XIP Kernel Physical Location"
1809         depends on XIP_KERNEL
1810         default "0x00080000"
1811         help
1812           This is the physical address in your flash memory the kernel will
1813           be linked for and stored to.  This address is dependent on your
1814           own flash usage.
1815
1816 config KEXEC
1817         bool "Kexec system call (EXPERIMENTAL)"
1818         depends on EXPERIMENTAL
1819         help
1820           kexec is a system call that implements the ability to shutdown your
1821           current kernel, and to start another kernel.  It is like a reboot
1822           but it is independent of the system firmware.   And like a reboot
1823           you can start any kernel with it, not just Linux.
1824
1825           It is an ongoing process to be certain the hardware in a machine
1826           is properly shutdown, so do not be surprised if this code does not
1827           initially work for you.  It may help to enable device hotplugging
1828           support.
1829
1830 config ATAGS_PROC
1831         bool "Export atags in procfs"
1832         depends on KEXEC
1833         default y
1834         help
1835           Should the atags used to boot the kernel be exported in an "atags"
1836           file in procfs. Useful with kexec.
1837
1838 config CRASH_DUMP
1839         bool "Build kdump crash kernel (EXPERIMENTAL)"
1840         depends on EXPERIMENTAL
1841         help
1842           Generate crash dump after being started by kexec. This should
1843           be normally only set in special crash dump kernels which are
1844           loaded in the main kernel with kexec-tools into a specially
1845           reserved region and then later executed after a crash by
1846           kdump/kexec. The crash dump kernel must be compiled to a
1847           memory address not used by the main kernel
1848
1849           For more details see Documentation/kdump/kdump.txt
1850
1851 config AUTO_ZRELADDR
1852         bool "Auto calculation of the decompressed kernel image address"
1853         depends on !ZBOOT_ROM && !ARCH_U300
1854         help
1855           ZRELADDR is the physical address where the decompressed kernel
1856           image will be placed. If AUTO_ZRELADDR is selected, the address
1857           will be determined at run-time by masking the current IP with
1858           0xf8000000. This assumes the zImage being placed in the first 128MB
1859           from start of memory.
1860
1861 endmenu
1862
1863 menu "CPU Power Management"
1864
1865 if ARCH_HAS_CPUFREQ
1866
1867 source "drivers/cpufreq/Kconfig"
1868
1869 config CPU_FREQ_IMX
1870         tristate "CPUfreq driver for i.MX CPUs"
1871         depends on ARCH_MXC && CPU_FREQ
1872         help
1873           This enables the CPUfreq driver for i.MX CPUs.
1874
1875 config CPU_FREQ_SA1100
1876         bool
1877
1878 config CPU_FREQ_SA1110
1879         bool
1880
1881 config CPU_FREQ_INTEGRATOR
1882         tristate "CPUfreq driver for ARM Integrator CPUs"
1883         depends on ARCH_INTEGRATOR && CPU_FREQ
1884         default y
1885         help
1886           This enables the CPUfreq driver for ARM Integrator CPUs.
1887
1888           For details, take a look at <file:Documentation/cpu-freq>.
1889
1890           If in doubt, say Y.
1891
1892 config CPU_FREQ_PXA
1893         bool
1894         depends on CPU_FREQ && ARCH_PXA && PXA25x
1895         default y
1896         select CPU_FREQ_DEFAULT_GOV_USERSPACE
1897
1898 config CPU_FREQ_S3C64XX
1899         bool "CPUfreq support for Samsung S3C64XX CPUs"
1900         depends on CPU_FREQ && CPU_S3C6410
1901
1902 config CPU_FREQ_S3C
1903         bool
1904         help
1905           Internal configuration node for common cpufreq on Samsung SoC
1906
1907 config CPU_FREQ_S3C24XX
1908         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1909         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1910         select CPU_FREQ_S3C
1911         help
1912           This enables the CPUfreq driver for the Samsung S3C24XX family
1913           of CPUs.
1914
1915           For details, take a look at <file:Documentation/cpu-freq>.
1916
1917           If in doubt, say N.
1918
1919 config CPU_FREQ_S3C24XX_PLL
1920         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1921         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1922         help
1923           Compile in support for changing the PLL frequency from the
1924           S3C24XX series CPUfreq driver. The PLL takes time to settle
1925           after a frequency change, so by default it is not enabled.
1926
1927           This also means that the PLL tables for the selected CPU(s) will
1928           be built which may increase the size of the kernel image.
1929
1930 config CPU_FREQ_S3C24XX_DEBUG
1931         bool "Debug CPUfreq Samsung driver core"
1932         depends on CPU_FREQ_S3C24XX
1933         help
1934           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1935
1936 config CPU_FREQ_S3C24XX_IODEBUG
1937         bool "Debug CPUfreq Samsung driver IO timing"
1938         depends on CPU_FREQ_S3C24XX
1939         help
1940           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1941
1942 config CPU_FREQ_S3C24XX_DEBUGFS
1943         bool "Export debugfs for CPUFreq"
1944         depends on CPU_FREQ_S3C24XX && DEBUG_FS
1945         help
1946           Export status information via debugfs.
1947
1948 endif
1949
1950 source "drivers/cpuidle/Kconfig"
1951
1952 endmenu
1953
1954 menu "Floating point emulation"
1955
1956 comment "At least one emulation must be selected"
1957
1958 config FPE_NWFPE
1959         bool "NWFPE math emulation"
1960         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1961         ---help---
1962           Say Y to include the NWFPE floating point emulator in the kernel.
1963           This is necessary to run most binaries. Linux does not currently
1964           support floating point hardware so you need to say Y here even if
1965           your machine has an FPA or floating point co-processor podule.
1966
1967           You may say N here if you are going to load the Acorn FPEmulator
1968           early in the bootup.
1969
1970 config FPE_NWFPE_XP
1971         bool "Support extended precision"
1972         depends on FPE_NWFPE
1973         help
1974           Say Y to include 80-bit support in the kernel floating-point
1975           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
1976           Note that gcc does not generate 80-bit operations by default,
1977           so in most cases this option only enlarges the size of the
1978           floating point emulator without any good reason.
1979
1980           You almost surely want to say N here.
1981
1982 config FPE_FASTFPE
1983         bool "FastFPE math emulation (EXPERIMENTAL)"
1984         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1985         ---help---
1986           Say Y here to include the FAST floating point emulator in the kernel.
1987           This is an experimental much faster emulator which now also has full
1988           precision for the mantissa.  It does not support any exceptions.
1989           It is very simple, and approximately 3-6 times faster than NWFPE.
1990
1991           It should be sufficient for most programs.  It may be not suitable
1992           for scientific calculations, but you have to check this for yourself.
1993           If you do not feel you need a faster FP emulation you should better
1994           choose NWFPE.
1995
1996 config VFP
1997         bool "VFP-format floating point maths"
1998         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1999         help
2000           Say Y to include VFP support code in the kernel. This is needed
2001           if your hardware includes a VFP unit.
2002
2003           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2004           release notes and additional status information.
2005
2006           Say N if your target does not have VFP hardware.
2007
2008 config VFPv3
2009         bool
2010         depends on VFP
2011         default y if CPU_V7
2012
2013 config NEON
2014         bool "Advanced SIMD (NEON) Extension support"
2015         depends on VFPv3 && CPU_V7
2016         help
2017           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2018           Extension.
2019
2020 endmenu
2021
2022 menu "Userspace binary formats"
2023
2024 source "fs/Kconfig.binfmt"
2025
2026 config ARTHUR
2027         tristate "RISC OS personality"
2028         depends on !AEABI
2029         help
2030           Say Y here to include the kernel code necessary if you want to run
2031           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2032           experimental; if this sounds frightening, say N and sleep in peace.
2033           You can also say M here to compile this support as a module (which
2034           will be called arthur).
2035
2036 endmenu
2037
2038 menu "Power management options"
2039
2040 source "kernel/power/Kconfig"
2041
2042 config ARCH_SUSPEND_POSSIBLE
2043         depends on !ARCH_S5P64X0 && !ARCH_S5PC100
2044         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2045                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2046         def_bool y
2047
2048 endmenu
2049
2050 source "net/Kconfig"
2051
2052 source "drivers/Kconfig"
2053
2054 source "fs/Kconfig"
2055
2056 source "arch/arm/Kconfig.debug"
2057
2058 source "security/Kconfig"
2059
2060 source "crypto/Kconfig"
2061
2062 source "lib/Kconfig"