ARM: prepare for removal of a bunch of <mach/memory.h> files
[deliverable/linux.git] / arch / arm / Kconfig
1 config ARM
2 bool
3 default y
4 select HAVE_AOUT
5 select HAVE_DMA_API_DEBUG
6 select HAVE_IDE
7 select HAVE_MEMBLOCK
8 select RTC_LIB
9 select SYS_SUPPORTS_APM_EMULATION
10 select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
12 select HAVE_ARCH_KGDB
13 select HAVE_KPROBES if !XIP_KERNEL
14 select HAVE_KRETPROBES if (HAVE_KPROBES)
15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
19 select HAVE_GENERIC_DMA_COHERENT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
22 select HAVE_KERNEL_LZMA
23 select HAVE_IRQ_WORK
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
26 select HAVE_REGS_AND_STACK_ACCESS_API
27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
28 select HAVE_C_RECORDMCOUNT
29 select HAVE_GENERIC_HARDIRQS
30 select HAVE_SPARSE_IRQ
31 select GENERIC_IRQ_SHOW
32 help
33 The ARM series is a line of low-power-consumption RISC chip designs
34 licensed by ARM Ltd and targeted at embedded applications and
35 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
36 manufactured, but legacy ARM-based PC hardware remains popular in
37 Europe. There is an ARM Linux project with a web page at
38 <http://www.arm.linux.org.uk/>.
39
40 config ARM_HAS_SG_CHAIN
41 bool
42
43 config HAVE_PWM
44 bool
45
46 config MIGHT_HAVE_PCI
47 bool
48
49 config SYS_SUPPORTS_APM_EMULATION
50 bool
51
52 config HAVE_SCHED_CLOCK
53 bool
54
55 config GENERIC_GPIO
56 bool
57
58 config ARCH_USES_GETTIMEOFFSET
59 bool
60 default n
61
62 config GENERIC_CLOCKEVENTS
63 bool
64
65 config GENERIC_CLOCKEVENTS_BROADCAST
66 bool
67 depends on GENERIC_CLOCKEVENTS
68 default y if SMP
69
70 config KTIME_SCALAR
71 bool
72 default y
73
74 config HAVE_TCM
75 bool
76 select GENERIC_ALLOCATOR
77
78 config HAVE_PROC_CPU
79 bool
80
81 config NO_IOPORT
82 bool
83
84 config EISA
85 bool
86 ---help---
87 The Extended Industry Standard Architecture (EISA) bus was
88 developed as an open alternative to the IBM MicroChannel bus.
89
90 The EISA bus provided some of the features of the IBM MicroChannel
91 bus while maintaining backward compatibility with cards made for
92 the older ISA bus. The EISA bus saw limited use between 1988 and
93 1995 when it was made obsolete by the PCI bus.
94
95 Say Y here if you are building a kernel for an EISA-based machine.
96
97 Otherwise, say N.
98
99 config SBUS
100 bool
101
102 config MCA
103 bool
104 help
105 MicroChannel Architecture is found in some IBM PS/2 machines and
106 laptops. It is a bus system similar to PCI or ISA. See
107 <file:Documentation/mca.txt> (and especially the web page given
108 there) before attempting to build an MCA bus kernel.
109
110 config STACKTRACE_SUPPORT
111 bool
112 default y
113
114 config HAVE_LATENCYTOP_SUPPORT
115 bool
116 depends on !SMP
117 default y
118
119 config LOCKDEP_SUPPORT
120 bool
121 default y
122
123 config TRACE_IRQFLAGS_SUPPORT
124 bool
125 default y
126
127 config HARDIRQS_SW_RESEND
128 bool
129 default y
130
131 config GENERIC_IRQ_PROBE
132 bool
133 default y
134
135 config GENERIC_LOCKBREAK
136 bool
137 default y
138 depends on SMP && PREEMPT
139
140 config RWSEM_GENERIC_SPINLOCK
141 bool
142 default y
143
144 config RWSEM_XCHGADD_ALGORITHM
145 bool
146
147 config ARCH_HAS_ILOG2_U32
148 bool
149
150 config ARCH_HAS_ILOG2_U64
151 bool
152
153 config ARCH_HAS_CPUFREQ
154 bool
155 help
156 Internal node to signify that the ARCH has CPUFREQ support
157 and that the relevant menu configurations are displayed for
158 it.
159
160 config ARCH_HAS_CPU_IDLE_WAIT
161 def_bool y
162
163 config GENERIC_HWEIGHT
164 bool
165 default y
166
167 config GENERIC_CALIBRATE_DELAY
168 bool
169 default y
170
171 config ARCH_MAY_HAVE_PC_FDC
172 bool
173
174 config ZONE_DMA
175 bool
176
177 config NEED_DMA_MAP_STATE
178 def_bool y
179
180 config GENERIC_ISA_DMA
181 bool
182
183 config FIQ
184 bool
185
186 config ARCH_MTD_XIP
187 bool
188
189 config VECTORS_BASE
190 hex
191 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
192 default DRAM_BASE if REMAP_VECTORS_TO_RAM
193 default 0x00000000
194 help
195 The base address of exception vectors.
196
197 config ARM_PATCH_PHYS_VIRT
198 bool "Patch physical to virtual translations at runtime" if EMBEDDED
199 default y
200 depends on !XIP_KERNEL && MMU
201 depends on !ARCH_REALVIEW || !SPARSEMEM
202 help
203 Patch phys-to-virt and virt-to-phys translation functions at
204 boot and module load time according to the position of the
205 kernel in system memory.
206
207 This can only be used with non-XIP MMU kernels where the base
208 of physical memory is at a 16MB boundary.
209
210 Only disable this option if you know that you do not require
211 this feature (eg, building a kernel for a single machine) and
212 you need to shrink the kernel to the minimal size.
213
214 config NO_MACH_MEMORY_H
215 bool
216 help
217 Select this when mach/memory.h is removed.
218
219 config PHYS_OFFSET
220 hex "Physical address of main memory"
221 depends on !ARM_PATCH_PHYS_VIRT && NO_MACH_MEMORY_H
222 help
223 Please provide the physical address corresponding to the
224 location of main memory in your system.
225
226 source "init/Kconfig"
227
228 source "kernel/Kconfig.freezer"
229
230 menu "System Type"
231
232 config MMU
233 bool "MMU-based Paged Memory Management Support"
234 default y
235 help
236 Select if you want MMU-based virtualised addressing space
237 support by paged memory management. If unsure, say 'Y'.
238
239 #
240 # The "ARM system type" choice list is ordered alphabetically by option
241 # text. Please add new entries in the option alphabetic order.
242 #
243 choice
244 prompt "ARM system type"
245 default ARCH_VERSATILE
246
247 config ARCH_INTEGRATOR
248 bool "ARM Ltd. Integrator family"
249 select ARM_AMBA
250 select ARCH_HAS_CPUFREQ
251 select CLKDEV_LOOKUP
252 select HAVE_MACH_CLKDEV
253 select ICST
254 select GENERIC_CLOCKEVENTS
255 select PLAT_VERSATILE
256 select PLAT_VERSATILE_FPGA_IRQ
257 help
258 Support for ARM's Integrator platform.
259
260 config ARCH_REALVIEW
261 bool "ARM Ltd. RealView family"
262 select ARM_AMBA
263 select CLKDEV_LOOKUP
264 select HAVE_MACH_CLKDEV
265 select ICST
266 select GENERIC_CLOCKEVENTS
267 select ARCH_WANT_OPTIONAL_GPIOLIB
268 select PLAT_VERSATILE
269 select PLAT_VERSATILE_CLCD
270 select ARM_TIMER_SP804
271 select GPIO_PL061 if GPIOLIB
272 help
273 This enables support for ARM Ltd RealView boards.
274
275 config ARCH_VERSATILE
276 bool "ARM Ltd. Versatile family"
277 select ARM_AMBA
278 select ARM_VIC
279 select CLKDEV_LOOKUP
280 select HAVE_MACH_CLKDEV
281 select ICST
282 select GENERIC_CLOCKEVENTS
283 select ARCH_WANT_OPTIONAL_GPIOLIB
284 select PLAT_VERSATILE
285 select PLAT_VERSATILE_CLCD
286 select PLAT_VERSATILE_FPGA_IRQ
287 select ARM_TIMER_SP804
288 help
289 This enables support for ARM Ltd Versatile board.
290
291 config ARCH_VEXPRESS
292 bool "ARM Ltd. Versatile Express family"
293 select ARCH_WANT_OPTIONAL_GPIOLIB
294 select ARM_AMBA
295 select ARM_TIMER_SP804
296 select CLKDEV_LOOKUP
297 select HAVE_MACH_CLKDEV
298 select GENERIC_CLOCKEVENTS
299 select HAVE_CLK
300 select HAVE_PATA_PLATFORM
301 select ICST
302 select PLAT_VERSATILE
303 select PLAT_VERSATILE_CLCD
304 help
305 This enables support for the ARM Ltd Versatile Express boards.
306
307 config ARCH_AT91
308 bool "Atmel AT91"
309 select ARCH_REQUIRE_GPIOLIB
310 select HAVE_CLK
311 select CLKDEV_LOOKUP
312 help
313 This enables support for systems based on the Atmel AT91RM9200,
314 AT91SAM9 and AT91CAP9 processors.
315
316 config ARCH_BCMRING
317 bool "Broadcom BCMRING"
318 depends on MMU
319 select CPU_V6
320 select ARM_AMBA
321 select ARM_TIMER_SP804
322 select CLKDEV_LOOKUP
323 select GENERIC_CLOCKEVENTS
324 select ARCH_WANT_OPTIONAL_GPIOLIB
325 help
326 Support for Broadcom's BCMRing platform.
327
328 config ARCH_CLPS711X
329 bool "Cirrus Logic CLPS711x/EP721x-based"
330 select CPU_ARM720T
331 select ARCH_USES_GETTIMEOFFSET
332 help
333 Support for Cirrus Logic 711x/721x based boards.
334
335 config ARCH_CNS3XXX
336 bool "Cavium Networks CNS3XXX family"
337 select CPU_V6K
338 select GENERIC_CLOCKEVENTS
339 select ARM_GIC
340 select MIGHT_HAVE_PCI
341 select PCI_DOMAINS if PCI
342 help
343 Support for Cavium Networks CNS3XXX platform.
344
345 config ARCH_GEMINI
346 bool "Cortina Systems Gemini"
347 select CPU_FA526
348 select ARCH_REQUIRE_GPIOLIB
349 select ARCH_USES_GETTIMEOFFSET
350 help
351 Support for the Cortina Systems Gemini family SoCs
352
353 config ARCH_PRIMA2
354 bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
355 select CPU_V7
356 select GENERIC_TIME
357 select NO_IOPORT
358 select GENERIC_CLOCKEVENTS
359 select CLKDEV_LOOKUP
360 select GENERIC_IRQ_CHIP
361 select USE_OF
362 select ZONE_DMA
363 help
364 Support for CSR SiRFSoC ARM Cortex A9 Platform
365
366 config ARCH_EBSA110
367 bool "EBSA-110"
368 select CPU_SA110
369 select ISA
370 select NO_IOPORT
371 select ARCH_USES_GETTIMEOFFSET
372 help
373 This is an evaluation board for the StrongARM processor available
374 from Digital. It has limited hardware on-board, including an
375 Ethernet interface, two PCMCIA sockets, two serial ports and a
376 parallel port.
377
378 config ARCH_EP93XX
379 bool "EP93xx-based"
380 select CPU_ARM920T
381 select ARM_AMBA
382 select ARM_VIC
383 select CLKDEV_LOOKUP
384 select ARCH_REQUIRE_GPIOLIB
385 select ARCH_HAS_HOLES_MEMORYMODEL
386 select ARCH_USES_GETTIMEOFFSET
387 help
388 This enables support for the Cirrus EP93xx series of CPUs.
389
390 config ARCH_FOOTBRIDGE
391 bool "FootBridge"
392 select CPU_SA110
393 select FOOTBRIDGE
394 select GENERIC_CLOCKEVENTS
395 help
396 Support for systems based on the DC21285 companion chip
397 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
398
399 config ARCH_MXC
400 bool "Freescale MXC/iMX-based"
401 select GENERIC_CLOCKEVENTS
402 select ARCH_REQUIRE_GPIOLIB
403 select CLKDEV_LOOKUP
404 select CLKSRC_MMIO
405 select GENERIC_IRQ_CHIP
406 select HAVE_SCHED_CLOCK
407 help
408 Support for Freescale MXC/iMX-based family of processors
409
410 config ARCH_MXS
411 bool "Freescale MXS-based"
412 select GENERIC_CLOCKEVENTS
413 select ARCH_REQUIRE_GPIOLIB
414 select CLKDEV_LOOKUP
415 select CLKSRC_MMIO
416 help
417 Support for Freescale MXS-based family of processors
418
419 config ARCH_NETX
420 bool "Hilscher NetX based"
421 select CLKSRC_MMIO
422 select CPU_ARM926T
423 select ARM_VIC
424 select GENERIC_CLOCKEVENTS
425 help
426 This enables support for systems based on the Hilscher NetX Soc
427
428 config ARCH_H720X
429 bool "Hynix HMS720x-based"
430 select CPU_ARM720T
431 select ISA_DMA_API
432 select ARCH_USES_GETTIMEOFFSET
433 help
434 This enables support for systems based on the Hynix HMS720x
435
436 config ARCH_IOP13XX
437 bool "IOP13xx-based"
438 depends on MMU
439 select CPU_XSC3
440 select PLAT_IOP
441 select PCI
442 select ARCH_SUPPORTS_MSI
443 select VMSPLIT_1G
444 help
445 Support for Intel's IOP13XX (XScale) family of processors.
446
447 config ARCH_IOP32X
448 bool "IOP32x-based"
449 depends on MMU
450 select CPU_XSCALE
451 select PLAT_IOP
452 select PCI
453 select ARCH_REQUIRE_GPIOLIB
454 help
455 Support for Intel's 80219 and IOP32X (XScale) family of
456 processors.
457
458 config ARCH_IOP33X
459 bool "IOP33x-based"
460 depends on MMU
461 select CPU_XSCALE
462 select PLAT_IOP
463 select PCI
464 select ARCH_REQUIRE_GPIOLIB
465 help
466 Support for Intel's IOP33X (XScale) family of processors.
467
468 config ARCH_IXP23XX
469 bool "IXP23XX-based"
470 depends on MMU
471 select CPU_XSC3
472 select PCI
473 select ARCH_USES_GETTIMEOFFSET
474 help
475 Support for Intel's IXP23xx (XScale) family of processors.
476
477 config ARCH_IXP2000
478 bool "IXP2400/2800-based"
479 depends on MMU
480 select CPU_XSCALE
481 select PCI
482 select ARCH_USES_GETTIMEOFFSET
483 help
484 Support for Intel's IXP2400/2800 (XScale) family of processors.
485
486 config ARCH_IXP4XX
487 bool "IXP4xx-based"
488 depends on MMU
489 select CLKSRC_MMIO
490 select CPU_XSCALE
491 select GENERIC_GPIO
492 select GENERIC_CLOCKEVENTS
493 select HAVE_SCHED_CLOCK
494 select MIGHT_HAVE_PCI
495 select DMABOUNCE if PCI
496 help
497 Support for Intel's IXP4XX (XScale) family of processors.
498
499 config ARCH_DOVE
500 bool "Marvell Dove"
501 select CPU_V7
502 select PCI
503 select ARCH_REQUIRE_GPIOLIB
504 select GENERIC_CLOCKEVENTS
505 select PLAT_ORION
506 help
507 Support for the Marvell Dove SoC 88AP510
508
509 config ARCH_KIRKWOOD
510 bool "Marvell Kirkwood"
511 select CPU_FEROCEON
512 select PCI
513 select ARCH_REQUIRE_GPIOLIB
514 select GENERIC_CLOCKEVENTS
515 select PLAT_ORION
516 help
517 Support for the following Marvell Kirkwood series SoCs:
518 88F6180, 88F6192 and 88F6281.
519
520 config ARCH_LPC32XX
521 bool "NXP LPC32XX"
522 select CLKSRC_MMIO
523 select CPU_ARM926T
524 select ARCH_REQUIRE_GPIOLIB
525 select HAVE_IDE
526 select ARM_AMBA
527 select USB_ARCH_HAS_OHCI
528 select CLKDEV_LOOKUP
529 select GENERIC_TIME
530 select GENERIC_CLOCKEVENTS
531 help
532 Support for the NXP LPC32XX family of processors
533
534 config ARCH_MV78XX0
535 bool "Marvell MV78xx0"
536 select CPU_FEROCEON
537 select PCI
538 select ARCH_REQUIRE_GPIOLIB
539 select GENERIC_CLOCKEVENTS
540 select PLAT_ORION
541 help
542 Support for the following Marvell MV78xx0 series SoCs:
543 MV781x0, MV782x0.
544
545 config ARCH_ORION5X
546 bool "Marvell Orion"
547 depends on MMU
548 select CPU_FEROCEON
549 select PCI
550 select ARCH_REQUIRE_GPIOLIB
551 select GENERIC_CLOCKEVENTS
552 select PLAT_ORION
553 help
554 Support for the following Marvell Orion 5x series SoCs:
555 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
556 Orion-2 (5281), Orion-1-90 (6183).
557
558 config ARCH_MMP
559 bool "Marvell PXA168/910/MMP2"
560 depends on MMU
561 select ARCH_REQUIRE_GPIOLIB
562 select CLKDEV_LOOKUP
563 select GENERIC_CLOCKEVENTS
564 select HAVE_SCHED_CLOCK
565 select TICK_ONESHOT
566 select PLAT_PXA
567 select SPARSE_IRQ
568 help
569 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
570
571 config ARCH_KS8695
572 bool "Micrel/Kendin KS8695"
573 select CPU_ARM922T
574 select ARCH_REQUIRE_GPIOLIB
575 select ARCH_USES_GETTIMEOFFSET
576 help
577 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
578 System-on-Chip devices.
579
580 config ARCH_W90X900
581 bool "Nuvoton W90X900 CPU"
582 select CPU_ARM926T
583 select ARCH_REQUIRE_GPIOLIB
584 select CLKDEV_LOOKUP
585 select CLKSRC_MMIO
586 select GENERIC_CLOCKEVENTS
587 help
588 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
589 At present, the w90x900 has been renamed nuc900, regarding
590 the ARM series product line, you can login the following
591 link address to know more.
592
593 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
594 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
595
596 config ARCH_NUC93X
597 bool "Nuvoton NUC93X CPU"
598 select CPU_ARM926T
599 select CLKDEV_LOOKUP
600 help
601 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
602 low-power and high performance MPEG-4/JPEG multimedia controller chip.
603
604 config ARCH_TEGRA
605 bool "NVIDIA Tegra"
606 select CLKDEV_LOOKUP
607 select CLKSRC_MMIO
608 select GENERIC_TIME
609 select GENERIC_CLOCKEVENTS
610 select GENERIC_GPIO
611 select HAVE_CLK
612 select HAVE_SCHED_CLOCK
613 select ARCH_HAS_CPUFREQ
614 help
615 This enables support for NVIDIA Tegra based systems (Tegra APX,
616 Tegra 6xx and Tegra 2 series).
617
618 config ARCH_PNX4008
619 bool "Philips Nexperia PNX4008 Mobile"
620 select CPU_ARM926T
621 select CLKDEV_LOOKUP
622 select ARCH_USES_GETTIMEOFFSET
623 help
624 This enables support for Philips PNX4008 mobile platform.
625
626 config ARCH_PXA
627 bool "PXA2xx/PXA3xx-based"
628 depends on MMU
629 select ARCH_MTD_XIP
630 select ARCH_HAS_CPUFREQ
631 select CLKDEV_LOOKUP
632 select CLKSRC_MMIO
633 select ARCH_REQUIRE_GPIOLIB
634 select GENERIC_CLOCKEVENTS
635 select HAVE_SCHED_CLOCK
636 select TICK_ONESHOT
637 select PLAT_PXA
638 select SPARSE_IRQ
639 select AUTO_ZRELADDR
640 select MULTI_IRQ_HANDLER
641 help
642 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
643
644 config ARCH_MSM
645 bool "Qualcomm MSM"
646 select HAVE_CLK
647 select GENERIC_CLOCKEVENTS
648 select ARCH_REQUIRE_GPIOLIB
649 select CLKDEV_LOOKUP
650 help
651 Support for Qualcomm MSM/QSD based systems. This runs on the
652 apps processor of the MSM/QSD and depends on a shared memory
653 interface to the modem processor which runs the baseband
654 stack and controls some vital subsystems
655 (clock and power control, etc).
656
657 config ARCH_SHMOBILE
658 bool "Renesas SH-Mobile / R-Mobile"
659 select HAVE_CLK
660 select CLKDEV_LOOKUP
661 select HAVE_MACH_CLKDEV
662 select GENERIC_CLOCKEVENTS
663 select NO_IOPORT
664 select SPARSE_IRQ
665 select MULTI_IRQ_HANDLER
666 select PM_GENERIC_DOMAINS if PM
667 help
668 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
669
670 config ARCH_RPC
671 bool "RiscPC"
672 select ARCH_ACORN
673 select FIQ
674 select TIMER_ACORN
675 select ARCH_MAY_HAVE_PC_FDC
676 select HAVE_PATA_PLATFORM
677 select ISA_DMA_API
678 select NO_IOPORT
679 select ARCH_SPARSEMEM_ENABLE
680 select ARCH_USES_GETTIMEOFFSET
681 help
682 On the Acorn Risc-PC, Linux can support the internal IDE disk and
683 CD-ROM interface, serial and parallel port, and the floppy drive.
684
685 config ARCH_SA1100
686 bool "SA1100-based"
687 select CLKSRC_MMIO
688 select CPU_SA1100
689 select ISA
690 select ARCH_SPARSEMEM_ENABLE
691 select ARCH_MTD_XIP
692 select ARCH_HAS_CPUFREQ
693 select CPU_FREQ
694 select GENERIC_CLOCKEVENTS
695 select HAVE_CLK
696 select HAVE_SCHED_CLOCK
697 select TICK_ONESHOT
698 select ARCH_REQUIRE_GPIOLIB
699 help
700 Support for StrongARM 11x0 based boards.
701
702 config ARCH_S3C2410
703 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
704 select GENERIC_GPIO
705 select ARCH_HAS_CPUFREQ
706 select HAVE_CLK
707 select CLKDEV_LOOKUP
708 select ARCH_USES_GETTIMEOFFSET
709 select HAVE_S3C2410_I2C if I2C
710 help
711 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
712 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
713 the Samsung SMDK2410 development board (and derivatives).
714
715 Note, the S3C2416 and the S3C2450 are so close that they even share
716 the same SoC ID code. This means that there is no separate machine
717 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
718
719 config ARCH_S3C64XX
720 bool "Samsung S3C64XX"
721 select PLAT_SAMSUNG
722 select CPU_V6
723 select ARM_VIC
724 select HAVE_CLK
725 select CLKDEV_LOOKUP
726 select NO_IOPORT
727 select ARCH_USES_GETTIMEOFFSET
728 select ARCH_HAS_CPUFREQ
729 select ARCH_REQUIRE_GPIOLIB
730 select SAMSUNG_CLKSRC
731 select SAMSUNG_IRQ_VIC_TIMER
732 select SAMSUNG_IRQ_UART
733 select S3C_GPIO_TRACK
734 select S3C_GPIO_PULL_UPDOWN
735 select S3C_GPIO_CFG_S3C24XX
736 select S3C_GPIO_CFG_S3C64XX
737 select S3C_DEV_NAND
738 select USB_ARCH_HAS_OHCI
739 select SAMSUNG_GPIOLIB_4BIT
740 select HAVE_S3C2410_I2C if I2C
741 select HAVE_S3C2410_WATCHDOG if WATCHDOG
742 help
743 Samsung S3C64XX series based systems
744
745 config ARCH_S5P64X0
746 bool "Samsung S5P6440 S5P6450"
747 select CPU_V6
748 select GENERIC_GPIO
749 select HAVE_CLK
750 select CLKDEV_LOOKUP
751 select CLKSRC_MMIO
752 select HAVE_S3C2410_WATCHDOG if WATCHDOG
753 select GENERIC_CLOCKEVENTS
754 select HAVE_SCHED_CLOCK
755 select HAVE_S3C2410_I2C if I2C
756 select HAVE_S3C_RTC if RTC_CLASS
757 help
758 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
759 SMDK6450.
760
761 config ARCH_S5PC100
762 bool "Samsung S5PC100"
763 select GENERIC_GPIO
764 select HAVE_CLK
765 select CLKDEV_LOOKUP
766 select CPU_V7
767 select ARM_L1_CACHE_SHIFT_6
768 select ARCH_USES_GETTIMEOFFSET
769 select HAVE_S3C2410_I2C if I2C
770 select HAVE_S3C_RTC if RTC_CLASS
771 select HAVE_S3C2410_WATCHDOG if WATCHDOG
772 help
773 Samsung S5PC100 series based systems
774
775 config ARCH_S5PV210
776 bool "Samsung S5PV210/S5PC110"
777 select CPU_V7
778 select ARCH_SPARSEMEM_ENABLE
779 select ARCH_HAS_HOLES_MEMORYMODEL
780 select GENERIC_GPIO
781 select HAVE_CLK
782 select CLKDEV_LOOKUP
783 select CLKSRC_MMIO
784 select ARM_L1_CACHE_SHIFT_6
785 select ARCH_HAS_CPUFREQ
786 select GENERIC_CLOCKEVENTS
787 select HAVE_SCHED_CLOCK
788 select HAVE_S3C2410_I2C if I2C
789 select HAVE_S3C_RTC if RTC_CLASS
790 select HAVE_S3C2410_WATCHDOG if WATCHDOG
791 help
792 Samsung S5PV210/S5PC110 series based systems
793
794 config ARCH_EXYNOS4
795 bool "Samsung EXYNOS4"
796 select CPU_V7
797 select ARCH_SPARSEMEM_ENABLE
798 select ARCH_HAS_HOLES_MEMORYMODEL
799 select GENERIC_GPIO
800 select HAVE_CLK
801 select CLKDEV_LOOKUP
802 select ARCH_HAS_CPUFREQ
803 select GENERIC_CLOCKEVENTS
804 select HAVE_S3C_RTC if RTC_CLASS
805 select HAVE_S3C2410_I2C if I2C
806 select HAVE_S3C2410_WATCHDOG if WATCHDOG
807 help
808 Samsung EXYNOS4 series based systems
809
810 config ARCH_SHARK
811 bool "Shark"
812 select CPU_SA110
813 select ISA
814 select ISA_DMA
815 select ZONE_DMA
816 select PCI
817 select ARCH_USES_GETTIMEOFFSET
818 help
819 Support for the StrongARM based Digital DNARD machine, also known
820 as "Shark" (<http://www.shark-linux.de/shark.html>).
821
822 config ARCH_TCC_926
823 bool "Telechips TCC ARM926-based systems"
824 select CLKSRC_MMIO
825 select CPU_ARM926T
826 select HAVE_CLK
827 select CLKDEV_LOOKUP
828 select GENERIC_CLOCKEVENTS
829 help
830 Support for Telechips TCC ARM926-based systems.
831
832 config ARCH_U300
833 bool "ST-Ericsson U300 Series"
834 depends on MMU
835 select CLKSRC_MMIO
836 select CPU_ARM926T
837 select HAVE_SCHED_CLOCK
838 select HAVE_TCM
839 select ARM_AMBA
840 select ARM_VIC
841 select GENERIC_CLOCKEVENTS
842 select CLKDEV_LOOKUP
843 select HAVE_MACH_CLKDEV
844 select GENERIC_GPIO
845 help
846 Support for ST-Ericsson U300 series mobile platforms.
847
848 config ARCH_U8500
849 bool "ST-Ericsson U8500 Series"
850 select CPU_V7
851 select ARM_AMBA
852 select GENERIC_CLOCKEVENTS
853 select CLKDEV_LOOKUP
854 select ARCH_REQUIRE_GPIOLIB
855 select ARCH_HAS_CPUFREQ
856 help
857 Support for ST-Ericsson's Ux500 architecture
858
859 config ARCH_NOMADIK
860 bool "STMicroelectronics Nomadik"
861 select ARM_AMBA
862 select ARM_VIC
863 select CPU_ARM926T
864 select CLKDEV_LOOKUP
865 select GENERIC_CLOCKEVENTS
866 select ARCH_REQUIRE_GPIOLIB
867 help
868 Support for the Nomadik platform by ST-Ericsson
869
870 config ARCH_DAVINCI
871 bool "TI DaVinci"
872 select GENERIC_CLOCKEVENTS
873 select ARCH_REQUIRE_GPIOLIB
874 select ZONE_DMA
875 select HAVE_IDE
876 select CLKDEV_LOOKUP
877 select GENERIC_ALLOCATOR
878 select GENERIC_IRQ_CHIP
879 select ARCH_HAS_HOLES_MEMORYMODEL
880 help
881 Support for TI's DaVinci platform.
882
883 config ARCH_OMAP
884 bool "TI OMAP"
885 select HAVE_CLK
886 select ARCH_REQUIRE_GPIOLIB
887 select ARCH_HAS_CPUFREQ
888 select CLKSRC_MMIO
889 select GENERIC_CLOCKEVENTS
890 select HAVE_SCHED_CLOCK
891 select ARCH_HAS_HOLES_MEMORYMODEL
892 help
893 Support for TI's OMAP platform (OMAP1/2/3/4).
894
895 config PLAT_SPEAR
896 bool "ST SPEAr"
897 select ARM_AMBA
898 select ARCH_REQUIRE_GPIOLIB
899 select CLKDEV_LOOKUP
900 select CLKSRC_MMIO
901 select GENERIC_CLOCKEVENTS
902 select HAVE_CLK
903 help
904 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
905
906 config ARCH_VT8500
907 bool "VIA/WonderMedia 85xx"
908 select CPU_ARM926T
909 select GENERIC_GPIO
910 select ARCH_HAS_CPUFREQ
911 select GENERIC_CLOCKEVENTS
912 select ARCH_REQUIRE_GPIOLIB
913 select HAVE_PWM
914 help
915 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
916
917 config ARCH_ZYNQ
918 bool "Xilinx Zynq ARM Cortex A9 Platform"
919 select CPU_V7
920 select GENERIC_TIME
921 select GENERIC_CLOCKEVENTS
922 select CLKDEV_LOOKUP
923 select ARM_GIC
924 select ARM_AMBA
925 select ICST
926 select USE_OF
927 help
928 Support for Xilinx Zynq ARM Cortex A9 Platform
929 endchoice
930
931 #
932 # This is sorted alphabetically by mach-* pathname. However, plat-*
933 # Kconfigs may be included either alphabetically (according to the
934 # plat- suffix) or along side the corresponding mach-* source.
935 #
936 source "arch/arm/mach-at91/Kconfig"
937
938 source "arch/arm/mach-bcmring/Kconfig"
939
940 source "arch/arm/mach-clps711x/Kconfig"
941
942 source "arch/arm/mach-cns3xxx/Kconfig"
943
944 source "arch/arm/mach-davinci/Kconfig"
945
946 source "arch/arm/mach-dove/Kconfig"
947
948 source "arch/arm/mach-ep93xx/Kconfig"
949
950 source "arch/arm/mach-footbridge/Kconfig"
951
952 source "arch/arm/mach-gemini/Kconfig"
953
954 source "arch/arm/mach-h720x/Kconfig"
955
956 source "arch/arm/mach-integrator/Kconfig"
957
958 source "arch/arm/mach-iop32x/Kconfig"
959
960 source "arch/arm/mach-iop33x/Kconfig"
961
962 source "arch/arm/mach-iop13xx/Kconfig"
963
964 source "arch/arm/mach-ixp4xx/Kconfig"
965
966 source "arch/arm/mach-ixp2000/Kconfig"
967
968 source "arch/arm/mach-ixp23xx/Kconfig"
969
970 source "arch/arm/mach-kirkwood/Kconfig"
971
972 source "arch/arm/mach-ks8695/Kconfig"
973
974 source "arch/arm/mach-lpc32xx/Kconfig"
975
976 source "arch/arm/mach-msm/Kconfig"
977
978 source "arch/arm/mach-mv78xx0/Kconfig"
979
980 source "arch/arm/plat-mxc/Kconfig"
981
982 source "arch/arm/mach-mxs/Kconfig"
983
984 source "arch/arm/mach-netx/Kconfig"
985
986 source "arch/arm/mach-nomadik/Kconfig"
987 source "arch/arm/plat-nomadik/Kconfig"
988
989 source "arch/arm/mach-nuc93x/Kconfig"
990
991 source "arch/arm/plat-omap/Kconfig"
992
993 source "arch/arm/mach-omap1/Kconfig"
994
995 source "arch/arm/mach-omap2/Kconfig"
996
997 source "arch/arm/mach-orion5x/Kconfig"
998
999 source "arch/arm/mach-pxa/Kconfig"
1000 source "arch/arm/plat-pxa/Kconfig"
1001
1002 source "arch/arm/mach-mmp/Kconfig"
1003
1004 source "arch/arm/mach-realview/Kconfig"
1005
1006 source "arch/arm/mach-sa1100/Kconfig"
1007
1008 source "arch/arm/plat-samsung/Kconfig"
1009 source "arch/arm/plat-s3c24xx/Kconfig"
1010 source "arch/arm/plat-s5p/Kconfig"
1011
1012 source "arch/arm/plat-spear/Kconfig"
1013
1014 source "arch/arm/plat-tcc/Kconfig"
1015
1016 if ARCH_S3C2410
1017 source "arch/arm/mach-s3c2410/Kconfig"
1018 source "arch/arm/mach-s3c2412/Kconfig"
1019 source "arch/arm/mach-s3c2416/Kconfig"
1020 source "arch/arm/mach-s3c2440/Kconfig"
1021 source "arch/arm/mach-s3c2443/Kconfig"
1022 endif
1023
1024 if ARCH_S3C64XX
1025 source "arch/arm/mach-s3c64xx/Kconfig"
1026 endif
1027
1028 source "arch/arm/mach-s5p64x0/Kconfig"
1029
1030 source "arch/arm/mach-s5pc100/Kconfig"
1031
1032 source "arch/arm/mach-s5pv210/Kconfig"
1033
1034 source "arch/arm/mach-exynos4/Kconfig"
1035
1036 source "arch/arm/mach-shmobile/Kconfig"
1037
1038 source "arch/arm/mach-tegra/Kconfig"
1039
1040 source "arch/arm/mach-u300/Kconfig"
1041
1042 source "arch/arm/mach-ux500/Kconfig"
1043
1044 source "arch/arm/mach-versatile/Kconfig"
1045
1046 source "arch/arm/mach-vexpress/Kconfig"
1047 source "arch/arm/plat-versatile/Kconfig"
1048
1049 source "arch/arm/mach-vt8500/Kconfig"
1050
1051 source "arch/arm/mach-w90x900/Kconfig"
1052
1053 # Definitions to make life easier
1054 config ARCH_ACORN
1055 bool
1056
1057 config PLAT_IOP
1058 bool
1059 select GENERIC_CLOCKEVENTS
1060 select HAVE_SCHED_CLOCK
1061
1062 config PLAT_ORION
1063 bool
1064 select CLKSRC_MMIO
1065 select GENERIC_IRQ_CHIP
1066 select HAVE_SCHED_CLOCK
1067
1068 config PLAT_PXA
1069 bool
1070
1071 config PLAT_VERSATILE
1072 bool
1073
1074 config ARM_TIMER_SP804
1075 bool
1076 select CLKSRC_MMIO
1077
1078 source arch/arm/mm/Kconfig
1079
1080 config IWMMXT
1081 bool "Enable iWMMXt support"
1082 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1083 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1084 help
1085 Enable support for iWMMXt context switching at run time if
1086 running on a CPU that supports it.
1087
1088 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1089 config XSCALE_PMU
1090 bool
1091 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1092 default y
1093
1094 config CPU_HAS_PMU
1095 depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1096 (!ARCH_OMAP3 || OMAP3_EMU)
1097 default y
1098 bool
1099
1100 config MULTI_IRQ_HANDLER
1101 bool
1102 help
1103 Allow each machine to specify it's own IRQ handler at run time.
1104
1105 if !MMU
1106 source "arch/arm/Kconfig-nommu"
1107 endif
1108
1109 config ARM_ERRATA_411920
1110 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1111 depends on CPU_V6 || CPU_V6K
1112 help
1113 Invalidation of the Instruction Cache operation can
1114 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1115 It does not affect the MPCore. This option enables the ARM Ltd.
1116 recommended workaround.
1117
1118 config ARM_ERRATA_430973
1119 bool "ARM errata: Stale prediction on replaced interworking branch"
1120 depends on CPU_V7
1121 help
1122 This option enables the workaround for the 430973 Cortex-A8
1123 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1124 interworking branch is replaced with another code sequence at the
1125 same virtual address, whether due to self-modifying code or virtual
1126 to physical address re-mapping, Cortex-A8 does not recover from the
1127 stale interworking branch prediction. This results in Cortex-A8
1128 executing the new code sequence in the incorrect ARM or Thumb state.
1129 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1130 and also flushes the branch target cache at every context switch.
1131 Note that setting specific bits in the ACTLR register may not be
1132 available in non-secure mode.
1133
1134 config ARM_ERRATA_458693
1135 bool "ARM errata: Processor deadlock when a false hazard is created"
1136 depends on CPU_V7
1137 help
1138 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1139 erratum. For very specific sequences of memory operations, it is
1140 possible for a hazard condition intended for a cache line to instead
1141 be incorrectly associated with a different cache line. This false
1142 hazard might then cause a processor deadlock. The workaround enables
1143 the L1 caching of the NEON accesses and disables the PLD instruction
1144 in the ACTLR register. Note that setting specific bits in the ACTLR
1145 register may not be available in non-secure mode.
1146
1147 config ARM_ERRATA_460075
1148 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1149 depends on CPU_V7
1150 help
1151 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1152 erratum. Any asynchronous access to the L2 cache may encounter a
1153 situation in which recent store transactions to the L2 cache are lost
1154 and overwritten with stale memory contents from external memory. The
1155 workaround disables the write-allocate mode for the L2 cache via the
1156 ACTLR register. Note that setting specific bits in the ACTLR register
1157 may not be available in non-secure mode.
1158
1159 config ARM_ERRATA_742230
1160 bool "ARM errata: DMB operation may be faulty"
1161 depends on CPU_V7 && SMP
1162 help
1163 This option enables the workaround for the 742230 Cortex-A9
1164 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1165 between two write operations may not ensure the correct visibility
1166 ordering of the two writes. This workaround sets a specific bit in
1167 the diagnostic register of the Cortex-A9 which causes the DMB
1168 instruction to behave as a DSB, ensuring the correct behaviour of
1169 the two writes.
1170
1171 config ARM_ERRATA_742231
1172 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1173 depends on CPU_V7 && SMP
1174 help
1175 This option enables the workaround for the 742231 Cortex-A9
1176 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1177 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1178 accessing some data located in the same cache line, may get corrupted
1179 data due to bad handling of the address hazard when the line gets
1180 replaced from one of the CPUs at the same time as another CPU is
1181 accessing it. This workaround sets specific bits in the diagnostic
1182 register of the Cortex-A9 which reduces the linefill issuing
1183 capabilities of the processor.
1184
1185 config PL310_ERRATA_588369
1186 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1187 depends on CACHE_L2X0
1188 help
1189 The PL310 L2 cache controller implements three types of Clean &
1190 Invalidate maintenance operations: by Physical Address
1191 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1192 They are architecturally defined to behave as the execution of a
1193 clean operation followed immediately by an invalidate operation,
1194 both performing to the same memory location. This functionality
1195 is not correctly implemented in PL310 as clean lines are not
1196 invalidated as a result of these operations.
1197
1198 config ARM_ERRATA_720789
1199 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1200 depends on CPU_V7 && SMP
1201 help
1202 This option enables the workaround for the 720789 Cortex-A9 (prior to
1203 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1204 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1205 As a consequence of this erratum, some TLB entries which should be
1206 invalidated are not, resulting in an incoherency in the system page
1207 tables. The workaround changes the TLB flushing routines to invalidate
1208 entries regardless of the ASID.
1209
1210 config PL310_ERRATA_727915
1211 bool "Background Clean & Invalidate by Way operation can cause data corruption"
1212 depends on CACHE_L2X0
1213 help
1214 PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1215 operation (offset 0x7FC). This operation runs in background so that
1216 PL310 can handle normal accesses while it is in progress. Under very
1217 rare circumstances, due to this erratum, write data can be lost when
1218 PL310 treats a cacheable write transaction during a Clean &
1219 Invalidate by Way operation.
1220
1221 config ARM_ERRATA_743622
1222 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1223 depends on CPU_V7
1224 help
1225 This option enables the workaround for the 743622 Cortex-A9
1226 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1227 optimisation in the Cortex-A9 Store Buffer may lead to data
1228 corruption. This workaround sets a specific bit in the diagnostic
1229 register of the Cortex-A9 which disables the Store Buffer
1230 optimisation, preventing the defect from occurring. This has no
1231 visible impact on the overall performance or power consumption of the
1232 processor.
1233
1234 config ARM_ERRATA_751472
1235 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1236 depends on CPU_V7 && SMP
1237 help
1238 This option enables the workaround for the 751472 Cortex-A9 (prior
1239 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1240 completion of a following broadcasted operation if the second
1241 operation is received by a CPU before the ICIALLUIS has completed,
1242 potentially leading to corrupted entries in the cache or TLB.
1243
1244 config ARM_ERRATA_753970
1245 bool "ARM errata: cache sync operation may be faulty"
1246 depends on CACHE_PL310
1247 help
1248 This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1249
1250 Under some condition the effect of cache sync operation on
1251 the store buffer still remains when the operation completes.
1252 This means that the store buffer is always asked to drain and
1253 this prevents it from merging any further writes. The workaround
1254 is to replace the normal offset of cache sync operation (0x730)
1255 by another offset targeting an unmapped PL310 register 0x740.
1256 This has the same effect as the cache sync operation: store buffer
1257 drain and waiting for all buffers empty.
1258
1259 config ARM_ERRATA_754322
1260 bool "ARM errata: possible faulty MMU translations following an ASID switch"
1261 depends on CPU_V7
1262 help
1263 This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1264 r3p*) erratum. A speculative memory access may cause a page table walk
1265 which starts prior to an ASID switch but completes afterwards. This
1266 can populate the micro-TLB with a stale entry which may be hit with
1267 the new ASID. This workaround places two dsb instructions in the mm
1268 switching code so that no page table walks can cross the ASID switch.
1269
1270 config ARM_ERRATA_754327
1271 bool "ARM errata: no automatic Store Buffer drain"
1272 depends on CPU_V7 && SMP
1273 help
1274 This option enables the workaround for the 754327 Cortex-A9 (prior to
1275 r2p0) erratum. The Store Buffer does not have any automatic draining
1276 mechanism and therefore a livelock may occur if an external agent
1277 continuously polls a memory location waiting to observe an update.
1278 This workaround defines cpu_relax() as smp_mb(), preventing correctly
1279 written polling loops from denying visibility of updates to memory.
1280
1281 endmenu
1282
1283 source "arch/arm/common/Kconfig"
1284
1285 menu "Bus support"
1286
1287 config ARM_AMBA
1288 bool
1289
1290 config ISA
1291 bool
1292 help
1293 Find out whether you have ISA slots on your motherboard. ISA is the
1294 name of a bus system, i.e. the way the CPU talks to the other stuff
1295 inside your box. Other bus systems are PCI, EISA, MicroChannel
1296 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1297 newer boards don't support it. If you have ISA, say Y, otherwise N.
1298
1299 # Select ISA DMA controller support
1300 config ISA_DMA
1301 bool
1302 select ISA_DMA_API
1303
1304 # Select ISA DMA interface
1305 config ISA_DMA_API
1306 bool
1307
1308 config PCI
1309 bool "PCI support" if MIGHT_HAVE_PCI
1310 help
1311 Find out whether you have a PCI motherboard. PCI is the name of a
1312 bus system, i.e. the way the CPU talks to the other stuff inside
1313 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1314 VESA. If you have PCI, say Y, otherwise N.
1315
1316 config PCI_DOMAINS
1317 bool
1318 depends on PCI
1319
1320 config PCI_NANOENGINE
1321 bool "BSE nanoEngine PCI support"
1322 depends on SA1100_NANOENGINE
1323 help
1324 Enable PCI on the BSE nanoEngine board.
1325
1326 config PCI_SYSCALL
1327 def_bool PCI
1328
1329 # Select the host bridge type
1330 config PCI_HOST_VIA82C505
1331 bool
1332 depends on PCI && ARCH_SHARK
1333 default y
1334
1335 config PCI_HOST_ITE8152
1336 bool
1337 depends on PCI && MACH_ARMCORE
1338 default y
1339 select DMABOUNCE
1340
1341 source "drivers/pci/Kconfig"
1342
1343 source "drivers/pcmcia/Kconfig"
1344
1345 endmenu
1346
1347 menu "Kernel Features"
1348
1349 source "kernel/time/Kconfig"
1350
1351 config SMP
1352 bool "Symmetric Multi-Processing"
1353 depends on CPU_V6K || CPU_V7
1354 depends on GENERIC_CLOCKEVENTS
1355 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1356 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1357 ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1358 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1359 select USE_GENERIC_SMP_HELPERS
1360 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1361 help
1362 This enables support for systems with more than one CPU. If you have
1363 a system with only one CPU, like most personal computers, say N. If
1364 you have a system with more than one CPU, say Y.
1365
1366 If you say N here, the kernel will run on single and multiprocessor
1367 machines, but will use only one CPU of a multiprocessor machine. If
1368 you say Y here, the kernel will run on many, but not all, single
1369 processor machines. On a single processor machine, the kernel will
1370 run faster if you say N here.
1371
1372 See also <file:Documentation/i386/IO-APIC.txt>,
1373 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1374 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1375
1376 If you don't know what to do here, say N.
1377
1378 config SMP_ON_UP
1379 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1380 depends on EXPERIMENTAL
1381 depends on SMP && !XIP_KERNEL
1382 default y
1383 help
1384 SMP kernels contain instructions which fail on non-SMP processors.
1385 Enabling this option allows the kernel to modify itself to make
1386 these instructions safe. Disabling it allows about 1K of space
1387 savings.
1388
1389 If you don't know what to do here, say Y.
1390
1391 config HAVE_ARM_SCU
1392 bool
1393 help
1394 This option enables support for the ARM system coherency unit
1395
1396 config HAVE_ARM_TWD
1397 bool
1398 depends on SMP
1399 select TICK_ONESHOT
1400 help
1401 This options enables support for the ARM timer and watchdog unit
1402
1403 choice
1404 prompt "Memory split"
1405 default VMSPLIT_3G
1406 help
1407 Select the desired split between kernel and user memory.
1408
1409 If you are not absolutely sure what you are doing, leave this
1410 option alone!
1411
1412 config VMSPLIT_3G
1413 bool "3G/1G user/kernel split"
1414 config VMSPLIT_2G
1415 bool "2G/2G user/kernel split"
1416 config VMSPLIT_1G
1417 bool "1G/3G user/kernel split"
1418 endchoice
1419
1420 config PAGE_OFFSET
1421 hex
1422 default 0x40000000 if VMSPLIT_1G
1423 default 0x80000000 if VMSPLIT_2G
1424 default 0xC0000000
1425
1426 config NR_CPUS
1427 int "Maximum number of CPUs (2-32)"
1428 range 2 32
1429 depends on SMP
1430 default "4"
1431
1432 config HOTPLUG_CPU
1433 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1434 depends on SMP && HOTPLUG && EXPERIMENTAL
1435 help
1436 Say Y here to experiment with turning CPUs off and on. CPUs
1437 can be controlled through /sys/devices/system/cpu.
1438
1439 config LOCAL_TIMERS
1440 bool "Use local timer interrupts"
1441 depends on SMP
1442 default y
1443 select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1444 help
1445 Enable support for local timers on SMP platforms, rather then the
1446 legacy IPI broadcast method. Local timers allows the system
1447 accounting to be spread across the timer interval, preventing a
1448 "thundering herd" at every timer tick.
1449
1450 source kernel/Kconfig.preempt
1451
1452 config HZ
1453 int
1454 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1455 ARCH_S5PV210 || ARCH_EXYNOS4
1456 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1457 default AT91_TIMER_HZ if ARCH_AT91
1458 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1459 default 100
1460
1461 config THUMB2_KERNEL
1462 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1463 depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1464 select AEABI
1465 select ARM_ASM_UNIFIED
1466 help
1467 By enabling this option, the kernel will be compiled in
1468 Thumb-2 mode. A compiler/assembler that understand the unified
1469 ARM-Thumb syntax is needed.
1470
1471 If unsure, say N.
1472
1473 config THUMB2_AVOID_R_ARM_THM_JUMP11
1474 bool "Work around buggy Thumb-2 short branch relocations in gas"
1475 depends on THUMB2_KERNEL && MODULES
1476 default y
1477 help
1478 Various binutils versions can resolve Thumb-2 branches to
1479 locally-defined, preemptible global symbols as short-range "b.n"
1480 branch instructions.
1481
1482 This is a problem, because there's no guarantee the final
1483 destination of the symbol, or any candidate locations for a
1484 trampoline, are within range of the branch. For this reason, the
1485 kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1486 relocation in modules at all, and it makes little sense to add
1487 support.
1488
1489 The symptom is that the kernel fails with an "unsupported
1490 relocation" error when loading some modules.
1491
1492 Until fixed tools are available, passing
1493 -fno-optimize-sibling-calls to gcc should prevent gcc generating
1494 code which hits this problem, at the cost of a bit of extra runtime
1495 stack usage in some cases.
1496
1497 The problem is described in more detail at:
1498 https://bugs.launchpad.net/binutils-linaro/+bug/725126
1499
1500 Only Thumb-2 kernels are affected.
1501
1502 Unless you are sure your tools don't have this problem, say Y.
1503
1504 config ARM_ASM_UNIFIED
1505 bool
1506
1507 config AEABI
1508 bool "Use the ARM EABI to compile the kernel"
1509 help
1510 This option allows for the kernel to be compiled using the latest
1511 ARM ABI (aka EABI). This is only useful if you are using a user
1512 space environment that is also compiled with EABI.
1513
1514 Since there are major incompatibilities between the legacy ABI and
1515 EABI, especially with regard to structure member alignment, this
1516 option also changes the kernel syscall calling convention to
1517 disambiguate both ABIs and allow for backward compatibility support
1518 (selected with CONFIG_OABI_COMPAT).
1519
1520 To use this you need GCC version 4.0.0 or later.
1521
1522 config OABI_COMPAT
1523 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1524 depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1525 default y
1526 help
1527 This option preserves the old syscall interface along with the
1528 new (ARM EABI) one. It also provides a compatibility layer to
1529 intercept syscalls that have structure arguments which layout
1530 in memory differs between the legacy ABI and the new ARM EABI
1531 (only for non "thumb" binaries). This option adds a tiny
1532 overhead to all syscalls and produces a slightly larger kernel.
1533 If you know you'll be using only pure EABI user space then you
1534 can say N here. If this option is not selected and you attempt
1535 to execute a legacy ABI binary then the result will be
1536 UNPREDICTABLE (in fact it can be predicted that it won't work
1537 at all). If in doubt say Y.
1538
1539 config ARCH_HAS_HOLES_MEMORYMODEL
1540 bool
1541
1542 config ARCH_SPARSEMEM_ENABLE
1543 bool
1544
1545 config ARCH_SPARSEMEM_DEFAULT
1546 def_bool ARCH_SPARSEMEM_ENABLE
1547
1548 config ARCH_SELECT_MEMORY_MODEL
1549 def_bool ARCH_SPARSEMEM_ENABLE
1550
1551 config HAVE_ARCH_PFN_VALID
1552 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1553
1554 config HIGHMEM
1555 bool "High Memory Support"
1556 depends on MMU
1557 help
1558 The address space of ARM processors is only 4 Gigabytes large
1559 and it has to accommodate user address space, kernel address
1560 space as well as some memory mapped IO. That means that, if you
1561 have a large amount of physical memory and/or IO, not all of the
1562 memory can be "permanently mapped" by the kernel. The physical
1563 memory that is not permanently mapped is called "high memory".
1564
1565 Depending on the selected kernel/user memory split, minimum
1566 vmalloc space and actual amount of RAM, you may not need this
1567 option which should result in a slightly faster kernel.
1568
1569 If unsure, say n.
1570
1571 config HIGHPTE
1572 bool "Allocate 2nd-level pagetables from highmem"
1573 depends on HIGHMEM
1574
1575 config HW_PERF_EVENTS
1576 bool "Enable hardware performance counter support for perf events"
1577 depends on PERF_EVENTS && CPU_HAS_PMU
1578 default y
1579 help
1580 Enable hardware performance counter support for perf events. If
1581 disabled, perf events will use software events only.
1582
1583 source "mm/Kconfig"
1584
1585 config FORCE_MAX_ZONEORDER
1586 int "Maximum zone order" if ARCH_SHMOBILE
1587 range 11 64 if ARCH_SHMOBILE
1588 default "9" if SA1111
1589 default "11"
1590 help
1591 The kernel memory allocator divides physically contiguous memory
1592 blocks into "zones", where each zone is a power of two number of
1593 pages. This option selects the largest power of two that the kernel
1594 keeps in the memory allocator. If you need to allocate very large
1595 blocks of physically contiguous memory, then you may need to
1596 increase this value.
1597
1598 This config option is actually maximum order plus one. For example,
1599 a value of 11 means that the largest free memory block is 2^10 pages.
1600
1601 config LEDS
1602 bool "Timer and CPU usage LEDs"
1603 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1604 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1605 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1606 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1607 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1608 ARCH_AT91 || ARCH_DAVINCI || \
1609 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1610 help
1611 If you say Y here, the LEDs on your machine will be used
1612 to provide useful information about your current system status.
1613
1614 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1615 be able to select which LEDs are active using the options below. If
1616 you are compiling a kernel for the EBSA-110 or the LART however, the
1617 red LED will simply flash regularly to indicate that the system is
1618 still functional. It is safe to say Y here if you have a CATS
1619 system, but the driver will do nothing.
1620
1621 config LEDS_TIMER
1622 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1623 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1624 || MACH_OMAP_PERSEUS2
1625 depends on LEDS
1626 depends on !GENERIC_CLOCKEVENTS
1627 default y if ARCH_EBSA110
1628 help
1629 If you say Y here, one of the system LEDs (the green one on the
1630 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1631 will flash regularly to indicate that the system is still
1632 operational. This is mainly useful to kernel hackers who are
1633 debugging unstable kernels.
1634
1635 The LART uses the same LED for both Timer LED and CPU usage LED
1636 functions. You may choose to use both, but the Timer LED function
1637 will overrule the CPU usage LED.
1638
1639 config LEDS_CPU
1640 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1641 !ARCH_OMAP) \
1642 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1643 || MACH_OMAP_PERSEUS2
1644 depends on LEDS
1645 help
1646 If you say Y here, the red LED will be used to give a good real
1647 time indication of CPU usage, by lighting whenever the idle task
1648 is not currently executing.
1649
1650 The LART uses the same LED for both Timer LED and CPU usage LED
1651 functions. You may choose to use both, but the Timer LED function
1652 will overrule the CPU usage LED.
1653
1654 config ALIGNMENT_TRAP
1655 bool
1656 depends on CPU_CP15_MMU
1657 default y if !ARCH_EBSA110
1658 select HAVE_PROC_CPU if PROC_FS
1659 help
1660 ARM processors cannot fetch/store information which is not
1661 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1662 address divisible by 4. On 32-bit ARM processors, these non-aligned
1663 fetch/store instructions will be emulated in software if you say
1664 here, which has a severe performance impact. This is necessary for
1665 correct operation of some network protocols. With an IP-only
1666 configuration it is safe to say N, otherwise say Y.
1667
1668 config UACCESS_WITH_MEMCPY
1669 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1670 depends on MMU && EXPERIMENTAL
1671 default y if CPU_FEROCEON
1672 help
1673 Implement faster copy_to_user and clear_user methods for CPU
1674 cores where a 8-word STM instruction give significantly higher
1675 memory write throughput than a sequence of individual 32bit stores.
1676
1677 A possible side effect is a slight increase in scheduling latency
1678 between threads sharing the same address space if they invoke
1679 such copy operations with large buffers.
1680
1681 However, if the CPU data cache is using a write-allocate mode,
1682 this option is unlikely to provide any performance gain.
1683
1684 config SECCOMP
1685 bool
1686 prompt "Enable seccomp to safely compute untrusted bytecode"
1687 ---help---
1688 This kernel feature is useful for number crunching applications
1689 that may need to compute untrusted bytecode during their
1690 execution. By using pipes or other transports made available to
1691 the process as file descriptors supporting the read/write
1692 syscalls, it's possible to isolate those applications in
1693 their own address space using seccomp. Once seccomp is
1694 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1695 and the task is only allowed to execute a few safe syscalls
1696 defined by each seccomp mode.
1697
1698 config CC_STACKPROTECTOR
1699 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1700 depends on EXPERIMENTAL
1701 help
1702 This option turns on the -fstack-protector GCC feature. This
1703 feature puts, at the beginning of functions, a canary value on
1704 the stack just before the return address, and validates
1705 the value just before actually returning. Stack based buffer
1706 overflows (that need to overwrite this return address) now also
1707 overwrite the canary, which gets detected and the attack is then
1708 neutralized via a kernel panic.
1709 This feature requires gcc version 4.2 or above.
1710
1711 config DEPRECATED_PARAM_STRUCT
1712 bool "Provide old way to pass kernel parameters"
1713 help
1714 This was deprecated in 2001 and announced to live on for 5 years.
1715 Some old boot loaders still use this way.
1716
1717 endmenu
1718
1719 menu "Boot options"
1720
1721 config USE_OF
1722 bool "Flattened Device Tree support"
1723 select OF
1724 select OF_EARLY_FLATTREE
1725 select IRQ_DOMAIN
1726 help
1727 Include support for flattened device tree machine descriptions.
1728
1729 # Compressed boot loader in ROM. Yes, we really want to ask about
1730 # TEXT and BSS so we preserve their values in the config files.
1731 config ZBOOT_ROM_TEXT
1732 hex "Compressed ROM boot loader base address"
1733 default "0"
1734 help
1735 The physical address at which the ROM-able zImage is to be
1736 placed in the target. Platforms which normally make use of
1737 ROM-able zImage formats normally set this to a suitable
1738 value in their defconfig file.
1739
1740 If ZBOOT_ROM is not enabled, this has no effect.
1741
1742 config ZBOOT_ROM_BSS
1743 hex "Compressed ROM boot loader BSS address"
1744 default "0"
1745 help
1746 The base address of an area of read/write memory in the target
1747 for the ROM-able zImage which must be available while the
1748 decompressor is running. It must be large enough to hold the
1749 entire decompressed kernel plus an additional 128 KiB.
1750 Platforms which normally make use of ROM-able zImage formats
1751 normally set this to a suitable value in their defconfig file.
1752
1753 If ZBOOT_ROM is not enabled, this has no effect.
1754
1755 config ZBOOT_ROM
1756 bool "Compressed boot loader in ROM/flash"
1757 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1758 help
1759 Say Y here if you intend to execute your compressed kernel image
1760 (zImage) directly from ROM or flash. If unsure, say N.
1761
1762 choice
1763 prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1764 depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1765 default ZBOOT_ROM_NONE
1766 help
1767 Include experimental SD/MMC loading code in the ROM-able zImage.
1768 With this enabled it is possible to write the the ROM-able zImage
1769 kernel image to an MMC or SD card and boot the kernel straight
1770 from the reset vector. At reset the processor Mask ROM will load
1771 the first part of the the ROM-able zImage which in turn loads the
1772 rest the kernel image to RAM.
1773
1774 config ZBOOT_ROM_NONE
1775 bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1776 help
1777 Do not load image from SD or MMC
1778
1779 config ZBOOT_ROM_MMCIF
1780 bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1781 help
1782 Load image from MMCIF hardware block.
1783
1784 config ZBOOT_ROM_SH_MOBILE_SDHI
1785 bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1786 help
1787 Load image from SDHI hardware block
1788
1789 endchoice
1790
1791 config CMDLINE
1792 string "Default kernel command string"
1793 default ""
1794 help
1795 On some architectures (EBSA110 and CATS), there is currently no way
1796 for the boot loader to pass arguments to the kernel. For these
1797 architectures, you should supply some command-line options at build
1798 time by entering them here. As a minimum, you should specify the
1799 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1800
1801 choice
1802 prompt "Kernel command line type" if CMDLINE != ""
1803 default CMDLINE_FROM_BOOTLOADER
1804
1805 config CMDLINE_FROM_BOOTLOADER
1806 bool "Use bootloader kernel arguments if available"
1807 help
1808 Uses the command-line options passed by the boot loader. If
1809 the boot loader doesn't provide any, the default kernel command
1810 string provided in CMDLINE will be used.
1811
1812 config CMDLINE_EXTEND
1813 bool "Extend bootloader kernel arguments"
1814 help
1815 The command-line arguments provided by the boot loader will be
1816 appended to the default kernel command string.
1817
1818 config CMDLINE_FORCE
1819 bool "Always use the default kernel command string"
1820 help
1821 Always use the default kernel command string, even if the boot
1822 loader passes other arguments to the kernel.
1823 This is useful if you cannot or don't want to change the
1824 command-line options your boot loader passes to the kernel.
1825 endchoice
1826
1827 config XIP_KERNEL
1828 bool "Kernel Execute-In-Place from ROM"
1829 depends on !ZBOOT_ROM
1830 help
1831 Execute-In-Place allows the kernel to run from non-volatile storage
1832 directly addressable by the CPU, such as NOR flash. This saves RAM
1833 space since the text section of the kernel is not loaded from flash
1834 to RAM. Read-write sections, such as the data section and stack,
1835 are still copied to RAM. The XIP kernel is not compressed since
1836 it has to run directly from flash, so it will take more space to
1837 store it. The flash address used to link the kernel object files,
1838 and for storing it, is configuration dependent. Therefore, if you
1839 say Y here, you must know the proper physical address where to
1840 store the kernel image depending on your own flash memory usage.
1841
1842 Also note that the make target becomes "make xipImage" rather than
1843 "make zImage" or "make Image". The final kernel binary to put in
1844 ROM memory will be arch/arm/boot/xipImage.
1845
1846 If unsure, say N.
1847
1848 config XIP_PHYS_ADDR
1849 hex "XIP Kernel Physical Location"
1850 depends on XIP_KERNEL
1851 default "0x00080000"
1852 help
1853 This is the physical address in your flash memory the kernel will
1854 be linked for and stored to. This address is dependent on your
1855 own flash usage.
1856
1857 config KEXEC
1858 bool "Kexec system call (EXPERIMENTAL)"
1859 depends on EXPERIMENTAL
1860 help
1861 kexec is a system call that implements the ability to shutdown your
1862 current kernel, and to start another kernel. It is like a reboot
1863 but it is independent of the system firmware. And like a reboot
1864 you can start any kernel with it, not just Linux.
1865
1866 It is an ongoing process to be certain the hardware in a machine
1867 is properly shutdown, so do not be surprised if this code does not
1868 initially work for you. It may help to enable device hotplugging
1869 support.
1870
1871 config ATAGS_PROC
1872 bool "Export atags in procfs"
1873 depends on KEXEC
1874 default y
1875 help
1876 Should the atags used to boot the kernel be exported in an "atags"
1877 file in procfs. Useful with kexec.
1878
1879 config CRASH_DUMP
1880 bool "Build kdump crash kernel (EXPERIMENTAL)"
1881 depends on EXPERIMENTAL
1882 help
1883 Generate crash dump after being started by kexec. This should
1884 be normally only set in special crash dump kernels which are
1885 loaded in the main kernel with kexec-tools into a specially
1886 reserved region and then later executed after a crash by
1887 kdump/kexec. The crash dump kernel must be compiled to a
1888 memory address not used by the main kernel
1889
1890 For more details see Documentation/kdump/kdump.txt
1891
1892 config AUTO_ZRELADDR
1893 bool "Auto calculation of the decompressed kernel image address"
1894 depends on !ZBOOT_ROM && !ARCH_U300
1895 help
1896 ZRELADDR is the physical address where the decompressed kernel
1897 image will be placed. If AUTO_ZRELADDR is selected, the address
1898 will be determined at run-time by masking the current IP with
1899 0xf8000000. This assumes the zImage being placed in the first 128MB
1900 from start of memory.
1901
1902 endmenu
1903
1904 menu "CPU Power Management"
1905
1906 if ARCH_HAS_CPUFREQ
1907
1908 source "drivers/cpufreq/Kconfig"
1909
1910 config CPU_FREQ_IMX
1911 tristate "CPUfreq driver for i.MX CPUs"
1912 depends on ARCH_MXC && CPU_FREQ
1913 help
1914 This enables the CPUfreq driver for i.MX CPUs.
1915
1916 config CPU_FREQ_SA1100
1917 bool
1918
1919 config CPU_FREQ_SA1110
1920 bool
1921
1922 config CPU_FREQ_INTEGRATOR
1923 tristate "CPUfreq driver for ARM Integrator CPUs"
1924 depends on ARCH_INTEGRATOR && CPU_FREQ
1925 default y
1926 help
1927 This enables the CPUfreq driver for ARM Integrator CPUs.
1928
1929 For details, take a look at <file:Documentation/cpu-freq>.
1930
1931 If in doubt, say Y.
1932
1933 config CPU_FREQ_PXA
1934 bool
1935 depends on CPU_FREQ && ARCH_PXA && PXA25x
1936 default y
1937 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1938
1939 config CPU_FREQ_S3C
1940 bool
1941 help
1942 Internal configuration node for common cpufreq on Samsung SoC
1943
1944 config CPU_FREQ_S3C24XX
1945 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1946 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1947 select CPU_FREQ_S3C
1948 help
1949 This enables the CPUfreq driver for the Samsung S3C24XX family
1950 of CPUs.
1951
1952 For details, take a look at <file:Documentation/cpu-freq>.
1953
1954 If in doubt, say N.
1955
1956 config CPU_FREQ_S3C24XX_PLL
1957 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1958 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1959 help
1960 Compile in support for changing the PLL frequency from the
1961 S3C24XX series CPUfreq driver. The PLL takes time to settle
1962 after a frequency change, so by default it is not enabled.
1963
1964 This also means that the PLL tables for the selected CPU(s) will
1965 be built which may increase the size of the kernel image.
1966
1967 config CPU_FREQ_S3C24XX_DEBUG
1968 bool "Debug CPUfreq Samsung driver core"
1969 depends on CPU_FREQ_S3C24XX
1970 help
1971 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1972
1973 config CPU_FREQ_S3C24XX_IODEBUG
1974 bool "Debug CPUfreq Samsung driver IO timing"
1975 depends on CPU_FREQ_S3C24XX
1976 help
1977 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1978
1979 config CPU_FREQ_S3C24XX_DEBUGFS
1980 bool "Export debugfs for CPUFreq"
1981 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1982 help
1983 Export status information via debugfs.
1984
1985 endif
1986
1987 source "drivers/cpuidle/Kconfig"
1988
1989 endmenu
1990
1991 menu "Floating point emulation"
1992
1993 comment "At least one emulation must be selected"
1994
1995 config FPE_NWFPE
1996 bool "NWFPE math emulation"
1997 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1998 ---help---
1999 Say Y to include the NWFPE floating point emulator in the kernel.
2000 This is necessary to run most binaries. Linux does not currently
2001 support floating point hardware so you need to say Y here even if
2002 your machine has an FPA or floating point co-processor podule.
2003
2004 You may say N here if you are going to load the Acorn FPEmulator
2005 early in the bootup.
2006
2007 config FPE_NWFPE_XP
2008 bool "Support extended precision"
2009 depends on FPE_NWFPE
2010 help
2011 Say Y to include 80-bit support in the kernel floating-point
2012 emulator. Otherwise, only 32 and 64-bit support is compiled in.
2013 Note that gcc does not generate 80-bit operations by default,
2014 so in most cases this option only enlarges the size of the
2015 floating point emulator without any good reason.
2016
2017 You almost surely want to say N here.
2018
2019 config FPE_FASTFPE
2020 bool "FastFPE math emulation (EXPERIMENTAL)"
2021 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2022 ---help---
2023 Say Y here to include the FAST floating point emulator in the kernel.
2024 This is an experimental much faster emulator which now also has full
2025 precision for the mantissa. It does not support any exceptions.
2026 It is very simple, and approximately 3-6 times faster than NWFPE.
2027
2028 It should be sufficient for most programs. It may be not suitable
2029 for scientific calculations, but you have to check this for yourself.
2030 If you do not feel you need a faster FP emulation you should better
2031 choose NWFPE.
2032
2033 config VFP
2034 bool "VFP-format floating point maths"
2035 depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2036 help
2037 Say Y to include VFP support code in the kernel. This is needed
2038 if your hardware includes a VFP unit.
2039
2040 Please see <file:Documentation/arm/VFP/release-notes.txt> for
2041 release notes and additional status information.
2042
2043 Say N if your target does not have VFP hardware.
2044
2045 config VFPv3
2046 bool
2047 depends on VFP
2048 default y if CPU_V7
2049
2050 config NEON
2051 bool "Advanced SIMD (NEON) Extension support"
2052 depends on VFPv3 && CPU_V7
2053 help
2054 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2055 Extension.
2056
2057 endmenu
2058
2059 menu "Userspace binary formats"
2060
2061 source "fs/Kconfig.binfmt"
2062
2063 config ARTHUR
2064 tristate "RISC OS personality"
2065 depends on !AEABI
2066 help
2067 Say Y here to include the kernel code necessary if you want to run
2068 Acorn RISC OS/Arthur binaries under Linux. This code is still very
2069 experimental; if this sounds frightening, say N and sleep in peace.
2070 You can also say M here to compile this support as a module (which
2071 will be called arthur).
2072
2073 endmenu
2074
2075 menu "Power management options"
2076
2077 source "kernel/power/Kconfig"
2078
2079 config ARCH_SUSPEND_POSSIBLE
2080 depends on !ARCH_S5P64X0 && !ARCH_S5PC100
2081 depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2082 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2083 def_bool y
2084
2085 endmenu
2086
2087 source "net/Kconfig"
2088
2089 source "drivers/Kconfig"
2090
2091 source "fs/Kconfig"
2092
2093 source "arch/arm/Kconfig.debug"
2094
2095 source "security/Kconfig"
2096
2097 source "crypto/Kconfig"
2098
2099 source "lib/Kconfig"
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