arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if !XIP_KERNEL
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         select GENERIC_IRQ_SHOW
  32         select CPU_PM if (SUSPEND || CPU_IDLE)
  33         help
  34           The ARM series is a line of low-power-consumption RISC chip designs
  35           licensed by ARM Ltd and targeted at embedded applications and
  36           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  37           manufactured, but legacy ARM-based PC hardware remains popular in
  38           Europe.  There is an ARM Linux project with a web page at
  39           <http://www.arm.linux.org.uk/>.
  40
  41 config ARM_HAS_SG_CHAIN
  42         bool
  43
  44 config HAVE_PWM
  45         bool
  46
  47 config MIGHT_HAVE_PCI
  48         bool
  49
  50 config SYS_SUPPORTS_APM_EMULATION
  51         bool
  52
  53 config HAVE_SCHED_CLOCK
  54         bool
  55
  56 config GENERIC_GPIO
  57         bool
  58
  59 config ARCH_USES_GETTIMEOFFSET
  60         bool
  61         default n
  62
  63 config GENERIC_CLOCKEVENTS
  64         bool
  65
  66 config GENERIC_CLOCKEVENTS_BROADCAST
  67         bool
  68         depends on GENERIC_CLOCKEVENTS
  69         default y if SMP
  70
  71 config KTIME_SCALAR
  72         bool
  73         default y
  74
  75 config HAVE_TCM
  76         bool
  77         select GENERIC_ALLOCATOR
  78
  79 config HAVE_PROC_CPU
  80         bool
  81
  82 config NO_IOPORT
  83         bool
  84
  85 config EISA
  86         bool
  87         ---help---
  88           The Extended Industry Standard Architecture (EISA) bus was
  89           developed as an open alternative to the IBM MicroChannel bus.
  90
  91           The EISA bus provided some of the features of the IBM MicroChannel
  92           bus while maintaining backward compatibility with cards made for
  93           the older ISA bus.  The EISA bus saw limited use between 1988 and
  94           1995 when it was made obsolete by the PCI bus.
  95
  96           Say Y here if you are building a kernel for an EISA-based machine.
  97
  98           Otherwise, say N.
  99
 100 config SBUS
 101         bool
 102
 103 config MCA
 104         bool
 105         help
 106           MicroChannel Architecture is found in some IBM PS/2 machines and
 107           laptops.  It is a bus system similar to PCI or ISA. See
 108           <file:Documentation/mca.txt> (and especially the web page given
 109           there) before attempting to build an MCA bus kernel.
 110
 111 config STACKTRACE_SUPPORT
 112         bool
 113         default y
 114
 115 config HAVE_LATENCYTOP_SUPPORT
 116         bool
 117         depends on !SMP
 118         default y
 119
 120 config LOCKDEP_SUPPORT
 121         bool
 122         default y
 123
 124 config TRACE_IRQFLAGS_SUPPORT
 125         bool
 126         default y
 127
 128 config HARDIRQS_SW_RESEND
 129         bool
 130         default y
 131
 132 config GENERIC_IRQ_PROBE
 133         bool
 134         default y
 135
 136 config GENERIC_LOCKBREAK
 137         bool
 138         default y
 139         depends on SMP && PREEMPT
 140
 141 config RWSEM_GENERIC_SPINLOCK
 142         bool
 143         default y
 144
 145 config RWSEM_XCHGADD_ALGORITHM
 146         bool
 147
 148 config ARCH_HAS_ILOG2_U32
 149         bool
 150
 151 config ARCH_HAS_ILOG2_U64
 152         bool
 153
 154 config ARCH_HAS_CPUFREQ
 155         bool
 156         help
 157           Internal node to signify that the ARCH has CPUFREQ support
 158           and that the relevant menu configurations are displayed for
 159           it.
 160
 161 config ARCH_HAS_CPU_IDLE_WAIT
 162        def_bool y
 163
 164 config GENERIC_HWEIGHT
 165         bool
 166         default y
 167
 168 config GENERIC_CALIBRATE_DELAY
 169         bool
 170         default y
 171
 172 config ARCH_MAY_HAVE_PC_FDC
 173         bool
 174
 175 config ZONE_DMA
 176         bool
 177
 178 config NEED_DMA_MAP_STATE
 179        def_bool y
 180
 181 config GENERIC_ISA_DMA
 182         bool
 183
 184 config FIQ
 185         bool
 186
 187 config ARCH_MTD_XIP
 188         bool
 189
 190 config VECTORS_BASE
 191         hex
 192         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 193         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 194         default 0x00000000
 195         help
 196           The base address of exception vectors.
 197
 198 config ARM_PATCH_PHYS_VIRT
 199         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 200         default y
 201         depends on !XIP_KERNEL && MMU
 202         depends on !ARCH_REALVIEW || !SPARSEMEM
 203         help
 204           Patch phys-to-virt and virt-to-phys translation functions at
 205           boot and module load time according to the position of the
 206           kernel in system memory.
 207
 208           This can only be used with non-XIP MMU kernels where the base
 209           of physical memory is at a 16MB boundary.
 210
 211           Only disable this option if you know that you do not require
 212           this feature (eg, building a kernel for a single machine) and
 213           you need to shrink the kernel to the minimal size.
 214
 215 config NEED_MACH_MEMORY_H
 216         bool
 217         help
 218           Select this when mach/memory.h is required to provide special
 219           definitions for this platform.  The need for mach/memory.h should
 220           be avoided when possible.
 221
 222 config PHYS_OFFSET
 223         hex "Physical address of main memory"
 224         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 225         help
 226           Please provide the physical address corresponding to the
 227           location of main memory in your system.
 228
 229 source "init/Kconfig"
 230
 231 source "kernel/Kconfig.freezer"
 232
 233 menu "System Type"
 234
 235 config MMU
 236         bool "MMU-based Paged Memory Management Support"
 237         default y
 238         help
 239           Select if you want MMU-based virtualised addressing space
 240           support by paged memory management. If unsure, say 'Y'.
 241
 242 #
 243 # The "ARM system type" choice list is ordered alphabetically by option
 244 # text.  Please add new entries in the option alphabetic order.
 245 #
 246 choice
 247         prompt "ARM system type"
 248         default ARCH_VERSATILE
 249
 250 config ARCH_INTEGRATOR
 251         bool "ARM Ltd. Integrator family"
 252         select ARM_AMBA
 253         select ARCH_HAS_CPUFREQ
 254         select CLKDEV_LOOKUP
 255         select HAVE_MACH_CLKDEV
 256         select ICST
 257         select GENERIC_CLOCKEVENTS
 258         select PLAT_VERSATILE
 259         select PLAT_VERSATILE_FPGA_IRQ
 260         select NEED_MACH_MEMORY_H
 261         help
 262           Support for ARM's Integrator platform.
 263
 264 config ARCH_REALVIEW
 265         bool "ARM Ltd. RealView family"
 266         select ARM_AMBA
 267         select CLKDEV_LOOKUP
 268         select HAVE_MACH_CLKDEV
 269         select ICST
 270         select GENERIC_CLOCKEVENTS
 271         select ARCH_WANT_OPTIONAL_GPIOLIB
 272         select PLAT_VERSATILE
 273         select PLAT_VERSATILE_CLCD
 274         select ARM_TIMER_SP804
 275         select GPIO_PL061 if GPIOLIB
 276         select NEED_MACH_MEMORY_H
 277         help
 278           This enables support for ARM Ltd RealView boards.
 279
 280 config ARCH_VERSATILE
 281         bool "ARM Ltd. Versatile family"
 282         select ARM_AMBA
 283         select ARM_VIC
 284         select CLKDEV_LOOKUP
 285         select HAVE_MACH_CLKDEV
 286         select ICST
 287         select GENERIC_CLOCKEVENTS
 288         select ARCH_WANT_OPTIONAL_GPIOLIB
 289         select PLAT_VERSATILE
 290         select PLAT_VERSATILE_CLCD
 291         select PLAT_VERSATILE_FPGA_IRQ
 292         select ARM_TIMER_SP804
 293         help
 294           This enables support for ARM Ltd Versatile board.
 295
 296 config ARCH_VEXPRESS
 297         bool "ARM Ltd. Versatile Express family"
 298         select ARCH_WANT_OPTIONAL_GPIOLIB
 299         select ARM_AMBA
 300         select ARM_TIMER_SP804
 301         select CLKDEV_LOOKUP
 302         select HAVE_MACH_CLKDEV
 303         select GENERIC_CLOCKEVENTS
 304         select HAVE_CLK
 305         select HAVE_PATA_PLATFORM
 306         select ICST
 307         select PLAT_VERSATILE
 308         select PLAT_VERSATILE_CLCD
 309         help
 310           This enables support for the ARM Ltd Versatile Express boards.
 311
 312 config ARCH_AT91
 313         bool "Atmel AT91"
 314         select ARCH_REQUIRE_GPIOLIB
 315         select HAVE_CLK
 316         select CLKDEV_LOOKUP
 317         help
 318           This enables support for systems based on the Atmel AT91RM9200,
 319           AT91SAM9 and AT91CAP9 processors.
 320
 321 config ARCH_BCMRING
 322         bool "Broadcom BCMRING"
 323         depends on MMU
 324         select CPU_V6
 325         select ARM_AMBA
 326         select ARM_TIMER_SP804
 327         select CLKDEV_LOOKUP
 328         select GENERIC_CLOCKEVENTS
 329         select ARCH_WANT_OPTIONAL_GPIOLIB
 330         help
 331           Support for Broadcom's BCMRing platform.
 332
 333 config ARCH_CLPS711X
 334         bool "Cirrus Logic CLPS711x/EP721x-based"
 335         select CPU_ARM720T
 336         select ARCH_USES_GETTIMEOFFSET
 337         select NEED_MACH_MEMORY_H
 338         help
 339           Support for Cirrus Logic 711x/721x based boards.
 340
 341 config ARCH_CNS3XXX
 342         bool "Cavium Networks CNS3XXX family"
 343         select CPU_V6K
 344         select GENERIC_CLOCKEVENTS
 345         select ARM_GIC
 346         select MIGHT_HAVE_PCI
 347         select PCI_DOMAINS if PCI
 348         help
 349           Support for Cavium Networks CNS3XXX platform.
 350
 351 config ARCH_GEMINI
 352         bool "Cortina Systems Gemini"
 353         select CPU_FA526
 354         select ARCH_REQUIRE_GPIOLIB
 355         select ARCH_USES_GETTIMEOFFSET
 356         help
 357           Support for the Cortina Systems Gemini family SoCs
 358
 359 config ARCH_PRIMA2
 360         bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 361         select CPU_V7
 362         select GENERIC_TIME
 363         select NO_IOPORT
 364         select GENERIC_CLOCKEVENTS
 365         select CLKDEV_LOOKUP
 366         select GENERIC_IRQ_CHIP
 367         select USE_OF
 368         select ZONE_DMA
 369         help
 370           Support for CSR SiRFSoC ARM Cortex A9 Platform
 371
 372 config ARCH_EBSA110
 373         bool "EBSA-110"
 374         select CPU_SA110
 375         select ISA
 376         select NO_IOPORT
 377         select ARCH_USES_GETTIMEOFFSET
 378         select NEED_MACH_MEMORY_H
 379         help
 380           This is an evaluation board for the StrongARM processor available
 381           from Digital. It has limited hardware on-board, including an
 382           Ethernet interface, two PCMCIA sockets, two serial ports and a
 383           parallel port.
 384
 385 config ARCH_EP93XX
 386         bool "EP93xx-based"
 387         select CPU_ARM920T
 388         select ARM_AMBA
 389         select ARM_VIC
 390         select CLKDEV_LOOKUP
 391         select ARCH_REQUIRE_GPIOLIB
 392         select ARCH_HAS_HOLES_MEMORYMODEL
 393         select ARCH_USES_GETTIMEOFFSET
 394         select NEED_MEMORY_H
 395         help
 396           This enables support for the Cirrus EP93xx series of CPUs.
 397
 398 config ARCH_FOOTBRIDGE
 399         bool "FootBridge"
 400         select CPU_SA110
 401         select FOOTBRIDGE
 402         select GENERIC_CLOCKEVENTS
 403         select NEED_MACH_MEMORY_H
 404         help
 405           Support for systems based on the DC21285 companion chip
 406           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 407
 408 config ARCH_MXC
 409         bool "Freescale MXC/iMX-based"
 410         select GENERIC_CLOCKEVENTS
 411         select ARCH_REQUIRE_GPIOLIB
 412         select CLKDEV_LOOKUP
 413         select CLKSRC_MMIO
 414         select GENERIC_IRQ_CHIP
 415         select HAVE_SCHED_CLOCK
 416         help
 417           Support for Freescale MXC/iMX-based family of processors
 418
 419 config ARCH_MXS
 420         bool "Freescale MXS-based"
 421         select GENERIC_CLOCKEVENTS
 422         select ARCH_REQUIRE_GPIOLIB
 423         select CLKDEV_LOOKUP
 424         select CLKSRC_MMIO
 425         help
 426           Support for Freescale MXS-based family of processors
 427
 428 config ARCH_NETX
 429         bool "Hilscher NetX based"
 430         select CLKSRC_MMIO
 431         select CPU_ARM926T
 432         select ARM_VIC
 433         select GENERIC_CLOCKEVENTS
 434         help
 435           This enables support for systems based on the Hilscher NetX Soc
 436
 437 config ARCH_H720X
 438         bool "Hynix HMS720x-based"
 439         select CPU_ARM720T
 440         select ISA_DMA_API
 441         select ARCH_USES_GETTIMEOFFSET
 442         help
 443           This enables support for systems based on the Hynix HMS720x
 444
 445 config ARCH_IOP13XX
 446         bool "IOP13xx-based"
 447         depends on MMU
 448         select CPU_XSC3
 449         select PLAT_IOP
 450         select PCI
 451         select ARCH_SUPPORTS_MSI
 452         select VMSPLIT_1G
 453         select NEED_MACH_MEMORY_H
 454         help
 455           Support for Intel's IOP13XX (XScale) family of processors.
 456
 457 config ARCH_IOP32X
 458         bool "IOP32x-based"
 459         depends on MMU
 460         select CPU_XSCALE
 461         select PLAT_IOP
 462         select PCI
 463         select ARCH_REQUIRE_GPIOLIB
 464         help
 465           Support for Intel's 80219 and IOP32X (XScale) family of
 466           processors.
 467
 468 config ARCH_IOP33X
 469         bool "IOP33x-based"
 470         depends on MMU
 471         select CPU_XSCALE
 472         select PLAT_IOP
 473         select PCI
 474         select ARCH_REQUIRE_GPIOLIB
 475         help
 476           Support for Intel's IOP33X (XScale) family of processors.
 477
 478 config ARCH_IXP23XX
 479         bool "IXP23XX-based"
 480         depends on MMU
 481         select CPU_XSC3
 482         select PCI
 483         select ARCH_USES_GETTIMEOFFSET
 484         select NEED_MACH_MEMORY_H
 485         help
 486           Support for Intel's IXP23xx (XScale) family of processors.
 487
 488 config ARCH_IXP2000
 489         bool "IXP2400/2800-based"
 490         depends on MMU
 491         select CPU_XSCALE
 492         select PCI
 493         select ARCH_USES_GETTIMEOFFSET
 494         select NEED_MACH_MEMORY_H
 495         help
 496           Support for Intel's IXP2400/2800 (XScale) family of processors.
 497
 498 config ARCH_IXP4XX
 499         bool "IXP4xx-based"
 500         depends on MMU
 501         select CLKSRC_MMIO
 502         select CPU_XSCALE
 503         select GENERIC_GPIO
 504         select GENERIC_CLOCKEVENTS
 505         select HAVE_SCHED_CLOCK
 506         select MIGHT_HAVE_PCI
 507         select DMABOUNCE if PCI
 508         help
 509           Support for Intel's IXP4XX (XScale) family of processors.
 510
 511 config ARCH_DOVE
 512         bool "Marvell Dove"
 513         select CPU_V7
 514         select PCI
 515         select ARCH_REQUIRE_GPIOLIB
 516         select GENERIC_CLOCKEVENTS
 517         select PLAT_ORION
 518         help
 519           Support for the Marvell Dove SoC 88AP510
 520
 521 config ARCH_KIRKWOOD
 522         bool "Marvell Kirkwood"
 523         select CPU_FEROCEON
 524         select PCI
 525         select ARCH_REQUIRE_GPIOLIB
 526         select GENERIC_CLOCKEVENTS
 527         select PLAT_ORION
 528         help
 529           Support for the following Marvell Kirkwood series SoCs:
 530           88F6180, 88F6192 and 88F6281.
 531
 532 config ARCH_LPC32XX
 533         bool "NXP LPC32XX"
 534         select CLKSRC_MMIO
 535         select CPU_ARM926T
 536         select ARCH_REQUIRE_GPIOLIB
 537         select HAVE_IDE
 538         select ARM_AMBA
 539         select USB_ARCH_HAS_OHCI
 540         select CLKDEV_LOOKUP
 541         select GENERIC_TIME
 542         select GENERIC_CLOCKEVENTS
 543         help
 544           Support for the NXP LPC32XX family of processors
 545
 546 config ARCH_MV78XX0
 547         bool "Marvell MV78xx0"
 548         select CPU_FEROCEON
 549         select PCI
 550         select ARCH_REQUIRE_GPIOLIB
 551         select GENERIC_CLOCKEVENTS
 552         select PLAT_ORION
 553         help
 554           Support for the following Marvell MV78xx0 series SoCs:
 555           MV781x0, MV782x0.
 556
 557 config ARCH_ORION5X
 558         bool "Marvell Orion"
 559         depends on MMU
 560         select CPU_FEROCEON
 561         select PCI
 562         select ARCH_REQUIRE_GPIOLIB
 563         select GENERIC_CLOCKEVENTS
 564         select PLAT_ORION
 565         help
 566           Support for the following Marvell Orion 5x series SoCs:
 567           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 568           Orion-2 (5281), Orion-1-90 (6183).
 569
 570 config ARCH_MMP
 571         bool "Marvell PXA168/910/MMP2"
 572         depends on MMU
 573         select ARCH_REQUIRE_GPIOLIB
 574         select CLKDEV_LOOKUP
 575         select GENERIC_CLOCKEVENTS
 576         select HAVE_SCHED_CLOCK
 577         select TICK_ONESHOT
 578         select PLAT_PXA
 579         select SPARSE_IRQ
 580         help
 581           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 582
 583 config ARCH_KS8695
 584         bool "Micrel/Kendin KS8695"
 585         select CPU_ARM922T
 586         select ARCH_REQUIRE_GPIOLIB
 587         select ARCH_USES_GETTIMEOFFSET
 588         select NEED_MACH_MEMORY_H
 589         help
 590           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 591           System-on-Chip devices.
 592
 593 config ARCH_W90X900
 594         bool "Nuvoton W90X900 CPU"
 595         select CPU_ARM926T
 596         select ARCH_REQUIRE_GPIOLIB
 597         select CLKDEV_LOOKUP
 598         select CLKSRC_MMIO
 599         select GENERIC_CLOCKEVENTS
 600         help
 601           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 602           At present, the w90x900 has been renamed nuc900, regarding
 603           the ARM series product line, you can login the following
 604           link address to know more.
 605
 606           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 607                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 608
 609 config ARCH_NUC93X
 610         bool "Nuvoton NUC93X CPU"
 611         select CPU_ARM926T
 612         select CLKDEV_LOOKUP
 613         help
 614           Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
 615           low-power and high performance MPEG-4/JPEG multimedia controller chip.
 616
 617 config ARCH_TEGRA
 618         bool "NVIDIA Tegra"
 619         select CLKDEV_LOOKUP
 620         select CLKSRC_MMIO
 621         select GENERIC_TIME
 622         select GENERIC_CLOCKEVENTS
 623         select GENERIC_GPIO
 624         select HAVE_CLK
 625         select HAVE_SCHED_CLOCK
 626         select ARCH_HAS_CPUFREQ
 627         help
 628           This enables support for NVIDIA Tegra based systems (Tegra APX,
 629           Tegra 6xx and Tegra 2 series).
 630
 631 config ARCH_PNX4008
 632         bool "Philips Nexperia PNX4008 Mobile"
 633         select CPU_ARM926T
 634         select CLKDEV_LOOKUP
 635         select ARCH_USES_GETTIMEOFFSET
 636         help
 637           This enables support for Philips PNX4008 mobile platform.
 638
 639 config ARCH_PXA
 640         bool "PXA2xx/PXA3xx-based"
 641         depends on MMU
 642         select ARCH_MTD_XIP
 643         select ARCH_HAS_CPUFREQ
 644         select CLKDEV_LOOKUP
 645         select CLKSRC_MMIO
 646         select ARCH_REQUIRE_GPIOLIB
 647         select GENERIC_CLOCKEVENTS
 648         select HAVE_SCHED_CLOCK
 649         select TICK_ONESHOT
 650         select PLAT_PXA
 651         select SPARSE_IRQ
 652         select AUTO_ZRELADDR
 653         select MULTI_IRQ_HANDLER
 654         help
 655           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 656
 657 config ARCH_MSM
 658         bool "Qualcomm MSM"
 659         select HAVE_CLK
 660         select GENERIC_CLOCKEVENTS
 661         select ARCH_REQUIRE_GPIOLIB
 662         select CLKDEV_LOOKUP
 663         help
 664           Support for Qualcomm MSM/QSD based systems.  This runs on the
 665           apps processor of the MSM/QSD and depends on a shared memory
 666           interface to the modem processor which runs the baseband
 667           stack and controls some vital subsystems
 668           (clock and power control, etc).
 669
 670 config ARCH_SHMOBILE
 671         bool "Renesas SH-Mobile / R-Mobile"
 672         select HAVE_CLK
 673         select CLKDEV_LOOKUP
 674         select HAVE_MACH_CLKDEV
 675         select GENERIC_CLOCKEVENTS
 676         select NO_IOPORT
 677         select SPARSE_IRQ
 678         select MULTI_IRQ_HANDLER
 679         select PM_GENERIC_DOMAINS if PM
 680         select NEED_MACH_MEMORY_H
 681         help
 682           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 683
 684 config ARCH_RPC
 685         bool "RiscPC"
 686         select ARCH_ACORN
 687         select FIQ
 688         select TIMER_ACORN
 689         select ARCH_MAY_HAVE_PC_FDC
 690         select HAVE_PATA_PLATFORM
 691         select ISA_DMA_API
 692         select NO_IOPORT
 693         select ARCH_SPARSEMEM_ENABLE
 694         select ARCH_USES_GETTIMEOFFSET
 695         select NEED_MACH_MEMORY_H
 696         help
 697           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 698           CD-ROM interface, serial and parallel port, and the floppy drive.
 699
 700 config ARCH_SA1100
 701         bool "SA1100-based"
 702         select CLKSRC_MMIO
 703         select CPU_SA1100
 704         select ISA
 705         select ARCH_SPARSEMEM_ENABLE
 706         select ARCH_MTD_XIP
 707         select ARCH_HAS_CPUFREQ
 708         select CPU_FREQ
 709         select GENERIC_CLOCKEVENTS
 710         select HAVE_CLK
 711         select HAVE_SCHED_CLOCK
 712         select TICK_ONESHOT
 713         select ARCH_REQUIRE_GPIOLIB
 714         select NEED_MACH_MEMORY_H
 715         help
 716           Support for StrongARM 11x0 based boards.
 717
 718 config ARCH_S3C2410
 719         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 720         select GENERIC_GPIO
 721         select ARCH_HAS_CPUFREQ
 722         select HAVE_CLK
 723         select CLKDEV_LOOKUP
 724         select ARCH_USES_GETTIMEOFFSET
 725         select HAVE_S3C2410_I2C if I2C
 726         help
 727           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 728           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 729           the Samsung SMDK2410 development board (and derivatives).
 730
 731           Note, the S3C2416 and the S3C2450 are so close that they even share
 732           the same SoC ID code. This means that there is no separate machine
 733           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 734
 735 config ARCH_S3C64XX
 736         bool "Samsung S3C64XX"
 737         select PLAT_SAMSUNG
 738         select CPU_V6
 739         select ARM_VIC
 740         select HAVE_CLK
 741         select CLKDEV_LOOKUP
 742         select NO_IOPORT
 743         select ARCH_USES_GETTIMEOFFSET
 744         select ARCH_HAS_CPUFREQ
 745         select ARCH_REQUIRE_GPIOLIB
 746         select SAMSUNG_CLKSRC
 747         select SAMSUNG_IRQ_VIC_TIMER
 748         select SAMSUNG_IRQ_UART
 749         select S3C_GPIO_TRACK
 750         select S3C_GPIO_PULL_UPDOWN
 751         select S3C_GPIO_CFG_S3C24XX
 752         select S3C_GPIO_CFG_S3C64XX
 753         select S3C_DEV_NAND
 754         select USB_ARCH_HAS_OHCI
 755         select SAMSUNG_GPIOLIB_4BIT
 756         select HAVE_S3C2410_I2C if I2C
 757         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 758         help
 759           Samsung S3C64XX series based systems
 760
 761 config ARCH_S5P64X0
 762         bool "Samsung S5P6440 S5P6450"
 763         select CPU_V6
 764         select GENERIC_GPIO
 765         select HAVE_CLK
 766         select CLKDEV_LOOKUP
 767         select CLKSRC_MMIO
 768         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 769         select GENERIC_CLOCKEVENTS
 770         select HAVE_SCHED_CLOCK
 771         select HAVE_S3C2410_I2C if I2C
 772         select HAVE_S3C_RTC if RTC_CLASS
 773         help
 774           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 775           SMDK6450.
 776
 777 config ARCH_S5PC100
 778         bool "Samsung S5PC100"
 779         select GENERIC_GPIO
 780         select HAVE_CLK
 781         select CLKDEV_LOOKUP
 782         select CPU_V7
 783         select ARM_L1_CACHE_SHIFT_6
 784         select ARCH_USES_GETTIMEOFFSET
 785         select HAVE_S3C2410_I2C if I2C
 786         select HAVE_S3C_RTC if RTC_CLASS
 787         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 788         help
 789           Samsung S5PC100 series based systems
 790
 791 config ARCH_S5PV210
 792         bool "Samsung S5PV210/S5PC110"
 793         select CPU_V7
 794         select ARCH_SPARSEMEM_ENABLE
 795         select ARCH_HAS_HOLES_MEMORYMODEL
 796         select GENERIC_GPIO
 797         select HAVE_CLK
 798         select CLKDEV_LOOKUP
 799         select CLKSRC_MMIO
 800         select ARM_L1_CACHE_SHIFT_6
 801         select ARCH_HAS_CPUFREQ
 802         select GENERIC_CLOCKEVENTS
 803         select HAVE_SCHED_CLOCK
 804         select HAVE_S3C2410_I2C if I2C
 805         select HAVE_S3C_RTC if RTC_CLASS
 806         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 807         select NEED_MACH_MEMORY_H
 808         help
 809           Samsung S5PV210/S5PC110 series based systems
 810
 811 config ARCH_EXYNOS4
 812         bool "Samsung EXYNOS4"
 813         select CPU_V7
 814         select ARCH_SPARSEMEM_ENABLE
 815         select ARCH_HAS_HOLES_MEMORYMODEL
 816         select GENERIC_GPIO
 817         select HAVE_CLK
 818         select CLKDEV_LOOKUP
 819         select ARCH_HAS_CPUFREQ
 820         select GENERIC_CLOCKEVENTS
 821         select HAVE_S3C_RTC if RTC_CLASS
 822         select HAVE_S3C2410_I2C if I2C
 823         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 824         select NEED_MACH_MEMORY_H
 825         help
 826           Samsung EXYNOS4 series based systems
 827
 828 config ARCH_SHARK
 829         bool "Shark"
 830         select CPU_SA110
 831         select ISA
 832         select ISA_DMA
 833         select ZONE_DMA
 834         select PCI
 835         select ARCH_USES_GETTIMEOFFSET
 836         select NEED_MACH_MEMORY_H
 837         help
 838           Support for the StrongARM based Digital DNARD machine, also known
 839           as "Shark" (<http://www.shark-linux.de/shark.html>).
 840
 841 config ARCH_TCC_926
 842         bool "Telechips TCC ARM926-based systems"
 843         select CLKSRC_MMIO
 844         select CPU_ARM926T
 845         select HAVE_CLK
 846         select CLKDEV_LOOKUP
 847         select GENERIC_CLOCKEVENTS
 848         help
 849           Support for Telechips TCC ARM926-based systems.
 850
 851 config ARCH_U300
 852         bool "ST-Ericsson U300 Series"
 853         depends on MMU
 854         select CLKSRC_MMIO
 855         select CPU_ARM926T
 856         select HAVE_SCHED_CLOCK
 857         select HAVE_TCM
 858         select ARM_AMBA
 859         select ARM_VIC
 860         select GENERIC_CLOCKEVENTS
 861         select CLKDEV_LOOKUP
 862         select HAVE_MACH_CLKDEV
 863         select GENERIC_GPIO
 864         select NEED_MACH_MEMORY_H
 865         help
 866           Support for ST-Ericsson U300 series mobile platforms.
 867
 868 config ARCH_U8500
 869         bool "ST-Ericsson U8500 Series"
 870         select CPU_V7
 871         select ARM_AMBA
 872         select GENERIC_CLOCKEVENTS
 873         select CLKDEV_LOOKUP
 874         select ARCH_REQUIRE_GPIOLIB
 875         select ARCH_HAS_CPUFREQ
 876         help
 877           Support for ST-Ericsson's Ux500 architecture
 878
 879 config ARCH_NOMADIK
 880         bool "STMicroelectronics Nomadik"
 881         select ARM_AMBA
 882         select ARM_VIC
 883         select CPU_ARM926T
 884         select CLKDEV_LOOKUP
 885         select GENERIC_CLOCKEVENTS
 886         select ARCH_REQUIRE_GPIOLIB
 887         help
 888           Support for the Nomadik platform by ST-Ericsson
 889
 890 config ARCH_DAVINCI
 891         bool "TI DaVinci"
 892         select GENERIC_CLOCKEVENTS
 893         select ARCH_REQUIRE_GPIOLIB
 894         select ZONE_DMA
 895         select HAVE_IDE
 896         select CLKDEV_LOOKUP
 897         select GENERIC_ALLOCATOR
 898         select GENERIC_IRQ_CHIP
 899         select ARCH_HAS_HOLES_MEMORYMODEL
 900         help
 901           Support for TI's DaVinci platform.
 902
 903 config ARCH_OMAP
 904         bool "TI OMAP"
 905         select HAVE_CLK
 906         select ARCH_REQUIRE_GPIOLIB
 907         select ARCH_HAS_CPUFREQ
 908         select CLKSRC_MMIO
 909         select GENERIC_CLOCKEVENTS
 910         select HAVE_SCHED_CLOCK
 911         select ARCH_HAS_HOLES_MEMORYMODEL
 912         help
 913           Support for TI's OMAP platform (OMAP1/2/3/4).
 914
 915 config PLAT_SPEAR
 916         bool "ST SPEAr"
 917         select ARM_AMBA
 918         select ARCH_REQUIRE_GPIOLIB
 919         select CLKDEV_LOOKUP
 920         select CLKSRC_MMIO
 921         select GENERIC_CLOCKEVENTS
 922         select HAVE_CLK
 923         help
 924           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 925
 926 config ARCH_VT8500
 927         bool "VIA/WonderMedia 85xx"
 928         select CPU_ARM926T
 929         select GENERIC_GPIO
 930         select ARCH_HAS_CPUFREQ
 931         select GENERIC_CLOCKEVENTS
 932         select ARCH_REQUIRE_GPIOLIB
 933         select HAVE_PWM
 934         help
 935           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 936
 937 config ARCH_ZYNQ
 938         bool "Xilinx Zynq ARM Cortex A9 Platform"
 939         select CPU_V7
 940         select GENERIC_TIME
 941         select GENERIC_CLOCKEVENTS
 942         select CLKDEV_LOOKUP
 943         select ARM_GIC
 944         select ARM_AMBA
 945         select ICST
 946         select USE_OF
 947         help
 948           Support for Xilinx Zynq ARM Cortex A9 Platform
 949 endchoice
 950
 951 #
 952 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 953 # Kconfigs may be included either alphabetically (according to the
 954 # plat- suffix) or along side the corresponding mach-* source.
 955 #
 956 source "arch/arm/mach-at91/Kconfig"
 957
 958 source "arch/arm/mach-bcmring/Kconfig"
 959
 960 source "arch/arm/mach-clps711x/Kconfig"
 961
 962 source "arch/arm/mach-cns3xxx/Kconfig"
 963
 964 source "arch/arm/mach-davinci/Kconfig"
 965
 966 source "arch/arm/mach-dove/Kconfig"
 967
 968 source "arch/arm/mach-ep93xx/Kconfig"
 969
 970 source "arch/arm/mach-footbridge/Kconfig"
 971
 972 source "arch/arm/mach-gemini/Kconfig"
 973
 974 source "arch/arm/mach-h720x/Kconfig"
 975
 976 source "arch/arm/mach-integrator/Kconfig"
 977
 978 source "arch/arm/mach-iop32x/Kconfig"
 979
 980 source "arch/arm/mach-iop33x/Kconfig"
 981
 982 source "arch/arm/mach-iop13xx/Kconfig"
 983
 984 source "arch/arm/mach-ixp4xx/Kconfig"
 985
 986 source "arch/arm/mach-ixp2000/Kconfig"
 987
 988 source "arch/arm/mach-ixp23xx/Kconfig"
 989
 990 source "arch/arm/mach-kirkwood/Kconfig"
 991
 992 source "arch/arm/mach-ks8695/Kconfig"
 993
 994 source "arch/arm/mach-lpc32xx/Kconfig"
 995
 996 source "arch/arm/mach-msm/Kconfig"
 997
 998 source "arch/arm/mach-mv78xx0/Kconfig"
 999
1000 source "arch/arm/plat-mxc/Kconfig"
1001
1002 source "arch/arm/mach-mxs/Kconfig"
1003
1004 source "arch/arm/mach-netx/Kconfig"
1005
1006 source "arch/arm/mach-nomadik/Kconfig"
1007 source "arch/arm/plat-nomadik/Kconfig"
1008
1009 source "arch/arm/mach-nuc93x/Kconfig"
1010
1011 source "arch/arm/plat-omap/Kconfig"
1012
1013 source "arch/arm/mach-omap1/Kconfig"
1014
1015 source "arch/arm/mach-omap2/Kconfig"
1016
1017 source "arch/arm/mach-orion5x/Kconfig"
1018
1019 source "arch/arm/mach-pxa/Kconfig"
1020 source "arch/arm/plat-pxa/Kconfig"
1021
1022 source "arch/arm/mach-mmp/Kconfig"
1023
1024 source "arch/arm/mach-realview/Kconfig"
1025
1026 source "arch/arm/mach-sa1100/Kconfig"
1027
1028 source "arch/arm/plat-samsung/Kconfig"
1029 source "arch/arm/plat-s3c24xx/Kconfig"
1030 source "arch/arm/plat-s5p/Kconfig"
1031
1032 source "arch/arm/plat-spear/Kconfig"
1033
1034 source "arch/arm/plat-tcc/Kconfig"
1035
1036 if ARCH_S3C2410
1037 source "arch/arm/mach-s3c2410/Kconfig"
1038 source "arch/arm/mach-s3c2412/Kconfig"
1039 source "arch/arm/mach-s3c2416/Kconfig"
1040 source "arch/arm/mach-s3c2440/Kconfig"
1041 source "arch/arm/mach-s3c2443/Kconfig"
1042 endif
1043
1044 if ARCH_S3C64XX
1045 source "arch/arm/mach-s3c64xx/Kconfig"
1046 endif
1047
1048 source "arch/arm/mach-s5p64x0/Kconfig"
1049
1050 source "arch/arm/mach-s5pc100/Kconfig"
1051
1052 source "arch/arm/mach-s5pv210/Kconfig"
1053
1054 source "arch/arm/mach-exynos4/Kconfig"
1055
1056 source "arch/arm/mach-shmobile/Kconfig"
1057
1058 source "arch/arm/mach-tegra/Kconfig"
1059
1060 source "arch/arm/mach-u300/Kconfig"
1061
1062 source "arch/arm/mach-ux500/Kconfig"
1063
1064 source "arch/arm/mach-versatile/Kconfig"
1065
1066 source "arch/arm/mach-vexpress/Kconfig"
1067 source "arch/arm/plat-versatile/Kconfig"
1068
1069 source "arch/arm/mach-vt8500/Kconfig"
1070
1071 source "arch/arm/mach-w90x900/Kconfig"
1072
1073 # Definitions to make life easier
1074 config ARCH_ACORN
1075         bool
1076
1077 config PLAT_IOP
1078         bool
1079         select GENERIC_CLOCKEVENTS
1080         select HAVE_SCHED_CLOCK
1081
1082 config PLAT_ORION
1083         bool
1084         select CLKSRC_MMIO
1085         select GENERIC_IRQ_CHIP
1086         select HAVE_SCHED_CLOCK
1087
1088 config PLAT_PXA
1089         bool
1090
1091 config PLAT_VERSATILE
1092         bool
1093
1094 config ARM_TIMER_SP804
1095         bool
1096         select CLKSRC_MMIO
1097
1098 source arch/arm/mm/Kconfig
1099
1100 config IWMMXT
1101         bool "Enable iWMMXt support"
1102         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1103         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1104         help
1105           Enable support for iWMMXt context switching at run time if
1106           running on a CPU that supports it.
1107
1108 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1109 config XSCALE_PMU
1110         bool
1111         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1112         default y
1113
1114 config CPU_HAS_PMU
1115         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1116                    (!ARCH_OMAP3 || OMAP3_EMU)
1117         default y
1118         bool
1119
1120 config MULTI_IRQ_HANDLER
1121         bool
1122         help
1123           Allow each machine to specify it's own IRQ handler at run time.
1124
1125 if !MMU
1126 source "arch/arm/Kconfig-nommu"
1127 endif
1128
1129 config ARM_ERRATA_411920
1130         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1131         depends on CPU_V6 || CPU_V6K
1132         help
1133           Invalidation of the Instruction Cache operation can
1134           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1135           It does not affect the MPCore. This option enables the ARM Ltd.
1136           recommended workaround.
1137
1138 config ARM_ERRATA_430973
1139         bool "ARM errata: Stale prediction on replaced interworking branch"
1140         depends on CPU_V7
1141         help
1142           This option enables the workaround for the 430973 Cortex-A8
1143           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1144           interworking branch is replaced with another code sequence at the
1145           same virtual address, whether due to self-modifying code or virtual
1146           to physical address re-mapping, Cortex-A8 does not recover from the
1147           stale interworking branch prediction. This results in Cortex-A8
1148           executing the new code sequence in the incorrect ARM or Thumb state.
1149           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1150           and also flushes the branch target cache at every context switch.
1151           Note that setting specific bits in the ACTLR register may not be
1152           available in non-secure mode.
1153
1154 config ARM_ERRATA_458693
1155         bool "ARM errata: Processor deadlock when a false hazard is created"
1156         depends on CPU_V7
1157         help
1158           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1159           erratum. For very specific sequences of memory operations, it is
1160           possible for a hazard condition intended for a cache line to instead
1161           be incorrectly associated with a different cache line. This false
1162           hazard might then cause a processor deadlock. The workaround enables
1163           the L1 caching of the NEON accesses and disables the PLD instruction
1164           in the ACTLR register. Note that setting specific bits in the ACTLR
1165           register may not be available in non-secure mode.
1166
1167 config ARM_ERRATA_460075
1168         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1169         depends on CPU_V7
1170         help
1171           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1172           erratum. Any asynchronous access to the L2 cache may encounter a
1173           situation in which recent store transactions to the L2 cache are lost
1174           and overwritten with stale memory contents from external memory. The
1175           workaround disables the write-allocate mode for the L2 cache via the
1176           ACTLR register. Note that setting specific bits in the ACTLR register
1177           may not be available in non-secure mode.
1178
1179 config ARM_ERRATA_742230
1180         bool "ARM errata: DMB operation may be faulty"
1181         depends on CPU_V7 && SMP
1182         help
1183           This option enables the workaround for the 742230 Cortex-A9
1184           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1185           between two write operations may not ensure the correct visibility
1186           ordering of the two writes. This workaround sets a specific bit in
1187           the diagnostic register of the Cortex-A9 which causes the DMB
1188           instruction to behave as a DSB, ensuring the correct behaviour of
1189           the two writes.
1190
1191 config ARM_ERRATA_742231
1192         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1193         depends on CPU_V7 && SMP
1194         help
1195           This option enables the workaround for the 742231 Cortex-A9
1196           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1197           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1198           accessing some data located in the same cache line, may get corrupted
1199           data due to bad handling of the address hazard when the line gets
1200           replaced from one of the CPUs at the same time as another CPU is
1201           accessing it. This workaround sets specific bits in the diagnostic
1202           register of the Cortex-A9 which reduces the linefill issuing
1203           capabilities of the processor.
1204
1205 config PL310_ERRATA_588369
1206         bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1207         depends on CACHE_L2X0
1208         help
1209            The PL310 L2 cache controller implements three types of Clean &
1210            Invalidate maintenance operations: by Physical Address
1211            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1212            They are architecturally defined to behave as the execution of a
1213            clean operation followed immediately by an invalidate operation,
1214            both performing to the same memory location. This functionality
1215            is not correctly implemented in PL310 as clean lines are not
1216            invalidated as a result of these operations.
1217
1218 config ARM_ERRATA_720789
1219         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1220         depends on CPU_V7 && SMP
1221         help
1222           This option enables the workaround for the 720789 Cortex-A9 (prior to
1223           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1224           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1225           As a consequence of this erratum, some TLB entries which should be
1226           invalidated are not, resulting in an incoherency in the system page
1227           tables. The workaround changes the TLB flushing routines to invalidate
1228           entries regardless of the ASID.
1229
1230 config PL310_ERRATA_727915
1231         bool "Background Clean & Invalidate by Way operation can cause data corruption"
1232         depends on CACHE_L2X0
1233         help
1234           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1235           operation (offset 0x7FC). This operation runs in background so that
1236           PL310 can handle normal accesses while it is in progress. Under very
1237           rare circumstances, due to this erratum, write data can be lost when
1238           PL310 treats a cacheable write transaction during a Clean &
1239           Invalidate by Way operation.
1240
1241 config ARM_ERRATA_743622
1242         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1243         depends on CPU_V7
1244         help
1245           This option enables the workaround for the 743622 Cortex-A9
1246           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1247           optimisation in the Cortex-A9 Store Buffer may lead to data
1248           corruption. This workaround sets a specific bit in the diagnostic
1249           register of the Cortex-A9 which disables the Store Buffer
1250           optimisation, preventing the defect from occurring. This has no
1251           visible impact on the overall performance or power consumption of the
1252           processor.
1253
1254 config ARM_ERRATA_751472
1255         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1256         depends on CPU_V7 && SMP
1257         help
1258           This option enables the workaround for the 751472 Cortex-A9 (prior
1259           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1260           completion of a following broadcasted operation if the second
1261           operation is received by a CPU before the ICIALLUIS has completed,
1262           potentially leading to corrupted entries in the cache or TLB.
1263
1264 config ARM_ERRATA_753970
1265         bool "ARM errata: cache sync operation may be faulty"
1266         depends on CACHE_PL310
1267         help
1268           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1269
1270           Under some condition the effect of cache sync operation on
1271           the store buffer still remains when the operation completes.
1272           This means that the store buffer is always asked to drain and
1273           this prevents it from merging any further writes. The workaround
1274           is to replace the normal offset of cache sync operation (0x730)
1275           by another offset targeting an unmapped PL310 register 0x740.
1276           This has the same effect as the cache sync operation: store buffer
1277           drain and waiting for all buffers empty.
1278
1279 config ARM_ERRATA_754322
1280         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1281         depends on CPU_V7
1282         help
1283           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1284           r3p*) erratum. A speculative memory access may cause a page table walk
1285           which starts prior to an ASID switch but completes afterwards. This
1286           can populate the micro-TLB with a stale entry which may be hit with
1287           the new ASID. This workaround places two dsb instructions in the mm
1288           switching code so that no page table walks can cross the ASID switch.
1289
1290 config ARM_ERRATA_754327
1291         bool "ARM errata: no automatic Store Buffer drain"
1292         depends on CPU_V7 && SMP
1293         help
1294           This option enables the workaround for the 754327 Cortex-A9 (prior to
1295           r2p0) erratum. The Store Buffer does not have any automatic draining
1296           mechanism and therefore a livelock may occur if an external agent
1297           continuously polls a memory location waiting to observe an update.
1298           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1299           written polling loops from denying visibility of updates to memory.
1300
1301 config ARM_ERRATA_364296
1302         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1303         depends on CPU_V6 && !SMP
1304         help
1305           This options enables the workaround for the 364296 ARM1136
1306           r0p2 erratum (possible cache data corruption with
1307           hit-under-miss enabled). It sets the undocumented bit 31 in
1308           the auxiliary control register and the FI bit in the control
1309           register, thus disabling hit-under-miss without putting the
1310           processor into full low interrupt latency mode. ARM11MPCore
1311           is not affected.
1312
1313 endmenu
1314
1315 source "arch/arm/common/Kconfig"
1316
1317 menu "Bus support"
1318
1319 config ARM_AMBA
1320         bool
1321
1322 config ISA
1323         bool
1324         help
1325           Find out whether you have ISA slots on your motherboard.  ISA is the
1326           name of a bus system, i.e. the way the CPU talks to the other stuff
1327           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1328           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1329           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1330
1331 # Select ISA DMA controller support
1332 config ISA_DMA
1333         bool
1334         select ISA_DMA_API
1335
1336 # Select ISA DMA interface
1337 config ISA_DMA_API
1338         bool
1339
1340 config PCI
1341         bool "PCI support" if MIGHT_HAVE_PCI
1342         help
1343           Find out whether you have a PCI motherboard. PCI is the name of a
1344           bus system, i.e. the way the CPU talks to the other stuff inside
1345           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1346           VESA. If you have PCI, say Y, otherwise N.
1347
1348 config PCI_DOMAINS
1349         bool
1350         depends on PCI
1351
1352 config PCI_NANOENGINE
1353         bool "BSE nanoEngine PCI support"
1354         depends on SA1100_NANOENGINE
1355         help
1356           Enable PCI on the BSE nanoEngine board.
1357
1358 config PCI_SYSCALL
1359         def_bool PCI
1360
1361 # Select the host bridge type
1362 config PCI_HOST_VIA82C505
1363         bool
1364         depends on PCI && ARCH_SHARK
1365         default y
1366
1367 config PCI_HOST_ITE8152
1368         bool
1369         depends on PCI && MACH_ARMCORE
1370         default y
1371         select DMABOUNCE
1372
1373 source "drivers/pci/Kconfig"
1374
1375 source "drivers/pcmcia/Kconfig"
1376
1377 endmenu
1378
1379 menu "Kernel Features"
1380
1381 source "kernel/time/Kconfig"
1382
1383 config SMP
1384         bool "Symmetric Multi-Processing"
1385         depends on CPU_V6K || CPU_V7
1386         depends on GENERIC_CLOCKEVENTS
1387         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1388                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1389                  ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1390                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1391         select USE_GENERIC_SMP_HELPERS
1392         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1393         help
1394           This enables support for systems with more than one CPU. If you have
1395           a system with only one CPU, like most personal computers, say N. If
1396           you have a system with more than one CPU, say Y.
1397
1398           If you say N here, the kernel will run on single and multiprocessor
1399           machines, but will use only one CPU of a multiprocessor machine. If
1400           you say Y here, the kernel will run on many, but not all, single
1401           processor machines. On a single processor machine, the kernel will
1402           run faster if you say N here.
1403
1404           See also <file:Documentation/i386/IO-APIC.txt>,
1405           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1406           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1407
1408           If you don't know what to do here, say N.
1409
1410 config SMP_ON_UP
1411         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1412         depends on EXPERIMENTAL
1413         depends on SMP && !XIP_KERNEL
1414         default y
1415         help
1416           SMP kernels contain instructions which fail on non-SMP processors.
1417           Enabling this option allows the kernel to modify itself to make
1418           these instructions safe.  Disabling it allows about 1K of space
1419           savings.
1420
1421           If you don't know what to do here, say Y.
1422
1423 config ARM_CPU_TOPOLOGY
1424         bool "Support cpu topology definition"
1425         depends on SMP && CPU_V7
1426         default y
1427         help
1428           Support ARM cpu topology definition. The MPIDR register defines
1429           affinity between processors which is then used to describe the cpu
1430           topology of an ARM System.
1431
1432 config SCHED_MC
1433         bool "Multi-core scheduler support"
1434         depends on ARM_CPU_TOPOLOGY
1435         help
1436           Multi-core scheduler support improves the CPU scheduler's decision
1437           making when dealing with multi-core CPU chips at a cost of slightly
1438           increased overhead in some places. If unsure say N here.
1439
1440 config SCHED_SMT
1441         bool "SMT scheduler support"
1442         depends on ARM_CPU_TOPOLOGY
1443         help
1444           Improves the CPU scheduler's decision making when dealing with
1445           MultiThreading at a cost of slightly increased overhead in some
1446           places. If unsure say N here.
1447
1448 config HAVE_ARM_SCU
1449         bool
1450         help
1451           This option enables support for the ARM system coherency unit
1452
1453 config HAVE_ARM_TWD
1454         bool
1455         depends on SMP
1456         select TICK_ONESHOT
1457         help
1458           This options enables support for the ARM timer and watchdog unit
1459
1460 choice
1461         prompt "Memory split"
1462         default VMSPLIT_3G
1463         help
1464           Select the desired split between kernel and user memory.
1465
1466           If you are not absolutely sure what you are doing, leave this
1467           option alone!
1468
1469         config VMSPLIT_3G
1470                 bool "3G/1G user/kernel split"
1471         config VMSPLIT_2G
1472                 bool "2G/2G user/kernel split"
1473         config VMSPLIT_1G
1474                 bool "1G/3G user/kernel split"
1475 endchoice
1476
1477 config PAGE_OFFSET
1478         hex
1479         default 0x40000000 if VMSPLIT_1G
1480         default 0x80000000 if VMSPLIT_2G
1481         default 0xC0000000
1482
1483 config NR_CPUS
1484         int "Maximum number of CPUs (2-32)"
1485         range 2 32
1486         depends on SMP
1487         default "4"
1488
1489 config HOTPLUG_CPU
1490         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1491         depends on SMP && HOTPLUG && EXPERIMENTAL
1492         help
1493           Say Y here to experiment with turning CPUs off and on.  CPUs
1494           can be controlled through /sys/devices/system/cpu.
1495
1496 config LOCAL_TIMERS
1497         bool "Use local timer interrupts"
1498         depends on SMP
1499         default y
1500         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1501         help
1502           Enable support for local timers on SMP platforms, rather then the
1503           legacy IPI broadcast method.  Local timers allows the system
1504           accounting to be spread across the timer interval, preventing a
1505           "thundering herd" at every timer tick.
1506
1507 source kernel/Kconfig.preempt
1508
1509 config HZ
1510         int
1511         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1512                 ARCH_S5PV210 || ARCH_EXYNOS4
1513         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1514         default AT91_TIMER_HZ if ARCH_AT91
1515         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1516         default 100
1517
1518 config THUMB2_KERNEL
1519         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1520         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1521         select AEABI
1522         select ARM_ASM_UNIFIED
1523         help
1524           By enabling this option, the kernel will be compiled in
1525           Thumb-2 mode. A compiler/assembler that understand the unified
1526           ARM-Thumb syntax is needed.
1527
1528           If unsure, say N.
1529
1530 config THUMB2_AVOID_R_ARM_THM_JUMP11
1531         bool "Work around buggy Thumb-2 short branch relocations in gas"
1532         depends on THUMB2_KERNEL && MODULES
1533         default y
1534         help
1535           Various binutils versions can resolve Thumb-2 branches to
1536           locally-defined, preemptible global symbols as short-range "b.n"
1537           branch instructions.
1538
1539           This is a problem, because there's no guarantee the final
1540           destination of the symbol, or any candidate locations for a
1541           trampoline, are within range of the branch.  For this reason, the
1542           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1543           relocation in modules at all, and it makes little sense to add
1544           support.
1545
1546           The symptom is that the kernel fails with an "unsupported
1547           relocation" error when loading some modules.
1548
1549           Until fixed tools are available, passing
1550           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1551           code which hits this problem, at the cost of a bit of extra runtime
1552           stack usage in some cases.
1553
1554           The problem is described in more detail at:
1555               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1556
1557           Only Thumb-2 kernels are affected.
1558
1559           Unless you are sure your tools don't have this problem, say Y.
1560
1561 config ARM_ASM_UNIFIED
1562         bool
1563
1564 config AEABI
1565         bool "Use the ARM EABI to compile the kernel"
1566         help
1567           This option allows for the kernel to be compiled using the latest
1568           ARM ABI (aka EABI).  This is only useful if you are using a user
1569           space environment that is also compiled with EABI.
1570
1571           Since there are major incompatibilities between the legacy ABI and
1572           EABI, especially with regard to structure member alignment, this
1573           option also changes the kernel syscall calling convention to
1574           disambiguate both ABIs and allow for backward compatibility support
1575           (selected with CONFIG_OABI_COMPAT).
1576
1577           To use this you need GCC version 4.0.0 or later.
1578
1579 config OABI_COMPAT
1580         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1581         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1582         default y
1583         help
1584           This option preserves the old syscall interface along with the
1585           new (ARM EABI) one. It also provides a compatibility layer to
1586           intercept syscalls that have structure arguments which layout
1587           in memory differs between the legacy ABI and the new ARM EABI
1588           (only for non "thumb" binaries). This option adds a tiny
1589           overhead to all syscalls and produces a slightly larger kernel.
1590           If you know you'll be using only pure EABI user space then you
1591           can say N here. If this option is not selected and you attempt
1592           to execute a legacy ABI binary then the result will be
1593           UNPREDICTABLE (in fact it can be predicted that it won't work
1594           at all). If in doubt say Y.
1595
1596 config ARCH_HAS_HOLES_MEMORYMODEL
1597         bool
1598
1599 config ARCH_SPARSEMEM_ENABLE
1600         bool
1601
1602 config ARCH_SPARSEMEM_DEFAULT
1603         def_bool ARCH_SPARSEMEM_ENABLE
1604
1605 config ARCH_SELECT_MEMORY_MODEL
1606         def_bool ARCH_SPARSEMEM_ENABLE
1607
1608 config HAVE_ARCH_PFN_VALID
1609         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1610
1611 config HIGHMEM
1612         bool "High Memory Support"
1613         depends on MMU
1614         help
1615           The address space of ARM processors is only 4 Gigabytes large
1616           and it has to accommodate user address space, kernel address
1617           space as well as some memory mapped IO. That means that, if you
1618           have a large amount of physical memory and/or IO, not all of the
1619           memory can be "permanently mapped" by the kernel. The physical
1620           memory that is not permanently mapped is called "high memory".
1621
1622           Depending on the selected kernel/user memory split, minimum
1623           vmalloc space and actual amount of RAM, you may not need this
1624           option which should result in a slightly faster kernel.
1625
1626           If unsure, say n.
1627
1628 config HIGHPTE
1629         bool "Allocate 2nd-level pagetables from highmem"
1630         depends on HIGHMEM
1631
1632 config HW_PERF_EVENTS
1633         bool "Enable hardware performance counter support for perf events"
1634         depends on PERF_EVENTS && CPU_HAS_PMU
1635         default y
1636         help
1637           Enable hardware performance counter support for perf events. If
1638           disabled, perf events will use software events only.
1639
1640 source "mm/Kconfig"
1641
1642 config FORCE_MAX_ZONEORDER
1643         int "Maximum zone order" if ARCH_SHMOBILE
1644         range 11 64 if ARCH_SHMOBILE
1645         default "9" if SA1111
1646         default "11"
1647         help
1648           The kernel memory allocator divides physically contiguous memory
1649           blocks into "zones", where each zone is a power of two number of
1650           pages.  This option selects the largest power of two that the kernel
1651           keeps in the memory allocator.  If you need to allocate very large
1652           blocks of physically contiguous memory, then you may need to
1653           increase this value.
1654
1655           This config option is actually maximum order plus one. For example,
1656           a value of 11 means that the largest free memory block is 2^10 pages.
1657
1658 config LEDS
1659         bool "Timer and CPU usage LEDs"
1660         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1661                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1662                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1663                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1664                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1665                    ARCH_AT91 || ARCH_DAVINCI || \
1666                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1667         help
1668           If you say Y here, the LEDs on your machine will be used
1669           to provide useful information about your current system status.
1670
1671           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1672           be able to select which LEDs are active using the options below. If
1673           you are compiling a kernel for the EBSA-110 or the LART however, the
1674           red LED will simply flash regularly to indicate that the system is
1675           still functional. It is safe to say Y here if you have a CATS
1676           system, but the driver will do nothing.
1677
1678 config LEDS_TIMER
1679         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1680                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1681                             || MACH_OMAP_PERSEUS2
1682         depends on LEDS
1683         depends on !GENERIC_CLOCKEVENTS
1684         default y if ARCH_EBSA110
1685         help
1686           If you say Y here, one of the system LEDs (the green one on the
1687           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1688           will flash regularly to indicate that the system is still
1689           operational. This is mainly useful to kernel hackers who are
1690           debugging unstable kernels.
1691
1692           The LART uses the same LED for both Timer LED and CPU usage LED
1693           functions. You may choose to use both, but the Timer LED function
1694           will overrule the CPU usage LED.
1695
1696 config LEDS_CPU
1697         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1698                         !ARCH_OMAP) \
1699                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1700                         || MACH_OMAP_PERSEUS2
1701         depends on LEDS
1702         help
1703           If you say Y here, the red LED will be used to give a good real
1704           time indication of CPU usage, by lighting whenever the idle task
1705           is not currently executing.
1706
1707           The LART uses the same LED for both Timer LED and CPU usage LED
1708           functions. You may choose to use both, but the Timer LED function
1709           will overrule the CPU usage LED.
1710
1711 config ALIGNMENT_TRAP
1712         bool
1713         depends on CPU_CP15_MMU
1714         default y if !ARCH_EBSA110
1715         select HAVE_PROC_CPU if PROC_FS
1716         help
1717           ARM processors cannot fetch/store information which is not
1718           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1719           address divisible by 4. On 32-bit ARM processors, these non-aligned
1720           fetch/store instructions will be emulated in software if you say
1721           here, which has a severe performance impact. This is necessary for
1722           correct operation of some network protocols. With an IP-only
1723           configuration it is safe to say N, otherwise say Y.
1724
1725 config UACCESS_WITH_MEMCPY
1726         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1727         depends on MMU && EXPERIMENTAL
1728         default y if CPU_FEROCEON
1729         help
1730           Implement faster copy_to_user and clear_user methods for CPU
1731           cores where a 8-word STM instruction give significantly higher
1732           memory write throughput than a sequence of individual 32bit stores.
1733
1734           A possible side effect is a slight increase in scheduling latency
1735           between threads sharing the same address space if they invoke
1736           such copy operations with large buffers.
1737
1738           However, if the CPU data cache is using a write-allocate mode,
1739           this option is unlikely to provide any performance gain.
1740
1741 config SECCOMP
1742         bool
1743         prompt "Enable seccomp to safely compute untrusted bytecode"
1744         ---help---
1745           This kernel feature is useful for number crunching applications
1746           that may need to compute untrusted bytecode during their
1747           execution. By using pipes or other transports made available to
1748           the process as file descriptors supporting the read/write
1749           syscalls, it's possible to isolate those applications in
1750           their own address space using seccomp. Once seccomp is
1751           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1752           and the task is only allowed to execute a few safe syscalls
1753           defined by each seccomp mode.
1754
1755 config CC_STACKPROTECTOR
1756         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1757         depends on EXPERIMENTAL
1758         help
1759           This option turns on the -fstack-protector GCC feature. This
1760           feature puts, at the beginning of functions, a canary value on
1761           the stack just before the return address, and validates
1762           the value just before actually returning.  Stack based buffer
1763           overflows (that need to overwrite this return address) now also
1764           overwrite the canary, which gets detected and the attack is then
1765           neutralized via a kernel panic.
1766           This feature requires gcc version 4.2 or above.
1767
1768 config DEPRECATED_PARAM_STRUCT
1769         bool "Provide old way to pass kernel parameters"
1770         help
1771           This was deprecated in 2001 and announced to live on for 5 years.
1772           Some old boot loaders still use this way.
1773
1774 endmenu
1775
1776 menu "Boot options"
1777
1778 config USE_OF
1779         bool "Flattened Device Tree support"
1780         select OF
1781         select OF_EARLY_FLATTREE
1782         select IRQ_DOMAIN
1783         help
1784           Include support for flattened device tree machine descriptions.
1785
1786 # Compressed boot loader in ROM.  Yes, we really want to ask about
1787 # TEXT and BSS so we preserve their values in the config files.
1788 config ZBOOT_ROM_TEXT
1789         hex "Compressed ROM boot loader base address"
1790         default "0"
1791         help
1792           The physical address at which the ROM-able zImage is to be
1793           placed in the target.  Platforms which normally make use of
1794           ROM-able zImage formats normally set this to a suitable
1795           value in their defconfig file.
1796
1797           If ZBOOT_ROM is not enabled, this has no effect.
1798
1799 config ZBOOT_ROM_BSS
1800         hex "Compressed ROM boot loader BSS address"
1801         default "0"
1802         help
1803           The base address of an area of read/write memory in the target
1804           for the ROM-able zImage which must be available while the
1805           decompressor is running. It must be large enough to hold the
1806           entire decompressed kernel plus an additional 128 KiB.
1807           Platforms which normally make use of ROM-able zImage formats
1808           normally set this to a suitable value in their defconfig file.
1809
1810           If ZBOOT_ROM is not enabled, this has no effect.
1811
1812 config ZBOOT_ROM
1813         bool "Compressed boot loader in ROM/flash"
1814         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1815         help
1816           Say Y here if you intend to execute your compressed kernel image
1817           (zImage) directly from ROM or flash.  If unsure, say N.
1818
1819 choice
1820         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1821         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1822         default ZBOOT_ROM_NONE
1823         help
1824           Include experimental SD/MMC loading code in the ROM-able zImage.
1825           With this enabled it is possible to write the the ROM-able zImage
1826           kernel image to an MMC or SD card and boot the kernel straight
1827           from the reset vector. At reset the processor Mask ROM will load
1828           the first part of the the ROM-able zImage which in turn loads the
1829           rest the kernel image to RAM.
1830
1831 config ZBOOT_ROM_NONE
1832         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1833         help
1834           Do not load image from SD or MMC
1835
1836 config ZBOOT_ROM_MMCIF
1837         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1838         help
1839           Load image from MMCIF hardware block.
1840
1841 config ZBOOT_ROM_SH_MOBILE_SDHI
1842         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1843         help
1844           Load image from SDHI hardware block
1845
1846 endchoice
1847
1848 config ARM_APPENDED_DTB
1849         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1850         depends on OF && !ZBOOT_ROM && EXPERIMENTAL
1851         help
1852           With this option, the boot code will look for a device tree binary
1853           (DTB) appended to zImage
1854           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1855
1856           This is meant as a backward compatibility convenience for those
1857           systems with a bootloader that can't be upgraded to accommodate
1858           the documented boot protocol using a device tree.
1859
1860           Beware that there is very little in terms of protection against
1861           this option being confused by leftover garbage in memory that might
1862           look like a DTB header after a reboot if no actual DTB is appended
1863           to zImage.  Do not leave this option active in a production kernel
1864           if you don't intend to always append a DTB.  Proper passing of the
1865           location into r2 of a bootloader provided DTB is always preferable
1866           to this option.
1867
1868 config ARM_ATAG_DTB_COMPAT
1869         bool "Supplement the appended DTB with traditional ATAG information"
1870         depends on ARM_APPENDED_DTB
1871         help
1872           Some old bootloaders can't be updated to a DTB capable one, yet
1873           they provide ATAGs with memory configuration, the ramdisk address,
1874           the kernel cmdline string, etc.  Such information is dynamically
1875           provided by the bootloader and can't always be stored in a static
1876           DTB.  To allow a device tree enabled kernel to be used with such
1877           bootloaders, this option allows zImage to extract the information
1878           from the ATAG list and store it at run time into the appended DTB.
1879
1880 config CMDLINE
1881         string "Default kernel command string"
1882         default ""
1883         help
1884           On some architectures (EBSA110 and CATS), there is currently no way
1885           for the boot loader to pass arguments to the kernel. For these
1886           architectures, you should supply some command-line options at build
1887           time by entering them here. As a minimum, you should specify the
1888           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1889
1890 choice
1891         prompt "Kernel command line type" if CMDLINE != ""
1892         default CMDLINE_FROM_BOOTLOADER
1893
1894 config CMDLINE_FROM_BOOTLOADER
1895         bool "Use bootloader kernel arguments if available"
1896         help
1897           Uses the command-line options passed by the boot loader. If
1898           the boot loader doesn't provide any, the default kernel command
1899           string provided in CMDLINE will be used.
1900
1901 config CMDLINE_EXTEND
1902         bool "Extend bootloader kernel arguments"
1903         help
1904           The command-line arguments provided by the boot loader will be
1905           appended to the default kernel command string.
1906
1907 config CMDLINE_FORCE
1908         bool "Always use the default kernel command string"
1909         help
1910           Always use the default kernel command string, even if the boot
1911           loader passes other arguments to the kernel.
1912           This is useful if you cannot or don't want to change the
1913           command-line options your boot loader passes to the kernel.
1914 endchoice
1915
1916 config XIP_KERNEL
1917         bool "Kernel Execute-In-Place from ROM"
1918         depends on !ZBOOT_ROM
1919         help
1920           Execute-In-Place allows the kernel to run from non-volatile storage
1921           directly addressable by the CPU, such as NOR flash. This saves RAM
1922           space since the text section of the kernel is not loaded from flash
1923           to RAM.  Read-write sections, such as the data section and stack,
1924           are still copied to RAM.  The XIP kernel is not compressed since
1925           it has to run directly from flash, so it will take more space to
1926           store it.  The flash address used to link the kernel object files,
1927           and for storing it, is configuration dependent. Therefore, if you
1928           say Y here, you must know the proper physical address where to
1929           store the kernel image depending on your own flash memory usage.
1930
1931           Also note that the make target becomes "make xipImage" rather than
1932           "make zImage" or "make Image".  The final kernel binary to put in
1933           ROM memory will be arch/arm/boot/xipImage.
1934
1935           If unsure, say N.
1936
1937 config XIP_PHYS_ADDR
1938         hex "XIP Kernel Physical Location"
1939         depends on XIP_KERNEL
1940         default "0x00080000"
1941         help
1942           This is the physical address in your flash memory the kernel will
1943           be linked for and stored to.  This address is dependent on your
1944           own flash usage.
1945
1946 config KEXEC
1947         bool "Kexec system call (EXPERIMENTAL)"
1948         depends on EXPERIMENTAL
1949         help
1950           kexec is a system call that implements the ability to shutdown your
1951           current kernel, and to start another kernel.  It is like a reboot
1952           but it is independent of the system firmware.   And like a reboot
1953           you can start any kernel with it, not just Linux.
1954
1955           It is an ongoing process to be certain the hardware in a machine
1956           is properly shutdown, so do not be surprised if this code does not
1957           initially work for you.  It may help to enable device hotplugging
1958           support.
1959
1960 config ATAGS_PROC
1961         bool "Export atags in procfs"
1962         depends on KEXEC
1963         default y
1964         help
1965           Should the atags used to boot the kernel be exported in an "atags"
1966           file in procfs. Useful with kexec.
1967
1968 config CRASH_DUMP
1969         bool "Build kdump crash kernel (EXPERIMENTAL)"
1970         depends on EXPERIMENTAL
1971         help
1972           Generate crash dump after being started by kexec. This should
1973           be normally only set in special crash dump kernels which are
1974           loaded in the main kernel with kexec-tools into a specially
1975           reserved region and then later executed after a crash by
1976           kdump/kexec. The crash dump kernel must be compiled to a
1977           memory address not used by the main kernel
1978
1979           For more details see Documentation/kdump/kdump.txt
1980
1981 config AUTO_ZRELADDR
1982         bool "Auto calculation of the decompressed kernel image address"
1983         depends on !ZBOOT_ROM && !ARCH_U300
1984         help
1985           ZRELADDR is the physical address where the decompressed kernel
1986           image will be placed. If AUTO_ZRELADDR is selected, the address
1987           will be determined at run-time by masking the current IP with
1988           0xf8000000. This assumes the zImage being placed in the first 128MB
1989           from start of memory.
1990
1991 endmenu
1992
1993 menu "CPU Power Management"
1994
1995 if ARCH_HAS_CPUFREQ
1996
1997 source "drivers/cpufreq/Kconfig"
1998
1999 config CPU_FREQ_IMX
2000         tristate "CPUfreq driver for i.MX CPUs"
2001         depends on ARCH_MXC && CPU_FREQ
2002         help
2003           This enables the CPUfreq driver for i.MX CPUs.
2004
2005 config CPU_FREQ_SA1100
2006         bool
2007
2008 config CPU_FREQ_SA1110
2009         bool
2010
2011 config CPU_FREQ_INTEGRATOR
2012         tristate "CPUfreq driver for ARM Integrator CPUs"
2013         depends on ARCH_INTEGRATOR && CPU_FREQ
2014         default y
2015         help
2016           This enables the CPUfreq driver for ARM Integrator CPUs.
2017
2018           For details, take a look at <file:Documentation/cpu-freq>.
2019
2020           If in doubt, say Y.
2021
2022 config CPU_FREQ_PXA
2023         bool
2024         depends on CPU_FREQ && ARCH_PXA && PXA25x
2025         default y
2026         select CPU_FREQ_DEFAULT_GOV_USERSPACE
2027
2028 config CPU_FREQ_S3C
2029         bool
2030         help
2031           Internal configuration node for common cpufreq on Samsung SoC
2032
2033 config CPU_FREQ_S3C24XX
2034         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2035         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
2036         select CPU_FREQ_S3C
2037         help
2038           This enables the CPUfreq driver for the Samsung S3C24XX family
2039           of CPUs.
2040
2041           For details, take a look at <file:Documentation/cpu-freq>.
2042
2043           If in doubt, say N.
2044
2045 config CPU_FREQ_S3C24XX_PLL
2046         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2047         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
2048         help
2049           Compile in support for changing the PLL frequency from the
2050           S3C24XX series CPUfreq driver. The PLL takes time to settle
2051           after a frequency change, so by default it is not enabled.
2052
2053           This also means that the PLL tables for the selected CPU(s) will
2054           be built which may increase the size of the kernel image.
2055
2056 config CPU_FREQ_S3C24XX_DEBUG
2057         bool "Debug CPUfreq Samsung driver core"
2058         depends on CPU_FREQ_S3C24XX
2059         help
2060           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2061
2062 config CPU_FREQ_S3C24XX_IODEBUG
2063         bool "Debug CPUfreq Samsung driver IO timing"
2064         depends on CPU_FREQ_S3C24XX
2065         help
2066           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2067
2068 config CPU_FREQ_S3C24XX_DEBUGFS
2069         bool "Export debugfs for CPUFreq"
2070         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2071         help
2072           Export status information via debugfs.
2073
2074 endif
2075
2076 source "drivers/cpuidle/Kconfig"
2077
2078 endmenu
2079
2080 menu "Floating point emulation"
2081
2082 comment "At least one emulation must be selected"
2083
2084 config FPE_NWFPE
2085         bool "NWFPE math emulation"
2086         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2087         ---help---
2088           Say Y to include the NWFPE floating point emulator in the kernel.
2089           This is necessary to run most binaries. Linux does not currently
2090           support floating point hardware so you need to say Y here even if
2091           your machine has an FPA or floating point co-processor podule.
2092
2093           You may say N here if you are going to load the Acorn FPEmulator
2094           early in the bootup.
2095
2096 config FPE_NWFPE_XP
2097         bool "Support extended precision"
2098         depends on FPE_NWFPE
2099         help
2100           Say Y to include 80-bit support in the kernel floating-point
2101           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2102           Note that gcc does not generate 80-bit operations by default,
2103           so in most cases this option only enlarges the size of the
2104           floating point emulator without any good reason.
2105
2106           You almost surely want to say N here.
2107
2108 config FPE_FASTFPE
2109         bool "FastFPE math emulation (EXPERIMENTAL)"
2110         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2111         ---help---
2112           Say Y here to include the FAST floating point emulator in the kernel.
2113           This is an experimental much faster emulator which now also has full
2114           precision for the mantissa.  It does not support any exceptions.
2115           It is very simple, and approximately 3-6 times faster than NWFPE.
2116
2117           It should be sufficient for most programs.  It may be not suitable
2118           for scientific calculations, but you have to check this for yourself.
2119           If you do not feel you need a faster FP emulation you should better
2120           choose NWFPE.
2121
2122 config VFP
2123         bool "VFP-format floating point maths"
2124         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2125         help
2126           Say Y to include VFP support code in the kernel. This is needed
2127           if your hardware includes a VFP unit.
2128
2129           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2130           release notes and additional status information.
2131
2132           Say N if your target does not have VFP hardware.
2133
2134 config VFPv3
2135         bool
2136         depends on VFP
2137         default y if CPU_V7
2138
2139 config NEON
2140         bool "Advanced SIMD (NEON) Extension support"
2141         depends on VFPv3 && CPU_V7
2142         help
2143           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2144           Extension.
2145
2146 endmenu
2147
2148 menu "Userspace binary formats"
2149
2150 source "fs/Kconfig.binfmt"
2151
2152 config ARTHUR
2153         tristate "RISC OS personality"
2154         depends on !AEABI
2155         help
2156           Say Y here to include the kernel code necessary if you want to run
2157           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2158           experimental; if this sounds frightening, say N and sleep in peace.
2159           You can also say M here to compile this support as a module (which
2160           will be called arthur).
2161
2162 endmenu
2163
2164 menu "Power management options"
2165
2166 source "kernel/power/Kconfig"
2167
2168 config ARCH_SUSPEND_POSSIBLE
2169         depends on !ARCH_S5P64X0 && !ARCH_S5PC100
2170         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2171                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2172         def_bool y
2173
2174 endmenu
2175
2176 source "net/Kconfig"
2177
2178 source "drivers/Kconfig"
2179
2180 source "fs/Kconfig"
2181
2182 source "arch/arm/Kconfig.debug"
2183
2184 source "security/Kconfig"
2185
2186 source "crypto/Kconfig"
2187
2188 source "lib/Kconfig"