arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select ARCH_HAVE_CUSTOM_GPIO_H
   5         select HAVE_AOUT
   6         select HAVE_DMA_API_DEBUG
   7         select HAVE_IDE if PCI || ISA || PCMCIA
   8         select HAVE_DMA_ATTRS
   9         select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7)
  10         select HAVE_MEMBLOCK
  11         select RTC_LIB
  12         select SYS_SUPPORTS_APM_EMULATION
  13         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  14         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  15         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  16         select HAVE_ARCH_KGDB
  17         select HAVE_ARCH_TRACEHOOK
  18         select HAVE_KPROBES if !XIP_KERNEL
  19         select HAVE_KRETPROBES if (HAVE_KPROBES)
  20         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  21         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  22         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  23         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  24         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
  25         select HAVE_GENERIC_DMA_COHERENT
  26         select HAVE_KERNEL_GZIP
  27         select HAVE_KERNEL_LZO
  28         select HAVE_KERNEL_LZMA
  29         select HAVE_KERNEL_XZ
  30         select HAVE_IRQ_WORK
  31         select HAVE_PERF_EVENTS
  32         select PERF_USE_VMALLOC
  33         select HAVE_REGS_AND_STACK_ACCESS_API
  34         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  35         select HAVE_C_RECORDMCOUNT
  36         select HAVE_GENERIC_HARDIRQS
  37         select HARDIRQS_SW_RESEND
  38         select GENERIC_IRQ_PROBE
  39         select GENERIC_IRQ_SHOW
  40         select GENERIC_IRQ_PROBE
  41         select HARDIRQS_SW_RESEND
  42         select CPU_PM if (SUSPEND || CPU_IDLE)
  43         select GENERIC_PCI_IOMAP
  44         select HAVE_BPF_JIT
  45         select GENERIC_SMP_IDLE_THREAD
  46         select KTIME_SCALAR
  47         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  48         help
  49           The ARM series is a line of low-power-consumption RISC chip designs
  50           licensed by ARM Ltd and targeted at embedded applications and
  51           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  52           manufactured, but legacy ARM-based PC hardware remains popular in
  53           Europe.  There is an ARM Linux project with a web page at
  54           <http://www.arm.linux.org.uk/>.
  55
  56 config ARM_HAS_SG_CHAIN
  57         bool
  58
  59 config NEED_SG_DMA_LENGTH
  60         bool
  61
  62 config ARM_DMA_USE_IOMMU
  63         select NEED_SG_DMA_LENGTH
  64         select ARM_HAS_SG_CHAIN
  65         bool
  66
  67 config HAVE_PWM
  68         bool
  69
  70 config MIGHT_HAVE_PCI
  71         bool
  72
  73 config SYS_SUPPORTS_APM_EMULATION
  74         bool
  75
  76 config GENERIC_GPIO
  77         bool
  78
  79 config HAVE_TCM
  80         bool
  81         select GENERIC_ALLOCATOR
  82
  83 config HAVE_PROC_CPU
  84         bool
  85
  86 config NO_IOPORT
  87         bool
  88
  89 config EISA
  90         bool
  91         ---help---
  92           The Extended Industry Standard Architecture (EISA) bus was
  93           developed as an open alternative to the IBM MicroChannel bus.
  94
  95           The EISA bus provided some of the features of the IBM MicroChannel
  96           bus while maintaining backward compatibility with cards made for
  97           the older ISA bus.  The EISA bus saw limited use between 1988 and
  98           1995 when it was made obsolete by the PCI bus.
  99
 100           Say Y here if you are building a kernel for an EISA-based machine.
 101
 102           Otherwise, say N.
 103
 104 config SBUS
 105         bool
 106
 107 config STACKTRACE_SUPPORT
 108         bool
 109         default y
 110
 111 config HAVE_LATENCYTOP_SUPPORT
 112         bool
 113         depends on !SMP
 114         default y
 115
 116 config LOCKDEP_SUPPORT
 117         bool
 118         default y
 119
 120 config TRACE_IRQFLAGS_SUPPORT
 121         bool
 122         default y
 123
 124 config GENERIC_LOCKBREAK
 125         bool
 126         default y
 127         depends on SMP && PREEMPT
 128
 129 config RWSEM_GENERIC_SPINLOCK
 130         bool
 131         default y
 132
 133 config RWSEM_XCHGADD_ALGORITHM
 134         bool
 135
 136 config ARCH_HAS_ILOG2_U32
 137         bool
 138
 139 config ARCH_HAS_ILOG2_U64
 140         bool
 141
 142 config ARCH_HAS_CPUFREQ
 143         bool
 144         help
 145           Internal node to signify that the ARCH has CPUFREQ support
 146           and that the relevant menu configurations are displayed for
 147           it.
 148
 149 config GENERIC_HWEIGHT
 150         bool
 151         default y
 152
 153 config GENERIC_CALIBRATE_DELAY
 154         bool
 155         default y
 156
 157 config ARCH_MAY_HAVE_PC_FDC
 158         bool
 159
 160 config ZONE_DMA
 161         bool
 162
 163 config NEED_DMA_MAP_STATE
 164        def_bool y
 165
 166 config ARCH_HAS_DMA_SET_COHERENT_MASK
 167         bool
 168
 169 config GENERIC_ISA_DMA
 170         bool
 171
 172 config FIQ
 173         bool
 174
 175 config NEED_RET_TO_USER
 176         bool
 177
 178 config ARCH_MTD_XIP
 179         bool
 180
 181 config VECTORS_BASE
 182         hex
 183         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 184         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 185         default 0x00000000
 186         help
 187           The base address of exception vectors.
 188
 189 config ARM_PATCH_PHYS_VIRT
 190         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 191         default y
 192         depends on !XIP_KERNEL && MMU
 193         depends on !ARCH_REALVIEW || !SPARSEMEM
 194         help
 195           Patch phys-to-virt and virt-to-phys translation functions at
 196           boot and module load time according to the position of the
 197           kernel in system memory.
 198
 199           This can only be used with non-XIP MMU kernels where the base
 200           of physical memory is at a 16MB boundary.
 201
 202           Only disable this option if you know that you do not require
 203           this feature (eg, building a kernel for a single machine) and
 204           you need to shrink the kernel to the minimal size.
 205
 206 config NEED_MACH_IO_H
 207         bool
 208         help
 209           Select this when mach/io.h is required to provide special
 210           definitions for this platform.  The need for mach/io.h should
 211           be avoided when possible.
 212
 213 config NEED_MACH_MEMORY_H
 214         bool
 215         help
 216           Select this when mach/memory.h is required to provide special
 217           definitions for this platform.  The need for mach/memory.h should
 218           be avoided when possible.
 219
 220 config PHYS_OFFSET
 221         hex "Physical address of main memory" if MMU
 222         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 223         default DRAM_BASE if !MMU
 224         help
 225           Please provide the physical address corresponding to the
 226           location of main memory in your system.
 227
 228 config GENERIC_BUG
 229         def_bool y
 230         depends on BUG
 231
 232 source "init/Kconfig"
 233
 234 source "kernel/Kconfig.freezer"
 235
 236 menu "System Type"
 237
 238 config MMU
 239         bool "MMU-based Paged Memory Management Support"
 240         default y
 241         help
 242           Select if you want MMU-based virtualised addressing space
 243           support by paged memory management. If unsure, say 'Y'.
 244
 245 #
 246 # The "ARM system type" choice list is ordered alphabetically by option
 247 # text.  Please add new entries in the option alphabetic order.
 248 #
 249 choice
 250         prompt "ARM system type"
 251         default ARCH_VERSATILE
 252
 253 config ARCH_INTEGRATOR
 254         bool "ARM Ltd. Integrator family"
 255         select ARM_AMBA
 256         select ARCH_HAS_CPUFREQ
 257         select CLKDEV_LOOKUP
 258         select HAVE_MACH_CLKDEV
 259         select HAVE_TCM
 260         select ICST
 261         select GENERIC_CLOCKEVENTS
 262         select PLAT_VERSATILE
 263         select PLAT_VERSATILE_FPGA_IRQ
 264         select NEED_MACH_IO_H
 265         select NEED_MACH_MEMORY_H
 266         select SPARSE_IRQ
 267         select MULTI_IRQ_HANDLER
 268         help
 269           Support for ARM's Integrator platform.
 270
 271 config ARCH_REALVIEW
 272         bool "ARM Ltd. RealView family"
 273         select ARM_AMBA
 274         select CLKDEV_LOOKUP
 275         select HAVE_MACH_CLKDEV
 276         select ICST
 277         select GENERIC_CLOCKEVENTS
 278         select ARCH_WANT_OPTIONAL_GPIOLIB
 279         select PLAT_VERSATILE
 280         select PLAT_VERSATILE_CLCD
 281         select ARM_TIMER_SP804
 282         select GPIO_PL061 if GPIOLIB
 283         select NEED_MACH_MEMORY_H
 284         help
 285           This enables support for ARM Ltd RealView boards.
 286
 287 config ARCH_VERSATILE
 288         bool "ARM Ltd. Versatile family"
 289         select ARM_AMBA
 290         select ARM_VIC
 291         select CLKDEV_LOOKUP
 292         select HAVE_MACH_CLKDEV
 293         select ICST
 294         select GENERIC_CLOCKEVENTS
 295         select ARCH_WANT_OPTIONAL_GPIOLIB
 296         select NEED_MACH_IO_H if PCI
 297         select PLAT_VERSATILE
 298         select PLAT_VERSATILE_CLCD
 299         select PLAT_VERSATILE_FPGA_IRQ
 300         select ARM_TIMER_SP804
 301         help
 302           This enables support for ARM Ltd Versatile board.
 303
 304 config ARCH_VEXPRESS
 305         bool "ARM Ltd. Versatile Express family"
 306         select ARCH_WANT_OPTIONAL_GPIOLIB
 307         select ARM_AMBA
 308         select ARM_TIMER_SP804
 309         select CLKDEV_LOOKUP
 310         select HAVE_MACH_CLKDEV
 311         select GENERIC_CLOCKEVENTS
 312         select HAVE_CLK
 313         select HAVE_PATA_PLATFORM
 314         select ICST
 315         select NO_IOPORT
 316         select PLAT_VERSATILE
 317         select PLAT_VERSATILE_CLCD
 318         help
 319           This enables support for the ARM Ltd Versatile Express boards.
 320
 321 config ARCH_AT91
 322         bool "Atmel AT91"
 323         select ARCH_REQUIRE_GPIOLIB
 324         select HAVE_CLK
 325         select CLKDEV_LOOKUP
 326         select IRQ_DOMAIN
 327         select NEED_MACH_IO_H if PCCARD
 328         help
 329           This enables support for systems based on Atmel
 330           AT91RM9200 and AT91SAM9* processors.
 331
 332 config ARCH_BCMRING
 333         bool "Broadcom BCMRING"
 334         depends on MMU
 335         select CPU_V6
 336         select ARM_AMBA
 337         select ARM_TIMER_SP804
 338         select CLKDEV_LOOKUP
 339         select GENERIC_CLOCKEVENTS
 340         select ARCH_WANT_OPTIONAL_GPIOLIB
 341         help
 342           Support for Broadcom's BCMRing platform.
 343
 344 config ARCH_HIGHBANK
 345         bool "Calxeda Highbank-based"
 346         select ARCH_WANT_OPTIONAL_GPIOLIB
 347         select ARM_AMBA
 348         select ARM_GIC
 349         select ARM_TIMER_SP804
 350         select CACHE_L2X0
 351         select CLKDEV_LOOKUP
 352         select CPU_V7
 353         select GENERIC_CLOCKEVENTS
 354         select HAVE_ARM_SCU
 355         select HAVE_SMP
 356         select SPARSE_IRQ
 357         select USE_OF
 358         help
 359           Support for the Calxeda Highbank SoC based boards.
 360
 361 config ARCH_CLPS711X
 362         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 363         select CPU_ARM720T
 364         select ARCH_USES_GETTIMEOFFSET
 365         select NEED_MACH_MEMORY_H
 366         help
 367           Support for Cirrus Logic 711x/721x/731x based boards.
 368
 369 config ARCH_CNS3XXX
 370         bool "Cavium Networks CNS3XXX family"
 371         select CPU_V6K
 372         select GENERIC_CLOCKEVENTS
 373         select ARM_GIC
 374         select MIGHT_HAVE_CACHE_L2X0
 375         select MIGHT_HAVE_PCI
 376         select PCI_DOMAINS if PCI
 377         help
 378           Support for Cavium Networks CNS3XXX platform.
 379
 380 config ARCH_GEMINI
 381         bool "Cortina Systems Gemini"
 382         select CPU_FA526
 383         select ARCH_REQUIRE_GPIOLIB
 384         select ARCH_USES_GETTIMEOFFSET
 385         help
 386           Support for the Cortina Systems Gemini family SoCs
 387
 388 config ARCH_PRIMA2
 389         bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 390         select CPU_V7
 391         select NO_IOPORT
 392         select GENERIC_CLOCKEVENTS
 393         select CLKDEV_LOOKUP
 394         select GENERIC_IRQ_CHIP
 395         select MIGHT_HAVE_CACHE_L2X0
 396         select PINCTRL
 397         select PINCTRL_SIRF
 398         select USE_OF
 399         select ZONE_DMA
 400         help
 401           Support for CSR SiRFSoC ARM Cortex A9 Platform
 402
 403 config ARCH_EBSA110
 404         bool "EBSA-110"
 405         select CPU_SA110
 406         select ISA
 407         select NO_IOPORT
 408         select ARCH_USES_GETTIMEOFFSET
 409         select NEED_MACH_IO_H
 410         select NEED_MACH_MEMORY_H
 411         help
 412           This is an evaluation board for the StrongARM processor available
 413           from Digital. It has limited hardware on-board, including an
 414           Ethernet interface, two PCMCIA sockets, two serial ports and a
 415           parallel port.
 416
 417 config ARCH_EP93XX
 418         bool "EP93xx-based"
 419         select CPU_ARM920T
 420         select ARM_AMBA
 421         select ARM_VIC
 422         select CLKDEV_LOOKUP
 423         select ARCH_REQUIRE_GPIOLIB
 424         select ARCH_HAS_HOLES_MEMORYMODEL
 425         select ARCH_USES_GETTIMEOFFSET
 426         select NEED_MACH_MEMORY_H
 427         help
 428           This enables support for the Cirrus EP93xx series of CPUs.
 429
 430 config ARCH_FOOTBRIDGE
 431         bool "FootBridge"
 432         select CPU_SA110
 433         select FOOTBRIDGE
 434         select GENERIC_CLOCKEVENTS
 435         select HAVE_IDE
 436         select NEED_MACH_IO_H
 437         select NEED_MACH_MEMORY_H
 438         help
 439           Support for systems based on the DC21285 companion chip
 440           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 441
 442 config ARCH_MXC
 443         bool "Freescale MXC/iMX-based"
 444         select GENERIC_CLOCKEVENTS
 445         select ARCH_REQUIRE_GPIOLIB
 446         select CLKDEV_LOOKUP
 447         select CLKSRC_MMIO
 448         select GENERIC_IRQ_CHIP
 449         select MULTI_IRQ_HANDLER
 450         help
 451           Support for Freescale MXC/iMX-based family of processors
 452
 453 config ARCH_MXS
 454         bool "Freescale MXS-based"
 455         select GENERIC_CLOCKEVENTS
 456         select ARCH_REQUIRE_GPIOLIB
 457         select CLKDEV_LOOKUP
 458         select CLKSRC_MMIO
 459         select COMMON_CLK
 460         select HAVE_CLK_PREPARE
 461         select PINCTRL
 462         select USE_OF
 463         help
 464           Support for Freescale MXS-based family of processors
 465
 466 config ARCH_NETX
 467         bool "Hilscher NetX based"
 468         select CLKSRC_MMIO
 469         select CPU_ARM926T
 470         select ARM_VIC
 471         select GENERIC_CLOCKEVENTS
 472         help
 473           This enables support for systems based on the Hilscher NetX Soc
 474
 475 config ARCH_H720X
 476         bool "Hynix HMS720x-based"
 477         select CPU_ARM720T
 478         select ISA_DMA_API
 479         select ARCH_USES_GETTIMEOFFSET
 480         help
 481           This enables support for systems based on the Hynix HMS720x
 482
 483 config ARCH_IOP13XX
 484         bool "IOP13xx-based"
 485         depends on MMU
 486         select CPU_XSC3
 487         select PLAT_IOP
 488         select PCI
 489         select ARCH_SUPPORTS_MSI
 490         select VMSPLIT_1G
 491         select NEED_MACH_IO_H
 492         select NEED_MACH_MEMORY_H
 493         select NEED_RET_TO_USER
 494         help
 495           Support for Intel's IOP13XX (XScale) family of processors.
 496
 497 config ARCH_IOP32X
 498         bool "IOP32x-based"
 499         depends on MMU
 500         select CPU_XSCALE
 501         select NEED_MACH_IO_H
 502         select NEED_RET_TO_USER
 503         select PLAT_IOP
 504         select PCI
 505         select ARCH_REQUIRE_GPIOLIB
 506         help
 507           Support for Intel's 80219 and IOP32X (XScale) family of
 508           processors.
 509
 510 config ARCH_IOP33X
 511         bool "IOP33x-based"
 512         depends on MMU
 513         select CPU_XSCALE
 514         select NEED_MACH_IO_H
 515         select NEED_RET_TO_USER
 516         select PLAT_IOP
 517         select PCI
 518         select ARCH_REQUIRE_GPIOLIB
 519         help
 520           Support for Intel's IOP33X (XScale) family of processors.
 521
 522 config ARCH_IXP4XX
 523         bool "IXP4xx-based"
 524         depends on MMU
 525         select ARCH_HAS_DMA_SET_COHERENT_MASK
 526         select CLKSRC_MMIO
 527         select CPU_XSCALE
 528         select ARCH_REQUIRE_GPIOLIB
 529         select GENERIC_CLOCKEVENTS
 530         select MIGHT_HAVE_PCI
 531         select NEED_MACH_IO_H
 532         select DMABOUNCE if PCI
 533         help
 534           Support for Intel's IXP4XX (XScale) family of processors.
 535
 536 config ARCH_DOVE
 537         bool "Marvell Dove"
 538         select CPU_V7
 539         select PCI
 540         select ARCH_REQUIRE_GPIOLIB
 541         select GENERIC_CLOCKEVENTS
 542         select NEED_MACH_IO_H
 543         select PLAT_ORION
 544         help
 545           Support for the Marvell Dove SoC 88AP510
 546
 547 config ARCH_KIRKWOOD
 548         bool "Marvell Kirkwood"
 549         select CPU_FEROCEON
 550         select PCI
 551         select ARCH_REQUIRE_GPIOLIB
 552         select GENERIC_CLOCKEVENTS
 553         select NEED_MACH_IO_H
 554         select PLAT_ORION
 555         help
 556           Support for the following Marvell Kirkwood series SoCs:
 557           88F6180, 88F6192 and 88F6281.
 558
 559 config ARCH_LPC32XX
 560         bool "NXP LPC32XX"
 561         select CLKSRC_MMIO
 562         select CPU_ARM926T
 563         select ARCH_REQUIRE_GPIOLIB
 564         select HAVE_IDE
 565         select ARM_AMBA
 566         select USB_ARCH_HAS_OHCI
 567         select CLKDEV_LOOKUP
 568         select GENERIC_CLOCKEVENTS
 569         select USE_OF
 570         help
 571           Support for the NXP LPC32XX family of processors
 572
 573 config ARCH_MV78XX0
 574         bool "Marvell MV78xx0"
 575         select CPU_FEROCEON
 576         select PCI
 577         select ARCH_REQUIRE_GPIOLIB
 578         select GENERIC_CLOCKEVENTS
 579         select NEED_MACH_IO_H
 580         select PLAT_ORION
 581         help
 582           Support for the following Marvell MV78xx0 series SoCs:
 583           MV781x0, MV782x0.
 584
 585 config ARCH_ORION5X
 586         bool "Marvell Orion"
 587         depends on MMU
 588         select CPU_FEROCEON
 589         select PCI
 590         select ARCH_REQUIRE_GPIOLIB
 591         select GENERIC_CLOCKEVENTS
 592         select NEED_MACH_IO_H
 593         select PLAT_ORION
 594         help
 595           Support for the following Marvell Orion 5x series SoCs:
 596           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 597           Orion-2 (5281), Orion-1-90 (6183).
 598
 599 config ARCH_MMP
 600         bool "Marvell PXA168/910/MMP2"
 601         depends on MMU
 602         select ARCH_REQUIRE_GPIOLIB
 603         select CLKDEV_LOOKUP
 604         select GENERIC_CLOCKEVENTS
 605         select GPIO_PXA
 606         select IRQ_DOMAIN
 607         select PLAT_PXA
 608         select SPARSE_IRQ
 609         select GENERIC_ALLOCATOR
 610         help
 611           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 612
 613 config ARCH_KS8695
 614         bool "Micrel/Kendin KS8695"
 615         select CPU_ARM922T
 616         select ARCH_REQUIRE_GPIOLIB
 617         select ARCH_USES_GETTIMEOFFSET
 618         select NEED_MACH_MEMORY_H
 619         help
 620           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 621           System-on-Chip devices.
 622
 623 config ARCH_W90X900
 624         bool "Nuvoton W90X900 CPU"
 625         select CPU_ARM926T
 626         select ARCH_REQUIRE_GPIOLIB
 627         select CLKDEV_LOOKUP
 628         select CLKSRC_MMIO
 629         select GENERIC_CLOCKEVENTS
 630         help
 631           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 632           At present, the w90x900 has been renamed nuc900, regarding
 633           the ARM series product line, you can login the following
 634           link address to know more.
 635
 636           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 637                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 638
 639 config ARCH_TEGRA
 640         bool "NVIDIA Tegra"
 641         select CLKDEV_LOOKUP
 642         select CLKSRC_MMIO
 643         select GENERIC_CLOCKEVENTS
 644         select GENERIC_GPIO
 645         select HAVE_CLK
 646         select HAVE_SMP
 647         select MIGHT_HAVE_CACHE_L2X0
 648         select NEED_MACH_IO_H if PCI
 649         select ARCH_HAS_CPUFREQ
 650         help
 651           This enables support for NVIDIA Tegra based systems (Tegra APX,
 652           Tegra 6xx and Tegra 2 series).
 653
 654 config ARCH_PICOXCELL
 655         bool "Picochip picoXcell"
 656         select ARCH_REQUIRE_GPIOLIB
 657         select ARM_PATCH_PHYS_VIRT
 658         select ARM_VIC
 659         select CPU_V6K
 660         select DW_APB_TIMER
 661         select DW_APB_TIMER_OF
 662         select GENERIC_CLOCKEVENTS
 663         select GENERIC_GPIO
 664         select HAVE_TCM
 665         select NO_IOPORT
 666         select SPARSE_IRQ
 667         select USE_OF
 668         help
 669           This enables support for systems based on the Picochip picoXcell
 670           family of Femtocell devices.  The picoxcell support requires device tree
 671           for all boards.
 672
 673 config ARCH_PNX4008
 674         bool "Philips Nexperia PNX4008 Mobile"
 675         select CPU_ARM926T
 676         select CLKDEV_LOOKUP
 677         select ARCH_USES_GETTIMEOFFSET
 678         help
 679           This enables support for Philips PNX4008 mobile platform.
 680
 681 config ARCH_PXA
 682         bool "PXA2xx/PXA3xx-based"
 683         depends on MMU
 684         select ARCH_MTD_XIP
 685         select ARCH_HAS_CPUFREQ
 686         select CLKDEV_LOOKUP
 687         select CLKSRC_MMIO
 688         select ARCH_REQUIRE_GPIOLIB
 689         select GENERIC_CLOCKEVENTS
 690         select GPIO_PXA
 691         select PLAT_PXA
 692         select SPARSE_IRQ
 693         select AUTO_ZRELADDR
 694         select MULTI_IRQ_HANDLER
 695         select ARM_CPU_SUSPEND if PM
 696         select HAVE_IDE
 697         help
 698           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 699
 700 config ARCH_MSM
 701         bool "Qualcomm MSM"
 702         select HAVE_CLK
 703         select GENERIC_CLOCKEVENTS
 704         select ARCH_REQUIRE_GPIOLIB
 705         select CLKDEV_LOOKUP
 706         help
 707           Support for Qualcomm MSM/QSD based systems.  This runs on the
 708           apps processor of the MSM/QSD and depends on a shared memory
 709           interface to the modem processor which runs the baseband
 710           stack and controls some vital subsystems
 711           (clock and power control, etc).
 712
 713 config ARCH_SHMOBILE
 714         bool "Renesas SH-Mobile / R-Mobile"
 715         select HAVE_CLK
 716         select CLKDEV_LOOKUP
 717         select HAVE_MACH_CLKDEV
 718         select HAVE_SMP
 719         select GENERIC_CLOCKEVENTS
 720         select MIGHT_HAVE_CACHE_L2X0
 721         select NO_IOPORT
 722         select SPARSE_IRQ
 723         select MULTI_IRQ_HANDLER
 724         select PM_GENERIC_DOMAINS if PM
 725         select NEED_MACH_MEMORY_H
 726         help
 727           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 728
 729 config ARCH_RPC
 730         bool "RiscPC"
 731         select ARCH_ACORN
 732         select FIQ
 733         select ARCH_MAY_HAVE_PC_FDC
 734         select HAVE_PATA_PLATFORM
 735         select ISA_DMA_API
 736         select NO_IOPORT
 737         select ARCH_SPARSEMEM_ENABLE
 738         select ARCH_USES_GETTIMEOFFSET
 739         select HAVE_IDE
 740         select NEED_MACH_IO_H
 741         select NEED_MACH_MEMORY_H
 742         help
 743           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 744           CD-ROM interface, serial and parallel port, and the floppy drive.
 745
 746 config ARCH_SA1100
 747         bool "SA1100-based"
 748         select CLKSRC_MMIO
 749         select CPU_SA1100
 750         select ISA
 751         select ARCH_SPARSEMEM_ENABLE
 752         select ARCH_MTD_XIP
 753         select ARCH_HAS_CPUFREQ
 754         select CPU_FREQ
 755         select GENERIC_CLOCKEVENTS
 756         select CLKDEV_LOOKUP
 757         select ARCH_REQUIRE_GPIOLIB
 758         select HAVE_IDE
 759         select NEED_MACH_MEMORY_H
 760         select SPARSE_IRQ
 761         help
 762           Support for StrongARM 11x0 based boards.
 763
 764 config ARCH_S3C24XX
 765         bool "Samsung S3C24XX SoCs"
 766         select GENERIC_GPIO
 767         select ARCH_HAS_CPUFREQ
 768         select HAVE_CLK
 769         select CLKDEV_LOOKUP
 770         select ARCH_USES_GETTIMEOFFSET
 771         select HAVE_S3C2410_I2C if I2C
 772         select HAVE_S3C_RTC if RTC_CLASS
 773         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 774         select NEED_MACH_IO_H
 775         help
 776           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 777           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 778           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 779           Samsung SMDK2410 development board (and derivatives).
 780
 781 config ARCH_S3C64XX
 782         bool "Samsung S3C64XX"
 783         select PLAT_SAMSUNG
 784         select CPU_V6
 785         select ARM_VIC
 786         select HAVE_CLK
 787         select HAVE_TCM
 788         select CLKDEV_LOOKUP
 789         select NO_IOPORT
 790         select ARCH_USES_GETTIMEOFFSET
 791         select ARCH_HAS_CPUFREQ
 792         select ARCH_REQUIRE_GPIOLIB
 793         select SAMSUNG_CLKSRC
 794         select SAMSUNG_IRQ_VIC_TIMER
 795         select S3C_GPIO_TRACK
 796         select S3C_DEV_NAND
 797         select USB_ARCH_HAS_OHCI
 798         select SAMSUNG_GPIOLIB_4BIT
 799         select HAVE_S3C2410_I2C if I2C
 800         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 801         help
 802           Samsung S3C64XX series based systems
 803
 804 config ARCH_S5P64X0
 805         bool "Samsung S5P6440 S5P6450"
 806         select CPU_V6
 807         select GENERIC_GPIO
 808         select HAVE_CLK
 809         select CLKDEV_LOOKUP
 810         select CLKSRC_MMIO
 811         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 812         select GENERIC_CLOCKEVENTS
 813         select HAVE_S3C2410_I2C if I2C
 814         select HAVE_S3C_RTC if RTC_CLASS
 815         help
 816           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 817           SMDK6450.
 818
 819 config ARCH_S5PC100
 820         bool "Samsung S5PC100"
 821         select GENERIC_GPIO
 822         select HAVE_CLK
 823         select CLKDEV_LOOKUP
 824         select CPU_V7
 825         select ARCH_USES_GETTIMEOFFSET
 826         select HAVE_S3C2410_I2C if I2C
 827         select HAVE_S3C_RTC if RTC_CLASS
 828         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 829         help
 830           Samsung S5PC100 series based systems
 831
 832 config ARCH_S5PV210
 833         bool "Samsung S5PV210/S5PC110"
 834         select CPU_V7
 835         select ARCH_SPARSEMEM_ENABLE
 836         select ARCH_HAS_HOLES_MEMORYMODEL
 837         select GENERIC_GPIO
 838         select HAVE_CLK
 839         select CLKDEV_LOOKUP
 840         select CLKSRC_MMIO
 841         select ARCH_HAS_CPUFREQ
 842         select GENERIC_CLOCKEVENTS
 843         select HAVE_S3C2410_I2C if I2C
 844         select HAVE_S3C_RTC if RTC_CLASS
 845         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 846         select NEED_MACH_MEMORY_H
 847         help
 848           Samsung S5PV210/S5PC110 series based systems
 849
 850 config ARCH_EXYNOS
 851         bool "SAMSUNG EXYNOS"
 852         select CPU_V7
 853         select ARCH_SPARSEMEM_ENABLE
 854         select ARCH_HAS_HOLES_MEMORYMODEL
 855         select GENERIC_GPIO
 856         select HAVE_CLK
 857         select CLKDEV_LOOKUP
 858         select ARCH_HAS_CPUFREQ
 859         select GENERIC_CLOCKEVENTS
 860         select HAVE_S3C_RTC if RTC_CLASS
 861         select HAVE_S3C2410_I2C if I2C
 862         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 863         select NEED_MACH_MEMORY_H
 864         help
 865           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 866
 867 config ARCH_SHARK
 868         bool "Shark"
 869         select CPU_SA110
 870         select ISA
 871         select ISA_DMA
 872         select ZONE_DMA
 873         select PCI
 874         select ARCH_USES_GETTIMEOFFSET
 875         select NEED_MACH_MEMORY_H
 876         select NEED_MACH_IO_H
 877         help
 878           Support for the StrongARM based Digital DNARD machine, also known
 879           as "Shark" (<http://www.shark-linux.de/shark.html>).
 880
 881 config ARCH_U300
 882         bool "ST-Ericsson U300 Series"
 883         depends on MMU
 884         select CLKSRC_MMIO
 885         select CPU_ARM926T
 886         select HAVE_TCM
 887         select ARM_AMBA
 888         select ARM_PATCH_PHYS_VIRT
 889         select ARM_VIC
 890         select GENERIC_CLOCKEVENTS
 891         select CLKDEV_LOOKUP
 892         select HAVE_MACH_CLKDEV
 893         select GENERIC_GPIO
 894         select ARCH_REQUIRE_GPIOLIB
 895         help
 896           Support for ST-Ericsson U300 series mobile platforms.
 897
 898 config ARCH_U8500
 899         bool "ST-Ericsson U8500 Series"
 900         depends on MMU
 901         select CPU_V7
 902         select ARM_AMBA
 903         select GENERIC_CLOCKEVENTS
 904         select CLKDEV_LOOKUP
 905         select ARCH_REQUIRE_GPIOLIB
 906         select ARCH_HAS_CPUFREQ
 907         select HAVE_SMP
 908         select MIGHT_HAVE_CACHE_L2X0
 909         help
 910           Support for ST-Ericsson's Ux500 architecture
 911
 912 config ARCH_NOMADIK
 913         bool "STMicroelectronics Nomadik"
 914         select ARM_AMBA
 915         select ARM_VIC
 916         select CPU_ARM926T
 917         select CLKDEV_LOOKUP
 918         select GENERIC_CLOCKEVENTS
 919         select PINCTRL
 920         select MIGHT_HAVE_CACHE_L2X0
 921         select ARCH_REQUIRE_GPIOLIB
 922         help
 923           Support for the Nomadik platform by ST-Ericsson
 924
 925 config ARCH_DAVINCI
 926         bool "TI DaVinci"
 927         select GENERIC_CLOCKEVENTS
 928         select ARCH_REQUIRE_GPIOLIB
 929         select ZONE_DMA
 930         select HAVE_IDE
 931         select CLKDEV_LOOKUP
 932         select GENERIC_ALLOCATOR
 933         select GENERIC_IRQ_CHIP
 934         select ARCH_HAS_HOLES_MEMORYMODEL
 935         help
 936           Support for TI's DaVinci platform.
 937
 938 config ARCH_OMAP
 939         bool "TI OMAP"
 940         select HAVE_CLK
 941         select ARCH_REQUIRE_GPIOLIB
 942         select ARCH_HAS_CPUFREQ
 943         select CLKSRC_MMIO
 944         select GENERIC_CLOCKEVENTS
 945         select ARCH_HAS_HOLES_MEMORYMODEL
 946         help
 947           Support for TI's OMAP platform (OMAP1/2/3/4).
 948
 949 config PLAT_SPEAR
 950         bool "ST SPEAr"
 951         select ARM_AMBA
 952         select ARCH_REQUIRE_GPIOLIB
 953         select CLKDEV_LOOKUP
 954         select COMMON_CLK
 955         select CLKSRC_MMIO
 956         select GENERIC_CLOCKEVENTS
 957         select HAVE_CLK
 958         help
 959           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 960
 961 config ARCH_VT8500
 962         bool "VIA/WonderMedia 85xx"
 963         select CPU_ARM926T
 964         select GENERIC_GPIO
 965         select ARCH_HAS_CPUFREQ
 966         select GENERIC_CLOCKEVENTS
 967         select ARCH_REQUIRE_GPIOLIB
 968         select HAVE_PWM
 969         help
 970           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 971
 972 config ARCH_ZYNQ
 973         bool "Xilinx Zynq ARM Cortex A9 Platform"
 974         select CPU_V7
 975         select GENERIC_CLOCKEVENTS
 976         select CLKDEV_LOOKUP
 977         select ARM_GIC
 978         select ARM_AMBA
 979         select ICST
 980         select MIGHT_HAVE_CACHE_L2X0
 981         select USE_OF
 982         help
 983           Support for Xilinx Zynq ARM Cortex A9 Platform
 984 endchoice
 985
 986 #
 987 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 988 # Kconfigs may be included either alphabetically (according to the
 989 # plat- suffix) or along side the corresponding mach-* source.
 990 #
 991 source "arch/arm/mach-at91/Kconfig"
 992
 993 source "arch/arm/mach-bcmring/Kconfig"
 994
 995 source "arch/arm/mach-clps711x/Kconfig"
 996
 997 source "arch/arm/mach-cns3xxx/Kconfig"
 998
 999 source "arch/arm/mach-davinci/Kconfig"
1000
1001 source "arch/arm/mach-dove/Kconfig"
1002
1003 source "arch/arm/mach-ep93xx/Kconfig"
1004
1005 source "arch/arm/mach-footbridge/Kconfig"
1006
1007 source "arch/arm/mach-gemini/Kconfig"
1008
1009 source "arch/arm/mach-h720x/Kconfig"
1010
1011 source "arch/arm/mach-integrator/Kconfig"
1012
1013 source "arch/arm/mach-iop32x/Kconfig"
1014
1015 source "arch/arm/mach-iop33x/Kconfig"
1016
1017 source "arch/arm/mach-iop13xx/Kconfig"
1018
1019 source "arch/arm/mach-ixp4xx/Kconfig"
1020
1021 source "arch/arm/mach-kirkwood/Kconfig"
1022
1023 source "arch/arm/mach-ks8695/Kconfig"
1024
1025 source "arch/arm/mach-lpc32xx/Kconfig"
1026
1027 source "arch/arm/mach-msm/Kconfig"
1028
1029 source "arch/arm/mach-mv78xx0/Kconfig"
1030
1031 source "arch/arm/plat-mxc/Kconfig"
1032
1033 source "arch/arm/mach-mxs/Kconfig"
1034
1035 source "arch/arm/mach-netx/Kconfig"
1036
1037 source "arch/arm/mach-nomadik/Kconfig"
1038 source "arch/arm/plat-nomadik/Kconfig"
1039
1040 source "arch/arm/plat-omap/Kconfig"
1041
1042 source "arch/arm/mach-omap1/Kconfig"
1043
1044 source "arch/arm/mach-omap2/Kconfig"
1045
1046 source "arch/arm/mach-orion5x/Kconfig"
1047
1048 source "arch/arm/mach-pxa/Kconfig"
1049 source "arch/arm/plat-pxa/Kconfig"
1050
1051 source "arch/arm/mach-mmp/Kconfig"
1052
1053 source "arch/arm/mach-realview/Kconfig"
1054
1055 source "arch/arm/mach-sa1100/Kconfig"
1056
1057 source "arch/arm/plat-samsung/Kconfig"
1058 source "arch/arm/plat-s3c24xx/Kconfig"
1059
1060 source "arch/arm/plat-spear/Kconfig"
1061
1062 source "arch/arm/mach-s3c24xx/Kconfig"
1063 if ARCH_S3C24XX
1064 source "arch/arm/mach-s3c2412/Kconfig"
1065 source "arch/arm/mach-s3c2440/Kconfig"
1066 endif
1067
1068 if ARCH_S3C64XX
1069 source "arch/arm/mach-s3c64xx/Kconfig"
1070 endif
1071
1072 source "arch/arm/mach-s5p64x0/Kconfig"
1073
1074 source "arch/arm/mach-s5pc100/Kconfig"
1075
1076 source "arch/arm/mach-s5pv210/Kconfig"
1077
1078 source "arch/arm/mach-exynos/Kconfig"
1079
1080 source "arch/arm/mach-shmobile/Kconfig"
1081
1082 source "arch/arm/mach-tegra/Kconfig"
1083
1084 source "arch/arm/mach-u300/Kconfig"
1085
1086 source "arch/arm/mach-ux500/Kconfig"
1087
1088 source "arch/arm/mach-versatile/Kconfig"
1089
1090 source "arch/arm/mach-vexpress/Kconfig"
1091 source "arch/arm/plat-versatile/Kconfig"
1092
1093 source "arch/arm/mach-vt8500/Kconfig"
1094
1095 source "arch/arm/mach-w90x900/Kconfig"
1096
1097 # Definitions to make life easier
1098 config ARCH_ACORN
1099         bool
1100
1101 config PLAT_IOP
1102         bool
1103         select GENERIC_CLOCKEVENTS
1104
1105 config PLAT_ORION
1106         bool
1107         select CLKSRC_MMIO
1108         select GENERIC_IRQ_CHIP
1109         select COMMON_CLK
1110
1111 config PLAT_PXA
1112         bool
1113
1114 config PLAT_VERSATILE
1115         bool
1116
1117 config ARM_TIMER_SP804
1118         bool
1119         select CLKSRC_MMIO
1120         select HAVE_SCHED_CLOCK
1121
1122 source arch/arm/mm/Kconfig
1123
1124 config ARM_NR_BANKS
1125         int
1126         default 16 if ARCH_EP93XX
1127         default 8
1128
1129 config IWMMXT
1130         bool "Enable iWMMXt support"
1131         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1132         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1133         help
1134           Enable support for iWMMXt context switching at run time if
1135           running on a CPU that supports it.
1136
1137 config XSCALE_PMU
1138         bool
1139         depends on CPU_XSCALE
1140         default y
1141
1142 config CPU_HAS_PMU
1143         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1144                    (!ARCH_OMAP3 || OMAP3_EMU)
1145         default y
1146         bool
1147
1148 config MULTI_IRQ_HANDLER
1149         bool
1150         help
1151           Allow each machine to specify it's own IRQ handler at run time.
1152
1153 if !MMU
1154 source "arch/arm/Kconfig-nommu"
1155 endif
1156
1157 config ARM_ERRATA_326103
1158         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1159         depends on CPU_V6
1160         help
1161           Executing a SWP instruction to read-only memory does not set bit 11
1162           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1163           treat the access as a read, preventing a COW from occurring and
1164           causing the faulting task to livelock.
1165
1166 config ARM_ERRATA_411920
1167         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1168         depends on CPU_V6 || CPU_V6K
1169         help
1170           Invalidation of the Instruction Cache operation can
1171           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1172           It does not affect the MPCore. This option enables the ARM Ltd.
1173           recommended workaround.
1174
1175 config ARM_ERRATA_430973
1176         bool "ARM errata: Stale prediction on replaced interworking branch"
1177         depends on CPU_V7
1178         help
1179           This option enables the workaround for the 430973 Cortex-A8
1180           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1181           interworking branch is replaced with another code sequence at the
1182           same virtual address, whether due to self-modifying code or virtual
1183           to physical address re-mapping, Cortex-A8 does not recover from the
1184           stale interworking branch prediction. This results in Cortex-A8
1185           executing the new code sequence in the incorrect ARM or Thumb state.
1186           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1187           and also flushes the branch target cache at every context switch.
1188           Note that setting specific bits in the ACTLR register may not be
1189           available in non-secure mode.
1190
1191 config ARM_ERRATA_458693
1192         bool "ARM errata: Processor deadlock when a false hazard is created"
1193         depends on CPU_V7
1194         help
1195           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1196           erratum. For very specific sequences of memory operations, it is
1197           possible for a hazard condition intended for a cache line to instead
1198           be incorrectly associated with a different cache line. This false
1199           hazard might then cause a processor deadlock. The workaround enables
1200           the L1 caching of the NEON accesses and disables the PLD instruction
1201           in the ACTLR register. Note that setting specific bits in the ACTLR
1202           register may not be available in non-secure mode.
1203
1204 config ARM_ERRATA_460075
1205         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1206         depends on CPU_V7
1207         help
1208           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1209           erratum. Any asynchronous access to the L2 cache may encounter a
1210           situation in which recent store transactions to the L2 cache are lost
1211           and overwritten with stale memory contents from external memory. The
1212           workaround disables the write-allocate mode for the L2 cache via the
1213           ACTLR register. Note that setting specific bits in the ACTLR register
1214           may not be available in non-secure mode.
1215
1216 config ARM_ERRATA_742230
1217         bool "ARM errata: DMB operation may be faulty"
1218         depends on CPU_V7 && SMP
1219         help
1220           This option enables the workaround for the 742230 Cortex-A9
1221           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1222           between two write operations may not ensure the correct visibility
1223           ordering of the two writes. This workaround sets a specific bit in
1224           the diagnostic register of the Cortex-A9 which causes the DMB
1225           instruction to behave as a DSB, ensuring the correct behaviour of
1226           the two writes.
1227
1228 config ARM_ERRATA_742231
1229         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1230         depends on CPU_V7 && SMP
1231         help
1232           This option enables the workaround for the 742231 Cortex-A9
1233           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1234           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1235           accessing some data located in the same cache line, may get corrupted
1236           data due to bad handling of the address hazard when the line gets
1237           replaced from one of the CPUs at the same time as another CPU is
1238           accessing it. This workaround sets specific bits in the diagnostic
1239           register of the Cortex-A9 which reduces the linefill issuing
1240           capabilities of the processor.
1241
1242 config PL310_ERRATA_588369
1243         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1244         depends on CACHE_L2X0
1245         help
1246            The PL310 L2 cache controller implements three types of Clean &
1247            Invalidate maintenance operations: by Physical Address
1248            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1249            They are architecturally defined to behave as the execution of a
1250            clean operation followed immediately by an invalidate operation,
1251            both performing to the same memory location. This functionality
1252            is not correctly implemented in PL310 as clean lines are not
1253            invalidated as a result of these operations.
1254
1255 config ARM_ERRATA_720789
1256         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1257         depends on CPU_V7
1258         help
1259           This option enables the workaround for the 720789 Cortex-A9 (prior to
1260           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1261           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1262           As a consequence of this erratum, some TLB entries which should be
1263           invalidated are not, resulting in an incoherency in the system page
1264           tables. The workaround changes the TLB flushing routines to invalidate
1265           entries regardless of the ASID.
1266
1267 config PL310_ERRATA_727915
1268         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1269         depends on CACHE_L2X0
1270         help
1271           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1272           operation (offset 0x7FC). This operation runs in background so that
1273           PL310 can handle normal accesses while it is in progress. Under very
1274           rare circumstances, due to this erratum, write data can be lost when
1275           PL310 treats a cacheable write transaction during a Clean &
1276           Invalidate by Way operation.
1277
1278 config ARM_ERRATA_743622
1279         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1280         depends on CPU_V7
1281         help
1282           This option enables the workaround for the 743622 Cortex-A9
1283           (r2p*) erratum. Under very rare conditions, a faulty
1284           optimisation in the Cortex-A9 Store Buffer may lead to data
1285           corruption. This workaround sets a specific bit in the diagnostic
1286           register of the Cortex-A9 which disables the Store Buffer
1287           optimisation, preventing the defect from occurring. This has no
1288           visible impact on the overall performance or power consumption of the
1289           processor.
1290
1291 config ARM_ERRATA_751472
1292         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1293         depends on CPU_V7
1294         help
1295           This option enables the workaround for the 751472 Cortex-A9 (prior
1296           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1297           completion of a following broadcasted operation if the second
1298           operation is received by a CPU before the ICIALLUIS has completed,
1299           potentially leading to corrupted entries in the cache or TLB.
1300
1301 config PL310_ERRATA_753970
1302         bool "PL310 errata: cache sync operation may be faulty"
1303         depends on CACHE_PL310
1304         help
1305           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1306
1307           Under some condition the effect of cache sync operation on
1308           the store buffer still remains when the operation completes.
1309           This means that the store buffer is always asked to drain and
1310           this prevents it from merging any further writes. The workaround
1311           is to replace the normal offset of cache sync operation (0x730)
1312           by another offset targeting an unmapped PL310 register 0x740.
1313           This has the same effect as the cache sync operation: store buffer
1314           drain and waiting for all buffers empty.
1315
1316 config ARM_ERRATA_754322
1317         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1318         depends on CPU_V7
1319         help
1320           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1321           r3p*) erratum. A speculative memory access may cause a page table walk
1322           which starts prior to an ASID switch but completes afterwards. This
1323           can populate the micro-TLB with a stale entry which may be hit with
1324           the new ASID. This workaround places two dsb instructions in the mm
1325           switching code so that no page table walks can cross the ASID switch.
1326
1327 config ARM_ERRATA_754327
1328         bool "ARM errata: no automatic Store Buffer drain"
1329         depends on CPU_V7 && SMP
1330         help
1331           This option enables the workaround for the 754327 Cortex-A9 (prior to
1332           r2p0) erratum. The Store Buffer does not have any automatic draining
1333           mechanism and therefore a livelock may occur if an external agent
1334           continuously polls a memory location waiting to observe an update.
1335           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1336           written polling loops from denying visibility of updates to memory.
1337
1338 config ARM_ERRATA_364296
1339         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1340         depends on CPU_V6 && !SMP
1341         help
1342           This options enables the workaround for the 364296 ARM1136
1343           r0p2 erratum (possible cache data corruption with
1344           hit-under-miss enabled). It sets the undocumented bit 31 in
1345           the auxiliary control register and the FI bit in the control
1346           register, thus disabling hit-under-miss without putting the
1347           processor into full low interrupt latency mode. ARM11MPCore
1348           is not affected.
1349
1350 config ARM_ERRATA_764369
1351         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1352         depends on CPU_V7 && SMP
1353         help
1354           This option enables the workaround for erratum 764369
1355           affecting Cortex-A9 MPCore with two or more processors (all
1356           current revisions). Under certain timing circumstances, a data
1357           cache line maintenance operation by MVA targeting an Inner
1358           Shareable memory region may fail to proceed up to either the
1359           Point of Coherency or to the Point of Unification of the
1360           system. This workaround adds a DSB instruction before the
1361           relevant cache maintenance functions and sets a specific bit
1362           in the diagnostic control register of the SCU.
1363
1364 config PL310_ERRATA_769419
1365         bool "PL310 errata: no automatic Store Buffer drain"
1366         depends on CACHE_L2X0
1367         help
1368           On revisions of the PL310 prior to r3p2, the Store Buffer does
1369           not automatically drain. This can cause normal, non-cacheable
1370           writes to be retained when the memory system is idle, leading
1371           to suboptimal I/O performance for drivers using coherent DMA.
1372           This option adds a write barrier to the cpu_idle loop so that,
1373           on systems with an outer cache, the store buffer is drained
1374           explicitly.
1375
1376 endmenu
1377
1378 source "arch/arm/common/Kconfig"
1379
1380 menu "Bus support"
1381
1382 config ARM_AMBA
1383         bool
1384
1385 config ISA
1386         bool
1387         help
1388           Find out whether you have ISA slots on your motherboard.  ISA is the
1389           name of a bus system, i.e. the way the CPU talks to the other stuff
1390           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1391           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1392           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1393
1394 # Select ISA DMA controller support
1395 config ISA_DMA
1396         bool
1397         select ISA_DMA_API
1398
1399 # Select ISA DMA interface
1400 config ISA_DMA_API
1401         bool
1402
1403 config PCI
1404         bool "PCI support" if MIGHT_HAVE_PCI
1405         help
1406           Find out whether you have a PCI motherboard. PCI is the name of a
1407           bus system, i.e. the way the CPU talks to the other stuff inside
1408           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1409           VESA. If you have PCI, say Y, otherwise N.
1410
1411 config PCI_DOMAINS
1412         bool
1413         depends on PCI
1414
1415 config PCI_NANOENGINE
1416         bool "BSE nanoEngine PCI support"
1417         depends on SA1100_NANOENGINE
1418         help
1419           Enable PCI on the BSE nanoEngine board.
1420
1421 config PCI_SYSCALL
1422         def_bool PCI
1423
1424 # Select the host bridge type
1425 config PCI_HOST_VIA82C505
1426         bool
1427         depends on PCI && ARCH_SHARK
1428         default y
1429
1430 config PCI_HOST_ITE8152
1431         bool
1432         depends on PCI && MACH_ARMCORE
1433         default y
1434         select DMABOUNCE
1435
1436 source "drivers/pci/Kconfig"
1437
1438 source "drivers/pcmcia/Kconfig"
1439
1440 endmenu
1441
1442 menu "Kernel Features"
1443
1444 config HAVE_SMP
1445         bool
1446         help
1447           This option should be selected by machines which have an SMP-
1448           capable CPU.
1449
1450           The only effect of this option is to make the SMP-related
1451           options available to the user for configuration.
1452
1453 config SMP
1454         bool "Symmetric Multi-Processing"
1455         depends on CPU_V6K || CPU_V7
1456         depends on GENERIC_CLOCKEVENTS
1457         depends on HAVE_SMP
1458         depends on MMU
1459         select USE_GENERIC_SMP_HELPERS
1460         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1461         help
1462           This enables support for systems with more than one CPU. If you have
1463           a system with only one CPU, like most personal computers, say N. If
1464           you have a system with more than one CPU, say Y.
1465
1466           If you say N here, the kernel will run on single and multiprocessor
1467           machines, but will use only one CPU of a multiprocessor machine. If
1468           you say Y here, the kernel will run on many, but not all, single
1469           processor machines. On a single processor machine, the kernel will
1470           run faster if you say N here.
1471
1472           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1473           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1474           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1475
1476           If you don't know what to do here, say N.
1477
1478 config SMP_ON_UP
1479         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1480         depends on EXPERIMENTAL
1481         depends on SMP && !XIP_KERNEL
1482         default y
1483         help
1484           SMP kernels contain instructions which fail on non-SMP processors.
1485           Enabling this option allows the kernel to modify itself to make
1486           these instructions safe.  Disabling it allows about 1K of space
1487           savings.
1488
1489           If you don't know what to do here, say Y.
1490
1491 config ARM_CPU_TOPOLOGY
1492         bool "Support cpu topology definition"
1493         depends on SMP && CPU_V7
1494         default y
1495         help
1496           Support ARM cpu topology definition. The MPIDR register defines
1497           affinity between processors which is then used to describe the cpu
1498           topology of an ARM System.
1499
1500 config SCHED_MC
1501         bool "Multi-core scheduler support"
1502         depends on ARM_CPU_TOPOLOGY
1503         help
1504           Multi-core scheduler support improves the CPU scheduler's decision
1505           making when dealing with multi-core CPU chips at a cost of slightly
1506           increased overhead in some places. If unsure say N here.
1507
1508 config SCHED_SMT
1509         bool "SMT scheduler support"
1510         depends on ARM_CPU_TOPOLOGY
1511         help
1512           Improves the CPU scheduler's decision making when dealing with
1513           MultiThreading at a cost of slightly increased overhead in some
1514           places. If unsure say N here.
1515
1516 config HAVE_ARM_SCU
1517         bool
1518         help
1519           This option enables support for the ARM system coherency unit
1520
1521 config ARM_ARCH_TIMER
1522         bool "Architected timer support"
1523         depends on CPU_V7
1524         help
1525           This option enables support for the ARM architected timer
1526
1527 config HAVE_ARM_TWD
1528         bool
1529         depends on SMP
1530         help
1531           This options enables support for the ARM timer and watchdog unit
1532
1533 choice
1534         prompt "Memory split"
1535         default VMSPLIT_3G
1536         help
1537           Select the desired split between kernel and user memory.
1538
1539           If you are not absolutely sure what you are doing, leave this
1540           option alone!
1541
1542         config VMSPLIT_3G
1543                 bool "3G/1G user/kernel split"
1544         config VMSPLIT_2G
1545                 bool "2G/2G user/kernel split"
1546         config VMSPLIT_1G
1547                 bool "1G/3G user/kernel split"
1548 endchoice
1549
1550 config PAGE_OFFSET
1551         hex
1552         default 0x40000000 if VMSPLIT_1G
1553         default 0x80000000 if VMSPLIT_2G
1554         default 0xC0000000
1555
1556 config NR_CPUS
1557         int "Maximum number of CPUs (2-32)"
1558         range 2 32
1559         depends on SMP
1560         default "4"
1561
1562 config HOTPLUG_CPU
1563         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1564         depends on SMP && HOTPLUG && EXPERIMENTAL
1565         help
1566           Say Y here to experiment with turning CPUs off and on.  CPUs
1567           can be controlled through /sys/devices/system/cpu.
1568
1569 config LOCAL_TIMERS
1570         bool "Use local timer interrupts"
1571         depends on SMP
1572         default y
1573         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1574         help
1575           Enable support for local timers on SMP platforms, rather then the
1576           legacy IPI broadcast method.  Local timers allows the system
1577           accounting to be spread across the timer interval, preventing a
1578           "thundering herd" at every timer tick.
1579
1580 config ARCH_NR_GPIO
1581         int
1582         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1583         default 355 if ARCH_U8500
1584         default 264 if MACH_H4700
1585         default 0
1586         help
1587           Maximum number of GPIOs in the system.
1588
1589           If unsure, leave the default value.
1590
1591 source kernel/Kconfig.preempt
1592
1593 config HZ
1594         int
1595         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1596                 ARCH_S5PV210 || ARCH_EXYNOS4
1597         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1598         default AT91_TIMER_HZ if ARCH_AT91
1599         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1600         default 100
1601
1602 config THUMB2_KERNEL
1603         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1604         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1605         select AEABI
1606         select ARM_ASM_UNIFIED
1607         select ARM_UNWIND
1608         help
1609           By enabling this option, the kernel will be compiled in
1610           Thumb-2 mode. A compiler/assembler that understand the unified
1611           ARM-Thumb syntax is needed.
1612
1613           If unsure, say N.
1614
1615 config THUMB2_AVOID_R_ARM_THM_JUMP11
1616         bool "Work around buggy Thumb-2 short branch relocations in gas"
1617         depends on THUMB2_KERNEL && MODULES
1618         default y
1619         help
1620           Various binutils versions can resolve Thumb-2 branches to
1621           locally-defined, preemptible global symbols as short-range "b.n"
1622           branch instructions.
1623
1624           This is a problem, because there's no guarantee the final
1625           destination of the symbol, or any candidate locations for a
1626           trampoline, are within range of the branch.  For this reason, the
1627           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1628           relocation in modules at all, and it makes little sense to add
1629           support.
1630
1631           The symptom is that the kernel fails with an "unsupported
1632           relocation" error when loading some modules.
1633
1634           Until fixed tools are available, passing
1635           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1636           code which hits this problem, at the cost of a bit of extra runtime
1637           stack usage in some cases.
1638
1639           The problem is described in more detail at:
1640               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1641
1642           Only Thumb-2 kernels are affected.
1643
1644           Unless you are sure your tools don't have this problem, say Y.
1645
1646 config ARM_ASM_UNIFIED
1647         bool
1648
1649 config AEABI
1650         bool "Use the ARM EABI to compile the kernel"
1651         help
1652           This option allows for the kernel to be compiled using the latest
1653           ARM ABI (aka EABI).  This is only useful if you are using a user
1654           space environment that is also compiled with EABI.
1655
1656           Since there are major incompatibilities between the legacy ABI and
1657           EABI, especially with regard to structure member alignment, this
1658           option also changes the kernel syscall calling convention to
1659           disambiguate both ABIs and allow for backward compatibility support
1660           (selected with CONFIG_OABI_COMPAT).
1661
1662           To use this you need GCC version 4.0.0 or later.
1663
1664 config OABI_COMPAT
1665         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1666         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1667         default y
1668         help
1669           This option preserves the old syscall interface along with the
1670           new (ARM EABI) one. It also provides a compatibility layer to
1671           intercept syscalls that have structure arguments which layout
1672           in memory differs between the legacy ABI and the new ARM EABI
1673           (only for non "thumb" binaries). This option adds a tiny
1674           overhead to all syscalls and produces a slightly larger kernel.
1675           If you know you'll be using only pure EABI user space then you
1676           can say N here. If this option is not selected and you attempt
1677           to execute a legacy ABI binary then the result will be
1678           UNPREDICTABLE (in fact it can be predicted that it won't work
1679           at all). If in doubt say Y.
1680
1681 config ARCH_HAS_HOLES_MEMORYMODEL
1682         bool
1683
1684 config ARCH_SPARSEMEM_ENABLE
1685         bool
1686
1687 config ARCH_SPARSEMEM_DEFAULT
1688         def_bool ARCH_SPARSEMEM_ENABLE
1689
1690 config ARCH_SELECT_MEMORY_MODEL
1691         def_bool ARCH_SPARSEMEM_ENABLE
1692
1693 config HAVE_ARCH_PFN_VALID
1694         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1695
1696 config HIGHMEM
1697         bool "High Memory Support"
1698         depends on MMU
1699         help
1700           The address space of ARM processors is only 4 Gigabytes large
1701           and it has to accommodate user address space, kernel address
1702           space as well as some memory mapped IO. That means that, if you
1703           have a large amount of physical memory and/or IO, not all of the
1704           memory can be "permanently mapped" by the kernel. The physical
1705           memory that is not permanently mapped is called "high memory".
1706
1707           Depending on the selected kernel/user memory split, minimum
1708           vmalloc space and actual amount of RAM, you may not need this
1709           option which should result in a slightly faster kernel.
1710
1711           If unsure, say n.
1712
1713 config HIGHPTE
1714         bool "Allocate 2nd-level pagetables from highmem"
1715         depends on HIGHMEM
1716
1717 config HW_PERF_EVENTS
1718         bool "Enable hardware performance counter support for perf events"
1719         depends on PERF_EVENTS && CPU_HAS_PMU
1720         default y
1721         help
1722           Enable hardware performance counter support for perf events. If
1723           disabled, perf events will use software events only.
1724
1725 source "mm/Kconfig"
1726
1727 config FORCE_MAX_ZONEORDER
1728         int "Maximum zone order" if ARCH_SHMOBILE
1729         range 11 64 if ARCH_SHMOBILE
1730         default "9" if SA1111
1731         default "11"
1732         help
1733           The kernel memory allocator divides physically contiguous memory
1734           blocks into "zones", where each zone is a power of two number of
1735           pages.  This option selects the largest power of two that the kernel
1736           keeps in the memory allocator.  If you need to allocate very large
1737           blocks of physically contiguous memory, then you may need to
1738           increase this value.
1739
1740           This config option is actually maximum order plus one. For example,
1741           a value of 11 means that the largest free memory block is 2^10 pages.
1742
1743 config LEDS
1744         bool "Timer and CPU usage LEDs"
1745         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1746                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1747                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1748                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1749                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1750                    ARCH_AT91 || ARCH_DAVINCI || \
1751                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1752         help
1753           If you say Y here, the LEDs on your machine will be used
1754           to provide useful information about your current system status.
1755
1756           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1757           be able to select which LEDs are active using the options below. If
1758           you are compiling a kernel for the EBSA-110 or the LART however, the
1759           red LED will simply flash regularly to indicate that the system is
1760           still functional. It is safe to say Y here if you have a CATS
1761           system, but the driver will do nothing.
1762
1763 config LEDS_TIMER
1764         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1765                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1766                             || MACH_OMAP_PERSEUS2
1767         depends on LEDS
1768         depends on !GENERIC_CLOCKEVENTS
1769         default y if ARCH_EBSA110
1770         help
1771           If you say Y here, one of the system LEDs (the green one on the
1772           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1773           will flash regularly to indicate that the system is still
1774           operational. This is mainly useful to kernel hackers who are
1775           debugging unstable kernels.
1776
1777           The LART uses the same LED for both Timer LED and CPU usage LED
1778           functions. You may choose to use both, but the Timer LED function
1779           will overrule the CPU usage LED.
1780
1781 config LEDS_CPU
1782         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1783                         !ARCH_OMAP) \
1784                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1785                         || MACH_OMAP_PERSEUS2
1786         depends on LEDS
1787         help
1788           If you say Y here, the red LED will be used to give a good real
1789           time indication of CPU usage, by lighting whenever the idle task
1790           is not currently executing.
1791
1792           The LART uses the same LED for both Timer LED and CPU usage LED
1793           functions. You may choose to use both, but the Timer LED function
1794           will overrule the CPU usage LED.
1795
1796 config ALIGNMENT_TRAP
1797         bool
1798         depends on CPU_CP15_MMU
1799         default y if !ARCH_EBSA110
1800         select HAVE_PROC_CPU if PROC_FS
1801         help
1802           ARM processors cannot fetch/store information which is not
1803           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1804           address divisible by 4. On 32-bit ARM processors, these non-aligned
1805           fetch/store instructions will be emulated in software if you say
1806           here, which has a severe performance impact. This is necessary for
1807           correct operation of some network protocols. With an IP-only
1808           configuration it is safe to say N, otherwise say Y.
1809
1810 config UACCESS_WITH_MEMCPY
1811         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1812         depends on MMU && EXPERIMENTAL
1813         default y if CPU_FEROCEON
1814         help
1815           Implement faster copy_to_user and clear_user methods for CPU
1816           cores where a 8-word STM instruction give significantly higher
1817           memory write throughput than a sequence of individual 32bit stores.
1818
1819           A possible side effect is a slight increase in scheduling latency
1820           between threads sharing the same address space if they invoke
1821           such copy operations with large buffers.
1822
1823           However, if the CPU data cache is using a write-allocate mode,
1824           this option is unlikely to provide any performance gain.
1825
1826 config SECCOMP
1827         bool
1828         prompt "Enable seccomp to safely compute untrusted bytecode"
1829         ---help---
1830           This kernel feature is useful for number crunching applications
1831           that may need to compute untrusted bytecode during their
1832           execution. By using pipes or other transports made available to
1833           the process as file descriptors supporting the read/write
1834           syscalls, it's possible to isolate those applications in
1835           their own address space using seccomp. Once seccomp is
1836           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1837           and the task is only allowed to execute a few safe syscalls
1838           defined by each seccomp mode.
1839
1840 config CC_STACKPROTECTOR
1841         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1842         depends on EXPERIMENTAL
1843         help
1844           This option turns on the -fstack-protector GCC feature. This
1845           feature puts, at the beginning of functions, a canary value on
1846           the stack just before the return address, and validates
1847           the value just before actually returning.  Stack based buffer
1848           overflows (that need to overwrite this return address) now also
1849           overwrite the canary, which gets detected and the attack is then
1850           neutralized via a kernel panic.
1851           This feature requires gcc version 4.2 or above.
1852
1853 config DEPRECATED_PARAM_STRUCT
1854         bool "Provide old way to pass kernel parameters"
1855         help
1856           This was deprecated in 2001 and announced to live on for 5 years.
1857           Some old boot loaders still use this way.
1858
1859 endmenu
1860
1861 menu "Boot options"
1862
1863 config USE_OF
1864         bool "Flattened Device Tree support"
1865         select OF
1866         select OF_EARLY_FLATTREE
1867         select IRQ_DOMAIN
1868         help
1869           Include support for flattened device tree machine descriptions.
1870
1871 # Compressed boot loader in ROM.  Yes, we really want to ask about
1872 # TEXT and BSS so we preserve their values in the config files.
1873 config ZBOOT_ROM_TEXT
1874         hex "Compressed ROM boot loader base address"
1875         default "0"
1876         help
1877           The physical address at which the ROM-able zImage is to be
1878           placed in the target.  Platforms which normally make use of
1879           ROM-able zImage formats normally set this to a suitable
1880           value in their defconfig file.
1881
1882           If ZBOOT_ROM is not enabled, this has no effect.
1883
1884 config ZBOOT_ROM_BSS
1885         hex "Compressed ROM boot loader BSS address"
1886         default "0"
1887         help
1888           The base address of an area of read/write memory in the target
1889           for the ROM-able zImage which must be available while the
1890           decompressor is running. It must be large enough to hold the
1891           entire decompressed kernel plus an additional 128 KiB.
1892           Platforms which normally make use of ROM-able zImage formats
1893           normally set this to a suitable value in their defconfig file.
1894
1895           If ZBOOT_ROM is not enabled, this has no effect.
1896
1897 config ZBOOT_ROM
1898         bool "Compressed boot loader in ROM/flash"
1899         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1900         help
1901           Say Y here if you intend to execute your compressed kernel image
1902           (zImage) directly from ROM or flash.  If unsure, say N.
1903
1904 choice
1905         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1906         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1907         default ZBOOT_ROM_NONE
1908         help
1909           Include experimental SD/MMC loading code in the ROM-able zImage.
1910           With this enabled it is possible to write the ROM-able zImage
1911           kernel image to an MMC or SD card and boot the kernel straight
1912           from the reset vector. At reset the processor Mask ROM will load
1913           the first part of the ROM-able zImage which in turn loads the
1914           rest the kernel image to RAM.
1915
1916 config ZBOOT_ROM_NONE
1917         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1918         help
1919           Do not load image from SD or MMC
1920
1921 config ZBOOT_ROM_MMCIF
1922         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1923         help
1924           Load image from MMCIF hardware block.
1925
1926 config ZBOOT_ROM_SH_MOBILE_SDHI
1927         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1928         help
1929           Load image from SDHI hardware block
1930
1931 endchoice
1932
1933 config ARM_APPENDED_DTB
1934         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1935         depends on OF && !ZBOOT_ROM && EXPERIMENTAL
1936         help
1937           With this option, the boot code will look for a device tree binary
1938           (DTB) appended to zImage
1939           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1940
1941           This is meant as a backward compatibility convenience for those
1942           systems with a bootloader that can't be upgraded to accommodate
1943           the documented boot protocol using a device tree.
1944
1945           Beware that there is very little in terms of protection against
1946           this option being confused by leftover garbage in memory that might
1947           look like a DTB header after a reboot if no actual DTB is appended
1948           to zImage.  Do not leave this option active in a production kernel
1949           if you don't intend to always append a DTB.  Proper passing of the
1950           location into r2 of a bootloader provided DTB is always preferable
1951           to this option.
1952
1953 config ARM_ATAG_DTB_COMPAT
1954         bool "Supplement the appended DTB with traditional ATAG information"
1955         depends on ARM_APPENDED_DTB
1956         help
1957           Some old bootloaders can't be updated to a DTB capable one, yet
1958           they provide ATAGs with memory configuration, the ramdisk address,
1959           the kernel cmdline string, etc.  Such information is dynamically
1960           provided by the bootloader and can't always be stored in a static
1961           DTB.  To allow a device tree enabled kernel to be used with such
1962           bootloaders, this option allows zImage to extract the information
1963           from the ATAG list and store it at run time into the appended DTB.
1964
1965 config CMDLINE
1966         string "Default kernel command string"
1967         default ""
1968         help
1969           On some architectures (EBSA110 and CATS), there is currently no way
1970           for the boot loader to pass arguments to the kernel. For these
1971           architectures, you should supply some command-line options at build
1972           time by entering them here. As a minimum, you should specify the
1973           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1974
1975 choice
1976         prompt "Kernel command line type" if CMDLINE != ""
1977         default CMDLINE_FROM_BOOTLOADER
1978
1979 config CMDLINE_FROM_BOOTLOADER
1980         bool "Use bootloader kernel arguments if available"
1981         help
1982           Uses the command-line options passed by the boot loader. If
1983           the boot loader doesn't provide any, the default kernel command
1984           string provided in CMDLINE will be used.
1985
1986 config CMDLINE_EXTEND
1987         bool "Extend bootloader kernel arguments"
1988         help
1989           The command-line arguments provided by the boot loader will be
1990           appended to the default kernel command string.
1991
1992 config CMDLINE_FORCE
1993         bool "Always use the default kernel command string"
1994         help
1995           Always use the default kernel command string, even if the boot
1996           loader passes other arguments to the kernel.
1997           This is useful if you cannot or don't want to change the
1998           command-line options your boot loader passes to the kernel.
1999 endchoice
2000
2001 config XIP_KERNEL
2002         bool "Kernel Execute-In-Place from ROM"
2003         depends on !ZBOOT_ROM && !ARM_LPAE
2004         help
2005           Execute-In-Place allows the kernel to run from non-volatile storage
2006           directly addressable by the CPU, such as NOR flash. This saves RAM
2007           space since the text section of the kernel is not loaded from flash
2008           to RAM.  Read-write sections, such as the data section and stack,
2009           are still copied to RAM.  The XIP kernel is not compressed since
2010           it has to run directly from flash, so it will take more space to
2011           store it.  The flash address used to link the kernel object files,
2012           and for storing it, is configuration dependent. Therefore, if you
2013           say Y here, you must know the proper physical address where to
2014           store the kernel image depending on your own flash memory usage.
2015
2016           Also note that the make target becomes "make xipImage" rather than
2017           "make zImage" or "make Image".  The final kernel binary to put in
2018           ROM memory will be arch/arm/boot/xipImage.
2019
2020           If unsure, say N.
2021
2022 config XIP_PHYS_ADDR
2023         hex "XIP Kernel Physical Location"
2024         depends on XIP_KERNEL
2025         default "0x00080000"
2026         help
2027           This is the physical address in your flash memory the kernel will
2028           be linked for and stored to.  This address is dependent on your
2029           own flash usage.
2030
2031 config KEXEC
2032         bool "Kexec system call (EXPERIMENTAL)"
2033         depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
2034         help
2035           kexec is a system call that implements the ability to shutdown your
2036           current kernel, and to start another kernel.  It is like a reboot
2037           but it is independent of the system firmware.   And like a reboot
2038           you can start any kernel with it, not just Linux.
2039
2040           It is an ongoing process to be certain the hardware in a machine
2041           is properly shutdown, so do not be surprised if this code does not
2042           initially work for you.  It may help to enable device hotplugging
2043           support.
2044
2045 config ATAGS_PROC
2046         bool "Export atags in procfs"
2047         depends on KEXEC
2048         default y
2049         help
2050           Should the atags used to boot the kernel be exported in an "atags"
2051           file in procfs. Useful with kexec.
2052
2053 config CRASH_DUMP
2054         bool "Build kdump crash kernel (EXPERIMENTAL)"
2055         depends on EXPERIMENTAL
2056         help
2057           Generate crash dump after being started by kexec. This should
2058           be normally only set in special crash dump kernels which are
2059           loaded in the main kernel with kexec-tools into a specially
2060           reserved region and then later executed after a crash by
2061           kdump/kexec. The crash dump kernel must be compiled to a
2062           memory address not used by the main kernel
2063
2064           For more details see Documentation/kdump/kdump.txt
2065
2066 config AUTO_ZRELADDR
2067         bool "Auto calculation of the decompressed kernel image address"
2068         depends on !ZBOOT_ROM && !ARCH_U300
2069         help
2070           ZRELADDR is the physical address where the decompressed kernel
2071           image will be placed. If AUTO_ZRELADDR is selected, the address
2072           will be determined at run-time by masking the current IP with
2073           0xf8000000. This assumes the zImage being placed in the first 128MB
2074           from start of memory.
2075
2076 endmenu
2077
2078 menu "CPU Power Management"
2079
2080 if ARCH_HAS_CPUFREQ
2081
2082 source "drivers/cpufreq/Kconfig"
2083
2084 config CPU_FREQ_IMX
2085         tristate "CPUfreq driver for i.MX CPUs"
2086         depends on ARCH_MXC && CPU_FREQ
2087         help
2088           This enables the CPUfreq driver for i.MX CPUs.
2089
2090 config CPU_FREQ_SA1100
2091         bool
2092
2093 config CPU_FREQ_SA1110
2094         bool
2095
2096 config CPU_FREQ_INTEGRATOR
2097         tristate "CPUfreq driver for ARM Integrator CPUs"
2098         depends on ARCH_INTEGRATOR && CPU_FREQ
2099         default y
2100         help
2101           This enables the CPUfreq driver for ARM Integrator CPUs.
2102
2103           For details, take a look at <file:Documentation/cpu-freq>.
2104
2105           If in doubt, say Y.
2106
2107 config CPU_FREQ_PXA
2108         bool
2109         depends on CPU_FREQ && ARCH_PXA && PXA25x
2110         default y
2111         select CPU_FREQ_TABLE
2112         select CPU_FREQ_DEFAULT_GOV_USERSPACE
2113
2114 config CPU_FREQ_S3C
2115         bool
2116         help
2117           Internal configuration node for common cpufreq on Samsung SoC
2118
2119 config CPU_FREQ_S3C24XX
2120         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2121         depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL
2122         select CPU_FREQ_S3C
2123         help
2124           This enables the CPUfreq driver for the Samsung S3C24XX family
2125           of CPUs.
2126
2127           For details, take a look at <file:Documentation/cpu-freq>.
2128
2129           If in doubt, say N.
2130
2131 config CPU_FREQ_S3C24XX_PLL
2132         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2133         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
2134         help
2135           Compile in support for changing the PLL frequency from the
2136           S3C24XX series CPUfreq driver. The PLL takes time to settle
2137           after a frequency change, so by default it is not enabled.
2138
2139           This also means that the PLL tables for the selected CPU(s) will
2140           be built which may increase the size of the kernel image.
2141
2142 config CPU_FREQ_S3C24XX_DEBUG
2143         bool "Debug CPUfreq Samsung driver core"
2144         depends on CPU_FREQ_S3C24XX
2145         help
2146           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2147
2148 config CPU_FREQ_S3C24XX_IODEBUG
2149         bool "Debug CPUfreq Samsung driver IO timing"
2150         depends on CPU_FREQ_S3C24XX
2151         help
2152           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2153
2154 config CPU_FREQ_S3C24XX_DEBUGFS
2155         bool "Export debugfs for CPUFreq"
2156         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2157         help
2158           Export status information via debugfs.
2159
2160 endif
2161
2162 source "drivers/cpuidle/Kconfig"
2163
2164 endmenu
2165
2166 menu "Floating point emulation"
2167
2168 comment "At least one emulation must be selected"
2169
2170 config FPE_NWFPE
2171         bool "NWFPE math emulation"
2172         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2173         ---help---
2174           Say Y to include the NWFPE floating point emulator in the kernel.
2175           This is necessary to run most binaries. Linux does not currently
2176           support floating point hardware so you need to say Y here even if
2177           your machine has an FPA or floating point co-processor podule.
2178
2179           You may say N here if you are going to load the Acorn FPEmulator
2180           early in the bootup.
2181
2182 config FPE_NWFPE_XP
2183         bool "Support extended precision"
2184         depends on FPE_NWFPE
2185         help
2186           Say Y to include 80-bit support in the kernel floating-point
2187           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2188           Note that gcc does not generate 80-bit operations by default,
2189           so in most cases this option only enlarges the size of the
2190           floating point emulator without any good reason.
2191
2192           You almost surely want to say N here.
2193
2194 config FPE_FASTFPE
2195         bool "FastFPE math emulation (EXPERIMENTAL)"
2196         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2197         ---help---
2198           Say Y here to include the FAST floating point emulator in the kernel.
2199           This is an experimental much faster emulator which now also has full
2200           precision for the mantissa.  It does not support any exceptions.
2201           It is very simple, and approximately 3-6 times faster than NWFPE.
2202
2203           It should be sufficient for most programs.  It may be not suitable
2204           for scientific calculations, but you have to check this for yourself.
2205           If you do not feel you need a faster FP emulation you should better
2206           choose NWFPE.
2207
2208 config VFP
2209         bool "VFP-format floating point maths"
2210         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2211         help
2212           Say Y to include VFP support code in the kernel. This is needed
2213           if your hardware includes a VFP unit.
2214
2215           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2216           release notes and additional status information.
2217
2218           Say N if your target does not have VFP hardware.
2219
2220 config VFPv3
2221         bool
2222         depends on VFP
2223         default y if CPU_V7
2224
2225 config NEON
2226         bool "Advanced SIMD (NEON) Extension support"
2227         depends on VFPv3 && CPU_V7
2228         help
2229           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2230           Extension.
2231
2232 endmenu
2233
2234 menu "Userspace binary formats"
2235
2236 source "fs/Kconfig.binfmt"
2237
2238 config ARTHUR
2239         tristate "RISC OS personality"
2240         depends on !AEABI
2241         help
2242           Say Y here to include the kernel code necessary if you want to run
2243           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2244           experimental; if this sounds frightening, say N and sleep in peace.
2245           You can also say M here to compile this support as a module (which
2246           will be called arthur).
2247
2248 endmenu
2249
2250 menu "Power management options"
2251
2252 source "kernel/power/Kconfig"
2253
2254 config ARCH_SUSPEND_POSSIBLE
2255         depends on !ARCH_S5PC100 && !ARCH_TEGRA
2256         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2257                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2258         def_bool y
2259
2260 config ARM_CPU_SUSPEND
2261         def_bool PM_SLEEP
2262
2263 endmenu
2264
2265 source "net/Kconfig"
2266
2267 source "drivers/Kconfig"
2268
2269 source "fs/Kconfig"
2270
2271 source "arch/arm/Kconfig.debug"
2272
2273 source "security/Kconfig"
2274
2275 source "crypto/Kconfig"
2276
2277 source "lib/Kconfig"