5 select HAVE_DMA_API_DEBUG
9 select SYS_SUPPORTS_APM_EMULATION
10 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
14 select HAVE_KRETPROBES if (HAVE_KPROBES)
15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
19 select HAVE_GENERIC_DMA_COHERENT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
22 select HAVE_KERNEL_LZMA
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
26 select HAVE_REGS_AND_STACK_ACCESS_API
27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
28 select HAVE_C_RECORDMCOUNT
29 select HAVE_GENERIC_HARDIRQS
30 select HAVE_SPARSE_IRQ
32 The ARM series is a line of low-power-consumption RISC chip designs
33 licensed by ARM Ltd and targeted at embedded applications and
34 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
35 manufactured, but legacy ARM-based PC hardware remains popular in
36 Europe. There is an ARM Linux project with a web page at
37 <http://www.arm.linux.org.uk/>.
45 config SYS_SUPPORTS_APM_EMULATION
48 config HAVE_SCHED_CLOCK
54 config ARCH_USES_GETTIMEOFFSET
58 config GENERIC_CLOCKEVENTS
61 config GENERIC_CLOCKEVENTS_BROADCAST
63 depends on GENERIC_CLOCKEVENTS
68 select GENERIC_ALLOCATOR
79 The Extended Industry Standard Architecture (EISA) bus was
80 developed as an open alternative to the IBM MicroChannel bus.
82 The EISA bus provided some of the features of the IBM MicroChannel
83 bus while maintaining backward compatibility with cards made for
84 the older ISA bus. The EISA bus saw limited use between 1988 and
85 1995 when it was made obsolete by the PCI bus.
87 Say Y here if you are building a kernel for an EISA-based machine.
97 MicroChannel Architecture is found in some IBM PS/2 machines and
98 laptops. It is a bus system similar to PCI or ISA. See
99 <file:Documentation/mca.txt> (and especially the web page given
100 there) before attempting to build an MCA bus kernel.
102 config STACKTRACE_SUPPORT
106 config HAVE_LATENCYTOP_SUPPORT
111 config LOCKDEP_SUPPORT
115 config TRACE_IRQFLAGS_SUPPORT
119 config HARDIRQS_SW_RESEND
123 config GENERIC_IRQ_PROBE
127 config GENERIC_LOCKBREAK
130 depends on SMP && PREEMPT
132 config RWSEM_GENERIC_SPINLOCK
136 config RWSEM_XCHGADD_ALGORITHM
139 config ARCH_HAS_ILOG2_U32
142 config ARCH_HAS_ILOG2_U64
145 config ARCH_HAS_CPUFREQ
148 Internal node to signify that the ARCH has CPUFREQ support
149 and that the relevant menu configurations are displayed for
152 config ARCH_HAS_CPU_IDLE_WAIT
155 config GENERIC_HWEIGHT
159 config GENERIC_CALIBRATE_DELAY
163 config ARCH_MAY_HAVE_PC_FDC
169 config NEED_DMA_MAP_STATE
172 config GENERIC_ISA_DMA
183 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
184 default DRAM_BASE if REMAP_VECTORS_TO_RAM
187 The base address of exception vectors.
189 source "init/Kconfig"
191 source "kernel/Kconfig.freezer"
196 bool "MMU-based Paged Memory Management Support"
199 Select if you want MMU-based virtualised addressing space
200 support by paged memory management. If unsure, say 'Y'.
203 # The "ARM system type" choice list is ordered alphabetically by option
204 # text. Please add new entries in the option alphabetic order.
207 prompt "ARM system type"
208 default ARCH_VERSATILE
211 bool "Agilent AAEC-2000 based"
215 select ARCH_USES_GETTIMEOFFSET
217 This enables support for systems based on the Agilent AAEC-2000
219 config ARCH_INTEGRATOR
220 bool "ARM Ltd. Integrator family"
222 select ARCH_HAS_CPUFREQ
225 select GENERIC_CLOCKEVENTS
226 select PLAT_VERSATILE
228 Support for ARM's Integrator platform.
231 bool "ARM Ltd. RealView family"
234 select HAVE_SCHED_CLOCK
236 select GENERIC_CLOCKEVENTS
237 select ARCH_WANT_OPTIONAL_GPIOLIB
238 select PLAT_VERSATILE
239 select ARM_TIMER_SP804
240 select GPIO_PL061 if GPIOLIB
242 This enables support for ARM Ltd RealView boards.
244 config ARCH_VERSATILE
245 bool "ARM Ltd. Versatile family"
249 select HAVE_SCHED_CLOCK
251 select GENERIC_CLOCKEVENTS
252 select ARCH_WANT_OPTIONAL_GPIOLIB
253 select PLAT_VERSATILE
254 select ARM_TIMER_SP804
256 This enables support for ARM Ltd Versatile board.
259 bool "ARM Ltd. Versatile Express family"
260 select ARCH_WANT_OPTIONAL_GPIOLIB
262 select ARM_TIMER_SP804
264 select GENERIC_CLOCKEVENTS
266 select HAVE_SCHED_CLOCK
268 select PLAT_VERSATILE
270 This enables support for the ARM Ltd Versatile Express boards.
274 select ARCH_REQUIRE_GPIOLIB
277 This enables support for systems based on the Atmel AT91RM9200,
278 AT91SAM9 and AT91CAP9 processors.
281 bool "Broadcom BCMRING"
286 select GENERIC_CLOCKEVENTS
287 select ARCH_WANT_OPTIONAL_GPIOLIB
289 Support for Broadcom's BCMRing platform.
292 bool "Cirrus Logic CLPS711x/EP721x-based"
294 select ARCH_USES_GETTIMEOFFSET
296 Support for Cirrus Logic 711x/721x based boards.
299 bool "Cavium Networks CNS3XXX family"
301 select GENERIC_CLOCKEVENTS
303 select MIGHT_HAVE_PCI
304 select PCI_DOMAINS if PCI
306 Support for Cavium Networks CNS3XXX platform.
309 bool "Cortina Systems Gemini"
311 select ARCH_REQUIRE_GPIOLIB
312 select ARCH_USES_GETTIMEOFFSET
314 Support for the Cortina Systems Gemini family SoCs
321 select ARCH_USES_GETTIMEOFFSET
323 This is an evaluation board for the StrongARM processor available
324 from Digital. It has limited hardware on-board, including an
325 Ethernet interface, two PCMCIA sockets, two serial ports and a
334 select ARCH_REQUIRE_GPIOLIB
335 select ARCH_HAS_HOLES_MEMORYMODEL
336 select ARCH_USES_GETTIMEOFFSET
338 This enables support for the Cirrus EP93xx series of CPUs.
340 config ARCH_FOOTBRIDGE
344 select ARCH_USES_GETTIMEOFFSET
346 Support for systems based on the DC21285 companion chip
347 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
350 bool "Freescale MXC/iMX-based"
351 select GENERIC_CLOCKEVENTS
352 select ARCH_REQUIRE_GPIOLIB
355 Support for Freescale MXC/iMX-based family of processors
358 bool "Freescale MXS-based"
359 select GENERIC_CLOCKEVENTS
360 select ARCH_REQUIRE_GPIOLIB
363 Support for Freescale MXS-based family of processors
366 bool "Freescale STMP3xxx"
369 select ARCH_REQUIRE_GPIOLIB
370 select GENERIC_CLOCKEVENTS
371 select USB_ARCH_HAS_EHCI
373 Support for systems based on the Freescale 3xxx CPUs.
376 bool "Hilscher NetX based"
379 select GENERIC_CLOCKEVENTS
381 This enables support for systems based on the Hilscher NetX Soc
384 bool "Hynix HMS720x-based"
387 select ARCH_USES_GETTIMEOFFSET
389 This enables support for systems based on the Hynix HMS720x
397 select ARCH_SUPPORTS_MSI
400 Support for Intel's IOP13XX (XScale) family of processors.
408 select ARCH_REQUIRE_GPIOLIB
410 Support for Intel's 80219 and IOP32X (XScale) family of
419 select ARCH_REQUIRE_GPIOLIB
421 Support for Intel's IOP33X (XScale) family of processors.
428 select ARCH_USES_GETTIMEOFFSET
430 Support for Intel's IXP23xx (XScale) family of processors.
433 bool "IXP2400/2800-based"
437 select ARCH_USES_GETTIMEOFFSET
439 Support for Intel's IXP2400/2800 (XScale) family of processors.
446 select GENERIC_CLOCKEVENTS
447 select HAVE_SCHED_CLOCK
448 select MIGHT_HAVE_PCI
449 select DMABOUNCE if PCI
451 Support for Intel's IXP4XX (XScale) family of processors.
456 select ARCH_REQUIRE_GPIOLIB
457 select GENERIC_CLOCKEVENTS
460 Support for the Marvell Dove SoC 88AP510
463 bool "Marvell Kirkwood"
466 select ARCH_REQUIRE_GPIOLIB
467 select GENERIC_CLOCKEVENTS
470 Support for the following Marvell Kirkwood series SoCs:
471 88F6180, 88F6192 and 88F6281.
474 bool "Marvell Loki (88RC8480)"
476 select GENERIC_CLOCKEVENTS
479 Support for the Marvell Loki (88RC8480) SoC.
484 select ARCH_REQUIRE_GPIOLIB
487 select USB_ARCH_HAS_OHCI
490 select GENERIC_CLOCKEVENTS
492 Support for the NXP LPC32XX family of processors
495 bool "Marvell MV78xx0"
498 select ARCH_REQUIRE_GPIOLIB
499 select GENERIC_CLOCKEVENTS
502 Support for the following Marvell MV78xx0 series SoCs:
510 select ARCH_REQUIRE_GPIOLIB
511 select GENERIC_CLOCKEVENTS
514 Support for the following Marvell Orion 5x series SoCs:
515 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
516 Orion-2 (5281), Orion-1-90 (6183).
519 bool "Marvell PXA168/910/MMP2"
521 select ARCH_REQUIRE_GPIOLIB
523 select GENERIC_CLOCKEVENTS
524 select HAVE_SCHED_CLOCK
529 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
532 bool "Micrel/Kendin KS8695"
534 select ARCH_REQUIRE_GPIOLIB
535 select ARCH_USES_GETTIMEOFFSET
537 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
538 System-on-Chip devices.
541 bool "NetSilicon NS9xxx"
544 select GENERIC_CLOCKEVENTS
547 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
550 <http://www.digi.com/products/microprocessors/index.jsp>
553 bool "Nuvoton W90X900 CPU"
555 select ARCH_REQUIRE_GPIOLIB
557 select GENERIC_CLOCKEVENTS
559 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
560 At present, the w90x900 has been renamed nuc900, regarding
561 the ARM series product line, you can login the following
562 link address to know more.
564 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
565 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
568 bool "Nuvoton NUC93X CPU"
572 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
573 low-power and high performance MPEG-4/JPEG multimedia controller chip.
579 select GENERIC_CLOCKEVENTS
582 select HAVE_SCHED_CLOCK
583 select ARCH_HAS_BARRIERS if CACHE_L2X0
584 select ARCH_HAS_CPUFREQ
586 This enables support for NVIDIA Tegra based systems (Tegra APX,
587 Tegra 6xx and Tegra 2 series).
590 bool "Philips Nexperia PNX4008 Mobile"
593 select ARCH_USES_GETTIMEOFFSET
595 This enables support for Philips PNX4008 mobile platform.
598 bool "PXA2xx/PXA3xx-based"
601 select ARCH_HAS_CPUFREQ
603 select ARCH_REQUIRE_GPIOLIB
604 select GENERIC_CLOCKEVENTS
605 select HAVE_SCHED_CLOCK
610 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
615 select GENERIC_CLOCKEVENTS
616 select ARCH_REQUIRE_GPIOLIB
618 Support for Qualcomm MSM/QSD based systems. This runs on the
619 apps processor of the MSM/QSD and depends on a shared memory
620 interface to the modem processor which runs the baseband
621 stack and controls some vital subsystems
622 (clock and power control, etc).
625 bool "Renesas SH-Mobile / R-Mobile"
628 select GENERIC_CLOCKEVENTS
631 select MULTI_IRQ_HANDLER
633 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
640 select ARCH_MAY_HAVE_PC_FDC
641 select HAVE_PATA_PLATFORM
644 select ARCH_SPARSEMEM_ENABLE
645 select ARCH_USES_GETTIMEOFFSET
647 On the Acorn Risc-PC, Linux can support the internal IDE disk and
648 CD-ROM interface, serial and parallel port, and the floppy drive.
654 select ARCH_SPARSEMEM_ENABLE
656 select ARCH_HAS_CPUFREQ
658 select GENERIC_CLOCKEVENTS
660 select HAVE_SCHED_CLOCK
662 select ARCH_REQUIRE_GPIOLIB
664 Support for StrongARM 11x0 based boards.
667 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
669 select ARCH_HAS_CPUFREQ
671 select ARCH_USES_GETTIMEOFFSET
672 select HAVE_S3C2410_I2C if I2C
674 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
675 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
676 the Samsung SMDK2410 development board (and derivatives).
678 Note, the S3C2416 and the S3C2450 are so close that they even share
679 the same SoC ID code. This means that there is no seperate machine
680 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
683 bool "Samsung S3C64XX"
689 select ARCH_USES_GETTIMEOFFSET
690 select ARCH_HAS_CPUFREQ
691 select ARCH_REQUIRE_GPIOLIB
692 select SAMSUNG_CLKSRC
693 select SAMSUNG_IRQ_VIC_TIMER
694 select SAMSUNG_IRQ_UART
695 select S3C_GPIO_TRACK
696 select S3C_GPIO_PULL_UPDOWN
697 select S3C_GPIO_CFG_S3C24XX
698 select S3C_GPIO_CFG_S3C64XX
700 select USB_ARCH_HAS_OHCI
701 select SAMSUNG_GPIOLIB_4BIT
702 select HAVE_S3C2410_I2C if I2C
703 select HAVE_S3C2410_WATCHDOG if WATCHDOG
705 Samsung S3C64XX series based systems
708 bool "Samsung S5P6440 S5P6450"
712 select HAVE_S3C2410_WATCHDOG if WATCHDOG
713 select ARCH_USES_GETTIMEOFFSET
714 select HAVE_S3C2410_I2C if I2C
715 select HAVE_S3C_RTC if RTC_CLASS
717 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
721 bool "Samsung S5P6442"
725 select ARCH_USES_GETTIMEOFFSET
726 select HAVE_S3C2410_WATCHDOG if WATCHDOG
728 Samsung S5P6442 CPU based systems
731 bool "Samsung S5PC100"
735 select ARM_L1_CACHE_SHIFT_6
736 select ARCH_USES_GETTIMEOFFSET
737 select HAVE_S3C2410_I2C if I2C
738 select HAVE_S3C_RTC if RTC_CLASS
739 select HAVE_S3C2410_WATCHDOG if WATCHDOG
741 Samsung S5PC100 series based systems
744 bool "Samsung S5PV210/S5PC110"
746 select ARCH_SPARSEMEM_ENABLE
749 select ARM_L1_CACHE_SHIFT_6
750 select ARCH_HAS_CPUFREQ
751 select ARCH_USES_GETTIMEOFFSET
752 select HAVE_S3C2410_I2C if I2C
753 select HAVE_S3C_RTC if RTC_CLASS
754 select HAVE_S3C2410_WATCHDOG if WATCHDOG
756 Samsung S5PV210/S5PC110 series based systems
759 bool "Samsung S5PV310/S5PC210"
761 select ARCH_SPARSEMEM_ENABLE
764 select ARCH_HAS_CPUFREQ
765 select GENERIC_CLOCKEVENTS
766 select HAVE_S3C_RTC if RTC_CLASS
767 select HAVE_S3C2410_I2C if I2C
768 select HAVE_S3C2410_WATCHDOG if WATCHDOG
770 Samsung S5PV310 series based systems
779 select ARCH_USES_GETTIMEOFFSET
781 Support for the StrongARM based Digital DNARD machine, also known
782 as "Shark" (<http://www.shark-linux.de/shark.html>).
785 bool "Telechips TCC ARM926-based systems"
789 select GENERIC_CLOCKEVENTS
791 Support for Telechips TCC ARM926-based systems.
796 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
797 select ARCH_USES_GETTIMEOFFSET
799 Say Y here for systems based on one of the Sharp LH7A40X
800 System on a Chip processors. These CPUs include an ARM922T
801 core with a wide array of integrated devices for
802 hand-held and low-power applications.
805 bool "ST-Ericsson U300 Series"
808 select HAVE_SCHED_CLOCK
812 select GENERIC_CLOCKEVENTS
816 Support for ST-Ericsson U300 series mobile platforms.
819 bool "ST-Ericsson U8500 Series"
822 select GENERIC_CLOCKEVENTS
824 select ARCH_REQUIRE_GPIOLIB
825 select ARCH_HAS_CPUFREQ
827 Support for ST-Ericsson's Ux500 architecture
830 bool "STMicroelectronics Nomadik"
835 select GENERIC_CLOCKEVENTS
836 select ARCH_REQUIRE_GPIOLIB
838 Support for the Nomadik platform by ST-Ericsson
842 select GENERIC_CLOCKEVENTS
843 select ARCH_REQUIRE_GPIOLIB
847 select GENERIC_ALLOCATOR
848 select ARCH_HAS_HOLES_MEMORYMODEL
850 Support for TI's DaVinci platform.
855 select ARCH_REQUIRE_GPIOLIB
856 select ARCH_HAS_CPUFREQ
857 select GENERIC_CLOCKEVENTS
858 select HAVE_SCHED_CLOCK
859 select ARCH_HAS_HOLES_MEMORYMODEL
861 Support for TI's OMAP platform (OMAP1/2/3/4).
866 select ARCH_REQUIRE_GPIOLIB
868 select GENERIC_CLOCKEVENTS
871 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
876 # This is sorted alphabetically by mach-* pathname. However, plat-*
877 # Kconfigs may be included either alphabetically (according to the
878 # plat- suffix) or along side the corresponding mach-* source.
880 source "arch/arm/mach-aaec2000/Kconfig"
882 source "arch/arm/mach-at91/Kconfig"
884 source "arch/arm/mach-bcmring/Kconfig"
886 source "arch/arm/mach-clps711x/Kconfig"
888 source "arch/arm/mach-cns3xxx/Kconfig"
890 source "arch/arm/mach-davinci/Kconfig"
892 source "arch/arm/mach-dove/Kconfig"
894 source "arch/arm/mach-ep93xx/Kconfig"
896 source "arch/arm/mach-footbridge/Kconfig"
898 source "arch/arm/mach-gemini/Kconfig"
900 source "arch/arm/mach-h720x/Kconfig"
902 source "arch/arm/mach-integrator/Kconfig"
904 source "arch/arm/mach-iop32x/Kconfig"
906 source "arch/arm/mach-iop33x/Kconfig"
908 source "arch/arm/mach-iop13xx/Kconfig"
910 source "arch/arm/mach-ixp4xx/Kconfig"
912 source "arch/arm/mach-ixp2000/Kconfig"
914 source "arch/arm/mach-ixp23xx/Kconfig"
916 source "arch/arm/mach-kirkwood/Kconfig"
918 source "arch/arm/mach-ks8695/Kconfig"
920 source "arch/arm/mach-lh7a40x/Kconfig"
922 source "arch/arm/mach-loki/Kconfig"
924 source "arch/arm/mach-lpc32xx/Kconfig"
926 source "arch/arm/mach-msm/Kconfig"
928 source "arch/arm/mach-mv78xx0/Kconfig"
930 source "arch/arm/plat-mxc/Kconfig"
932 source "arch/arm/mach-mxs/Kconfig"
934 source "arch/arm/mach-netx/Kconfig"
936 source "arch/arm/mach-nomadik/Kconfig"
937 source "arch/arm/plat-nomadik/Kconfig"
939 source "arch/arm/mach-ns9xxx/Kconfig"
941 source "arch/arm/mach-nuc93x/Kconfig"
943 source "arch/arm/plat-omap/Kconfig"
945 source "arch/arm/mach-omap1/Kconfig"
947 source "arch/arm/mach-omap2/Kconfig"
949 source "arch/arm/mach-orion5x/Kconfig"
951 source "arch/arm/mach-pxa/Kconfig"
952 source "arch/arm/plat-pxa/Kconfig"
954 source "arch/arm/mach-mmp/Kconfig"
956 source "arch/arm/mach-realview/Kconfig"
958 source "arch/arm/mach-sa1100/Kconfig"
960 source "arch/arm/plat-samsung/Kconfig"
961 source "arch/arm/plat-s3c24xx/Kconfig"
962 source "arch/arm/plat-s5p/Kconfig"
964 source "arch/arm/plat-spear/Kconfig"
966 source "arch/arm/plat-tcc/Kconfig"
969 source "arch/arm/mach-s3c2400/Kconfig"
970 source "arch/arm/mach-s3c2410/Kconfig"
971 source "arch/arm/mach-s3c2412/Kconfig"
972 source "arch/arm/mach-s3c2416/Kconfig"
973 source "arch/arm/mach-s3c2440/Kconfig"
974 source "arch/arm/mach-s3c2443/Kconfig"
978 source "arch/arm/mach-s3c64xx/Kconfig"
981 source "arch/arm/mach-s5p64x0/Kconfig"
983 source "arch/arm/mach-s5p6442/Kconfig"
985 source "arch/arm/mach-s5pc100/Kconfig"
987 source "arch/arm/mach-s5pv210/Kconfig"
989 source "arch/arm/mach-s5pv310/Kconfig"
991 source "arch/arm/mach-shmobile/Kconfig"
993 source "arch/arm/plat-stmp3xxx/Kconfig"
995 source "arch/arm/mach-tegra/Kconfig"
997 source "arch/arm/mach-u300/Kconfig"
999 source "arch/arm/mach-ux500/Kconfig"
1001 source "arch/arm/mach-versatile/Kconfig"
1003 source "arch/arm/mach-vexpress/Kconfig"
1005 source "arch/arm/mach-w90x900/Kconfig"
1007 # Definitions to make life easier
1013 select GENERIC_CLOCKEVENTS
1014 select HAVE_SCHED_CLOCK
1018 select HAVE_SCHED_CLOCK
1023 config PLAT_VERSATILE
1026 config ARM_TIMER_SP804
1029 source arch/arm/mm/Kconfig
1032 bool "Enable iWMMXt support"
1033 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1034 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1036 Enable support for iWMMXt context switching at run time if
1037 running on a CPU that supports it.
1039 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1042 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1046 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1047 (!ARCH_OMAP3 || OMAP3_EMU)
1051 config MULTI_IRQ_HANDLER
1054 Allow each machine to specify it's own IRQ handler at run time.
1057 source "arch/arm/Kconfig-nommu"
1060 config ARM_ERRATA_411920
1061 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1064 Invalidation of the Instruction Cache operation can
1065 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1066 It does not affect the MPCore. This option enables the ARM Ltd.
1067 recommended workaround.
1069 config ARM_ERRATA_430973
1070 bool "ARM errata: Stale prediction on replaced interworking branch"
1073 This option enables the workaround for the 430973 Cortex-A8
1074 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1075 interworking branch is replaced with another code sequence at the
1076 same virtual address, whether due to self-modifying code or virtual
1077 to physical address re-mapping, Cortex-A8 does not recover from the
1078 stale interworking branch prediction. This results in Cortex-A8
1079 executing the new code sequence in the incorrect ARM or Thumb state.
1080 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1081 and also flushes the branch target cache at every context switch.
1082 Note that setting specific bits in the ACTLR register may not be
1083 available in non-secure mode.
1085 config ARM_ERRATA_458693
1086 bool "ARM errata: Processor deadlock when a false hazard is created"
1089 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1090 erratum. For very specific sequences of memory operations, it is
1091 possible for a hazard condition intended for a cache line to instead
1092 be incorrectly associated with a different cache line. This false
1093 hazard might then cause a processor deadlock. The workaround enables
1094 the L1 caching of the NEON accesses and disables the PLD instruction
1095 in the ACTLR register. Note that setting specific bits in the ACTLR
1096 register may not be available in non-secure mode.
1098 config ARM_ERRATA_460075
1099 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1102 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1103 erratum. Any asynchronous access to the L2 cache may encounter a
1104 situation in which recent store transactions to the L2 cache are lost
1105 and overwritten with stale memory contents from external memory. The
1106 workaround disables the write-allocate mode for the L2 cache via the
1107 ACTLR register. Note that setting specific bits in the ACTLR register
1108 may not be available in non-secure mode.
1110 config ARM_ERRATA_742230
1111 bool "ARM errata: DMB operation may be faulty"
1112 depends on CPU_V7 && SMP
1114 This option enables the workaround for the 742230 Cortex-A9
1115 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1116 between two write operations may not ensure the correct visibility
1117 ordering of the two writes. This workaround sets a specific bit in
1118 the diagnostic register of the Cortex-A9 which causes the DMB
1119 instruction to behave as a DSB, ensuring the correct behaviour of
1122 config ARM_ERRATA_742231
1123 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1124 depends on CPU_V7 && SMP
1126 This option enables the workaround for the 742231 Cortex-A9
1127 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1128 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1129 accessing some data located in the same cache line, may get corrupted
1130 data due to bad handling of the address hazard when the line gets
1131 replaced from one of the CPUs at the same time as another CPU is
1132 accessing it. This workaround sets specific bits in the diagnostic
1133 register of the Cortex-A9 which reduces the linefill issuing
1134 capabilities of the processor.
1136 config PL310_ERRATA_588369
1137 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1138 depends on CACHE_L2X0 && ARCH_OMAP4
1140 The PL310 L2 cache controller implements three types of Clean &
1141 Invalidate maintenance operations: by Physical Address
1142 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1143 They are architecturally defined to behave as the execution of a
1144 clean operation followed immediately by an invalidate operation,
1145 both performing to the same memory location. This functionality
1146 is not correctly implemented in PL310 as clean lines are not
1147 invalidated as a result of these operations. Note that this errata
1148 uses Texas Instrument's secure monitor api.
1150 config ARM_ERRATA_720789
1151 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1152 depends on CPU_V7 && SMP
1154 This option enables the workaround for the 720789 Cortex-A9 (prior to
1155 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1156 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1157 As a consequence of this erratum, some TLB entries which should be
1158 invalidated are not, resulting in an incoherency in the system page
1159 tables. The workaround changes the TLB flushing routines to invalidate
1160 entries regardless of the ASID.
1162 config ARM_ERRATA_743622
1163 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1166 This option enables the workaround for the 743622 Cortex-A9
1167 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1168 optimisation in the Cortex-A9 Store Buffer may lead to data
1169 corruption. This workaround sets a specific bit in the diagnostic
1170 register of the Cortex-A9 which disables the Store Buffer
1171 optimisation, preventing the defect from occurring. This has no
1172 visible impact on the overall performance or power consumption of the
1177 source "arch/arm/common/Kconfig"
1187 Find out whether you have ISA slots on your motherboard. ISA is the
1188 name of a bus system, i.e. the way the CPU talks to the other stuff
1189 inside your box. Other bus systems are PCI, EISA, MicroChannel
1190 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1191 newer boards don't support it. If you have ISA, say Y, otherwise N.
1193 # Select ISA DMA controller support
1198 # Select ISA DMA interface
1203 bool "PCI support" if MIGHT_HAVE_PCI
1205 Find out whether you have a PCI motherboard. PCI is the name of a
1206 bus system, i.e. the way the CPU talks to the other stuff inside
1207 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1208 VESA. If you have PCI, say Y, otherwise N.
1214 config PCI_NANOENGINE
1215 bool "BSE nanoEngine PCI support"
1216 depends on SA1100_NANOENGINE
1218 Enable PCI on the BSE nanoEngine board.
1223 # Select the host bridge type
1224 config PCI_HOST_VIA82C505
1226 depends on PCI && ARCH_SHARK
1229 config PCI_HOST_ITE8152
1231 depends on PCI && MACH_ARMCORE
1235 source "drivers/pci/Kconfig"
1237 source "drivers/pcmcia/Kconfig"
1241 menu "Kernel Features"
1243 source "kernel/time/Kconfig"
1246 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1247 depends on EXPERIMENTAL
1248 depends on GENERIC_CLOCKEVENTS
1249 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1250 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1251 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1252 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1253 select USE_GENERIC_SMP_HELPERS
1254 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1256 This enables support for systems with more than one CPU. If you have
1257 a system with only one CPU, like most personal computers, say N. If
1258 you have a system with more than one CPU, say Y.
1260 If you say N here, the kernel will run on single and multiprocessor
1261 machines, but will use only one CPU of a multiprocessor machine. If
1262 you say Y here, the kernel will run on many, but not all, single
1263 processor machines. On a single processor machine, the kernel will
1264 run faster if you say N here.
1266 See also <file:Documentation/i386/IO-APIC.txt>,
1267 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1268 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1270 If you don't know what to do here, say N.
1273 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1274 depends on EXPERIMENTAL
1275 depends on SMP && !XIP_KERNEL
1278 SMP kernels contain instructions which fail on non-SMP processors.
1279 Enabling this option allows the kernel to modify itself to make
1280 these instructions safe. Disabling it allows about 1K of space
1283 If you don't know what to do here, say Y.
1289 This option enables support for the ARM system coherency unit
1296 This options enables support for the ARM timer and watchdog unit
1299 prompt "Memory split"
1302 Select the desired split between kernel and user memory.
1304 If you are not absolutely sure what you are doing, leave this
1308 bool "3G/1G user/kernel split"
1310 bool "2G/2G user/kernel split"
1312 bool "1G/3G user/kernel split"
1317 default 0x40000000 if VMSPLIT_1G
1318 default 0x80000000 if VMSPLIT_2G
1322 int "Maximum number of CPUs (2-32)"
1328 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1329 depends on SMP && HOTPLUG && EXPERIMENTAL
1330 depends on !ARCH_MSM
1332 Say Y here to experiment with turning CPUs off and on. CPUs
1333 can be controlled through /sys/devices/system/cpu.
1336 bool "Use local timer interrupts"
1339 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
1341 Enable support for local timers on SMP platforms, rather then the
1342 legacy IPI broadcast method. Local timers allows the system
1343 accounting to be spread across the timer interval, preventing a
1344 "thundering herd" at every timer tick.
1346 source kernel/Kconfig.preempt
1350 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1351 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1352 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1353 default AT91_TIMER_HZ if ARCH_AT91
1354 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1357 config THUMB2_KERNEL
1358 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1359 depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
1361 select ARM_ASM_UNIFIED
1363 By enabling this option, the kernel will be compiled in
1364 Thumb-2 mode. A compiler/assembler that understand the unified
1365 ARM-Thumb syntax is needed.
1369 config ARM_ASM_UNIFIED
1373 bool "Use the ARM EABI to compile the kernel"
1375 This option allows for the kernel to be compiled using the latest
1376 ARM ABI (aka EABI). This is only useful if you are using a user
1377 space environment that is also compiled with EABI.
1379 Since there are major incompatibilities between the legacy ABI and
1380 EABI, especially with regard to structure member alignment, this
1381 option also changes the kernel syscall calling convention to
1382 disambiguate both ABIs and allow for backward compatibility support
1383 (selected with CONFIG_OABI_COMPAT).
1385 To use this you need GCC version 4.0.0 or later.
1388 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1389 depends on AEABI && EXPERIMENTAL
1392 This option preserves the old syscall interface along with the
1393 new (ARM EABI) one. It also provides a compatibility layer to
1394 intercept syscalls that have structure arguments which layout
1395 in memory differs between the legacy ABI and the new ARM EABI
1396 (only for non "thumb" binaries). This option adds a tiny
1397 overhead to all syscalls and produces a slightly larger kernel.
1398 If you know you'll be using only pure EABI user space then you
1399 can say N here. If this option is not selected and you attempt
1400 to execute a legacy ABI binary then the result will be
1401 UNPREDICTABLE (in fact it can be predicted that it won't work
1402 at all). If in doubt say Y.
1404 config ARCH_HAS_HOLES_MEMORYMODEL
1407 config ARCH_SPARSEMEM_ENABLE
1410 config ARCH_SPARSEMEM_DEFAULT
1411 def_bool ARCH_SPARSEMEM_ENABLE
1413 config ARCH_SELECT_MEMORY_MODEL
1414 def_bool ARCH_SPARSEMEM_ENABLE
1417 bool "High Memory Support (EXPERIMENTAL)"
1418 depends on MMU && EXPERIMENTAL
1420 The address space of ARM processors is only 4 Gigabytes large
1421 and it has to accommodate user address space, kernel address
1422 space as well as some memory mapped IO. That means that, if you
1423 have a large amount of physical memory and/or IO, not all of the
1424 memory can be "permanently mapped" by the kernel. The physical
1425 memory that is not permanently mapped is called "high memory".
1427 Depending on the selected kernel/user memory split, minimum
1428 vmalloc space and actual amount of RAM, you may not need this
1429 option which should result in a slightly faster kernel.
1434 bool "Allocate 2nd-level pagetables from highmem"
1436 depends on !OUTER_CACHE
1438 config HW_PERF_EVENTS
1439 bool "Enable hardware performance counter support for perf events"
1440 depends on PERF_EVENTS && CPU_HAS_PMU
1443 Enable hardware performance counter support for perf events. If
1444 disabled, perf events will use software events only.
1448 config FORCE_MAX_ZONEORDER
1449 int "Maximum zone order" if ARCH_SHMOBILE
1450 range 11 64 if ARCH_SHMOBILE
1451 default "9" if SA1111
1454 The kernel memory allocator divides physically contiguous memory
1455 blocks into "zones", where each zone is a power of two number of
1456 pages. This option selects the largest power of two that the kernel
1457 keeps in the memory allocator. If you need to allocate very large
1458 blocks of physically contiguous memory, then you may need to
1459 increase this value.
1461 This config option is actually maximum order plus one. For example,
1462 a value of 11 means that the largest free memory block is 2^10 pages.
1465 bool "Timer and CPU usage LEDs"
1466 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1467 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1468 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1469 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1470 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1471 ARCH_AT91 || ARCH_DAVINCI || \
1472 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1474 If you say Y here, the LEDs on your machine will be used
1475 to provide useful information about your current system status.
1477 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1478 be able to select which LEDs are active using the options below. If
1479 you are compiling a kernel for the EBSA-110 or the LART however, the
1480 red LED will simply flash regularly to indicate that the system is
1481 still functional. It is safe to say Y here if you have a CATS
1482 system, but the driver will do nothing.
1485 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1486 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1487 || MACH_OMAP_PERSEUS2
1489 depends on !GENERIC_CLOCKEVENTS
1490 default y if ARCH_EBSA110
1492 If you say Y here, one of the system LEDs (the green one on the
1493 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1494 will flash regularly to indicate that the system is still
1495 operational. This is mainly useful to kernel hackers who are
1496 debugging unstable kernels.
1498 The LART uses the same LED for both Timer LED and CPU usage LED
1499 functions. You may choose to use both, but the Timer LED function
1500 will overrule the CPU usage LED.
1503 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1505 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1506 || MACH_OMAP_PERSEUS2
1509 If you say Y here, the red LED will be used to give a good real
1510 time indication of CPU usage, by lighting whenever the idle task
1511 is not currently executing.
1513 The LART uses the same LED for both Timer LED and CPU usage LED
1514 functions. You may choose to use both, but the Timer LED function
1515 will overrule the CPU usage LED.
1517 config ALIGNMENT_TRAP
1519 depends on CPU_CP15_MMU
1520 default y if !ARCH_EBSA110
1521 select HAVE_PROC_CPU if PROC_FS
1523 ARM processors cannot fetch/store information which is not
1524 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1525 address divisible by 4. On 32-bit ARM processors, these non-aligned
1526 fetch/store instructions will be emulated in software if you say
1527 here, which has a severe performance impact. This is necessary for
1528 correct operation of some network protocols. With an IP-only
1529 configuration it is safe to say N, otherwise say Y.
1531 config UACCESS_WITH_MEMCPY
1532 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1533 depends on MMU && EXPERIMENTAL
1534 default y if CPU_FEROCEON
1536 Implement faster copy_to_user and clear_user methods for CPU
1537 cores where a 8-word STM instruction give significantly higher
1538 memory write throughput than a sequence of individual 32bit stores.
1540 A possible side effect is a slight increase in scheduling latency
1541 between threads sharing the same address space if they invoke
1542 such copy operations with large buffers.
1544 However, if the CPU data cache is using a write-allocate mode,
1545 this option is unlikely to provide any performance gain.
1549 prompt "Enable seccomp to safely compute untrusted bytecode"
1551 This kernel feature is useful for number crunching applications
1552 that may need to compute untrusted bytecode during their
1553 execution. By using pipes or other transports made available to
1554 the process as file descriptors supporting the read/write
1555 syscalls, it's possible to isolate those applications in
1556 their own address space using seccomp. Once seccomp is
1557 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1558 and the task is only allowed to execute a few safe syscalls
1559 defined by each seccomp mode.
1561 config CC_STACKPROTECTOR
1562 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1563 depends on EXPERIMENTAL
1565 This option turns on the -fstack-protector GCC feature. This
1566 feature puts, at the beginning of functions, a canary value on
1567 the stack just before the return address, and validates
1568 the value just before actually returning. Stack based buffer
1569 overflows (that need to overwrite this return address) now also
1570 overwrite the canary, which gets detected and the attack is then
1571 neutralized via a kernel panic.
1572 This feature requires gcc version 4.2 or above.
1574 config DEPRECATED_PARAM_STRUCT
1575 bool "Provide old way to pass kernel parameters"
1577 This was deprecated in 2001 and announced to live on for 5 years.
1578 Some old boot loaders still use this way.
1584 # Compressed boot loader in ROM. Yes, we really want to ask about
1585 # TEXT and BSS so we preserve their values in the config files.
1586 config ZBOOT_ROM_TEXT
1587 hex "Compressed ROM boot loader base address"
1590 The physical address at which the ROM-able zImage is to be
1591 placed in the target. Platforms which normally make use of
1592 ROM-able zImage formats normally set this to a suitable
1593 value in their defconfig file.
1595 If ZBOOT_ROM is not enabled, this has no effect.
1597 config ZBOOT_ROM_BSS
1598 hex "Compressed ROM boot loader BSS address"
1601 The base address of an area of read/write memory in the target
1602 for the ROM-able zImage which must be available while the
1603 decompressor is running. It must be large enough to hold the
1604 entire decompressed kernel plus an additional 128 KiB.
1605 Platforms which normally make use of ROM-able zImage formats
1606 normally set this to a suitable value in their defconfig file.
1608 If ZBOOT_ROM is not enabled, this has no effect.
1611 bool "Compressed boot loader in ROM/flash"
1612 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1614 Say Y here if you intend to execute your compressed kernel image
1615 (zImage) directly from ROM or flash. If unsure, say N.
1618 string "Default kernel command string"
1621 On some architectures (EBSA110 and CATS), there is currently no way
1622 for the boot loader to pass arguments to the kernel. For these
1623 architectures, you should supply some command-line options at build
1624 time by entering them here. As a minimum, you should specify the
1625 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1627 config CMDLINE_FORCE
1628 bool "Always use the default kernel command string"
1629 depends on CMDLINE != ""
1631 Always use the default kernel command string, even if the boot
1632 loader passes other arguments to the kernel.
1633 This is useful if you cannot or don't want to change the
1634 command-line options your boot loader passes to the kernel.
1639 bool "Kernel Execute-In-Place from ROM"
1640 depends on !ZBOOT_ROM
1642 Execute-In-Place allows the kernel to run from non-volatile storage
1643 directly addressable by the CPU, such as NOR flash. This saves RAM
1644 space since the text section of the kernel is not loaded from flash
1645 to RAM. Read-write sections, such as the data section and stack,
1646 are still copied to RAM. The XIP kernel is not compressed since
1647 it has to run directly from flash, so it will take more space to
1648 store it. The flash address used to link the kernel object files,
1649 and for storing it, is configuration dependent. Therefore, if you
1650 say Y here, you must know the proper physical address where to
1651 store the kernel image depending on your own flash memory usage.
1653 Also note that the make target becomes "make xipImage" rather than
1654 "make zImage" or "make Image". The final kernel binary to put in
1655 ROM memory will be arch/arm/boot/xipImage.
1659 config XIP_PHYS_ADDR
1660 hex "XIP Kernel Physical Location"
1661 depends on XIP_KERNEL
1662 default "0x00080000"
1664 This is the physical address in your flash memory the kernel will
1665 be linked for and stored to. This address is dependent on your
1669 bool "Kexec system call (EXPERIMENTAL)"
1670 depends on EXPERIMENTAL
1672 kexec is a system call that implements the ability to shutdown your
1673 current kernel, and to start another kernel. It is like a reboot
1674 but it is independent of the system firmware. And like a reboot
1675 you can start any kernel with it, not just Linux.
1677 It is an ongoing process to be certain the hardware in a machine
1678 is properly shutdown, so do not be surprised if this code does not
1679 initially work for you. It may help to enable device hotplugging
1683 bool "Export atags in procfs"
1687 Should the atags used to boot the kernel be exported in an "atags"
1688 file in procfs. Useful with kexec.
1691 bool "Build kdump crash kernel (EXPERIMENTAL)"
1692 depends on EXPERIMENTAL
1694 Generate crash dump after being started by kexec. This should
1695 be normally only set in special crash dump kernels which are
1696 loaded in the main kernel with kexec-tools into a specially
1697 reserved region and then later executed after a crash by
1698 kdump/kexec. The crash dump kernel must be compiled to a
1699 memory address not used by the main kernel
1701 For more details see Documentation/kdump/kdump.txt
1703 config AUTO_ZRELADDR
1704 bool "Auto calculation of the decompressed kernel image address"
1705 depends on !ZBOOT_ROM && !ARCH_U300
1707 ZRELADDR is the physical address where the decompressed kernel
1708 image will be placed. If AUTO_ZRELADDR is selected, the address
1709 will be determined at run-time by masking the current IP with
1710 0xf8000000. This assumes the zImage being placed in the first 128MB
1711 from start of memory.
1715 menu "CPU Power Management"
1719 source "drivers/cpufreq/Kconfig"
1722 tristate "CPUfreq driver for i.MX CPUs"
1723 depends on ARCH_MXC && CPU_FREQ
1725 This enables the CPUfreq driver for i.MX CPUs.
1727 config CPU_FREQ_SA1100
1730 config CPU_FREQ_SA1110
1733 config CPU_FREQ_INTEGRATOR
1734 tristate "CPUfreq driver for ARM Integrator CPUs"
1735 depends on ARCH_INTEGRATOR && CPU_FREQ
1738 This enables the CPUfreq driver for ARM Integrator CPUs.
1740 For details, take a look at <file:Documentation/cpu-freq>.
1746 depends on CPU_FREQ && ARCH_PXA && PXA25x
1748 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1750 config CPU_FREQ_S3C64XX
1751 bool "CPUfreq support for Samsung S3C64XX CPUs"
1752 depends on CPU_FREQ && CPU_S3C6410
1757 Internal configuration node for common cpufreq on Samsung SoC
1759 config CPU_FREQ_S3C24XX
1760 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1761 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1764 This enables the CPUfreq driver for the Samsung S3C24XX family
1767 For details, take a look at <file:Documentation/cpu-freq>.
1771 config CPU_FREQ_S3C24XX_PLL
1772 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1773 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1775 Compile in support for changing the PLL frequency from the
1776 S3C24XX series CPUfreq driver. The PLL takes time to settle
1777 after a frequency change, so by default it is not enabled.
1779 This also means that the PLL tables for the selected CPU(s) will
1780 be built which may increase the size of the kernel image.
1782 config CPU_FREQ_S3C24XX_DEBUG
1783 bool "Debug CPUfreq Samsung driver core"
1784 depends on CPU_FREQ_S3C24XX
1786 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1788 config CPU_FREQ_S3C24XX_IODEBUG
1789 bool "Debug CPUfreq Samsung driver IO timing"
1790 depends on CPU_FREQ_S3C24XX
1792 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1794 config CPU_FREQ_S3C24XX_DEBUGFS
1795 bool "Export debugfs for CPUFreq"
1796 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1798 Export status information via debugfs.
1802 source "drivers/cpuidle/Kconfig"
1806 menu "Floating point emulation"
1808 comment "At least one emulation must be selected"
1811 bool "NWFPE math emulation"
1812 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1814 Say Y to include the NWFPE floating point emulator in the kernel.
1815 This is necessary to run most binaries. Linux does not currently
1816 support floating point hardware so you need to say Y here even if
1817 your machine has an FPA or floating point co-processor podule.
1819 You may say N here if you are going to load the Acorn FPEmulator
1820 early in the bootup.
1823 bool "Support extended precision"
1824 depends on FPE_NWFPE
1826 Say Y to include 80-bit support in the kernel floating-point
1827 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1828 Note that gcc does not generate 80-bit operations by default,
1829 so in most cases this option only enlarges the size of the
1830 floating point emulator without any good reason.
1832 You almost surely want to say N here.
1835 bool "FastFPE math emulation (EXPERIMENTAL)"
1836 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1838 Say Y here to include the FAST floating point emulator in the kernel.
1839 This is an experimental much faster emulator which now also has full
1840 precision for the mantissa. It does not support any exceptions.
1841 It is very simple, and approximately 3-6 times faster than NWFPE.
1843 It should be sufficient for most programs. It may be not suitable
1844 for scientific calculations, but you have to check this for yourself.
1845 If you do not feel you need a faster FP emulation you should better
1849 bool "VFP-format floating point maths"
1850 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1852 Say Y to include VFP support code in the kernel. This is needed
1853 if your hardware includes a VFP unit.
1855 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1856 release notes and additional status information.
1858 Say N if your target does not have VFP hardware.
1866 bool "Advanced SIMD (NEON) Extension support"
1867 depends on VFPv3 && CPU_V7
1869 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1874 menu "Userspace binary formats"
1876 source "fs/Kconfig.binfmt"
1879 tristate "RISC OS personality"
1882 Say Y here to include the kernel code necessary if you want to run
1883 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1884 experimental; if this sounds frightening, say N and sleep in peace.
1885 You can also say M here to compile this support as a module (which
1886 will be called arthur).
1890 menu "Power management options"
1892 source "kernel/power/Kconfig"
1894 config ARCH_SUSPEND_POSSIBLE
1899 source "net/Kconfig"
1901 source "drivers/Kconfig"
1905 source "arch/arm/Kconfig.debug"
1907 source "security/Kconfig"
1909 source "crypto/Kconfig"
1911 source "lib/Kconfig"