arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
   5         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   6         select ARCH_HAVE_CUSTOM_GPIO_H
   7         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
   8         select ARCH_WANT_IPC_PARSE_VERSION
   9         select BUILDTIME_EXTABLE_SORT if MMU
  10         select CPU_PM if (SUSPEND || CPU_IDLE)
  11         select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU
  12         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  13         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  14         select GENERIC_IRQ_PROBE
  15         select GENERIC_IRQ_SHOW
  16         select GENERIC_PCI_IOMAP
  17         select GENERIC_SMP_IDLE_THREAD
  18         select GENERIC_STRNCPY_FROM_USER
  19         select GENERIC_STRNLEN_USER
  20         select HARDIRQS_SW_RESEND
  21         select HAVE_AOUT
  22         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  23         select HAVE_ARCH_KGDB
  24         select HAVE_ARCH_SECCOMP_FILTER
  25         select HAVE_ARCH_TRACEHOOK
  26         select HAVE_BPF_JIT
  27         select HAVE_C_RECORDMCOUNT
  28         select HAVE_DEBUG_KMEMLEAK
  29         select HAVE_DMA_API_DEBUG
  30         select HAVE_DMA_ATTRS
  31         select HAVE_DMA_CONTIGUOUS if MMU
  32         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  33         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  34         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  35         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  36         select HAVE_GENERIC_DMA_COHERENT
  37         select HAVE_GENERIC_HARDIRQS
  38         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  39         select HAVE_IDE if PCI || ISA || PCMCIA
  40         select HAVE_KERNEL_GZIP
  41         select HAVE_KERNEL_LZMA
  42         select HAVE_KERNEL_LZO
  43         select HAVE_KERNEL_XZ
  44         select HAVE_KPROBES if !XIP_KERNEL
  45         select HAVE_KRETPROBES if (HAVE_KPROBES)
  46         select HAVE_MEMBLOCK
  47         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  48         select HAVE_PERF_EVENTS
  49         select HAVE_REGS_AND_STACK_ACCESS_API
  50         select HAVE_SYSCALL_TRACEPOINTS
  51         select HAVE_UID16
  52         select KTIME_SCALAR
  53         select PERF_USE_VMALLOC
  54         select RTC_LIB
  55         select SYS_SUPPORTS_APM_EMULATION
  56         select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
  57         select MODULES_USE_ELF_REL
  58         select CLONE_BACKWARDS
  59         select OLD_SIGSUSPEND3
  60         select OLD_SIGACTION
  61         help
  62           The ARM series is a line of low-power-consumption RISC chip designs
  63           licensed by ARM Ltd and targeted at embedded applications and
  64           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  65           manufactured, but legacy ARM-based PC hardware remains popular in
  66           Europe.  There is an ARM Linux project with a web page at
  67           <http://www.arm.linux.org.uk/>.
  68
  69 config ARM_HAS_SG_CHAIN
  70         bool
  71
  72 config NEED_SG_DMA_LENGTH
  73         bool
  74
  75 config ARM_DMA_USE_IOMMU
  76         bool
  77         select ARM_HAS_SG_CHAIN
  78         select NEED_SG_DMA_LENGTH
  79
  80 if ARM_DMA_USE_IOMMU
  81
  82 config ARM_DMA_IOMMU_ALIGNMENT
  83         int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
  84         range 4 9
  85         default 8
  86         help
  87           DMA mapping framework by default aligns all buffers to the smallest
  88           PAGE_SIZE order which is greater than or equal to the requested buffer
  89           size. This works well for buffers up to a few hundreds kilobytes, but
  90           for larger buffers it just a waste of address space. Drivers which has
  91           relatively small addressing window (like 64Mib) might run out of
  92           virtual space with just a few allocations.
  93
  94           With this parameter you can specify the maximum PAGE_SIZE order for
  95           DMA IOMMU buffers. Larger buffers will be aligned only to this
  96           specified order. The order is expressed as a power of two multiplied
  97           by the PAGE_SIZE.
  98
  99 endif
 100
 101 config HAVE_PWM
 102         bool
 103
 104 config MIGHT_HAVE_PCI
 105         bool
 106
 107 config SYS_SUPPORTS_APM_EMULATION
 108         bool
 109
 110 config GENERIC_GPIO
 111         bool
 112
 113 config HAVE_TCM
 114         bool
 115         select GENERIC_ALLOCATOR
 116
 117 config HAVE_PROC_CPU
 118         bool
 119
 120 config NO_IOPORT
 121         bool
 122
 123 config EISA
 124         bool
 125         ---help---
 126           The Extended Industry Standard Architecture (EISA) bus was
 127           developed as an open alternative to the IBM MicroChannel bus.
 128
 129           The EISA bus provided some of the features of the IBM MicroChannel
 130           bus while maintaining backward compatibility with cards made for
 131           the older ISA bus.  The EISA bus saw limited use between 1988 and
 132           1995 when it was made obsolete by the PCI bus.
 133
 134           Say Y here if you are building a kernel for an EISA-based machine.
 135
 136           Otherwise, say N.
 137
 138 config SBUS
 139         bool
 140
 141 config STACKTRACE_SUPPORT
 142         bool
 143         default y
 144
 145 config HAVE_LATENCYTOP_SUPPORT
 146         bool
 147         depends on !SMP
 148         default y
 149
 150 config LOCKDEP_SUPPORT
 151         bool
 152         default y
 153
 154 config TRACE_IRQFLAGS_SUPPORT
 155         bool
 156         default y
 157
 158 config RWSEM_GENERIC_SPINLOCK
 159         bool
 160         default y
 161
 162 config RWSEM_XCHGADD_ALGORITHM
 163         bool
 164
 165 config ARCH_HAS_ILOG2_U32
 166         bool
 167
 168 config ARCH_HAS_ILOG2_U64
 169         bool
 170
 171 config ARCH_HAS_CPUFREQ
 172         bool
 173         help
 174           Internal node to signify that the ARCH has CPUFREQ support
 175           and that the relevant menu configurations are displayed for
 176           it.
 177
 178 config GENERIC_HWEIGHT
 179         bool
 180         default y
 181
 182 config GENERIC_CALIBRATE_DELAY
 183         bool
 184         default y
 185
 186 config ARCH_MAY_HAVE_PC_FDC
 187         bool
 188
 189 config ZONE_DMA
 190         bool
 191
 192 config NEED_DMA_MAP_STATE
 193        def_bool y
 194
 195 config ARCH_HAS_DMA_SET_COHERENT_MASK
 196         bool
 197
 198 config GENERIC_ISA_DMA
 199         bool
 200
 201 config FIQ
 202         bool
 203
 204 config NEED_RET_TO_USER
 205         bool
 206
 207 config ARCH_MTD_XIP
 208         bool
 209
 210 config VECTORS_BASE
 211         hex
 212         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 213         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 214         default 0x00000000
 215         help
 216           The base address of exception vectors.
 217
 218 config ARM_PATCH_PHYS_VIRT
 219         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 220         default y
 221         depends on !XIP_KERNEL && MMU
 222         depends on !ARCH_REALVIEW || !SPARSEMEM
 223         help
 224           Patch phys-to-virt and virt-to-phys translation functions at
 225           boot and module load time according to the position of the
 226           kernel in system memory.
 227
 228           This can only be used with non-XIP MMU kernels where the base
 229           of physical memory is at a 16MB boundary.
 230
 231           Only disable this option if you know that you do not require
 232           this feature (eg, building a kernel for a single machine) and
 233           you need to shrink the kernel to the minimal size.
 234
 235 config NEED_MACH_GPIO_H
 236         bool
 237         help
 238           Select this when mach/gpio.h is required to provide special
 239           definitions for this platform. The need for mach/gpio.h should
 240           be avoided when possible.
 241
 242 config NEED_MACH_IO_H
 243         bool
 244         help
 245           Select this when mach/io.h is required to provide special
 246           definitions for this platform.  The need for mach/io.h should
 247           be avoided when possible.
 248
 249 config NEED_MACH_MEMORY_H
 250         bool
 251         help
 252           Select this when mach/memory.h is required to provide special
 253           definitions for this platform.  The need for mach/memory.h should
 254           be avoided when possible.
 255
 256 config PHYS_OFFSET
 257         hex "Physical address of main memory" if MMU
 258         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 259         default DRAM_BASE if !MMU
 260         help
 261           Please provide the physical address corresponding to the
 262           location of main memory in your system.
 263
 264 config GENERIC_BUG
 265         def_bool y
 266         depends on BUG
 267
 268 source "init/Kconfig"
 269
 270 source "kernel/Kconfig.freezer"
 271
 272 menu "System Type"
 273
 274 config MMU
 275         bool "MMU-based Paged Memory Management Support"
 276         default y
 277         help
 278           Select if you want MMU-based virtualised addressing space
 279           support by paged memory management. If unsure, say 'Y'.
 280
 281 #
 282 # The "ARM system type" choice list is ordered alphabetically by option
 283 # text.  Please add new entries in the option alphabetic order.
 284 #
 285 choice
 286         prompt "ARM system type"
 287         default ARCH_VERSATILE if !MMU
 288         default ARCH_MULTIPLATFORM if MMU
 289
 290 config ARCH_MULTIPLATFORM
 291         bool "Allow multiple platforms to be selected"
 292         depends on MMU
 293         select ARM_PATCH_PHYS_VIRT
 294         select AUTO_ZRELADDR
 295         select COMMON_CLK
 296         select MULTI_IRQ_HANDLER
 297         select SPARSE_IRQ
 298         select USE_OF
 299
 300 config ARCH_INTEGRATOR
 301         bool "ARM Ltd. Integrator family"
 302         select ARCH_HAS_CPUFREQ
 303         select ARM_AMBA
 304         select COMMON_CLK
 305         select COMMON_CLK_VERSATILE
 306         select GENERIC_CLOCKEVENTS
 307         select HAVE_TCM
 308         select ICST
 309         select MULTI_IRQ_HANDLER
 310         select NEED_MACH_MEMORY_H
 311         select PLAT_VERSATILE
 312         select SPARSE_IRQ
 313         select VERSATILE_FPGA_IRQ
 314         help
 315           Support for ARM's Integrator platform.
 316
 317 config ARCH_REALVIEW
 318         bool "ARM Ltd. RealView family"
 319         select ARCH_WANT_OPTIONAL_GPIOLIB
 320         select ARM_AMBA
 321         select ARM_TIMER_SP804
 322         select COMMON_CLK
 323         select COMMON_CLK_VERSATILE
 324         select GENERIC_CLOCKEVENTS
 325         select GPIO_PL061 if GPIOLIB
 326         select ICST
 327         select NEED_MACH_MEMORY_H
 328         select PLAT_VERSATILE
 329         select PLAT_VERSATILE_CLCD
 330         help
 331           This enables support for ARM Ltd RealView boards.
 332
 333 config ARCH_VERSATILE
 334         bool "ARM Ltd. Versatile family"
 335         select ARCH_WANT_OPTIONAL_GPIOLIB
 336         select ARM_AMBA
 337         select ARM_TIMER_SP804
 338         select ARM_VIC
 339         select CLKDEV_LOOKUP
 340         select GENERIC_CLOCKEVENTS
 341         select HAVE_MACH_CLKDEV
 342         select ICST
 343         select PLAT_VERSATILE
 344         select PLAT_VERSATILE_CLCD
 345         select PLAT_VERSATILE_CLOCK
 346         select VERSATILE_FPGA_IRQ
 347         help
 348           This enables support for ARM Ltd Versatile board.
 349
 350 config ARCH_AT91
 351         bool "Atmel AT91"
 352         select ARCH_REQUIRE_GPIOLIB
 353         select CLKDEV_LOOKUP
 354         select HAVE_CLK
 355         select IRQ_DOMAIN
 356         select NEED_MACH_GPIO_H
 357         select NEED_MACH_IO_H if PCCARD
 358         select PINCTRL
 359         select PINCTRL_AT91 if USE_OF
 360         help
 361           This enables support for systems based on Atmel
 362           AT91RM9200 and AT91SAM9* processors.
 363
 364 config ARCH_CLPS711X
 365         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 366         select ARCH_REQUIRE_GPIOLIB
 367         select AUTO_ZRELADDR
 368         select CLKDEV_LOOKUP
 369         select COMMON_CLK
 370         select CPU_ARM720T
 371         select GENERIC_CLOCKEVENTS
 372         select MULTI_IRQ_HANDLER
 373         select NEED_MACH_MEMORY_H
 374         select SPARSE_IRQ
 375         help
 376           Support for Cirrus Logic 711x/721x/731x based boards.
 377
 378 config ARCH_GEMINI
 379         bool "Cortina Systems Gemini"
 380         select ARCH_REQUIRE_GPIOLIB
 381         select ARCH_USES_GETTIMEOFFSET
 382         select CPU_FA526
 383         help
 384           Support for the Cortina Systems Gemini family SoCs
 385
 386 config ARCH_EBSA110
 387         bool "EBSA-110"
 388         select ARCH_USES_GETTIMEOFFSET
 389         select CPU_SA110
 390         select ISA
 391         select NEED_MACH_IO_H
 392         select NEED_MACH_MEMORY_H
 393         select NO_IOPORT
 394         help
 395           This is an evaluation board for the StrongARM processor available
 396           from Digital. It has limited hardware on-board, including an
 397           Ethernet interface, two PCMCIA sockets, two serial ports and a
 398           parallel port.
 399
 400 config ARCH_EP93XX
 401         bool "EP93xx-based"
 402         select ARCH_HAS_HOLES_MEMORYMODEL
 403         select ARCH_REQUIRE_GPIOLIB
 404         select ARCH_USES_GETTIMEOFFSET
 405         select ARM_AMBA
 406         select ARM_VIC
 407         select CLKDEV_LOOKUP
 408         select CPU_ARM920T
 409         select NEED_MACH_MEMORY_H
 410         help
 411           This enables support for the Cirrus EP93xx series of CPUs.
 412
 413 config ARCH_FOOTBRIDGE
 414         bool "FootBridge"
 415         select CPU_SA110
 416         select FOOTBRIDGE
 417         select GENERIC_CLOCKEVENTS
 418         select HAVE_IDE
 419         select NEED_MACH_IO_H if !MMU
 420         select NEED_MACH_MEMORY_H
 421         help
 422           Support for systems based on the DC21285 companion chip
 423           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 424
 425 config ARCH_NETX
 426         bool "Hilscher NetX based"
 427         select ARM_VIC
 428         select CLKSRC_MMIO
 429         select CPU_ARM926T
 430         select GENERIC_CLOCKEVENTS
 431         help
 432           This enables support for systems based on the Hilscher NetX Soc
 433
 434 config ARCH_H720X
 435         bool "Hynix HMS720x-based"
 436         select ARCH_USES_GETTIMEOFFSET
 437         select CPU_ARM720T
 438         select ISA_DMA_API
 439         help
 440           This enables support for systems based on the Hynix HMS720x
 441
 442 config ARCH_IOP13XX
 443         bool "IOP13xx-based"
 444         depends on MMU
 445         select ARCH_SUPPORTS_MSI
 446         select CPU_XSC3
 447         select NEED_MACH_MEMORY_H
 448         select NEED_RET_TO_USER
 449         select PCI
 450         select PLAT_IOP
 451         select VMSPLIT_1G
 452         help
 453           Support for Intel's IOP13XX (XScale) family of processors.
 454
 455 config ARCH_IOP32X
 456         bool "IOP32x-based"
 457         depends on MMU
 458         select ARCH_REQUIRE_GPIOLIB
 459         select CPU_XSCALE
 460         select NEED_MACH_GPIO_H
 461         select NEED_RET_TO_USER
 462         select PCI
 463         select PLAT_IOP
 464         help
 465           Support for Intel's 80219 and IOP32X (XScale) family of
 466           processors.
 467
 468 config ARCH_IOP33X
 469         bool "IOP33x-based"
 470         depends on MMU
 471         select ARCH_REQUIRE_GPIOLIB
 472         select CPU_XSCALE
 473         select NEED_MACH_GPIO_H
 474         select NEED_RET_TO_USER
 475         select PCI
 476         select PLAT_IOP
 477         help
 478           Support for Intel's IOP33X (XScale) family of processors.
 479
 480 config ARCH_IXP4XX
 481         bool "IXP4xx-based"
 482         depends on MMU
 483         select ARCH_HAS_DMA_SET_COHERENT_MASK
 484         select ARCH_REQUIRE_GPIOLIB
 485         select CLKSRC_MMIO
 486         select CPU_XSCALE
 487         select DMABOUNCE if PCI
 488         select GENERIC_CLOCKEVENTS
 489         select MIGHT_HAVE_PCI
 490         select NEED_MACH_IO_H
 491         help
 492           Support for Intel's IXP4XX (XScale) family of processors.
 493
 494 config ARCH_DOVE
 495         bool "Marvell Dove"
 496         select ARCH_REQUIRE_GPIOLIB
 497         select CPU_V7
 498         select GENERIC_CLOCKEVENTS
 499         select MIGHT_HAVE_PCI
 500         select PINCTRL
 501         select PINCTRL_DOVE
 502         select PLAT_ORION_LEGACY
 503         select USB_ARCH_HAS_EHCI
 504         help
 505           Support for the Marvell Dove SoC 88AP510
 506
 507 config ARCH_KIRKWOOD
 508         bool "Marvell Kirkwood"
 509         select ARCH_REQUIRE_GPIOLIB
 510         select CPU_FEROCEON
 511         select GENERIC_CLOCKEVENTS
 512         select PCI
 513         select PCI_QUIRKS
 514         select PINCTRL
 515         select PINCTRL_KIRKWOOD
 516         select PLAT_ORION_LEGACY
 517         help
 518           Support for the following Marvell Kirkwood series SoCs:
 519           88F6180, 88F6192 and 88F6281.
 520
 521 config ARCH_MV78XX0
 522         bool "Marvell MV78xx0"
 523         select ARCH_REQUIRE_GPIOLIB
 524         select CPU_FEROCEON
 525         select GENERIC_CLOCKEVENTS
 526         select PCI
 527         select PLAT_ORION_LEGACY
 528         help
 529           Support for the following Marvell MV78xx0 series SoCs:
 530           MV781x0, MV782x0.
 531
 532 config ARCH_ORION5X
 533         bool "Marvell Orion"
 534         depends on MMU
 535         select ARCH_REQUIRE_GPIOLIB
 536         select CPU_FEROCEON
 537         select GENERIC_CLOCKEVENTS
 538         select PCI
 539         select PLAT_ORION_LEGACY
 540         help
 541           Support for the following Marvell Orion 5x series SoCs:
 542           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 543           Orion-2 (5281), Orion-1-90 (6183).
 544
 545 config ARCH_MMP
 546         bool "Marvell PXA168/910/MMP2"
 547         depends on MMU
 548         select ARCH_REQUIRE_GPIOLIB
 549         select CLKDEV_LOOKUP
 550         select GENERIC_ALLOCATOR
 551         select GENERIC_CLOCKEVENTS
 552         select GPIO_PXA
 553         select IRQ_DOMAIN
 554         select NEED_MACH_GPIO_H
 555         select PINCTRL
 556         select PLAT_PXA
 557         select SPARSE_IRQ
 558         help
 559           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 560
 561 config ARCH_KS8695
 562         bool "Micrel/Kendin KS8695"
 563         select ARCH_REQUIRE_GPIOLIB
 564         select CLKSRC_MMIO
 565         select CPU_ARM922T
 566         select GENERIC_CLOCKEVENTS
 567         select NEED_MACH_MEMORY_H
 568         help
 569           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 570           System-on-Chip devices.
 571
 572 config ARCH_W90X900
 573         bool "Nuvoton W90X900 CPU"
 574         select ARCH_REQUIRE_GPIOLIB
 575         select CLKDEV_LOOKUP
 576         select CLKSRC_MMIO
 577         select CPU_ARM926T
 578         select GENERIC_CLOCKEVENTS
 579         help
 580           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 581           At present, the w90x900 has been renamed nuc900, regarding
 582           the ARM series product line, you can login the following
 583           link address to know more.
 584
 585           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 586                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 587
 588 config ARCH_LPC32XX
 589         bool "NXP LPC32XX"
 590         select ARCH_REQUIRE_GPIOLIB
 591         select ARM_AMBA
 592         select CLKDEV_LOOKUP
 593         select CLKSRC_MMIO
 594         select CPU_ARM926T
 595         select GENERIC_CLOCKEVENTS
 596         select HAVE_IDE
 597         select HAVE_PWM
 598         select USB_ARCH_HAS_OHCI
 599         select USE_OF
 600         help
 601           Support for the NXP LPC32XX family of processors
 602
 603 config ARCH_PXA
 604         bool "PXA2xx/PXA3xx-based"
 605         depends on MMU
 606         select ARCH_HAS_CPUFREQ
 607         select ARCH_MTD_XIP
 608         select ARCH_REQUIRE_GPIOLIB
 609         select ARM_CPU_SUSPEND if PM
 610         select AUTO_ZRELADDR
 611         select CLKDEV_LOOKUP
 612         select CLKSRC_MMIO
 613         select GENERIC_CLOCKEVENTS
 614         select GPIO_PXA
 615         select HAVE_IDE
 616         select MULTI_IRQ_HANDLER
 617         select NEED_MACH_GPIO_H
 618         select PLAT_PXA
 619         select SPARSE_IRQ
 620         help
 621           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 622
 623 config ARCH_MSM
 624         bool "Qualcomm MSM"
 625         select ARCH_REQUIRE_GPIOLIB
 626         select CLKDEV_LOOKUP
 627         select GENERIC_CLOCKEVENTS
 628         select HAVE_CLK
 629         help
 630           Support for Qualcomm MSM/QSD based systems.  This runs on the
 631           apps processor of the MSM/QSD and depends on a shared memory
 632           interface to the modem processor which runs the baseband
 633           stack and controls some vital subsystems
 634           (clock and power control, etc).
 635
 636 config ARCH_SHMOBILE
 637         bool "Renesas SH-Mobile / R-Mobile"
 638         select CLKDEV_LOOKUP
 639         select GENERIC_CLOCKEVENTS
 640         select HAVE_ARM_SCU if SMP
 641         select HAVE_ARM_TWD if LOCAL_TIMERS
 642         select HAVE_CLK
 643         select HAVE_MACH_CLKDEV
 644         select HAVE_SMP
 645         select MIGHT_HAVE_CACHE_L2X0
 646         select MULTI_IRQ_HANDLER
 647         select NEED_MACH_MEMORY_H
 648         select NO_IOPORT
 649         select PINCTRL
 650         select PM_GENERIC_DOMAINS if PM
 651         select SPARSE_IRQ
 652         help
 653           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 654
 655 config ARCH_RPC
 656         bool "RiscPC"
 657         select ARCH_ACORN
 658         select ARCH_MAY_HAVE_PC_FDC
 659         select ARCH_SPARSEMEM_ENABLE
 660         select ARCH_USES_GETTIMEOFFSET
 661         select FIQ
 662         select HAVE_IDE
 663         select HAVE_PATA_PLATFORM
 664         select ISA_DMA_API
 665         select NEED_MACH_IO_H
 666         select NEED_MACH_MEMORY_H
 667         select NO_IOPORT
 668         select VIRT_TO_BUS
 669         help
 670           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 671           CD-ROM interface, serial and parallel port, and the floppy drive.
 672
 673 config ARCH_SA1100
 674         bool "SA1100-based"
 675         select ARCH_HAS_CPUFREQ
 676         select ARCH_MTD_XIP
 677         select ARCH_REQUIRE_GPIOLIB
 678         select ARCH_SPARSEMEM_ENABLE
 679         select CLKDEV_LOOKUP
 680         select CLKSRC_MMIO
 681         select CPU_FREQ
 682         select CPU_SA1100
 683         select GENERIC_CLOCKEVENTS
 684         select HAVE_IDE
 685         select ISA
 686         select NEED_MACH_GPIO_H
 687         select NEED_MACH_MEMORY_H
 688         select SPARSE_IRQ
 689         help
 690           Support for StrongARM 11x0 based boards.
 691
 692 config ARCH_S3C24XX
 693         bool "Samsung S3C24XX SoCs"
 694         select ARCH_HAS_CPUFREQ
 695         select ARCH_USES_GETTIMEOFFSET
 696         select CLKDEV_LOOKUP
 697         select HAVE_CLK
 698         select HAVE_S3C2410_I2C if I2C
 699         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 700         select HAVE_S3C_RTC if RTC_CLASS
 701         select NEED_MACH_GPIO_H
 702         select NEED_MACH_IO_H
 703         help
 704           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 705           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 706           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 707           Samsung SMDK2410 development board (and derivatives).
 708
 709 config ARCH_S3C64XX
 710         bool "Samsung S3C64XX"
 711         select ARCH_HAS_CPUFREQ
 712         select ARCH_REQUIRE_GPIOLIB
 713         select ARCH_USES_GETTIMEOFFSET
 714         select ARM_VIC
 715         select CLKDEV_LOOKUP
 716         select CPU_V6
 717         select HAVE_CLK
 718         select HAVE_S3C2410_I2C if I2C
 719         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 720         select HAVE_TCM
 721         select NEED_MACH_GPIO_H
 722         select NO_IOPORT
 723         select PLAT_SAMSUNG
 724         select S3C_DEV_NAND
 725         select S3C_GPIO_TRACK
 726         select SAMSUNG_CLKSRC
 727         select SAMSUNG_GPIOLIB_4BIT
 728         select SAMSUNG_IRQ_VIC_TIMER
 729         select USB_ARCH_HAS_OHCI
 730         help
 731           Samsung S3C64XX series based systems
 732
 733 config ARCH_S5P64X0
 734         bool "Samsung S5P6440 S5P6450"
 735         select CLKDEV_LOOKUP
 736         select CLKSRC_MMIO
 737         select CPU_V6
 738         select GENERIC_CLOCKEVENTS
 739         select HAVE_CLK
 740         select HAVE_S3C2410_I2C if I2C
 741         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 742         select HAVE_S3C_RTC if RTC_CLASS
 743         select NEED_MACH_GPIO_H
 744         help
 745           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 746           SMDK6450.
 747
 748 config ARCH_S5PC100
 749         bool "Samsung S5PC100"
 750         select ARCH_USES_GETTIMEOFFSET
 751         select CLKDEV_LOOKUP
 752         select CPU_V7
 753         select HAVE_CLK
 754         select HAVE_S3C2410_I2C if I2C
 755         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 756         select HAVE_S3C_RTC if RTC_CLASS
 757         select NEED_MACH_GPIO_H
 758         help
 759           Samsung S5PC100 series based systems
 760
 761 config ARCH_S5PV210
 762         bool "Samsung S5PV210/S5PC110"
 763         select ARCH_HAS_CPUFREQ
 764         select ARCH_HAS_HOLES_MEMORYMODEL
 765         select ARCH_SPARSEMEM_ENABLE
 766         select CLKDEV_LOOKUP
 767         select CLKSRC_MMIO
 768         select CPU_V7
 769         select GENERIC_CLOCKEVENTS
 770         select HAVE_CLK
 771         select HAVE_S3C2410_I2C if I2C
 772         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 773         select HAVE_S3C_RTC if RTC_CLASS
 774         select NEED_MACH_GPIO_H
 775         select NEED_MACH_MEMORY_H
 776         help
 777           Samsung S5PV210/S5PC110 series based systems
 778
 779 config ARCH_EXYNOS
 780         bool "Samsung EXYNOS"
 781         select ARCH_HAS_CPUFREQ
 782         select ARCH_HAS_HOLES_MEMORYMODEL
 783         select ARCH_SPARSEMEM_ENABLE
 784         select CLKDEV_LOOKUP
 785         select CPU_V7
 786         select GENERIC_CLOCKEVENTS
 787         select HAVE_CLK
 788         select HAVE_S3C2410_I2C if I2C
 789         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 790         select HAVE_S3C_RTC if RTC_CLASS
 791         select NEED_MACH_GPIO_H
 792         select NEED_MACH_MEMORY_H
 793         help
 794           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 795
 796 config ARCH_SHARK
 797         bool "Shark"
 798         select ARCH_USES_GETTIMEOFFSET
 799         select CPU_SA110
 800         select ISA
 801         select ISA_DMA
 802         select NEED_MACH_MEMORY_H
 803         select PCI
 804         select VIRT_TO_BUS
 805         select ZONE_DMA
 806         help
 807           Support for the StrongARM based Digital DNARD machine, also known
 808           as "Shark" (<http://www.shark-linux.de/shark.html>).
 809
 810 config ARCH_U300
 811         bool "ST-Ericsson U300 Series"
 812         depends on MMU
 813         select ARCH_REQUIRE_GPIOLIB
 814         select ARM_AMBA
 815         select ARM_PATCH_PHYS_VIRT
 816         select ARM_VIC
 817         select CLKDEV_LOOKUP
 818         select CLKSRC_MMIO
 819         select COMMON_CLK
 820         select CPU_ARM926T
 821         select GENERIC_CLOCKEVENTS
 822         select HAVE_TCM
 823         select SPARSE_IRQ
 824         help
 825           Support for ST-Ericsson U300 series mobile platforms.
 826
 827 config ARCH_DAVINCI
 828         bool "TI DaVinci"
 829         select ARCH_HAS_HOLES_MEMORYMODEL
 830         select ARCH_REQUIRE_GPIOLIB
 831         select CLKDEV_LOOKUP
 832         select GENERIC_ALLOCATOR
 833         select GENERIC_CLOCKEVENTS
 834         select GENERIC_IRQ_CHIP
 835         select HAVE_IDE
 836         select NEED_MACH_GPIO_H
 837         select USE_OF
 838         select ZONE_DMA
 839         help
 840           Support for TI's DaVinci platform.
 841
 842 config ARCH_OMAP1
 843         bool "TI OMAP1"
 844         depends on MMU
 845         select ARCH_HAS_CPUFREQ
 846         select ARCH_HAS_HOLES_MEMORYMODEL
 847         select ARCH_OMAP
 848         select ARCH_REQUIRE_GPIOLIB
 849         select CLKDEV_LOOKUP
 850         select CLKSRC_MMIO
 851         select GENERIC_CLOCKEVENTS
 852         select GENERIC_IRQ_CHIP
 853         select HAVE_CLK
 854         select HAVE_IDE
 855         select IRQ_DOMAIN
 856         select NEED_MACH_IO_H if PCCARD
 857         select NEED_MACH_MEMORY_H
 858         help
 859           Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
 860
 861 endchoice
 862
 863 menu "Multiple platform selection"
 864         depends on ARCH_MULTIPLATFORM
 865
 866 comment "CPU Core family selection"
 867
 868 config ARCH_MULTI_V4
 869         bool "ARMv4 based platforms (FA526, StrongARM)"
 870         depends on !ARCH_MULTI_V6_V7
 871         select ARCH_MULTI_V4_V5
 872
 873 config ARCH_MULTI_V4T
 874         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
 875         depends on !ARCH_MULTI_V6_V7
 876         select ARCH_MULTI_V4_V5
 877
 878 config ARCH_MULTI_V5
 879         bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
 880         depends on !ARCH_MULTI_V6_V7
 881         select ARCH_MULTI_V4_V5
 882
 883 config ARCH_MULTI_V4_V5
 884         bool
 885
 886 config ARCH_MULTI_V6
 887         bool "ARMv6 based platforms (ARM11)"
 888         select ARCH_MULTI_V6_V7
 889         select CPU_V6
 890
 891 config ARCH_MULTI_V7
 892         bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
 893         default y
 894         select ARCH_MULTI_V6_V7
 895         select ARCH_VEXPRESS
 896         select CPU_V7
 897
 898 config ARCH_MULTI_V6_V7
 899         bool
 900
 901 config ARCH_MULTI_CPU_AUTO
 902         def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
 903         select ARCH_MULTI_V5
 904
 905 endmenu
 906
 907 #
 908 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 909 # Kconfigs may be included either alphabetically (according to the
 910 # plat- suffix) or along side the corresponding mach-* source.
 911 #
 912 source "arch/arm/mach-mvebu/Kconfig"
 913
 914 source "arch/arm/mach-at91/Kconfig"
 915
 916 source "arch/arm/mach-bcm/Kconfig"
 917
 918 source "arch/arm/mach-bcm2835/Kconfig"
 919
 920 source "arch/arm/mach-clps711x/Kconfig"
 921
 922 source "arch/arm/mach-cns3xxx/Kconfig"
 923
 924 source "arch/arm/mach-davinci/Kconfig"
 925
 926 source "arch/arm/mach-dove/Kconfig"
 927
 928 source "arch/arm/mach-ep93xx/Kconfig"
 929
 930 source "arch/arm/mach-footbridge/Kconfig"
 931
 932 source "arch/arm/mach-gemini/Kconfig"
 933
 934 source "arch/arm/mach-h720x/Kconfig"
 935
 936 source "arch/arm/mach-highbank/Kconfig"
 937
 938 source "arch/arm/mach-integrator/Kconfig"
 939
 940 source "arch/arm/mach-iop32x/Kconfig"
 941
 942 source "arch/arm/mach-iop33x/Kconfig"
 943
 944 source "arch/arm/mach-iop13xx/Kconfig"
 945
 946 source "arch/arm/mach-ixp4xx/Kconfig"
 947
 948 source "arch/arm/mach-kirkwood/Kconfig"
 949
 950 source "arch/arm/mach-ks8695/Kconfig"
 951
 952 source "arch/arm/mach-msm/Kconfig"
 953
 954 source "arch/arm/mach-mv78xx0/Kconfig"
 955
 956 source "arch/arm/mach-imx/Kconfig"
 957
 958 source "arch/arm/mach-mxs/Kconfig"
 959
 960 source "arch/arm/mach-netx/Kconfig"
 961
 962 source "arch/arm/mach-nomadik/Kconfig"
 963
 964 source "arch/arm/plat-omap/Kconfig"
 965
 966 source "arch/arm/mach-omap1/Kconfig"
 967
 968 source "arch/arm/mach-omap2/Kconfig"
 969
 970 source "arch/arm/mach-orion5x/Kconfig"
 971
 972 source "arch/arm/mach-picoxcell/Kconfig"
 973
 974 source "arch/arm/mach-pxa/Kconfig"
 975 source "arch/arm/plat-pxa/Kconfig"
 976
 977 source "arch/arm/mach-mmp/Kconfig"
 978
 979 source "arch/arm/mach-realview/Kconfig"
 980
 981 source "arch/arm/mach-sa1100/Kconfig"
 982
 983 source "arch/arm/plat-samsung/Kconfig"
 984
 985 source "arch/arm/mach-socfpga/Kconfig"
 986
 987 source "arch/arm/mach-spear/Kconfig"
 988
 989 source "arch/arm/mach-s3c24xx/Kconfig"
 990
 991 if ARCH_S3C64XX
 992 source "arch/arm/mach-s3c64xx/Kconfig"
 993 endif
 994
 995 source "arch/arm/mach-s5p64x0/Kconfig"
 996
 997 source "arch/arm/mach-s5pc100/Kconfig"
 998
 999 source "arch/arm/mach-s5pv210/Kconfig"
1000
1001 source "arch/arm/mach-exynos/Kconfig"
1002
1003 source "arch/arm/mach-shmobile/Kconfig"
1004
1005 source "arch/arm/mach-sunxi/Kconfig"
1006
1007 source "arch/arm/mach-prima2/Kconfig"
1008
1009 source "arch/arm/mach-tegra/Kconfig"
1010
1011 source "arch/arm/mach-u300/Kconfig"
1012
1013 source "arch/arm/mach-ux500/Kconfig"
1014
1015 source "arch/arm/mach-versatile/Kconfig"
1016
1017 source "arch/arm/mach-vexpress/Kconfig"
1018 source "arch/arm/plat-versatile/Kconfig"
1019
1020 source "arch/arm/mach-virt/Kconfig"
1021
1022 source "arch/arm/mach-vt8500/Kconfig"
1023
1024 source "arch/arm/mach-w90x900/Kconfig"
1025
1026 source "arch/arm/mach-zynq/Kconfig"
1027
1028 # Definitions to make life easier
1029 config ARCH_ACORN
1030         bool
1031
1032 config PLAT_IOP
1033         bool
1034         select GENERIC_CLOCKEVENTS
1035
1036 config PLAT_ORION
1037         bool
1038         select CLKSRC_MMIO
1039         select COMMON_CLK
1040         select GENERIC_IRQ_CHIP
1041         select IRQ_DOMAIN
1042
1043 config PLAT_ORION_LEGACY
1044         bool
1045         select PLAT_ORION
1046
1047 config PLAT_PXA
1048         bool
1049
1050 config PLAT_VERSATILE
1051         bool
1052
1053 config ARM_TIMER_SP804
1054         bool
1055         select CLKSRC_MMIO
1056         select HAVE_SCHED_CLOCK
1057
1058 source arch/arm/mm/Kconfig
1059
1060 config ARM_NR_BANKS
1061         int
1062         default 16 if ARCH_EP93XX
1063         default 8
1064
1065 config IWMMXT
1066         bool "Enable iWMMXt support"
1067         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1068         default y if PXA27x || PXA3xx || ARCH_MMP
1069         help
1070           Enable support for iWMMXt context switching at run time if
1071           running on a CPU that supports it.
1072
1073 config XSCALE_PMU
1074         bool
1075         depends on CPU_XSCALE
1076         default y
1077
1078 config MULTI_IRQ_HANDLER
1079         bool
1080         help
1081           Allow each machine to specify it's own IRQ handler at run time.
1082
1083 if !MMU
1084 source "arch/arm/Kconfig-nommu"
1085 endif
1086
1087 config ARM_ERRATA_326103
1088         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1089         depends on CPU_V6
1090         help
1091           Executing a SWP instruction to read-only memory does not set bit 11
1092           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1093           treat the access as a read, preventing a COW from occurring and
1094           causing the faulting task to livelock.
1095
1096 config ARM_ERRATA_411920
1097         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1098         depends on CPU_V6 || CPU_V6K
1099         help
1100           Invalidation of the Instruction Cache operation can
1101           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1102           It does not affect the MPCore. This option enables the ARM Ltd.
1103           recommended workaround.
1104
1105 config ARM_ERRATA_430973
1106         bool "ARM errata: Stale prediction on replaced interworking branch"
1107         depends on CPU_V7
1108         help
1109           This option enables the workaround for the 430973 Cortex-A8
1110           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1111           interworking branch is replaced with another code sequence at the
1112           same virtual address, whether due to self-modifying code or virtual
1113           to physical address re-mapping, Cortex-A8 does not recover from the
1114           stale interworking branch prediction. This results in Cortex-A8
1115           executing the new code sequence in the incorrect ARM or Thumb state.
1116           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1117           and also flushes the branch target cache at every context switch.
1118           Note that setting specific bits in the ACTLR register may not be
1119           available in non-secure mode.
1120
1121 config ARM_ERRATA_458693
1122         bool "ARM errata: Processor deadlock when a false hazard is created"
1123         depends on CPU_V7
1124         depends on !ARCH_MULTIPLATFORM
1125         help
1126           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1127           erratum. For very specific sequences of memory operations, it is
1128           possible for a hazard condition intended for a cache line to instead
1129           be incorrectly associated with a different cache line. This false
1130           hazard might then cause a processor deadlock. The workaround enables
1131           the L1 caching of the NEON accesses and disables the PLD instruction
1132           in the ACTLR register. Note that setting specific bits in the ACTLR
1133           register may not be available in non-secure mode.
1134
1135 config ARM_ERRATA_460075
1136         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1137         depends on CPU_V7
1138         depends on !ARCH_MULTIPLATFORM
1139         help
1140           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1141           erratum. Any asynchronous access to the L2 cache may encounter a
1142           situation in which recent store transactions to the L2 cache are lost
1143           and overwritten with stale memory contents from external memory. The
1144           workaround disables the write-allocate mode for the L2 cache via the
1145           ACTLR register. Note that setting specific bits in the ACTLR register
1146           may not be available in non-secure mode.
1147
1148 config ARM_ERRATA_742230
1149         bool "ARM errata: DMB operation may be faulty"
1150         depends on CPU_V7 && SMP
1151         depends on !ARCH_MULTIPLATFORM
1152         help
1153           This option enables the workaround for the 742230 Cortex-A9
1154           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1155           between two write operations may not ensure the correct visibility
1156           ordering of the two writes. This workaround sets a specific bit in
1157           the diagnostic register of the Cortex-A9 which causes the DMB
1158           instruction to behave as a DSB, ensuring the correct behaviour of
1159           the two writes.
1160
1161 config ARM_ERRATA_742231
1162         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1163         depends on CPU_V7 && SMP
1164         depends on !ARCH_MULTIPLATFORM
1165         help
1166           This option enables the workaround for the 742231 Cortex-A9
1167           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1168           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1169           accessing some data located in the same cache line, may get corrupted
1170           data due to bad handling of the address hazard when the line gets
1171           replaced from one of the CPUs at the same time as another CPU is
1172           accessing it. This workaround sets specific bits in the diagnostic
1173           register of the Cortex-A9 which reduces the linefill issuing
1174           capabilities of the processor.
1175
1176 config PL310_ERRATA_588369
1177         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1178         depends on CACHE_L2X0
1179         help
1180            The PL310 L2 cache controller implements three types of Clean &
1181            Invalidate maintenance operations: by Physical Address
1182            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1183            They are architecturally defined to behave as the execution of a
1184            clean operation followed immediately by an invalidate operation,
1185            both performing to the same memory location. This functionality
1186            is not correctly implemented in PL310 as clean lines are not
1187            invalidated as a result of these operations.
1188
1189 config ARM_ERRATA_720789
1190         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1191         depends on CPU_V7
1192         help
1193           This option enables the workaround for the 720789 Cortex-A9 (prior to
1194           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1195           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1196           As a consequence of this erratum, some TLB entries which should be
1197           invalidated are not, resulting in an incoherency in the system page
1198           tables. The workaround changes the TLB flushing routines to invalidate
1199           entries regardless of the ASID.
1200
1201 config PL310_ERRATA_727915
1202         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1203         depends on CACHE_L2X0
1204         help
1205           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1206           operation (offset 0x7FC). This operation runs in background so that
1207           PL310 can handle normal accesses while it is in progress. Under very
1208           rare circumstances, due to this erratum, write data can be lost when
1209           PL310 treats a cacheable write transaction during a Clean &
1210           Invalidate by Way operation.
1211
1212 config ARM_ERRATA_743622
1213         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1214         depends on CPU_V7
1215         depends on !ARCH_MULTIPLATFORM
1216         help
1217           This option enables the workaround for the 743622 Cortex-A9
1218           (r2p*) erratum. Under very rare conditions, a faulty
1219           optimisation in the Cortex-A9 Store Buffer may lead to data
1220           corruption. This workaround sets a specific bit in the diagnostic
1221           register of the Cortex-A9 which disables the Store Buffer
1222           optimisation, preventing the defect from occurring. This has no
1223           visible impact on the overall performance or power consumption of the
1224           processor.
1225
1226 config ARM_ERRATA_751472
1227         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1228         depends on CPU_V7
1229         depends on !ARCH_MULTIPLATFORM
1230         help
1231           This option enables the workaround for the 751472 Cortex-A9 (prior
1232           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1233           completion of a following broadcasted operation if the second
1234           operation is received by a CPU before the ICIALLUIS has completed,
1235           potentially leading to corrupted entries in the cache or TLB.
1236
1237 config PL310_ERRATA_753970
1238         bool "PL310 errata: cache sync operation may be faulty"
1239         depends on CACHE_PL310
1240         help
1241           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1242
1243           Under some condition the effect of cache sync operation on
1244           the store buffer still remains when the operation completes.
1245           This means that the store buffer is always asked to drain and
1246           this prevents it from merging any further writes. The workaround
1247           is to replace the normal offset of cache sync operation (0x730)
1248           by another offset targeting an unmapped PL310 register 0x740.
1249           This has the same effect as the cache sync operation: store buffer
1250           drain and waiting for all buffers empty.
1251
1252 config ARM_ERRATA_754322
1253         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1254         depends on CPU_V7
1255         help
1256           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1257           r3p*) erratum. A speculative memory access may cause a page table walk
1258           which starts prior to an ASID switch but completes afterwards. This
1259           can populate the micro-TLB with a stale entry which may be hit with
1260           the new ASID. This workaround places two dsb instructions in the mm
1261           switching code so that no page table walks can cross the ASID switch.
1262
1263 config ARM_ERRATA_754327
1264         bool "ARM errata: no automatic Store Buffer drain"
1265         depends on CPU_V7 && SMP
1266         help
1267           This option enables the workaround for the 754327 Cortex-A9 (prior to
1268           r2p0) erratum. The Store Buffer does not have any automatic draining
1269           mechanism and therefore a livelock may occur if an external agent
1270           continuously polls a memory location waiting to observe an update.
1271           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1272           written polling loops from denying visibility of updates to memory.
1273
1274 config ARM_ERRATA_364296
1275         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1276         depends on CPU_V6 && !SMP
1277         help
1278           This options enables the workaround for the 364296 ARM1136
1279           r0p2 erratum (possible cache data corruption with
1280           hit-under-miss enabled). It sets the undocumented bit 31 in
1281           the auxiliary control register and the FI bit in the control
1282           register, thus disabling hit-under-miss without putting the
1283           processor into full low interrupt latency mode. ARM11MPCore
1284           is not affected.
1285
1286 config ARM_ERRATA_764369
1287         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1288         depends on CPU_V7 && SMP
1289         help
1290           This option enables the workaround for erratum 764369
1291           affecting Cortex-A9 MPCore with two or more processors (all
1292           current revisions). Under certain timing circumstances, a data
1293           cache line maintenance operation by MVA targeting an Inner
1294           Shareable memory region may fail to proceed up to either the
1295           Point of Coherency or to the Point of Unification of the
1296           system. This workaround adds a DSB instruction before the
1297           relevant cache maintenance functions and sets a specific bit
1298           in the diagnostic control register of the SCU.
1299
1300 config PL310_ERRATA_769419
1301         bool "PL310 errata: no automatic Store Buffer drain"
1302         depends on CACHE_L2X0
1303         help
1304           On revisions of the PL310 prior to r3p2, the Store Buffer does
1305           not automatically drain. This can cause normal, non-cacheable
1306           writes to be retained when the memory system is idle, leading
1307           to suboptimal I/O performance for drivers using coherent DMA.
1308           This option adds a write barrier to the cpu_idle loop so that,
1309           on systems with an outer cache, the store buffer is drained
1310           explicitly.
1311
1312 config ARM_ERRATA_775420
1313        bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1314        depends on CPU_V7
1315        help
1316          This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1317          r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1318          operation aborts with MMU exception, it might cause the processor
1319          to deadlock. This workaround puts DSB before executing ISB if
1320          an abort may occur on cache maintenance.
1321
1322 endmenu
1323
1324 source "arch/arm/common/Kconfig"
1325
1326 menu "Bus support"
1327
1328 config ARM_AMBA
1329         bool
1330
1331 config ISA
1332         bool
1333         help
1334           Find out whether you have ISA slots on your motherboard.  ISA is the
1335           name of a bus system, i.e. the way the CPU talks to the other stuff
1336           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1337           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1338           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1339
1340 # Select ISA DMA controller support
1341 config ISA_DMA
1342         bool
1343         select ISA_DMA_API
1344
1345 # Select ISA DMA interface
1346 config ISA_DMA_API
1347         bool
1348
1349 config PCI
1350         bool "PCI support" if MIGHT_HAVE_PCI
1351         help
1352           Find out whether you have a PCI motherboard. PCI is the name of a
1353           bus system, i.e. the way the CPU talks to the other stuff inside
1354           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1355           VESA. If you have PCI, say Y, otherwise N.
1356
1357 config PCI_DOMAINS
1358         bool
1359         depends on PCI
1360
1361 config PCI_NANOENGINE
1362         bool "BSE nanoEngine PCI support"
1363         depends on SA1100_NANOENGINE
1364         help
1365           Enable PCI on the BSE nanoEngine board.
1366
1367 config PCI_SYSCALL
1368         def_bool PCI
1369
1370 # Select the host bridge type
1371 config PCI_HOST_VIA82C505
1372         bool
1373         depends on PCI && ARCH_SHARK
1374         default y
1375
1376 config PCI_HOST_ITE8152
1377         bool
1378         depends on PCI && MACH_ARMCORE
1379         default y
1380         select DMABOUNCE
1381
1382 source "drivers/pci/Kconfig"
1383
1384 source "drivers/pcmcia/Kconfig"
1385
1386 endmenu
1387
1388 menu "Kernel Features"
1389
1390 config HAVE_SMP
1391         bool
1392         help
1393           This option should be selected by machines which have an SMP-
1394           capable CPU.
1395
1396           The only effect of this option is to make the SMP-related
1397           options available to the user for configuration.
1398
1399 config SMP
1400         bool "Symmetric Multi-Processing"
1401         depends on CPU_V6K || CPU_V7
1402         depends on GENERIC_CLOCKEVENTS
1403         depends on HAVE_SMP
1404         depends on MMU
1405         select USE_GENERIC_SMP_HELPERS
1406         help
1407           This enables support for systems with more than one CPU. If you have
1408           a system with only one CPU, like most personal computers, say N. If
1409           you have a system with more than one CPU, say Y.
1410
1411           If you say N here, the kernel will run on single and multiprocessor
1412           machines, but will use only one CPU of a multiprocessor machine. If
1413           you say Y here, the kernel will run on many, but not all, single
1414           processor machines. On a single processor machine, the kernel will
1415           run faster if you say N here.
1416
1417           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1418           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1419           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1420
1421           If you don't know what to do here, say N.
1422
1423 config SMP_ON_UP
1424         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1425         depends on SMP && !XIP_KERNEL
1426         default y
1427         help
1428           SMP kernels contain instructions which fail on non-SMP processors.
1429           Enabling this option allows the kernel to modify itself to make
1430           these instructions safe.  Disabling it allows about 1K of space
1431           savings.
1432
1433           If you don't know what to do here, say Y.
1434
1435 config ARM_CPU_TOPOLOGY
1436         bool "Support cpu topology definition"
1437         depends on SMP && CPU_V7
1438         default y
1439         help
1440           Support ARM cpu topology definition. The MPIDR register defines
1441           affinity between processors which is then used to describe the cpu
1442           topology of an ARM System.
1443
1444 config SCHED_MC
1445         bool "Multi-core scheduler support"
1446         depends on ARM_CPU_TOPOLOGY
1447         help
1448           Multi-core scheduler support improves the CPU scheduler's decision
1449           making when dealing with multi-core CPU chips at a cost of slightly
1450           increased overhead in some places. If unsure say N here.
1451
1452 config SCHED_SMT
1453         bool "SMT scheduler support"
1454         depends on ARM_CPU_TOPOLOGY
1455         help
1456           Improves the CPU scheduler's decision making when dealing with
1457           MultiThreading at a cost of slightly increased overhead in some
1458           places. If unsure say N here.
1459
1460 config HAVE_ARM_SCU
1461         bool
1462         help
1463           This option enables support for the ARM system coherency unit
1464
1465 config HAVE_ARM_ARCH_TIMER
1466         bool "Architected timer support"
1467         depends on CPU_V7
1468         select ARM_ARCH_TIMER
1469         help
1470           This option enables support for the ARM architected timer
1471
1472 config HAVE_ARM_TWD
1473         bool
1474         depends on SMP
1475         select CLKSRC_OF if OF
1476         help
1477           This options enables support for the ARM timer and watchdog unit
1478
1479 choice
1480         prompt "Memory split"
1481         default VMSPLIT_3G
1482         help
1483           Select the desired split between kernel and user memory.
1484
1485           If you are not absolutely sure what you are doing, leave this
1486           option alone!
1487
1488         config VMSPLIT_3G
1489                 bool "3G/1G user/kernel split"
1490         config VMSPLIT_2G
1491                 bool "2G/2G user/kernel split"
1492         config VMSPLIT_1G
1493                 bool "1G/3G user/kernel split"
1494 endchoice
1495
1496 config PAGE_OFFSET
1497         hex
1498         default 0x40000000 if VMSPLIT_1G
1499         default 0x80000000 if VMSPLIT_2G
1500         default 0xC0000000
1501
1502 config NR_CPUS
1503         int "Maximum number of CPUs (2-32)"
1504         range 2 32
1505         depends on SMP
1506         default "4"
1507
1508 config HOTPLUG_CPU
1509         bool "Support for hot-pluggable CPUs"
1510         depends on SMP && HOTPLUG
1511         help
1512           Say Y here to experiment with turning CPUs off and on.  CPUs
1513           can be controlled through /sys/devices/system/cpu.
1514
1515 config ARM_PSCI
1516         bool "Support for the ARM Power State Coordination Interface (PSCI)"
1517         depends on CPU_V7
1518         help
1519           Say Y here if you want Linux to communicate with system firmware
1520           implementing the PSCI specification for CPU-centric power
1521           management operations described in ARM document number ARM DEN
1522           0022A ("Power State Coordination Interface System Software on
1523           ARM processors").
1524
1525 config LOCAL_TIMERS
1526         bool "Use local timer interrupts"
1527         depends on SMP
1528         default y
1529         help
1530           Enable support for local timers on SMP platforms, rather then the
1531           legacy IPI broadcast method.  Local timers allows the system
1532           accounting to be spread across the timer interval, preventing a
1533           "thundering herd" at every timer tick.
1534
1535 # The GPIO number here must be sorted by descending number. In case of
1536 # a multiplatform kernel, we just want the highest value required by the
1537 # selected platforms.
1538 config ARCH_NR_GPIO
1539         int
1540         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1541         default 512 if SOC_OMAP5
1542         default 355 if ARCH_U8500
1543         default 288 if ARCH_VT8500 || ARCH_SUNXI
1544         default 264 if MACH_H4700
1545         default 0
1546         help
1547           Maximum number of GPIOs in the system.
1548
1549           If unsure, leave the default value.
1550
1551 source kernel/Kconfig.preempt
1552
1553 config HZ
1554         int
1555         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1556                 ARCH_S5PV210 || ARCH_EXYNOS4
1557         default AT91_TIMER_HZ if ARCH_AT91
1558         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1559         default 100
1560
1561 config SCHED_HRTICK
1562         def_bool HIGH_RES_TIMERS
1563
1564 config THUMB2_KERNEL
1565         bool "Compile the kernel in Thumb-2 mode"
1566         depends on CPU_V7 && !CPU_V6 && !CPU_V6K
1567         select AEABI
1568         select ARM_ASM_UNIFIED
1569         select ARM_UNWIND
1570         help
1571           By enabling this option, the kernel will be compiled in
1572           Thumb-2 mode. A compiler/assembler that understand the unified
1573           ARM-Thumb syntax is needed.
1574
1575           If unsure, say N.
1576
1577 config THUMB2_AVOID_R_ARM_THM_JUMP11
1578         bool "Work around buggy Thumb-2 short branch relocations in gas"
1579         depends on THUMB2_KERNEL && MODULES
1580         default y
1581         help
1582           Various binutils versions can resolve Thumb-2 branches to
1583           locally-defined, preemptible global symbols as short-range "b.n"
1584           branch instructions.
1585
1586           This is a problem, because there's no guarantee the final
1587           destination of the symbol, or any candidate locations for a
1588           trampoline, are within range of the branch.  For this reason, the
1589           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1590           relocation in modules at all, and it makes little sense to add
1591           support.
1592
1593           The symptom is that the kernel fails with an "unsupported
1594           relocation" error when loading some modules.
1595
1596           Until fixed tools are available, passing
1597           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1598           code which hits this problem, at the cost of a bit of extra runtime
1599           stack usage in some cases.
1600
1601           The problem is described in more detail at:
1602               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1603
1604           Only Thumb-2 kernels are affected.
1605
1606           Unless you are sure your tools don't have this problem, say Y.
1607
1608 config ARM_ASM_UNIFIED
1609         bool
1610
1611 config AEABI
1612         bool "Use the ARM EABI to compile the kernel"
1613         help
1614           This option allows for the kernel to be compiled using the latest
1615           ARM ABI (aka EABI).  This is only useful if you are using a user
1616           space environment that is also compiled with EABI.
1617
1618           Since there are major incompatibilities between the legacy ABI and
1619           EABI, especially with regard to structure member alignment, this
1620           option also changes the kernel syscall calling convention to
1621           disambiguate both ABIs and allow for backward compatibility support
1622           (selected with CONFIG_OABI_COMPAT).
1623
1624           To use this you need GCC version 4.0.0 or later.
1625
1626 config OABI_COMPAT
1627         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1628         depends on AEABI && !THUMB2_KERNEL
1629         default y
1630         help
1631           This option preserves the old syscall interface along with the
1632           new (ARM EABI) one. It also provides a compatibility layer to
1633           intercept syscalls that have structure arguments which layout
1634           in memory differs between the legacy ABI and the new ARM EABI
1635           (only for non "thumb" binaries). This option adds a tiny
1636           overhead to all syscalls and produces a slightly larger kernel.
1637           If you know you'll be using only pure EABI user space then you
1638           can say N here. If this option is not selected and you attempt
1639           to execute a legacy ABI binary then the result will be
1640           UNPREDICTABLE (in fact it can be predicted that it won't work
1641           at all). If in doubt say Y.
1642
1643 config ARCH_HAS_HOLES_MEMORYMODEL
1644         bool
1645
1646 config ARCH_SPARSEMEM_ENABLE
1647         bool
1648
1649 config ARCH_SPARSEMEM_DEFAULT
1650         def_bool ARCH_SPARSEMEM_ENABLE
1651
1652 config ARCH_SELECT_MEMORY_MODEL
1653         def_bool ARCH_SPARSEMEM_ENABLE
1654
1655 config HAVE_ARCH_PFN_VALID
1656         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1657
1658 config HIGHMEM
1659         bool "High Memory Support"
1660         depends on MMU
1661         help
1662           The address space of ARM processors is only 4 Gigabytes large
1663           and it has to accommodate user address space, kernel address
1664           space as well as some memory mapped IO. That means that, if you
1665           have a large amount of physical memory and/or IO, not all of the
1666           memory can be "permanently mapped" by the kernel. The physical
1667           memory that is not permanently mapped is called "high memory".
1668
1669           Depending on the selected kernel/user memory split, minimum
1670           vmalloc space and actual amount of RAM, you may not need this
1671           option which should result in a slightly faster kernel.
1672
1673           If unsure, say n.
1674
1675 config HIGHPTE
1676         bool "Allocate 2nd-level pagetables from highmem"
1677         depends on HIGHMEM
1678
1679 config HW_PERF_EVENTS
1680         bool "Enable hardware performance counter support for perf events"
1681         depends on PERF_EVENTS
1682         default y
1683         help
1684           Enable hardware performance counter support for perf events. If
1685           disabled, perf events will use software events only.
1686
1687 source "mm/Kconfig"
1688
1689 config FORCE_MAX_ZONEORDER
1690         int "Maximum zone order" if ARCH_SHMOBILE
1691         range 11 64 if ARCH_SHMOBILE
1692         default "12" if SOC_AM33XX
1693         default "9" if SA1111
1694         default "11"
1695         help
1696           The kernel memory allocator divides physically contiguous memory
1697           blocks into "zones", where each zone is a power of two number of
1698           pages.  This option selects the largest power of two that the kernel
1699           keeps in the memory allocator.  If you need to allocate very large
1700           blocks of physically contiguous memory, then you may need to
1701           increase this value.
1702
1703           This config option is actually maximum order plus one. For example,
1704           a value of 11 means that the largest free memory block is 2^10 pages.
1705
1706 config ALIGNMENT_TRAP
1707         bool
1708         depends on CPU_CP15_MMU
1709         default y if !ARCH_EBSA110
1710         select HAVE_PROC_CPU if PROC_FS
1711         help
1712           ARM processors cannot fetch/store information which is not
1713           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1714           address divisible by 4. On 32-bit ARM processors, these non-aligned
1715           fetch/store instructions will be emulated in software if you say
1716           here, which has a severe performance impact. This is necessary for
1717           correct operation of some network protocols. With an IP-only
1718           configuration it is safe to say N, otherwise say Y.
1719
1720 config UACCESS_WITH_MEMCPY
1721         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1722         depends on MMU
1723         default y if CPU_FEROCEON
1724         help
1725           Implement faster copy_to_user and clear_user methods for CPU
1726           cores where a 8-word STM instruction give significantly higher
1727           memory write throughput than a sequence of individual 32bit stores.
1728
1729           A possible side effect is a slight increase in scheduling latency
1730           between threads sharing the same address space if they invoke
1731           such copy operations with large buffers.
1732
1733           However, if the CPU data cache is using a write-allocate mode,
1734           this option is unlikely to provide any performance gain.
1735
1736 config SECCOMP
1737         bool
1738         prompt "Enable seccomp to safely compute untrusted bytecode"
1739         ---help---
1740           This kernel feature is useful for number crunching applications
1741           that may need to compute untrusted bytecode during their
1742           execution. By using pipes or other transports made available to
1743           the process as file descriptors supporting the read/write
1744           syscalls, it's possible to isolate those applications in
1745           their own address space using seccomp. Once seccomp is
1746           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1747           and the task is only allowed to execute a few safe syscalls
1748           defined by each seccomp mode.
1749
1750 config CC_STACKPROTECTOR
1751         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1752         help
1753           This option turns on the -fstack-protector GCC feature. This
1754           feature puts, at the beginning of functions, a canary value on
1755           the stack just before the return address, and validates
1756           the value just before actually returning.  Stack based buffer
1757           overflows (that need to overwrite this return address) now also
1758           overwrite the canary, which gets detected and the attack is then
1759           neutralized via a kernel panic.
1760           This feature requires gcc version 4.2 or above.
1761
1762 config XEN_DOM0
1763         def_bool y
1764         depends on XEN
1765
1766 config XEN
1767         bool "Xen guest support on ARM (EXPERIMENTAL)"
1768         depends on ARM && AEABI && OF
1769         depends on CPU_V7 && !CPU_V6
1770         depends on !GENERIC_ATOMIC64
1771         help
1772           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1773
1774 endmenu
1775
1776 menu "Boot options"
1777
1778 config USE_OF
1779         bool "Flattened Device Tree support"
1780         select IRQ_DOMAIN
1781         select OF
1782         select OF_EARLY_FLATTREE
1783         help
1784           Include support for flattened device tree machine descriptions.
1785
1786 config ATAGS
1787         bool "Support for the traditional ATAGS boot data passing" if USE_OF
1788         default y
1789         help
1790           This is the traditional way of passing data to the kernel at boot
1791           time. If you are solely relying on the flattened device tree (or
1792           the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1793           to remove ATAGS support from your kernel binary.  If unsure,
1794           leave this to y.
1795
1796 config DEPRECATED_PARAM_STRUCT
1797         bool "Provide old way to pass kernel parameters"
1798         depends on ATAGS
1799         help
1800           This was deprecated in 2001 and announced to live on for 5 years.
1801           Some old boot loaders still use this way.
1802
1803 # Compressed boot loader in ROM.  Yes, we really want to ask about
1804 # TEXT and BSS so we preserve their values in the config files.
1805 config ZBOOT_ROM_TEXT
1806         hex "Compressed ROM boot loader base address"
1807         default "0"
1808         help
1809           The physical address at which the ROM-able zImage is to be
1810           placed in the target.  Platforms which normally make use of
1811           ROM-able zImage formats normally set this to a suitable
1812           value in their defconfig file.
1813
1814           If ZBOOT_ROM is not enabled, this has no effect.
1815
1816 config ZBOOT_ROM_BSS
1817         hex "Compressed ROM boot loader BSS address"
1818         default "0"
1819         help
1820           The base address of an area of read/write memory in the target
1821           for the ROM-able zImage which must be available while the
1822           decompressor is running. It must be large enough to hold the
1823           entire decompressed kernel plus an additional 128 KiB.
1824           Platforms which normally make use of ROM-able zImage formats
1825           normally set this to a suitable value in their defconfig file.
1826
1827           If ZBOOT_ROM is not enabled, this has no effect.
1828
1829 config ZBOOT_ROM
1830         bool "Compressed boot loader in ROM/flash"
1831         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1832         help
1833           Say Y here if you intend to execute your compressed kernel image
1834           (zImage) directly from ROM or flash.  If unsure, say N.
1835
1836 choice
1837         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1838         depends on ZBOOT_ROM && ARCH_SH7372
1839         default ZBOOT_ROM_NONE
1840         help
1841           Include experimental SD/MMC loading code in the ROM-able zImage.
1842           With this enabled it is possible to write the ROM-able zImage
1843           kernel image to an MMC or SD card and boot the kernel straight
1844           from the reset vector. At reset the processor Mask ROM will load
1845           the first part of the ROM-able zImage which in turn loads the
1846           rest the kernel image to RAM.
1847
1848 config ZBOOT_ROM_NONE
1849         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1850         help
1851           Do not load image from SD or MMC
1852
1853 config ZBOOT_ROM_MMCIF
1854         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1855         help
1856           Load image from MMCIF hardware block.
1857
1858 config ZBOOT_ROM_SH_MOBILE_SDHI
1859         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1860         help
1861           Load image from SDHI hardware block
1862
1863 endchoice
1864
1865 config ARM_APPENDED_DTB
1866         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1867         depends on OF && !ZBOOT_ROM
1868         help
1869           With this option, the boot code will look for a device tree binary
1870           (DTB) appended to zImage
1871           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1872
1873           This is meant as a backward compatibility convenience for those
1874           systems with a bootloader that can't be upgraded to accommodate
1875           the documented boot protocol using a device tree.
1876
1877           Beware that there is very little in terms of protection against
1878           this option being confused by leftover garbage in memory that might
1879           look like a DTB header after a reboot if no actual DTB is appended
1880           to zImage.  Do not leave this option active in a production kernel
1881           if you don't intend to always append a DTB.  Proper passing of the
1882           location into r2 of a bootloader provided DTB is always preferable
1883           to this option.
1884
1885 config ARM_ATAG_DTB_COMPAT
1886         bool "Supplement the appended DTB with traditional ATAG information"
1887         depends on ARM_APPENDED_DTB
1888         help
1889           Some old bootloaders can't be updated to a DTB capable one, yet
1890           they provide ATAGs with memory configuration, the ramdisk address,
1891           the kernel cmdline string, etc.  Such information is dynamically
1892           provided by the bootloader and can't always be stored in a static
1893           DTB.  To allow a device tree enabled kernel to be used with such
1894           bootloaders, this option allows zImage to extract the information
1895           from the ATAG list and store it at run time into the appended DTB.
1896
1897 choice
1898         prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1899         default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1900
1901 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1902         bool "Use bootloader kernel arguments if available"
1903         help
1904           Uses the command-line options passed by the boot loader instead of
1905           the device tree bootargs property. If the boot loader doesn't provide
1906           any, the device tree bootargs property will be used.
1907
1908 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1909         bool "Extend with bootloader kernel arguments"
1910         help
1911           The command-line arguments provided by the boot loader will be
1912           appended to the the device tree bootargs property.
1913
1914 endchoice
1915
1916 config CMDLINE
1917         string "Default kernel command string"
1918         default ""
1919         help
1920           On some architectures (EBSA110 and CATS), there is currently no way
1921           for the boot loader to pass arguments to the kernel. For these
1922           architectures, you should supply some command-line options at build
1923           time by entering them here. As a minimum, you should specify the
1924           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1925
1926 choice
1927         prompt "Kernel command line type" if CMDLINE != ""
1928         default CMDLINE_FROM_BOOTLOADER
1929         depends on ATAGS
1930
1931 config CMDLINE_FROM_BOOTLOADER
1932         bool "Use bootloader kernel arguments if available"
1933         help
1934           Uses the command-line options passed by the boot loader. If
1935           the boot loader doesn't provide any, the default kernel command
1936           string provided in CMDLINE will be used.
1937
1938 config CMDLINE_EXTEND
1939         bool "Extend bootloader kernel arguments"
1940         help
1941           The command-line arguments provided by the boot loader will be
1942           appended to the default kernel command string.
1943
1944 config CMDLINE_FORCE
1945         bool "Always use the default kernel command string"
1946         help
1947           Always use the default kernel command string, even if the boot
1948           loader passes other arguments to the kernel.
1949           This is useful if you cannot or don't want to change the
1950           command-line options your boot loader passes to the kernel.
1951 endchoice
1952
1953 config XIP_KERNEL
1954         bool "Kernel Execute-In-Place from ROM"
1955         depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM
1956         help
1957           Execute-In-Place allows the kernel to run from non-volatile storage
1958           directly addressable by the CPU, such as NOR flash. This saves RAM
1959           space since the text section of the kernel is not loaded from flash
1960           to RAM.  Read-write sections, such as the data section and stack,
1961           are still copied to RAM.  The XIP kernel is not compressed since
1962           it has to run directly from flash, so it will take more space to
1963           store it.  The flash address used to link the kernel object files,
1964           and for storing it, is configuration dependent. Therefore, if you
1965           say Y here, you must know the proper physical address where to
1966           store the kernel image depending on your own flash memory usage.
1967
1968           Also note that the make target becomes "make xipImage" rather than
1969           "make zImage" or "make Image".  The final kernel binary to put in
1970           ROM memory will be arch/arm/boot/xipImage.
1971
1972           If unsure, say N.
1973
1974 config XIP_PHYS_ADDR
1975         hex "XIP Kernel Physical Location"
1976         depends on XIP_KERNEL
1977         default "0x00080000"
1978         help
1979           This is the physical address in your flash memory the kernel will
1980           be linked for and stored to.  This address is dependent on your
1981           own flash usage.
1982
1983 config KEXEC
1984         bool "Kexec system call (EXPERIMENTAL)"
1985         depends on (!SMP || HOTPLUG_CPU)
1986         help
1987           kexec is a system call that implements the ability to shutdown your
1988           current kernel, and to start another kernel.  It is like a reboot
1989           but it is independent of the system firmware.   And like a reboot
1990           you can start any kernel with it, not just Linux.
1991
1992           It is an ongoing process to be certain the hardware in a machine
1993           is properly shutdown, so do not be surprised if this code does not
1994           initially work for you.  It may help to enable device hotplugging
1995           support.
1996
1997 config ATAGS_PROC
1998         bool "Export atags in procfs"
1999         depends on ATAGS && KEXEC
2000         default y
2001         help
2002           Should the atags used to boot the kernel be exported in an "atags"
2003           file in procfs. Useful with kexec.
2004
2005 config CRASH_DUMP
2006         bool "Build kdump crash kernel (EXPERIMENTAL)"
2007         help
2008           Generate crash dump after being started by kexec. This should
2009           be normally only set in special crash dump kernels which are
2010           loaded in the main kernel with kexec-tools into a specially
2011           reserved region and then later executed after a crash by
2012           kdump/kexec. The crash dump kernel must be compiled to a
2013           memory address not used by the main kernel
2014
2015           For more details see Documentation/kdump/kdump.txt
2016
2017 config AUTO_ZRELADDR
2018         bool "Auto calculation of the decompressed kernel image address"
2019         depends on !ZBOOT_ROM && !ARCH_U300
2020         help
2021           ZRELADDR is the physical address where the decompressed kernel
2022           image will be placed. If AUTO_ZRELADDR is selected, the address
2023           will be determined at run-time by masking the current IP with
2024           0xf8000000. This assumes the zImage being placed in the first 128MB
2025           from start of memory.
2026
2027 endmenu
2028
2029 menu "CPU Power Management"
2030
2031 if ARCH_HAS_CPUFREQ
2032
2033 source "drivers/cpufreq/Kconfig"
2034
2035 config CPU_FREQ_IMX
2036         tristate "CPUfreq driver for i.MX CPUs"
2037         depends on ARCH_MXC && CPU_FREQ
2038         select CPU_FREQ_TABLE
2039         help
2040           This enables the CPUfreq driver for i.MX CPUs.
2041
2042 config CPU_FREQ_SA1100
2043         bool
2044
2045 config CPU_FREQ_SA1110
2046         bool
2047
2048 config CPU_FREQ_INTEGRATOR
2049         tristate "CPUfreq driver for ARM Integrator CPUs"
2050         depends on ARCH_INTEGRATOR && CPU_FREQ
2051         default y
2052         help
2053           This enables the CPUfreq driver for ARM Integrator CPUs.
2054
2055           For details, take a look at <file:Documentation/cpu-freq>.
2056
2057           If in doubt, say Y.
2058
2059 config CPU_FREQ_PXA
2060         bool
2061         depends on CPU_FREQ && ARCH_PXA && PXA25x
2062         default y
2063         select CPU_FREQ_DEFAULT_GOV_USERSPACE
2064         select CPU_FREQ_TABLE
2065
2066 config CPU_FREQ_S3C
2067         bool
2068         help
2069           Internal configuration node for common cpufreq on Samsung SoC
2070
2071 config CPU_FREQ_S3C24XX
2072         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2073         depends on ARCH_S3C24XX && CPU_FREQ
2074         select CPU_FREQ_S3C
2075         help
2076           This enables the CPUfreq driver for the Samsung S3C24XX family
2077           of CPUs.
2078
2079           For details, take a look at <file:Documentation/cpu-freq>.
2080
2081           If in doubt, say N.
2082
2083 config CPU_FREQ_S3C24XX_PLL
2084         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2085         depends on CPU_FREQ_S3C24XX
2086         help
2087           Compile in support for changing the PLL frequency from the
2088           S3C24XX series CPUfreq driver. The PLL takes time to settle
2089           after a frequency change, so by default it is not enabled.
2090
2091           This also means that the PLL tables for the selected CPU(s) will
2092           be built which may increase the size of the kernel image.
2093
2094 config CPU_FREQ_S3C24XX_DEBUG
2095         bool "Debug CPUfreq Samsung driver core"
2096         depends on CPU_FREQ_S3C24XX
2097         help
2098           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2099
2100 config CPU_FREQ_S3C24XX_IODEBUG
2101         bool "Debug CPUfreq Samsung driver IO timing"
2102         depends on CPU_FREQ_S3C24XX
2103         help
2104           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2105
2106 config CPU_FREQ_S3C24XX_DEBUGFS
2107         bool "Export debugfs for CPUFreq"
2108         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2109         help
2110           Export status information via debugfs.
2111
2112 endif
2113
2114 source "drivers/cpuidle/Kconfig"
2115
2116 endmenu
2117
2118 menu "Floating point emulation"
2119
2120 comment "At least one emulation must be selected"
2121
2122 config FPE_NWFPE
2123         bool "NWFPE math emulation"
2124         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2125         ---help---
2126           Say Y to include the NWFPE floating point emulator in the kernel.
2127           This is necessary to run most binaries. Linux does not currently
2128           support floating point hardware so you need to say Y here even if
2129           your machine has an FPA or floating point co-processor podule.
2130
2131           You may say N here if you are going to load the Acorn FPEmulator
2132           early in the bootup.
2133
2134 config FPE_NWFPE_XP
2135         bool "Support extended precision"
2136         depends on FPE_NWFPE
2137         help
2138           Say Y to include 80-bit support in the kernel floating-point
2139           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2140           Note that gcc does not generate 80-bit operations by default,
2141           so in most cases this option only enlarges the size of the
2142           floating point emulator without any good reason.
2143
2144           You almost surely want to say N here.
2145
2146 config FPE_FASTFPE
2147         bool "FastFPE math emulation (EXPERIMENTAL)"
2148         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
2149         ---help---
2150           Say Y here to include the FAST floating point emulator in the kernel.
2151           This is an experimental much faster emulator which now also has full
2152           precision for the mantissa.  It does not support any exceptions.
2153           It is very simple, and approximately 3-6 times faster than NWFPE.
2154
2155           It should be sufficient for most programs.  It may be not suitable
2156           for scientific calculations, but you have to check this for yourself.
2157           If you do not feel you need a faster FP emulation you should better
2158           choose NWFPE.
2159
2160 config VFP
2161         bool "VFP-format floating point maths"
2162         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2163         help
2164           Say Y to include VFP support code in the kernel. This is needed
2165           if your hardware includes a VFP unit.
2166
2167           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2168           release notes and additional status information.
2169
2170           Say N if your target does not have VFP hardware.
2171
2172 config VFPv3
2173         bool
2174         depends on VFP
2175         default y if CPU_V7
2176
2177 config NEON
2178         bool "Advanced SIMD (NEON) Extension support"
2179         depends on VFPv3 && CPU_V7
2180         help
2181           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2182           Extension.
2183
2184 endmenu
2185
2186 menu "Userspace binary formats"
2187
2188 source "fs/Kconfig.binfmt"
2189
2190 config ARTHUR
2191         tristate "RISC OS personality"
2192         depends on !AEABI
2193         help
2194           Say Y here to include the kernel code necessary if you want to run
2195           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2196           experimental; if this sounds frightening, say N and sleep in peace.
2197           You can also say M here to compile this support as a module (which
2198           will be called arthur).
2199
2200 endmenu
2201
2202 menu "Power management options"
2203
2204 source "kernel/power/Kconfig"
2205
2206 config ARCH_SUSPEND_POSSIBLE
2207         depends on !ARCH_S5PC100
2208         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2209                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2210         def_bool y
2211
2212 config ARM_CPU_SUSPEND
2213         def_bool PM_SLEEP
2214
2215 endmenu
2216
2217 source "net/Kconfig"
2218
2219 source "drivers/Kconfig"
2220
2221 source "fs/Kconfig"
2222
2223 source "arch/arm/Kconfig.debug"
2224
2225 source "security/Kconfig"
2226
2227 source "crypto/Kconfig"
2228
2229 source "lib/Kconfig"
2230
2231 source "arch/arm/kvm/Kconfig"