arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if !XIP_KERNEL
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         select GENERIC_IRQ_SHOW
  32         help
  33           The ARM series is a line of low-power-consumption RISC chip designs
  34           licensed by ARM Ltd and targeted at embedded applications and
  35           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  36           manufactured, but legacy ARM-based PC hardware remains popular in
  37           Europe.  There is an ARM Linux project with a web page at
  38           <http://www.arm.linux.org.uk/>.
  39
  40 config ARM_HAS_SG_CHAIN
  41         bool
  42
  43 config HAVE_PWM
  44         bool
  45
  46 config MIGHT_HAVE_PCI
  47         bool
  48
  49 config SYS_SUPPORTS_APM_EMULATION
  50         bool
  51
  52 config HAVE_SCHED_CLOCK
  53         bool
  54
  55 config GENERIC_GPIO
  56         bool
  57
  58 config ARCH_USES_GETTIMEOFFSET
  59         bool
  60         default n
  61
  62 config GENERIC_CLOCKEVENTS
  63         bool
  64
  65 config GENERIC_CLOCKEVENTS_BROADCAST
  66         bool
  67         depends on GENERIC_CLOCKEVENTS
  68         default y if SMP
  69
  70 config KTIME_SCALAR
  71         bool
  72         default y
  73
  74 config HAVE_TCM
  75         bool
  76         select GENERIC_ALLOCATOR
  77
  78 config HAVE_PROC_CPU
  79         bool
  80
  81 config NO_IOPORT
  82         bool
  83
  84 config EISA
  85         bool
  86         ---help---
  87           The Extended Industry Standard Architecture (EISA) bus was
  88           developed as an open alternative to the IBM MicroChannel bus.
  89
  90           The EISA bus provided some of the features of the IBM MicroChannel
  91           bus while maintaining backward compatibility with cards made for
  92           the older ISA bus.  The EISA bus saw limited use between 1988 and
  93           1995 when it was made obsolete by the PCI bus.
  94
  95           Say Y here if you are building a kernel for an EISA-based machine.
  96
  97           Otherwise, say N.
  98
  99 config SBUS
 100         bool
 101
 102 config MCA
 103         bool
 104         help
 105           MicroChannel Architecture is found in some IBM PS/2 machines and
 106           laptops.  It is a bus system similar to PCI or ISA. See
 107           <file:Documentation/mca.txt> (and especially the web page given
 108           there) before attempting to build an MCA bus kernel.
 109
 110 config STACKTRACE_SUPPORT
 111         bool
 112         default y
 113
 114 config HAVE_LATENCYTOP_SUPPORT
 115         bool
 116         depends on !SMP
 117         default y
 118
 119 config LOCKDEP_SUPPORT
 120         bool
 121         default y
 122
 123 config TRACE_IRQFLAGS_SUPPORT
 124         bool
 125         default y
 126
 127 config HARDIRQS_SW_RESEND
 128         bool
 129         default y
 130
 131 config GENERIC_IRQ_PROBE
 132         bool
 133         default y
 134
 135 config GENERIC_LOCKBREAK
 136         bool
 137         default y
 138         depends on SMP && PREEMPT
 139
 140 config RWSEM_GENERIC_SPINLOCK
 141         bool
 142         default y
 143
 144 config RWSEM_XCHGADD_ALGORITHM
 145         bool
 146
 147 config ARCH_HAS_ILOG2_U32
 148         bool
 149
 150 config ARCH_HAS_ILOG2_U64
 151         bool
 152
 153 config ARCH_HAS_CPUFREQ
 154         bool
 155         help
 156           Internal node to signify that the ARCH has CPUFREQ support
 157           and that the relevant menu configurations are displayed for
 158           it.
 159
 160 config ARCH_HAS_CPU_IDLE_WAIT
 161        def_bool y
 162
 163 config GENERIC_HWEIGHT
 164         bool
 165         default y
 166
 167 config GENERIC_CALIBRATE_DELAY
 168         bool
 169         default y
 170
 171 config ARCH_MAY_HAVE_PC_FDC
 172         bool
 173
 174 config ZONE_DMA
 175         bool
 176
 177 config NEED_DMA_MAP_STATE
 178        def_bool y
 179
 180 config GENERIC_ISA_DMA
 181         bool
 182
 183 config FIQ
 184         bool
 185
 186 config ARCH_MTD_XIP
 187         bool
 188
 189 config VECTORS_BASE
 190         hex
 191         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 192         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 193         default 0x00000000
 194         help
 195           The base address of exception vectors.
 196
 197 config ARM_PATCH_PHYS_VIRT
 198         bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
 199         depends on EXPERIMENTAL
 200         depends on !XIP_KERNEL && MMU
 201         depends on !ARCH_REALVIEW || !SPARSEMEM
 202         help
 203           Patch phys-to-virt and virt-to-phys translation functions at
 204           boot and module load time according to the position of the
 205           kernel in system memory.
 206
 207           This can only be used with non-XIP MMU kernels where the base
 208           of physical memory is at a 16MB boundary, or theoretically 64K
 209           for the MSM machine class.
 210
 211 config ARM_PATCH_PHYS_VIRT_16BIT
 212         def_bool y
 213         depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
 214         help
 215           This option extends the physical to virtual translation patching
 216           to allow physical memory down to a theoretical minimum of 64K
 217           boundaries.
 218
 219 source "init/Kconfig"
 220
 221 source "kernel/Kconfig.freezer"
 222
 223 menu "System Type"
 224
 225 config MMU
 226         bool "MMU-based Paged Memory Management Support"
 227         default y
 228         help
 229           Select if you want MMU-based virtualised addressing space
 230           support by paged memory management. If unsure, say 'Y'.
 231
 232 #
 233 # The "ARM system type" choice list is ordered alphabetically by option
 234 # text.  Please add new entries in the option alphabetic order.
 235 #
 236 choice
 237         prompt "ARM system type"
 238         default ARCH_VERSATILE
 239
 240 config ARCH_INTEGRATOR
 241         bool "ARM Ltd. Integrator family"
 242         select ARM_AMBA
 243         select ARCH_HAS_CPUFREQ
 244         select CLKDEV_LOOKUP
 245         select ICST
 246         select GENERIC_CLOCKEVENTS
 247         select PLAT_VERSATILE
 248         select PLAT_VERSATILE_FPGA_IRQ
 249         help
 250           Support for ARM's Integrator platform.
 251
 252 config ARCH_REALVIEW
 253         bool "ARM Ltd. RealView family"
 254         select ARM_AMBA
 255         select CLKDEV_LOOKUP
 256         select ICST
 257         select GENERIC_CLOCKEVENTS
 258         select ARCH_WANT_OPTIONAL_GPIOLIB
 259         select PLAT_VERSATILE
 260         select PLAT_VERSATILE_CLCD
 261         select ARM_TIMER_SP804
 262         select GPIO_PL061 if GPIOLIB
 263         help
 264           This enables support for ARM Ltd RealView boards.
 265
 266 config ARCH_VERSATILE
 267         bool "ARM Ltd. Versatile family"
 268         select ARM_AMBA
 269         select ARM_VIC
 270         select CLKDEV_LOOKUP
 271         select ICST
 272         select GENERIC_CLOCKEVENTS
 273         select ARCH_WANT_OPTIONAL_GPIOLIB
 274         select PLAT_VERSATILE
 275         select PLAT_VERSATILE_CLCD
 276         select PLAT_VERSATILE_FPGA_IRQ
 277         select ARM_TIMER_SP804
 278         help
 279           This enables support for ARM Ltd Versatile board.
 280
 281 config ARCH_VEXPRESS
 282         bool "ARM Ltd. Versatile Express family"
 283         select ARCH_WANT_OPTIONAL_GPIOLIB
 284         select ARM_AMBA
 285         select ARM_TIMER_SP804
 286         select CLKDEV_LOOKUP
 287         select GENERIC_CLOCKEVENTS
 288         select HAVE_CLK
 289         select HAVE_PATA_PLATFORM
 290         select ICST
 291         select PLAT_VERSATILE
 292         select PLAT_VERSATILE_CLCD
 293         help
 294           This enables support for the ARM Ltd Versatile Express boards.
 295
 296 config ARCH_AT91
 297         bool "Atmel AT91"
 298         select ARCH_REQUIRE_GPIOLIB
 299         select HAVE_CLK
 300         select CLKDEV_LOOKUP
 301         select ARM_PATCH_PHYS_VIRT if MMU
 302         help
 303           This enables support for systems based on the Atmel AT91RM9200,
 304           AT91SAM9 and AT91CAP9 processors.
 305
 306 config ARCH_BCMRING
 307         bool "Broadcom BCMRING"
 308         depends on MMU
 309         select CPU_V6
 310         select ARM_AMBA
 311         select ARM_TIMER_SP804
 312         select CLKDEV_LOOKUP
 313         select GENERIC_CLOCKEVENTS
 314         select ARCH_WANT_OPTIONAL_GPIOLIB
 315         help
 316           Support for Broadcom's BCMRing platform.
 317
 318 config ARCH_CLPS711X
 319         bool "Cirrus Logic CLPS711x/EP721x-based"
 320         select CPU_ARM720T
 321         select ARCH_USES_GETTIMEOFFSET
 322         help
 323           Support for Cirrus Logic 711x/721x based boards.
 324
 325 config ARCH_CNS3XXX
 326         bool "Cavium Networks CNS3XXX family"
 327         select CPU_V6
 328         select GENERIC_CLOCKEVENTS
 329         select ARM_GIC
 330         select MIGHT_HAVE_PCI
 331         select PCI_DOMAINS if PCI
 332         help
 333           Support for Cavium Networks CNS3XXX platform.
 334
 335 config ARCH_GEMINI
 336         bool "Cortina Systems Gemini"
 337         select CPU_FA526
 338         select ARCH_REQUIRE_GPIOLIB
 339         select ARCH_USES_GETTIMEOFFSET
 340         help
 341           Support for the Cortina Systems Gemini family SoCs
 342
 343 config ARCH_EBSA110
 344         bool "EBSA-110"
 345         select CPU_SA110
 346         select ISA
 347         select NO_IOPORT
 348         select ARCH_USES_GETTIMEOFFSET
 349         help
 350           This is an evaluation board for the StrongARM processor available
 351           from Digital. It has limited hardware on-board, including an
 352           Ethernet interface, two PCMCIA sockets, two serial ports and a
 353           parallel port.
 354
 355 config ARCH_EP93XX
 356         bool "EP93xx-based"
 357         select CPU_ARM920T
 358         select ARM_AMBA
 359         select ARM_VIC
 360         select CLKDEV_LOOKUP
 361         select ARCH_REQUIRE_GPIOLIB
 362         select ARCH_HAS_HOLES_MEMORYMODEL
 363         select ARCH_USES_GETTIMEOFFSET
 364         help
 365           This enables support for the Cirrus EP93xx series of CPUs.
 366
 367 config ARCH_FOOTBRIDGE
 368         bool "FootBridge"
 369         select CPU_SA110
 370         select FOOTBRIDGE
 371         select GENERIC_CLOCKEVENTS
 372         help
 373           Support for systems based on the DC21285 companion chip
 374           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 375
 376 config ARCH_MXC
 377         bool "Freescale MXC/iMX-based"
 378         select GENERIC_CLOCKEVENTS
 379         select ARCH_REQUIRE_GPIOLIB
 380         select CLKDEV_LOOKUP
 381         select CLKSRC_MMIO
 382         select HAVE_SCHED_CLOCK
 383         help
 384           Support for Freescale MXC/iMX-based family of processors
 385
 386 config ARCH_MXS
 387         bool "Freescale MXS-based"
 388         select GENERIC_CLOCKEVENTS
 389         select ARCH_REQUIRE_GPIOLIB
 390         select CLKDEV_LOOKUP
 391         select CLKSRC_MMIO
 392         help
 393           Support for Freescale MXS-based family of processors
 394
 395 config ARCH_NETX
 396         bool "Hilscher NetX based"
 397         select CLKSRC_MMIO
 398         select CPU_ARM926T
 399         select ARM_VIC
 400         select GENERIC_CLOCKEVENTS
 401         help
 402           This enables support for systems based on the Hilscher NetX Soc
 403
 404 config ARCH_H720X
 405         bool "Hynix HMS720x-based"
 406         select CPU_ARM720T
 407         select ISA_DMA_API
 408         select ARCH_USES_GETTIMEOFFSET
 409         help
 410           This enables support for systems based on the Hynix HMS720x
 411
 412 config ARCH_IOP13XX
 413         bool "IOP13xx-based"
 414         depends on MMU
 415         select CPU_XSC3
 416         select PLAT_IOP
 417         select PCI
 418         select ARCH_SUPPORTS_MSI
 419         select VMSPLIT_1G
 420         help
 421           Support for Intel's IOP13XX (XScale) family of processors.
 422
 423 config ARCH_IOP32X
 424         bool "IOP32x-based"
 425         depends on MMU
 426         select CPU_XSCALE
 427         select PLAT_IOP
 428         select PCI
 429         select ARCH_REQUIRE_GPIOLIB
 430         help
 431           Support for Intel's 80219 and IOP32X (XScale) family of
 432           processors.
 433
 434 config ARCH_IOP33X
 435         bool "IOP33x-based"
 436         depends on MMU
 437         select CPU_XSCALE
 438         select PLAT_IOP
 439         select PCI
 440         select ARCH_REQUIRE_GPIOLIB
 441         help
 442           Support for Intel's IOP33X (XScale) family of processors.
 443
 444 config ARCH_IXP23XX
 445         bool "IXP23XX-based"
 446         depends on MMU
 447         select CPU_XSC3
 448         select PCI
 449         select ARCH_USES_GETTIMEOFFSET
 450         help
 451           Support for Intel's IXP23xx (XScale) family of processors.
 452
 453 config ARCH_IXP2000
 454         bool "IXP2400/2800-based"
 455         depends on MMU
 456         select CPU_XSCALE
 457         select PCI
 458         select ARCH_USES_GETTIMEOFFSET
 459         help
 460           Support for Intel's IXP2400/2800 (XScale) family of processors.
 461
 462 config ARCH_IXP4XX
 463         bool "IXP4xx-based"
 464         depends on MMU
 465         select CLKSRC_MMIO
 466         select CPU_XSCALE
 467         select GENERIC_GPIO
 468         select GENERIC_CLOCKEVENTS
 469         select HAVE_SCHED_CLOCK
 470         select MIGHT_HAVE_PCI
 471         select DMABOUNCE if PCI
 472         help
 473           Support for Intel's IXP4XX (XScale) family of processors.
 474
 475 config ARCH_DOVE
 476         bool "Marvell Dove"
 477         select CPU_V7
 478         select PCI
 479         select ARCH_REQUIRE_GPIOLIB
 480         select GENERIC_CLOCKEVENTS
 481         select PLAT_ORION
 482         help
 483           Support for the Marvell Dove SoC 88AP510
 484
 485 config ARCH_KIRKWOOD
 486         bool "Marvell Kirkwood"
 487         select CPU_FEROCEON
 488         select PCI
 489         select ARCH_REQUIRE_GPIOLIB
 490         select GENERIC_CLOCKEVENTS
 491         select PLAT_ORION
 492         help
 493           Support for the following Marvell Kirkwood series SoCs:
 494           88F6180, 88F6192 and 88F6281.
 495
 496 config ARCH_LOKI
 497         bool "Marvell Loki (88RC8480)"
 498         select CPU_FEROCEON
 499         select GENERIC_CLOCKEVENTS
 500         select PLAT_ORION
 501         help
 502           Support for the Marvell Loki (88RC8480) SoC.
 503
 504 config ARCH_LPC32XX
 505         bool "NXP LPC32XX"
 506         select CLKSRC_MMIO
 507         select CPU_ARM926T
 508         select ARCH_REQUIRE_GPIOLIB
 509         select HAVE_IDE
 510         select ARM_AMBA
 511         select USB_ARCH_HAS_OHCI
 512         select CLKDEV_LOOKUP
 513         select GENERIC_TIME
 514         select GENERIC_CLOCKEVENTS
 515         help
 516           Support for the NXP LPC32XX family of processors
 517
 518 config ARCH_MV78XX0
 519         bool "Marvell MV78xx0"
 520         select CPU_FEROCEON
 521         select PCI
 522         select ARCH_REQUIRE_GPIOLIB
 523         select GENERIC_CLOCKEVENTS
 524         select PLAT_ORION
 525         help
 526           Support for the following Marvell MV78xx0 series SoCs:
 527           MV781x0, MV782x0.
 528
 529 config ARCH_ORION5X
 530         bool "Marvell Orion"
 531         depends on MMU
 532         select CPU_FEROCEON
 533         select PCI
 534         select ARCH_REQUIRE_GPIOLIB
 535         select GENERIC_CLOCKEVENTS
 536         select PLAT_ORION
 537         help
 538           Support for the following Marvell Orion 5x series SoCs:
 539           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 540           Orion-2 (5281), Orion-1-90 (6183).
 541
 542 config ARCH_MMP
 543         bool "Marvell PXA168/910/MMP2"
 544         depends on MMU
 545         select ARCH_REQUIRE_GPIOLIB
 546         select CLKDEV_LOOKUP
 547         select GENERIC_CLOCKEVENTS
 548         select HAVE_SCHED_CLOCK
 549         select TICK_ONESHOT
 550         select PLAT_PXA
 551         select SPARSE_IRQ
 552         help
 553           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 554
 555 config ARCH_KS8695
 556         bool "Micrel/Kendin KS8695"
 557         select CPU_ARM922T
 558         select ARCH_REQUIRE_GPIOLIB
 559         select ARCH_USES_GETTIMEOFFSET
 560         help
 561           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 562           System-on-Chip devices.
 563
 564 config ARCH_W90X900
 565         bool "Nuvoton W90X900 CPU"
 566         select CPU_ARM926T
 567         select ARCH_REQUIRE_GPIOLIB
 568         select CLKDEV_LOOKUP
 569         select CLKSRC_MMIO
 570         select GENERIC_CLOCKEVENTS
 571         help
 572           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 573           At present, the w90x900 has been renamed nuc900, regarding
 574           the ARM series product line, you can login the following
 575           link address to know more.
 576
 577           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 578                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 579
 580 config ARCH_NUC93X
 581         bool "Nuvoton NUC93X CPU"
 582         select CPU_ARM926T
 583         select CLKDEV_LOOKUP
 584         help
 585           Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
 586           low-power and high performance MPEG-4/JPEG multimedia controller chip.
 587
 588 config ARCH_TEGRA
 589         bool "NVIDIA Tegra"
 590         select CLKDEV_LOOKUP
 591         select CLKSRC_MMIO
 592         select GENERIC_TIME
 593         select GENERIC_CLOCKEVENTS
 594         select GENERIC_GPIO
 595         select HAVE_CLK
 596         select HAVE_SCHED_CLOCK
 597         select ARCH_HAS_BARRIERS if CACHE_L2X0
 598         select ARCH_HAS_CPUFREQ
 599         help
 600           This enables support for NVIDIA Tegra based systems (Tegra APX,
 601           Tegra 6xx and Tegra 2 series).
 602
 603 config ARCH_PNX4008
 604         bool "Philips Nexperia PNX4008 Mobile"
 605         select CPU_ARM926T
 606         select CLKDEV_LOOKUP
 607         select ARCH_USES_GETTIMEOFFSET
 608         help
 609           This enables support for Philips PNX4008 mobile platform.
 610
 611 config ARCH_PXA
 612         bool "PXA2xx/PXA3xx-based"
 613         depends on MMU
 614         select ARCH_MTD_XIP
 615         select ARCH_HAS_CPUFREQ
 616         select CLKDEV_LOOKUP
 617         select CLKSRC_MMIO
 618         select ARCH_REQUIRE_GPIOLIB
 619         select GENERIC_CLOCKEVENTS
 620         select HAVE_SCHED_CLOCK
 621         select TICK_ONESHOT
 622         select PLAT_PXA
 623         select SPARSE_IRQ
 624         help
 625           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 626
 627 config ARCH_MSM
 628         bool "Qualcomm MSM"
 629         select HAVE_CLK
 630         select GENERIC_CLOCKEVENTS
 631         select ARCH_REQUIRE_GPIOLIB
 632         select CLKDEV_LOOKUP
 633         help
 634           Support for Qualcomm MSM/QSD based systems.  This runs on the
 635           apps processor of the MSM/QSD and depends on a shared memory
 636           interface to the modem processor which runs the baseband
 637           stack and controls some vital subsystems
 638           (clock and power control, etc).
 639
 640 config ARCH_SHMOBILE
 641         bool "Renesas SH-Mobile / R-Mobile"
 642         select HAVE_CLK
 643         select CLKDEV_LOOKUP
 644         select GENERIC_CLOCKEVENTS
 645         select NO_IOPORT
 646         select SPARSE_IRQ
 647         select MULTI_IRQ_HANDLER
 648         help
 649           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 650
 651 config ARCH_RPC
 652         bool "RiscPC"
 653         select ARCH_ACORN
 654         select FIQ
 655         select TIMER_ACORN
 656         select ARCH_MAY_HAVE_PC_FDC
 657         select HAVE_PATA_PLATFORM
 658         select ISA_DMA_API
 659         select NO_IOPORT
 660         select ARCH_SPARSEMEM_ENABLE
 661         select ARCH_USES_GETTIMEOFFSET
 662         help
 663           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 664           CD-ROM interface, serial and parallel port, and the floppy drive.
 665
 666 config ARCH_SA1100
 667         bool "SA1100-based"
 668         select CLKSRC_MMIO
 669         select CPU_SA1100
 670         select ISA
 671         select ARCH_SPARSEMEM_ENABLE
 672         select ARCH_MTD_XIP
 673         select ARCH_HAS_CPUFREQ
 674         select CPU_FREQ
 675         select GENERIC_CLOCKEVENTS
 676         select HAVE_CLK
 677         select HAVE_SCHED_CLOCK
 678         select TICK_ONESHOT
 679         select ARCH_REQUIRE_GPIOLIB
 680         help
 681           Support for StrongARM 11x0 based boards.
 682
 683 config ARCH_S3C2410
 684         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 685         select GENERIC_GPIO
 686         select ARCH_HAS_CPUFREQ
 687         select HAVE_CLK
 688         select ARCH_USES_GETTIMEOFFSET
 689         select HAVE_S3C2410_I2C if I2C
 690         help
 691           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 692           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 693           the Samsung SMDK2410 development board (and derivatives).
 694
 695           Note, the S3C2416 and the S3C2450 are so close that they even share
 696           the same SoC ID code. This means that there is no separate machine
 697           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 698
 699 config ARCH_S3C64XX
 700         bool "Samsung S3C64XX"
 701         select PLAT_SAMSUNG
 702         select CPU_V6
 703         select ARM_VIC
 704         select HAVE_CLK
 705         select NO_IOPORT
 706         select ARCH_USES_GETTIMEOFFSET
 707         select ARCH_HAS_CPUFREQ
 708         select ARCH_REQUIRE_GPIOLIB
 709         select SAMSUNG_CLKSRC
 710         select SAMSUNG_IRQ_VIC_TIMER
 711         select SAMSUNG_IRQ_UART
 712         select S3C_GPIO_TRACK
 713         select S3C_GPIO_PULL_UPDOWN
 714         select S3C_GPIO_CFG_S3C24XX
 715         select S3C_GPIO_CFG_S3C64XX
 716         select S3C_DEV_NAND
 717         select USB_ARCH_HAS_OHCI
 718         select SAMSUNG_GPIOLIB_4BIT
 719         select HAVE_S3C2410_I2C if I2C
 720         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 721         help
 722           Samsung S3C64XX series based systems
 723
 724 config ARCH_S5P64X0
 725         bool "Samsung S5P6440 S5P6450"
 726         select CPU_V6
 727         select GENERIC_GPIO
 728         select HAVE_CLK
 729         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 730         select GENERIC_CLOCKEVENTS
 731         select HAVE_SCHED_CLOCK
 732         select HAVE_S3C2410_I2C if I2C
 733         select HAVE_S3C_RTC if RTC_CLASS
 734         help
 735           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 736           SMDK6450.
 737
 738 config ARCH_S5PC100
 739         bool "Samsung S5PC100"
 740         select GENERIC_GPIO
 741         select HAVE_CLK
 742         select CPU_V7
 743         select ARM_L1_CACHE_SHIFT_6
 744         select ARCH_USES_GETTIMEOFFSET
 745         select HAVE_S3C2410_I2C if I2C
 746         select HAVE_S3C_RTC if RTC_CLASS
 747         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 748         help
 749           Samsung S5PC100 series based systems
 750
 751 config ARCH_S5PV210
 752         bool "Samsung S5PV210/S5PC110"
 753         select CPU_V7
 754         select ARCH_SPARSEMEM_ENABLE
 755         select GENERIC_GPIO
 756         select HAVE_CLK
 757         select ARM_L1_CACHE_SHIFT_6
 758         select ARCH_HAS_CPUFREQ
 759         select GENERIC_CLOCKEVENTS
 760         select HAVE_SCHED_CLOCK
 761         select HAVE_S3C2410_I2C if I2C
 762         select HAVE_S3C_RTC if RTC_CLASS
 763         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 764         help
 765           Samsung S5PV210/S5PC110 series based systems
 766
 767 config ARCH_EXYNOS4
 768         bool "Samsung EXYNOS4"
 769         select CPU_V7
 770         select ARCH_SPARSEMEM_ENABLE
 771         select GENERIC_GPIO
 772         select HAVE_CLK
 773         select ARCH_HAS_CPUFREQ
 774         select GENERIC_CLOCKEVENTS
 775         select HAVE_S3C_RTC if RTC_CLASS
 776         select HAVE_S3C2410_I2C if I2C
 777         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 778         help
 779           Samsung EXYNOS4 series based systems
 780
 781 config ARCH_SHARK
 782         bool "Shark"
 783         select CPU_SA110
 784         select ISA
 785         select ISA_DMA
 786         select ZONE_DMA
 787         select PCI
 788         select ARCH_USES_GETTIMEOFFSET
 789         help
 790           Support for the StrongARM based Digital DNARD machine, also known
 791           as "Shark" (<http://www.shark-linux.de/shark.html>).
 792
 793 config ARCH_TCC_926
 794         bool "Telechips TCC ARM926-based systems"
 795         select CLKSRC_MMIO
 796         select CPU_ARM926T
 797         select HAVE_CLK
 798         select CLKDEV_LOOKUP
 799         select GENERIC_CLOCKEVENTS
 800         help
 801           Support for Telechips TCC ARM926-based systems.
 802
 803 config ARCH_U300
 804         bool "ST-Ericsson U300 Series"
 805         depends on MMU
 806         select CLKSRC_MMIO
 807         select CPU_ARM926T
 808         select HAVE_SCHED_CLOCK
 809         select HAVE_TCM
 810         select ARM_AMBA
 811         select ARM_VIC
 812         select GENERIC_CLOCKEVENTS
 813         select CLKDEV_LOOKUP
 814         select GENERIC_GPIO
 815         help
 816           Support for ST-Ericsson U300 series mobile platforms.
 817
 818 config ARCH_U8500
 819         bool "ST-Ericsson U8500 Series"
 820         select CPU_V7
 821         select ARM_AMBA
 822         select GENERIC_CLOCKEVENTS
 823         select CLKDEV_LOOKUP
 824         select ARCH_REQUIRE_GPIOLIB
 825         select ARCH_HAS_CPUFREQ
 826         help
 827           Support for ST-Ericsson's Ux500 architecture
 828
 829 config ARCH_NOMADIK
 830         bool "STMicroelectronics Nomadik"
 831         select ARM_AMBA
 832         select ARM_VIC
 833         select CPU_ARM926T
 834         select CLKDEV_LOOKUP
 835         select GENERIC_CLOCKEVENTS
 836         select ARCH_REQUIRE_GPIOLIB
 837         help
 838           Support for the Nomadik platform by ST-Ericsson
 839
 840 config ARCH_DAVINCI
 841         bool "TI DaVinci"
 842         select GENERIC_CLOCKEVENTS
 843         select ARCH_REQUIRE_GPIOLIB
 844         select ZONE_DMA
 845         select HAVE_IDE
 846         select CLKDEV_LOOKUP
 847         select GENERIC_ALLOCATOR
 848         select GENERIC_IRQ_CHIP
 849         select ARCH_HAS_HOLES_MEMORYMODEL
 850         help
 851           Support for TI's DaVinci platform.
 852
 853 config ARCH_OMAP
 854         bool "TI OMAP"
 855         select HAVE_CLK
 856         select ARCH_REQUIRE_GPIOLIB
 857         select ARCH_HAS_CPUFREQ
 858         select GENERIC_CLOCKEVENTS
 859         select HAVE_SCHED_CLOCK
 860         select ARCH_HAS_HOLES_MEMORYMODEL
 861         help
 862           Support for TI's OMAP platform (OMAP1/2/3/4).
 863
 864 config PLAT_SPEAR
 865         bool "ST SPEAr"
 866         select ARM_AMBA
 867         select ARCH_REQUIRE_GPIOLIB
 868         select CLKDEV_LOOKUP
 869         select CLKSRC_MMIO
 870         select GENERIC_CLOCKEVENTS
 871         select HAVE_CLK
 872         help
 873           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 874
 875 config ARCH_VT8500
 876         bool "VIA/WonderMedia 85xx"
 877         select CPU_ARM926T
 878         select GENERIC_GPIO
 879         select ARCH_HAS_CPUFREQ
 880         select GENERIC_CLOCKEVENTS
 881         select ARCH_REQUIRE_GPIOLIB
 882         select HAVE_PWM
 883         help
 884           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 885 endchoice
 886
 887 #
 888 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 889 # Kconfigs may be included either alphabetically (according to the
 890 # plat- suffix) or along side the corresponding mach-* source.
 891 #
 892 source "arch/arm/mach-at91/Kconfig"
 893
 894 source "arch/arm/mach-bcmring/Kconfig"
 895
 896 source "arch/arm/mach-clps711x/Kconfig"
 897
 898 source "arch/arm/mach-cns3xxx/Kconfig"
 899
 900 source "arch/arm/mach-davinci/Kconfig"
 901
 902 source "arch/arm/mach-dove/Kconfig"
 903
 904 source "arch/arm/mach-ep93xx/Kconfig"
 905
 906 source "arch/arm/mach-footbridge/Kconfig"
 907
 908 source "arch/arm/mach-gemini/Kconfig"
 909
 910 source "arch/arm/mach-h720x/Kconfig"
 911
 912 source "arch/arm/mach-integrator/Kconfig"
 913
 914 source "arch/arm/mach-iop32x/Kconfig"
 915
 916 source "arch/arm/mach-iop33x/Kconfig"
 917
 918 source "arch/arm/mach-iop13xx/Kconfig"
 919
 920 source "arch/arm/mach-ixp4xx/Kconfig"
 921
 922 source "arch/arm/mach-ixp2000/Kconfig"
 923
 924 source "arch/arm/mach-ixp23xx/Kconfig"
 925
 926 source "arch/arm/mach-kirkwood/Kconfig"
 927
 928 source "arch/arm/mach-ks8695/Kconfig"
 929
 930 source "arch/arm/mach-loki/Kconfig"
 931
 932 source "arch/arm/mach-lpc32xx/Kconfig"
 933
 934 source "arch/arm/mach-msm/Kconfig"
 935
 936 source "arch/arm/mach-mv78xx0/Kconfig"
 937
 938 source "arch/arm/plat-mxc/Kconfig"
 939
 940 source "arch/arm/mach-mxs/Kconfig"
 941
 942 source "arch/arm/mach-netx/Kconfig"
 943
 944 source "arch/arm/mach-nomadik/Kconfig"
 945 source "arch/arm/plat-nomadik/Kconfig"
 946
 947 source "arch/arm/mach-nuc93x/Kconfig"
 948
 949 source "arch/arm/plat-omap/Kconfig"
 950
 951 source "arch/arm/mach-omap1/Kconfig"
 952
 953 source "arch/arm/mach-omap2/Kconfig"
 954
 955 source "arch/arm/mach-orion5x/Kconfig"
 956
 957 source "arch/arm/mach-pxa/Kconfig"
 958 source "arch/arm/plat-pxa/Kconfig"
 959
 960 source "arch/arm/mach-mmp/Kconfig"
 961
 962 source "arch/arm/mach-realview/Kconfig"
 963
 964 source "arch/arm/mach-sa1100/Kconfig"
 965
 966 source "arch/arm/plat-samsung/Kconfig"
 967 source "arch/arm/plat-s3c24xx/Kconfig"
 968 source "arch/arm/plat-s5p/Kconfig"
 969
 970 source "arch/arm/plat-spear/Kconfig"
 971
 972 source "arch/arm/plat-tcc/Kconfig"
 973
 974 if ARCH_S3C2410
 975 source "arch/arm/mach-s3c2400/Kconfig"
 976 source "arch/arm/mach-s3c2410/Kconfig"
 977 source "arch/arm/mach-s3c2412/Kconfig"
 978 source "arch/arm/mach-s3c2416/Kconfig"
 979 source "arch/arm/mach-s3c2440/Kconfig"
 980 source "arch/arm/mach-s3c2443/Kconfig"
 981 endif
 982
 983 if ARCH_S3C64XX
 984 source "arch/arm/mach-s3c64xx/Kconfig"
 985 endif
 986
 987 source "arch/arm/mach-s5p64x0/Kconfig"
 988
 989 source "arch/arm/mach-s5pc100/Kconfig"
 990
 991 source "arch/arm/mach-s5pv210/Kconfig"
 992
 993 source "arch/arm/mach-exynos4/Kconfig"
 994
 995 source "arch/arm/mach-shmobile/Kconfig"
 996
 997 source "arch/arm/mach-tegra/Kconfig"
 998
 999 source "arch/arm/mach-u300/Kconfig"
1000
1001 source "arch/arm/mach-ux500/Kconfig"
1002
1003 source "arch/arm/mach-versatile/Kconfig"
1004
1005 source "arch/arm/mach-vexpress/Kconfig"
1006 source "arch/arm/plat-versatile/Kconfig"
1007
1008 source "arch/arm/mach-vt8500/Kconfig"
1009
1010 source "arch/arm/mach-w90x900/Kconfig"
1011
1012 # Definitions to make life easier
1013 config ARCH_ACORN
1014         bool
1015
1016 config PLAT_IOP
1017         bool
1018         select GENERIC_CLOCKEVENTS
1019         select HAVE_SCHED_CLOCK
1020
1021 config PLAT_ORION
1022         bool
1023         select CLKSRC_MMIO
1024         select GENERIC_IRQ_CHIP
1025         select HAVE_SCHED_CLOCK
1026
1027 config PLAT_PXA
1028         bool
1029
1030 config PLAT_VERSATILE
1031         bool
1032
1033 config ARM_TIMER_SP804
1034         bool
1035         select CLKSRC_MMIO
1036
1037 source arch/arm/mm/Kconfig
1038
1039 config IWMMXT
1040         bool "Enable iWMMXt support"
1041         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1042         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1043         help
1044           Enable support for iWMMXt context switching at run time if
1045           running on a CPU that supports it.
1046
1047 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1048 config XSCALE_PMU
1049         bool
1050         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1051         default y
1052
1053 config CPU_HAS_PMU
1054         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1055                    (!ARCH_OMAP3 || OMAP3_EMU)
1056         default y
1057         bool
1058
1059 config MULTI_IRQ_HANDLER
1060         bool
1061         help
1062           Allow each machine to specify it's own IRQ handler at run time.
1063
1064 if !MMU
1065 source "arch/arm/Kconfig-nommu"
1066 endif
1067
1068 config ARM_ERRATA_411920
1069         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1070         depends on CPU_V6 || CPU_V6K
1071         help
1072           Invalidation of the Instruction Cache operation can
1073           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1074           It does not affect the MPCore. This option enables the ARM Ltd.
1075           recommended workaround.
1076
1077 config ARM_ERRATA_430973
1078         bool "ARM errata: Stale prediction on replaced interworking branch"
1079         depends on CPU_V7
1080         help
1081           This option enables the workaround for the 430973 Cortex-A8
1082           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1083           interworking branch is replaced with another code sequence at the
1084           same virtual address, whether due to self-modifying code or virtual
1085           to physical address re-mapping, Cortex-A8 does not recover from the
1086           stale interworking branch prediction. This results in Cortex-A8
1087           executing the new code sequence in the incorrect ARM or Thumb state.
1088           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1089           and also flushes the branch target cache at every context switch.
1090           Note that setting specific bits in the ACTLR register may not be
1091           available in non-secure mode.
1092
1093 config ARM_ERRATA_458693
1094         bool "ARM errata: Processor deadlock when a false hazard is created"
1095         depends on CPU_V7
1096         help
1097           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1098           erratum. For very specific sequences of memory operations, it is
1099           possible for a hazard condition intended for a cache line to instead
1100           be incorrectly associated with a different cache line. This false
1101           hazard might then cause a processor deadlock. The workaround enables
1102           the L1 caching of the NEON accesses and disables the PLD instruction
1103           in the ACTLR register. Note that setting specific bits in the ACTLR
1104           register may not be available in non-secure mode.
1105
1106 config ARM_ERRATA_460075
1107         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1108         depends on CPU_V7
1109         help
1110           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1111           erratum. Any asynchronous access to the L2 cache may encounter a
1112           situation in which recent store transactions to the L2 cache are lost
1113           and overwritten with stale memory contents from external memory. The
1114           workaround disables the write-allocate mode for the L2 cache via the
1115           ACTLR register. Note that setting specific bits in the ACTLR register
1116           may not be available in non-secure mode.
1117
1118 config ARM_ERRATA_742230
1119         bool "ARM errata: DMB operation may be faulty"
1120         depends on CPU_V7 && SMP
1121         help
1122           This option enables the workaround for the 742230 Cortex-A9
1123           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1124           between two write operations may not ensure the correct visibility
1125           ordering of the two writes. This workaround sets a specific bit in
1126           the diagnostic register of the Cortex-A9 which causes the DMB
1127           instruction to behave as a DSB, ensuring the correct behaviour of
1128           the two writes.
1129
1130 config ARM_ERRATA_742231
1131         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1132         depends on CPU_V7 && SMP
1133         help
1134           This option enables the workaround for the 742231 Cortex-A9
1135           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1136           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1137           accessing some data located in the same cache line, may get corrupted
1138           data due to bad handling of the address hazard when the line gets
1139           replaced from one of the CPUs at the same time as another CPU is
1140           accessing it. This workaround sets specific bits in the diagnostic
1141           register of the Cortex-A9 which reduces the linefill issuing
1142           capabilities of the processor.
1143
1144 config PL310_ERRATA_588369
1145         bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1146         depends on CACHE_L2X0
1147         help
1148            The PL310 L2 cache controller implements three types of Clean &
1149            Invalidate maintenance operations: by Physical Address
1150            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1151            They are architecturally defined to behave as the execution of a
1152            clean operation followed immediately by an invalidate operation,
1153            both performing to the same memory location. This functionality
1154            is not correctly implemented in PL310 as clean lines are not
1155            invalidated as a result of these operations.
1156
1157 config ARM_ERRATA_720789
1158         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1159         depends on CPU_V7 && SMP
1160         help
1161           This option enables the workaround for the 720789 Cortex-A9 (prior to
1162           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1163           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1164           As a consequence of this erratum, some TLB entries which should be
1165           invalidated are not, resulting in an incoherency in the system page
1166           tables. The workaround changes the TLB flushing routines to invalidate
1167           entries regardless of the ASID.
1168
1169 config PL310_ERRATA_727915
1170         bool "Background Clean & Invalidate by Way operation can cause data corruption"
1171         depends on CACHE_L2X0
1172         help
1173           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1174           operation (offset 0x7FC). This operation runs in background so that
1175           PL310 can handle normal accesses while it is in progress. Under very
1176           rare circumstances, due to this erratum, write data can be lost when
1177           PL310 treats a cacheable write transaction during a Clean &
1178           Invalidate by Way operation.
1179
1180 config ARM_ERRATA_743622
1181         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1182         depends on CPU_V7
1183         help
1184           This option enables the workaround for the 743622 Cortex-A9
1185           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1186           optimisation in the Cortex-A9 Store Buffer may lead to data
1187           corruption. This workaround sets a specific bit in the diagnostic
1188           register of the Cortex-A9 which disables the Store Buffer
1189           optimisation, preventing the defect from occurring. This has no
1190           visible impact on the overall performance or power consumption of the
1191           processor.
1192
1193 config ARM_ERRATA_751472
1194         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1195         depends on CPU_V7 && SMP
1196         help
1197           This option enables the workaround for the 751472 Cortex-A9 (prior
1198           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1199           completion of a following broadcasted operation if the second
1200           operation is received by a CPU before the ICIALLUIS has completed,
1201           potentially leading to corrupted entries in the cache or TLB.
1202
1203 config ARM_ERRATA_753970
1204         bool "ARM errata: cache sync operation may be faulty"
1205         depends on CACHE_PL310
1206         help
1207           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1208
1209           Under some condition the effect of cache sync operation on
1210           the store buffer still remains when the operation completes.
1211           This means that the store buffer is always asked to drain and
1212           this prevents it from merging any further writes. The workaround
1213           is to replace the normal offset of cache sync operation (0x730)
1214           by another offset targeting an unmapped PL310 register 0x740.
1215           This has the same effect as the cache sync operation: store buffer
1216           drain and waiting for all buffers empty.
1217
1218 config ARM_ERRATA_754322
1219         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1220         depends on CPU_V7
1221         help
1222           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1223           r3p*) erratum. A speculative memory access may cause a page table walk
1224           which starts prior to an ASID switch but completes afterwards. This
1225           can populate the micro-TLB with a stale entry which may be hit with
1226           the new ASID. This workaround places two dsb instructions in the mm
1227           switching code so that no page table walks can cross the ASID switch.
1228
1229 config ARM_ERRATA_754327
1230         bool "ARM errata: no automatic Store Buffer drain"
1231         depends on CPU_V7 && SMP
1232         help
1233           This option enables the workaround for the 754327 Cortex-A9 (prior to
1234           r2p0) erratum. The Store Buffer does not have any automatic draining
1235           mechanism and therefore a livelock may occur if an external agent
1236           continuously polls a memory location waiting to observe an update.
1237           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1238           written polling loops from denying visibility of updates to memory.
1239
1240 endmenu
1241
1242 source "arch/arm/common/Kconfig"
1243
1244 menu "Bus support"
1245
1246 config ARM_AMBA
1247         bool
1248
1249 config ISA
1250         bool
1251         help
1252           Find out whether you have ISA slots on your motherboard.  ISA is the
1253           name of a bus system, i.e. the way the CPU talks to the other stuff
1254           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1255           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1256           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1257
1258 # Select ISA DMA controller support
1259 config ISA_DMA
1260         bool
1261         select ISA_DMA_API
1262
1263 # Select ISA DMA interface
1264 config ISA_DMA_API
1265         bool
1266
1267 config PCI
1268         bool "PCI support" if MIGHT_HAVE_PCI
1269         help
1270           Find out whether you have a PCI motherboard. PCI is the name of a
1271           bus system, i.e. the way the CPU talks to the other stuff inside
1272           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1273           VESA. If you have PCI, say Y, otherwise N.
1274
1275 config PCI_DOMAINS
1276         bool
1277         depends on PCI
1278
1279 config PCI_NANOENGINE
1280         bool "BSE nanoEngine PCI support"
1281         depends on SA1100_NANOENGINE
1282         help
1283           Enable PCI on the BSE nanoEngine board.
1284
1285 config PCI_SYSCALL
1286         def_bool PCI
1287
1288 # Select the host bridge type
1289 config PCI_HOST_VIA82C505
1290         bool
1291         depends on PCI && ARCH_SHARK
1292         default y
1293
1294 config PCI_HOST_ITE8152
1295         bool
1296         depends on PCI && MACH_ARMCORE
1297         default y
1298         select DMABOUNCE
1299
1300 source "drivers/pci/Kconfig"
1301
1302 source "drivers/pcmcia/Kconfig"
1303
1304 endmenu
1305
1306 menu "Kernel Features"
1307
1308 source "kernel/time/Kconfig"
1309
1310 config SMP
1311         bool "Symmetric Multi-Processing"
1312         depends on CPU_V6K || CPU_V7
1313         depends on GENERIC_CLOCKEVENTS
1314         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1315                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1316                  ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1317                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1318         select USE_GENERIC_SMP_HELPERS
1319         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1320         help
1321           This enables support for systems with more than one CPU. If you have
1322           a system with only one CPU, like most personal computers, say N. If
1323           you have a system with more than one CPU, say Y.
1324
1325           If you say N here, the kernel will run on single and multiprocessor
1326           machines, but will use only one CPU of a multiprocessor machine. If
1327           you say Y here, the kernel will run on many, but not all, single
1328           processor machines. On a single processor machine, the kernel will
1329           run faster if you say N here.
1330
1331           See also <file:Documentation/i386/IO-APIC.txt>,
1332           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1333           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1334
1335           If you don't know what to do here, say N.
1336
1337 config SMP_ON_UP
1338         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1339         depends on EXPERIMENTAL
1340         depends on SMP && !XIP_KERNEL
1341         default y
1342         help
1343           SMP kernels contain instructions which fail on non-SMP processors.
1344           Enabling this option allows the kernel to modify itself to make
1345           these instructions safe.  Disabling it allows about 1K of space
1346           savings.
1347
1348           If you don't know what to do here, say Y.
1349
1350 config HAVE_ARM_SCU
1351         bool
1352         help
1353           This option enables support for the ARM system coherency unit
1354
1355 config HAVE_ARM_TWD
1356         bool
1357         depends on SMP
1358         select TICK_ONESHOT
1359         help
1360           This options enables support for the ARM timer and watchdog unit
1361
1362 choice
1363         prompt "Memory split"
1364         default VMSPLIT_3G
1365         help
1366           Select the desired split between kernel and user memory.
1367
1368           If you are not absolutely sure what you are doing, leave this
1369           option alone!
1370
1371         config VMSPLIT_3G
1372                 bool "3G/1G user/kernel split"
1373         config VMSPLIT_2G
1374                 bool "2G/2G user/kernel split"
1375         config VMSPLIT_1G
1376                 bool "1G/3G user/kernel split"
1377 endchoice
1378
1379 config PAGE_OFFSET
1380         hex
1381         default 0x40000000 if VMSPLIT_1G
1382         default 0x80000000 if VMSPLIT_2G
1383         default 0xC0000000
1384
1385 config NR_CPUS
1386         int "Maximum number of CPUs (2-32)"
1387         range 2 32
1388         depends on SMP
1389         default "4"
1390
1391 config HOTPLUG_CPU
1392         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1393         depends on SMP && HOTPLUG && EXPERIMENTAL
1394         help
1395           Say Y here to experiment with turning CPUs off and on.  CPUs
1396           can be controlled through /sys/devices/system/cpu.
1397
1398 config LOCAL_TIMERS
1399         bool "Use local timer interrupts"
1400         depends on SMP
1401         default y
1402         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1403         help
1404           Enable support for local timers on SMP platforms, rather then the
1405           legacy IPI broadcast method.  Local timers allows the system
1406           accounting to be spread across the timer interval, preventing a
1407           "thundering herd" at every timer tick.
1408
1409 source kernel/Kconfig.preempt
1410
1411 config HZ
1412         int
1413         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1414                 ARCH_S5PV210 || ARCH_EXYNOS4
1415         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1416         default AT91_TIMER_HZ if ARCH_AT91
1417         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1418         default 100
1419
1420 config THUMB2_KERNEL
1421         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1422         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1423         select AEABI
1424         select ARM_ASM_UNIFIED
1425         help
1426           By enabling this option, the kernel will be compiled in
1427           Thumb-2 mode. A compiler/assembler that understand the unified
1428           ARM-Thumb syntax is needed.
1429
1430           If unsure, say N.
1431
1432 config THUMB2_AVOID_R_ARM_THM_JUMP11
1433         bool "Work around buggy Thumb-2 short branch relocations in gas"
1434         depends on THUMB2_KERNEL && MODULES
1435         default y
1436         help
1437           Various binutils versions can resolve Thumb-2 branches to
1438           locally-defined, preemptible global symbols as short-range "b.n"
1439           branch instructions.
1440
1441           This is a problem, because there's no guarantee the final
1442           destination of the symbol, or any candidate locations for a
1443           trampoline, are within range of the branch.  For this reason, the
1444           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1445           relocation in modules at all, and it makes little sense to add
1446           support.
1447
1448           The symptom is that the kernel fails with an "unsupported
1449           relocation" error when loading some modules.
1450
1451           Until fixed tools are available, passing
1452           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1453           code which hits this problem, at the cost of a bit of extra runtime
1454           stack usage in some cases.
1455
1456           The problem is described in more detail at:
1457               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1458
1459           Only Thumb-2 kernels are affected.
1460
1461           Unless you are sure your tools don't have this problem, say Y.
1462
1463 config ARM_ASM_UNIFIED
1464         bool
1465
1466 config AEABI
1467         bool "Use the ARM EABI to compile the kernel"
1468         help
1469           This option allows for the kernel to be compiled using the latest
1470           ARM ABI (aka EABI).  This is only useful if you are using a user
1471           space environment that is also compiled with EABI.
1472
1473           Since there are major incompatibilities between the legacy ABI and
1474           EABI, especially with regard to structure member alignment, this
1475           option also changes the kernel syscall calling convention to
1476           disambiguate both ABIs and allow for backward compatibility support
1477           (selected with CONFIG_OABI_COMPAT).
1478
1479           To use this you need GCC version 4.0.0 or later.
1480
1481 config OABI_COMPAT
1482         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1483         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1484         default y
1485         help
1486           This option preserves the old syscall interface along with the
1487           new (ARM EABI) one. It also provides a compatibility layer to
1488           intercept syscalls that have structure arguments which layout
1489           in memory differs between the legacy ABI and the new ARM EABI
1490           (only for non "thumb" binaries). This option adds a tiny
1491           overhead to all syscalls and produces a slightly larger kernel.
1492           If you know you'll be using only pure EABI user space then you
1493           can say N here. If this option is not selected and you attempt
1494           to execute a legacy ABI binary then the result will be
1495           UNPREDICTABLE (in fact it can be predicted that it won't work
1496           at all). If in doubt say Y.
1497
1498 config ARCH_HAS_HOLES_MEMORYMODEL
1499         bool
1500
1501 config ARCH_SPARSEMEM_ENABLE
1502         bool
1503
1504 config ARCH_SPARSEMEM_DEFAULT
1505         def_bool ARCH_SPARSEMEM_ENABLE
1506
1507 config ARCH_SELECT_MEMORY_MODEL
1508         def_bool ARCH_SPARSEMEM_ENABLE
1509
1510 config HAVE_ARCH_PFN_VALID
1511         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1512
1513 config HIGHMEM
1514         bool "High Memory Support"
1515         depends on MMU
1516         help
1517           The address space of ARM processors is only 4 Gigabytes large
1518           and it has to accommodate user address space, kernel address
1519           space as well as some memory mapped IO. That means that, if you
1520           have a large amount of physical memory and/or IO, not all of the
1521           memory can be "permanently mapped" by the kernel. The physical
1522           memory that is not permanently mapped is called "high memory".
1523
1524           Depending on the selected kernel/user memory split, minimum
1525           vmalloc space and actual amount of RAM, you may not need this
1526           option which should result in a slightly faster kernel.
1527
1528           If unsure, say n.
1529
1530 config HIGHPTE
1531         bool "Allocate 2nd-level pagetables from highmem"
1532         depends on HIGHMEM
1533
1534 config HW_PERF_EVENTS
1535         bool "Enable hardware performance counter support for perf events"
1536         depends on PERF_EVENTS && CPU_HAS_PMU
1537         default y
1538         help
1539           Enable hardware performance counter support for perf events. If
1540           disabled, perf events will use software events only.
1541
1542 source "mm/Kconfig"
1543
1544 config FORCE_MAX_ZONEORDER
1545         int "Maximum zone order" if ARCH_SHMOBILE
1546         range 11 64 if ARCH_SHMOBILE
1547         default "9" if SA1111
1548         default "11"
1549         help
1550           The kernel memory allocator divides physically contiguous memory
1551           blocks into "zones", where each zone is a power of two number of
1552           pages.  This option selects the largest power of two that the kernel
1553           keeps in the memory allocator.  If you need to allocate very large
1554           blocks of physically contiguous memory, then you may need to
1555           increase this value.
1556
1557           This config option is actually maximum order plus one. For example,
1558           a value of 11 means that the largest free memory block is 2^10 pages.
1559
1560 config LEDS
1561         bool "Timer and CPU usage LEDs"
1562         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1563                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1564                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1565                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1566                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1567                    ARCH_AT91 || ARCH_DAVINCI || \
1568                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1569         help
1570           If you say Y here, the LEDs on your machine will be used
1571           to provide useful information about your current system status.
1572
1573           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1574           be able to select which LEDs are active using the options below. If
1575           you are compiling a kernel for the EBSA-110 or the LART however, the
1576           red LED will simply flash regularly to indicate that the system is
1577           still functional. It is safe to say Y here if you have a CATS
1578           system, but the driver will do nothing.
1579
1580 config LEDS_TIMER
1581         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1582                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1583                             || MACH_OMAP_PERSEUS2
1584         depends on LEDS
1585         depends on !GENERIC_CLOCKEVENTS
1586         default y if ARCH_EBSA110
1587         help
1588           If you say Y here, one of the system LEDs (the green one on the
1589           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1590           will flash regularly to indicate that the system is still
1591           operational. This is mainly useful to kernel hackers who are
1592           debugging unstable kernels.
1593
1594           The LART uses the same LED for both Timer LED and CPU usage LED
1595           functions. You may choose to use both, but the Timer LED function
1596           will overrule the CPU usage LED.
1597
1598 config LEDS_CPU
1599         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1600                         !ARCH_OMAP) \
1601                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1602                         || MACH_OMAP_PERSEUS2
1603         depends on LEDS
1604         help
1605           If you say Y here, the red LED will be used to give a good real
1606           time indication of CPU usage, by lighting whenever the idle task
1607           is not currently executing.
1608
1609           The LART uses the same LED for both Timer LED and CPU usage LED
1610           functions. You may choose to use both, but the Timer LED function
1611           will overrule the CPU usage LED.
1612
1613 config ALIGNMENT_TRAP
1614         bool
1615         depends on CPU_CP15_MMU
1616         default y if !ARCH_EBSA110
1617         select HAVE_PROC_CPU if PROC_FS
1618         help
1619           ARM processors cannot fetch/store information which is not
1620           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1621           address divisible by 4. On 32-bit ARM processors, these non-aligned
1622           fetch/store instructions will be emulated in software if you say
1623           here, which has a severe performance impact. This is necessary for
1624           correct operation of some network protocols. With an IP-only
1625           configuration it is safe to say N, otherwise say Y.
1626
1627 config UACCESS_WITH_MEMCPY
1628         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1629         depends on MMU && EXPERIMENTAL
1630         default y if CPU_FEROCEON
1631         help
1632           Implement faster copy_to_user and clear_user methods for CPU
1633           cores where a 8-word STM instruction give significantly higher
1634           memory write throughput than a sequence of individual 32bit stores.
1635
1636           A possible side effect is a slight increase in scheduling latency
1637           between threads sharing the same address space if they invoke
1638           such copy operations with large buffers.
1639
1640           However, if the CPU data cache is using a write-allocate mode,
1641           this option is unlikely to provide any performance gain.
1642
1643 config SECCOMP
1644         bool
1645         prompt "Enable seccomp to safely compute untrusted bytecode"
1646         ---help---
1647           This kernel feature is useful for number crunching applications
1648           that may need to compute untrusted bytecode during their
1649           execution. By using pipes or other transports made available to
1650           the process as file descriptors supporting the read/write
1651           syscalls, it's possible to isolate those applications in
1652           their own address space using seccomp. Once seccomp is
1653           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1654           and the task is only allowed to execute a few safe syscalls
1655           defined by each seccomp mode.
1656
1657 config CC_STACKPROTECTOR
1658         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1659         depends on EXPERIMENTAL
1660         help
1661           This option turns on the -fstack-protector GCC feature. This
1662           feature puts, at the beginning of functions, a canary value on
1663           the stack just before the return address, and validates
1664           the value just before actually returning.  Stack based buffer
1665           overflows (that need to overwrite this return address) now also
1666           overwrite the canary, which gets detected and the attack is then
1667           neutralized via a kernel panic.
1668           This feature requires gcc version 4.2 or above.
1669
1670 config DEPRECATED_PARAM_STRUCT
1671         bool "Provide old way to pass kernel parameters"
1672         help
1673           This was deprecated in 2001 and announced to live on for 5 years.
1674           Some old boot loaders still use this way.
1675
1676 endmenu
1677
1678 menu "Boot options"
1679
1680 config USE_OF
1681         bool "Flattened Device Tree support"
1682         select OF
1683         select OF_EARLY_FLATTREE
1684         help
1685           Include support for flattened device tree machine descriptions.
1686
1687 # Compressed boot loader in ROM.  Yes, we really want to ask about
1688 # TEXT and BSS so we preserve their values in the config files.
1689 config ZBOOT_ROM_TEXT
1690         hex "Compressed ROM boot loader base address"
1691         default "0"
1692         help
1693           The physical address at which the ROM-able zImage is to be
1694           placed in the target.  Platforms which normally make use of
1695           ROM-able zImage formats normally set this to a suitable
1696           value in their defconfig file.
1697
1698           If ZBOOT_ROM is not enabled, this has no effect.
1699
1700 config ZBOOT_ROM_BSS
1701         hex "Compressed ROM boot loader BSS address"
1702         default "0"
1703         help
1704           The base address of an area of read/write memory in the target
1705           for the ROM-able zImage which must be available while the
1706           decompressor is running. It must be large enough to hold the
1707           entire decompressed kernel plus an additional 128 KiB.
1708           Platforms which normally make use of ROM-able zImage formats
1709           normally set this to a suitable value in their defconfig file.
1710
1711           If ZBOOT_ROM is not enabled, this has no effect.
1712
1713 config ZBOOT_ROM
1714         bool "Compressed boot loader in ROM/flash"
1715         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1716         help
1717           Say Y here if you intend to execute your compressed kernel image
1718           (zImage) directly from ROM or flash.  If unsure, say N.
1719
1720 choice
1721         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1722         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1723         default ZBOOT_ROM_NONE
1724         help
1725           Include experimental SD/MMC loading code in the ROM-able zImage.
1726           With this enabled it is possible to write the the ROM-able zImage
1727           kernel image to an MMC or SD card and boot the kernel straight
1728           from the reset vector. At reset the processor Mask ROM will load
1729           the first part of the the ROM-able zImage which in turn loads the
1730           rest the kernel image to RAM.
1731
1732 config ZBOOT_ROM_NONE
1733         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1734         help
1735           Do not load image from SD or MMC
1736
1737 config ZBOOT_ROM_MMCIF
1738         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1739         help
1740           Load image from MMCIF hardware block.
1741
1742 config ZBOOT_ROM_SH_MOBILE_SDHI
1743         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1744         help
1745           Load image from SDHI hardware block
1746
1747 endchoice
1748
1749 config CMDLINE
1750         string "Default kernel command string"
1751         default ""
1752         help
1753           On some architectures (EBSA110 and CATS), there is currently no way
1754           for the boot loader to pass arguments to the kernel. For these
1755           architectures, you should supply some command-line options at build
1756           time by entering them here. As a minimum, you should specify the
1757           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1758
1759 choice
1760         prompt "Kernel command line type" if CMDLINE != ""
1761         default CMDLINE_FROM_BOOTLOADER
1762
1763 config CMDLINE_FROM_BOOTLOADER
1764         bool "Use bootloader kernel arguments if available"
1765         help
1766           Uses the command-line options passed by the boot loader. If
1767           the boot loader doesn't provide any, the default kernel command
1768           string provided in CMDLINE will be used.
1769
1770 config CMDLINE_EXTEND
1771         bool "Extend bootloader kernel arguments"
1772         help
1773           The command-line arguments provided by the boot loader will be
1774           appended to the default kernel command string.
1775
1776 config CMDLINE_FORCE
1777         bool "Always use the default kernel command string"
1778         help
1779           Always use the default kernel command string, even if the boot
1780           loader passes other arguments to the kernel.
1781           This is useful if you cannot or don't want to change the
1782           command-line options your boot loader passes to the kernel.
1783 endchoice
1784
1785 config XIP_KERNEL
1786         bool "Kernel Execute-In-Place from ROM"
1787         depends on !ZBOOT_ROM
1788         help
1789           Execute-In-Place allows the kernel to run from non-volatile storage
1790           directly addressable by the CPU, such as NOR flash. This saves RAM
1791           space since the text section of the kernel is not loaded from flash
1792           to RAM.  Read-write sections, such as the data section and stack,
1793           are still copied to RAM.  The XIP kernel is not compressed since
1794           it has to run directly from flash, so it will take more space to
1795           store it.  The flash address used to link the kernel object files,
1796           and for storing it, is configuration dependent. Therefore, if you
1797           say Y here, you must know the proper physical address where to
1798           store the kernel image depending on your own flash memory usage.
1799
1800           Also note that the make target becomes "make xipImage" rather than
1801           "make zImage" or "make Image".  The final kernel binary to put in
1802           ROM memory will be arch/arm/boot/xipImage.
1803
1804           If unsure, say N.
1805
1806 config XIP_PHYS_ADDR
1807         hex "XIP Kernel Physical Location"
1808         depends on XIP_KERNEL
1809         default "0x00080000"
1810         help
1811           This is the physical address in your flash memory the kernel will
1812           be linked for and stored to.  This address is dependent on your
1813           own flash usage.
1814
1815 config KEXEC
1816         bool "Kexec system call (EXPERIMENTAL)"
1817         depends on EXPERIMENTAL
1818         help
1819           kexec is a system call that implements the ability to shutdown your
1820           current kernel, and to start another kernel.  It is like a reboot
1821           but it is independent of the system firmware.   And like a reboot
1822           you can start any kernel with it, not just Linux.
1823
1824           It is an ongoing process to be certain the hardware in a machine
1825           is properly shutdown, so do not be surprised if this code does not
1826           initially work for you.  It may help to enable device hotplugging
1827           support.
1828
1829 config ATAGS_PROC
1830         bool "Export atags in procfs"
1831         depends on KEXEC
1832         default y
1833         help
1834           Should the atags used to boot the kernel be exported in an "atags"
1835           file in procfs. Useful with kexec.
1836
1837 config CRASH_DUMP
1838         bool "Build kdump crash kernel (EXPERIMENTAL)"
1839         depends on EXPERIMENTAL
1840         help
1841           Generate crash dump after being started by kexec. This should
1842           be normally only set in special crash dump kernels which are
1843           loaded in the main kernel with kexec-tools into a specially
1844           reserved region and then later executed after a crash by
1845           kdump/kexec. The crash dump kernel must be compiled to a
1846           memory address not used by the main kernel
1847
1848           For more details see Documentation/kdump/kdump.txt
1849
1850 config AUTO_ZRELADDR
1851         bool "Auto calculation of the decompressed kernel image address"
1852         depends on !ZBOOT_ROM && !ARCH_U300
1853         help
1854           ZRELADDR is the physical address where the decompressed kernel
1855           image will be placed. If AUTO_ZRELADDR is selected, the address
1856           will be determined at run-time by masking the current IP with
1857           0xf8000000. This assumes the zImage being placed in the first 128MB
1858           from start of memory.
1859
1860 endmenu
1861
1862 menu "CPU Power Management"
1863
1864 if ARCH_HAS_CPUFREQ
1865
1866 source "drivers/cpufreq/Kconfig"
1867
1868 config CPU_FREQ_IMX
1869         tristate "CPUfreq driver for i.MX CPUs"
1870         depends on ARCH_MXC && CPU_FREQ
1871         help
1872           This enables the CPUfreq driver for i.MX CPUs.
1873
1874 config CPU_FREQ_SA1100
1875         bool
1876
1877 config CPU_FREQ_SA1110
1878         bool
1879
1880 config CPU_FREQ_INTEGRATOR
1881         tristate "CPUfreq driver for ARM Integrator CPUs"
1882         depends on ARCH_INTEGRATOR && CPU_FREQ
1883         default y
1884         help
1885           This enables the CPUfreq driver for ARM Integrator CPUs.
1886
1887           For details, take a look at <file:Documentation/cpu-freq>.
1888
1889           If in doubt, say Y.
1890
1891 config CPU_FREQ_PXA
1892         bool
1893         depends on CPU_FREQ && ARCH_PXA && PXA25x
1894         default y
1895         select CPU_FREQ_DEFAULT_GOV_USERSPACE
1896
1897 config CPU_FREQ_S3C64XX
1898         bool "CPUfreq support for Samsung S3C64XX CPUs"
1899         depends on CPU_FREQ && CPU_S3C6410
1900
1901 config CPU_FREQ_S3C
1902         bool
1903         help
1904           Internal configuration node for common cpufreq on Samsung SoC
1905
1906 config CPU_FREQ_S3C24XX
1907         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1908         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1909         select CPU_FREQ_S3C
1910         help
1911           This enables the CPUfreq driver for the Samsung S3C24XX family
1912           of CPUs.
1913
1914           For details, take a look at <file:Documentation/cpu-freq>.
1915
1916           If in doubt, say N.
1917
1918 config CPU_FREQ_S3C24XX_PLL
1919         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1920         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1921         help
1922           Compile in support for changing the PLL frequency from the
1923           S3C24XX series CPUfreq driver. The PLL takes time to settle
1924           after a frequency change, so by default it is not enabled.
1925
1926           This also means that the PLL tables for the selected CPU(s) will
1927           be built which may increase the size of the kernel image.
1928
1929 config CPU_FREQ_S3C24XX_DEBUG
1930         bool "Debug CPUfreq Samsung driver core"
1931         depends on CPU_FREQ_S3C24XX
1932         help
1933           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1934
1935 config CPU_FREQ_S3C24XX_IODEBUG
1936         bool "Debug CPUfreq Samsung driver IO timing"
1937         depends on CPU_FREQ_S3C24XX
1938         help
1939           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1940
1941 config CPU_FREQ_S3C24XX_DEBUGFS
1942         bool "Export debugfs for CPUFreq"
1943         depends on CPU_FREQ_S3C24XX && DEBUG_FS
1944         help
1945           Export status information via debugfs.
1946
1947 endif
1948
1949 source "drivers/cpuidle/Kconfig"
1950
1951 endmenu
1952
1953 menu "Floating point emulation"
1954
1955 comment "At least one emulation must be selected"
1956
1957 config FPE_NWFPE
1958         bool "NWFPE math emulation"
1959         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1960         ---help---
1961           Say Y to include the NWFPE floating point emulator in the kernel.
1962           This is necessary to run most binaries. Linux does not currently
1963           support floating point hardware so you need to say Y here even if
1964           your machine has an FPA or floating point co-processor podule.
1965
1966           You may say N here if you are going to load the Acorn FPEmulator
1967           early in the bootup.
1968
1969 config FPE_NWFPE_XP
1970         bool "Support extended precision"
1971         depends on FPE_NWFPE
1972         help
1973           Say Y to include 80-bit support in the kernel floating-point
1974           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
1975           Note that gcc does not generate 80-bit operations by default,
1976           so in most cases this option only enlarges the size of the
1977           floating point emulator without any good reason.
1978
1979           You almost surely want to say N here.
1980
1981 config FPE_FASTFPE
1982         bool "FastFPE math emulation (EXPERIMENTAL)"
1983         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1984         ---help---
1985           Say Y here to include the FAST floating point emulator in the kernel.
1986           This is an experimental much faster emulator which now also has full
1987           precision for the mantissa.  It does not support any exceptions.
1988           It is very simple, and approximately 3-6 times faster than NWFPE.
1989
1990           It should be sufficient for most programs.  It may be not suitable
1991           for scientific calculations, but you have to check this for yourself.
1992           If you do not feel you need a faster FP emulation you should better
1993           choose NWFPE.
1994
1995 config VFP
1996         bool "VFP-format floating point maths"
1997         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1998         help
1999           Say Y to include VFP support code in the kernel. This is needed
2000           if your hardware includes a VFP unit.
2001
2002           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2003           release notes and additional status information.
2004
2005           Say N if your target does not have VFP hardware.
2006
2007 config VFPv3
2008         bool
2009         depends on VFP
2010         default y if CPU_V7
2011
2012 config NEON
2013         bool "Advanced SIMD (NEON) Extension support"
2014         depends on VFPv3 && CPU_V7
2015         help
2016           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2017           Extension.
2018
2019 endmenu
2020
2021 menu "Userspace binary formats"
2022
2023 source "fs/Kconfig.binfmt"
2024
2025 config ARTHUR
2026         tristate "RISC OS personality"
2027         depends on !AEABI
2028         help
2029           Say Y here to include the kernel code necessary if you want to run
2030           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2031           experimental; if this sounds frightening, say N and sleep in peace.
2032           You can also say M here to compile this support as a module (which
2033           will be called arthur).
2034
2035 endmenu
2036
2037 menu "Power management options"
2038
2039 source "kernel/power/Kconfig"
2040
2041 config ARCH_SUSPEND_POSSIBLE
2042         depends on !ARCH_S5P64X0 && !ARCH_S5PC100
2043         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2044                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2045         def_bool y
2046
2047 endmenu
2048
2049 source "net/Kconfig"
2050
2051 source "drivers/Kconfig"
2052
2053 source "fs/Kconfig"
2054
2055 source "arch/arm/Kconfig.debug"
2056
2057 source "security/Kconfig"
2058
2059 source "crypto/Kconfig"
2060
2061 source "lib/Kconfig"