ARM: bcmring: convert to sp804 clocksource
[deliverable/linux.git] / arch / arm / Kconfig
1 config ARM
2 bool
3 default y
4 select HAVE_AOUT
5 select HAVE_DMA_API_DEBUG
6 select HAVE_IDE
7 select HAVE_MEMBLOCK
8 select RTC_LIB
9 select SYS_SUPPORTS_APM_EMULATION
10 select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
12 select HAVE_ARCH_KGDB
13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
14 select HAVE_KRETPROBES if (HAVE_KPROBES)
15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
19 select HAVE_GENERIC_DMA_COHERENT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
22 select HAVE_KERNEL_LZMA
23 select HAVE_IRQ_WORK
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
26 select HAVE_REGS_AND_STACK_ACCESS_API
27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
28 select HAVE_C_RECORDMCOUNT
29 select HAVE_GENERIC_HARDIRQS
30 select HAVE_SPARSE_IRQ
31 select GENERIC_IRQ_SHOW
32 help
33 The ARM series is a line of low-power-consumption RISC chip designs
34 licensed by ARM Ltd and targeted at embedded applications and
35 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
36 manufactured, but legacy ARM-based PC hardware remains popular in
37 Europe. There is an ARM Linux project with a web page at
38 <http://www.arm.linux.org.uk/>.
39
40 config HAVE_PWM
41 bool
42
43 config MIGHT_HAVE_PCI
44 bool
45
46 config SYS_SUPPORTS_APM_EMULATION
47 bool
48
49 config HAVE_SCHED_CLOCK
50 bool
51
52 config GENERIC_GPIO
53 bool
54
55 config ARCH_USES_GETTIMEOFFSET
56 bool
57 default n
58
59 config GENERIC_CLOCKEVENTS
60 bool
61
62 config GENERIC_CLOCKEVENTS_BROADCAST
63 bool
64 depends on GENERIC_CLOCKEVENTS
65 default y if SMP
66
67 config KTIME_SCALAR
68 bool
69 default y
70
71 config HAVE_TCM
72 bool
73 select GENERIC_ALLOCATOR
74
75 config HAVE_PROC_CPU
76 bool
77
78 config NO_IOPORT
79 bool
80
81 config EISA
82 bool
83 ---help---
84 The Extended Industry Standard Architecture (EISA) bus was
85 developed as an open alternative to the IBM MicroChannel bus.
86
87 The EISA bus provided some of the features of the IBM MicroChannel
88 bus while maintaining backward compatibility with cards made for
89 the older ISA bus. The EISA bus saw limited use between 1988 and
90 1995 when it was made obsolete by the PCI bus.
91
92 Say Y here if you are building a kernel for an EISA-based machine.
93
94 Otherwise, say N.
95
96 config SBUS
97 bool
98
99 config MCA
100 bool
101 help
102 MicroChannel Architecture is found in some IBM PS/2 machines and
103 laptops. It is a bus system similar to PCI or ISA. See
104 <file:Documentation/mca.txt> (and especially the web page given
105 there) before attempting to build an MCA bus kernel.
106
107 config STACKTRACE_SUPPORT
108 bool
109 default y
110
111 config HAVE_LATENCYTOP_SUPPORT
112 bool
113 depends on !SMP
114 default y
115
116 config LOCKDEP_SUPPORT
117 bool
118 default y
119
120 config TRACE_IRQFLAGS_SUPPORT
121 bool
122 default y
123
124 config HARDIRQS_SW_RESEND
125 bool
126 default y
127
128 config GENERIC_IRQ_PROBE
129 bool
130 default y
131
132 config GENERIC_LOCKBREAK
133 bool
134 default y
135 depends on SMP && PREEMPT
136
137 config RWSEM_GENERIC_SPINLOCK
138 bool
139 default y
140
141 config RWSEM_XCHGADD_ALGORITHM
142 bool
143
144 config ARCH_HAS_ILOG2_U32
145 bool
146
147 config ARCH_HAS_ILOG2_U64
148 bool
149
150 config ARCH_HAS_CPUFREQ
151 bool
152 help
153 Internal node to signify that the ARCH has CPUFREQ support
154 and that the relevant menu configurations are displayed for
155 it.
156
157 config ARCH_HAS_CPU_IDLE_WAIT
158 def_bool y
159
160 config GENERIC_HWEIGHT
161 bool
162 default y
163
164 config GENERIC_CALIBRATE_DELAY
165 bool
166 default y
167
168 config ARCH_MAY_HAVE_PC_FDC
169 bool
170
171 config ZONE_DMA
172 bool
173
174 config NEED_DMA_MAP_STATE
175 def_bool y
176
177 config GENERIC_ISA_DMA
178 bool
179
180 config FIQ
181 bool
182
183 config ARCH_MTD_XIP
184 bool
185
186 config VECTORS_BASE
187 hex
188 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
189 default DRAM_BASE if REMAP_VECTORS_TO_RAM
190 default 0x00000000
191 help
192 The base address of exception vectors.
193
194 config ARM_PATCH_PHYS_VIRT
195 bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
196 depends on EXPERIMENTAL
197 depends on !XIP_KERNEL && MMU
198 depends on !ARCH_REALVIEW || !SPARSEMEM
199 help
200 Patch phys-to-virt translation functions at runtime according to
201 the position of the kernel in system memory.
202
203 This can only be used with non-XIP with MMU kernels where
204 the base of physical memory is at a 16MB boundary.
205
206 config ARM_PATCH_PHYS_VIRT_16BIT
207 def_bool y
208 depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
209
210 source "init/Kconfig"
211
212 source "kernel/Kconfig.freezer"
213
214 menu "System Type"
215
216 config MMU
217 bool "MMU-based Paged Memory Management Support"
218 default y
219 help
220 Select if you want MMU-based virtualised addressing space
221 support by paged memory management. If unsure, say 'Y'.
222
223 #
224 # The "ARM system type" choice list is ordered alphabetically by option
225 # text. Please add new entries in the option alphabetic order.
226 #
227 choice
228 prompt "ARM system type"
229 default ARCH_VERSATILE
230
231 config ARCH_INTEGRATOR
232 bool "ARM Ltd. Integrator family"
233 select ARM_AMBA
234 select ARCH_HAS_CPUFREQ
235 select CLKDEV_LOOKUP
236 select ICST
237 select GENERIC_CLOCKEVENTS
238 select PLAT_VERSATILE
239 select PLAT_VERSATILE_FPGA_IRQ
240 help
241 Support for ARM's Integrator platform.
242
243 config ARCH_REALVIEW
244 bool "ARM Ltd. RealView family"
245 select ARM_AMBA
246 select CLKDEV_LOOKUP
247 select ICST
248 select GENERIC_CLOCKEVENTS
249 select ARCH_WANT_OPTIONAL_GPIOLIB
250 select PLAT_VERSATILE
251 select PLAT_VERSATILE_CLCD
252 select ARM_TIMER_SP804
253 select GPIO_PL061 if GPIOLIB
254 help
255 This enables support for ARM Ltd RealView boards.
256
257 config ARCH_VERSATILE
258 bool "ARM Ltd. Versatile family"
259 select ARM_AMBA
260 select ARM_VIC
261 select CLKDEV_LOOKUP
262 select ICST
263 select GENERIC_CLOCKEVENTS
264 select ARCH_WANT_OPTIONAL_GPIOLIB
265 select PLAT_VERSATILE
266 select PLAT_VERSATILE_CLCD
267 select PLAT_VERSATILE_FPGA_IRQ
268 select ARM_TIMER_SP804
269 help
270 This enables support for ARM Ltd Versatile board.
271
272 config ARCH_VEXPRESS
273 bool "ARM Ltd. Versatile Express family"
274 select ARCH_WANT_OPTIONAL_GPIOLIB
275 select ARM_AMBA
276 select ARM_TIMER_SP804
277 select CLKDEV_LOOKUP
278 select GENERIC_CLOCKEVENTS
279 select HAVE_CLK
280 select HAVE_PATA_PLATFORM
281 select ICST
282 select PLAT_VERSATILE
283 select PLAT_VERSATILE_CLCD
284 help
285 This enables support for the ARM Ltd Versatile Express boards.
286
287 config ARCH_AT91
288 bool "Atmel AT91"
289 select ARCH_REQUIRE_GPIOLIB
290 select HAVE_CLK
291 help
292 This enables support for systems based on the Atmel AT91RM9200,
293 AT91SAM9 and AT91CAP9 processors.
294
295 config ARCH_BCMRING
296 bool "Broadcom BCMRING"
297 depends on MMU
298 select CPU_V6
299 select ARM_AMBA
300 select ARM_TIMER_SP804
301 select CLKDEV_LOOKUP
302 select GENERIC_CLOCKEVENTS
303 select ARCH_WANT_OPTIONAL_GPIOLIB
304 help
305 Support for Broadcom's BCMRing platform.
306
307 config ARCH_CLPS711X
308 bool "Cirrus Logic CLPS711x/EP721x-based"
309 select CPU_ARM720T
310 select ARCH_USES_GETTIMEOFFSET
311 help
312 Support for Cirrus Logic 711x/721x based boards.
313
314 config ARCH_CNS3XXX
315 bool "Cavium Networks CNS3XXX family"
316 select CPU_V6
317 select GENERIC_CLOCKEVENTS
318 select ARM_GIC
319 select MIGHT_HAVE_PCI
320 select PCI_DOMAINS if PCI
321 help
322 Support for Cavium Networks CNS3XXX platform.
323
324 config ARCH_GEMINI
325 bool "Cortina Systems Gemini"
326 select CPU_FA526
327 select ARCH_REQUIRE_GPIOLIB
328 select ARCH_USES_GETTIMEOFFSET
329 help
330 Support for the Cortina Systems Gemini family SoCs
331
332 config ARCH_EBSA110
333 bool "EBSA-110"
334 select CPU_SA110
335 select ISA
336 select NO_IOPORT
337 select ARCH_USES_GETTIMEOFFSET
338 help
339 This is an evaluation board for the StrongARM processor available
340 from Digital. It has limited hardware on-board, including an
341 Ethernet interface, two PCMCIA sockets, two serial ports and a
342 parallel port.
343
344 config ARCH_EP93XX
345 bool "EP93xx-based"
346 select CPU_ARM920T
347 select ARM_AMBA
348 select ARM_VIC
349 select CLKDEV_LOOKUP
350 select ARCH_REQUIRE_GPIOLIB
351 select ARCH_HAS_HOLES_MEMORYMODEL
352 select ARCH_USES_GETTIMEOFFSET
353 help
354 This enables support for the Cirrus EP93xx series of CPUs.
355
356 config ARCH_FOOTBRIDGE
357 bool "FootBridge"
358 select CPU_SA110
359 select FOOTBRIDGE
360 select GENERIC_CLOCKEVENTS
361 help
362 Support for systems based on the DC21285 companion chip
363 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
364
365 config ARCH_MXC
366 bool "Freescale MXC/iMX-based"
367 select GENERIC_CLOCKEVENTS
368 select ARCH_REQUIRE_GPIOLIB
369 select CLKDEV_LOOKUP
370 select CLKSRC_MMIO
371 select HAVE_SCHED_CLOCK
372 help
373 Support for Freescale MXC/iMX-based family of processors
374
375 config ARCH_MXS
376 bool "Freescale MXS-based"
377 select GENERIC_CLOCKEVENTS
378 select ARCH_REQUIRE_GPIOLIB
379 select CLKDEV_LOOKUP
380 select CLKSRC_MMIO
381 help
382 Support for Freescale MXS-based family of processors
383
384 config ARCH_STMP3XXX
385 bool "Freescale STMP3xxx"
386 select CPU_ARM926T
387 select CLKDEV_LOOKUP
388 select ARCH_REQUIRE_GPIOLIB
389 select GENERIC_CLOCKEVENTS
390 select USB_ARCH_HAS_EHCI
391 help
392 Support for systems based on the Freescale 3xxx CPUs.
393
394 config ARCH_NETX
395 bool "Hilscher NetX based"
396 select CLKSRC_MMIO
397 select CPU_ARM926T
398 select ARM_VIC
399 select GENERIC_CLOCKEVENTS
400 help
401 This enables support for systems based on the Hilscher NetX Soc
402
403 config ARCH_H720X
404 bool "Hynix HMS720x-based"
405 select CPU_ARM720T
406 select ISA_DMA_API
407 select ARCH_USES_GETTIMEOFFSET
408 help
409 This enables support for systems based on the Hynix HMS720x
410
411 config ARCH_IOP13XX
412 bool "IOP13xx-based"
413 depends on MMU
414 select CPU_XSC3
415 select PLAT_IOP
416 select PCI
417 select ARCH_SUPPORTS_MSI
418 select VMSPLIT_1G
419 help
420 Support for Intel's IOP13XX (XScale) family of processors.
421
422 config ARCH_IOP32X
423 bool "IOP32x-based"
424 depends on MMU
425 select CPU_XSCALE
426 select PLAT_IOP
427 select PCI
428 select ARCH_REQUIRE_GPIOLIB
429 help
430 Support for Intel's 80219 and IOP32X (XScale) family of
431 processors.
432
433 config ARCH_IOP33X
434 bool "IOP33x-based"
435 depends on MMU
436 select CPU_XSCALE
437 select PLAT_IOP
438 select PCI
439 select ARCH_REQUIRE_GPIOLIB
440 help
441 Support for Intel's IOP33X (XScale) family of processors.
442
443 config ARCH_IXP23XX
444 bool "IXP23XX-based"
445 depends on MMU
446 select CPU_XSC3
447 select PCI
448 select ARCH_USES_GETTIMEOFFSET
449 help
450 Support for Intel's IXP23xx (XScale) family of processors.
451
452 config ARCH_IXP2000
453 bool "IXP2400/2800-based"
454 depends on MMU
455 select CPU_XSCALE
456 select PCI
457 select ARCH_USES_GETTIMEOFFSET
458 help
459 Support for Intel's IXP2400/2800 (XScale) family of processors.
460
461 config ARCH_IXP4XX
462 bool "IXP4xx-based"
463 depends on MMU
464 select CLKSRC_MMIO
465 select CPU_XSCALE
466 select GENERIC_GPIO
467 select GENERIC_CLOCKEVENTS
468 select HAVE_SCHED_CLOCK
469 select MIGHT_HAVE_PCI
470 select DMABOUNCE if PCI
471 help
472 Support for Intel's IXP4XX (XScale) family of processors.
473
474 config ARCH_DOVE
475 bool "Marvell Dove"
476 select CPU_V6K
477 select PCI
478 select ARCH_REQUIRE_GPIOLIB
479 select GENERIC_CLOCKEVENTS
480 select PLAT_ORION
481 help
482 Support for the Marvell Dove SoC 88AP510
483
484 config ARCH_KIRKWOOD
485 bool "Marvell Kirkwood"
486 select CPU_FEROCEON
487 select PCI
488 select ARCH_REQUIRE_GPIOLIB
489 select GENERIC_CLOCKEVENTS
490 select PLAT_ORION
491 help
492 Support for the following Marvell Kirkwood series SoCs:
493 88F6180, 88F6192 and 88F6281.
494
495 config ARCH_LOKI
496 bool "Marvell Loki (88RC8480)"
497 select CPU_FEROCEON
498 select GENERIC_CLOCKEVENTS
499 select PLAT_ORION
500 help
501 Support for the Marvell Loki (88RC8480) SoC.
502
503 config ARCH_LPC32XX
504 bool "NXP LPC32XX"
505 select CLKSRC_MMIO
506 select CPU_ARM926T
507 select ARCH_REQUIRE_GPIOLIB
508 select HAVE_IDE
509 select ARM_AMBA
510 select USB_ARCH_HAS_OHCI
511 select CLKDEV_LOOKUP
512 select GENERIC_TIME
513 select GENERIC_CLOCKEVENTS
514 help
515 Support for the NXP LPC32XX family of processors
516
517 config ARCH_MV78XX0
518 bool "Marvell MV78xx0"
519 select CPU_FEROCEON
520 select PCI
521 select ARCH_REQUIRE_GPIOLIB
522 select GENERIC_CLOCKEVENTS
523 select PLAT_ORION
524 help
525 Support for the following Marvell MV78xx0 series SoCs:
526 MV781x0, MV782x0.
527
528 config ARCH_ORION5X
529 bool "Marvell Orion"
530 depends on MMU
531 select CPU_FEROCEON
532 select PCI
533 select ARCH_REQUIRE_GPIOLIB
534 select GENERIC_CLOCKEVENTS
535 select PLAT_ORION
536 help
537 Support for the following Marvell Orion 5x series SoCs:
538 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
539 Orion-2 (5281), Orion-1-90 (6183).
540
541 config ARCH_MMP
542 bool "Marvell PXA168/910/MMP2"
543 depends on MMU
544 select ARCH_REQUIRE_GPIOLIB
545 select CLKDEV_LOOKUP
546 select GENERIC_CLOCKEVENTS
547 select HAVE_SCHED_CLOCK
548 select TICK_ONESHOT
549 select PLAT_PXA
550 select SPARSE_IRQ
551 help
552 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
553
554 config ARCH_KS8695
555 bool "Micrel/Kendin KS8695"
556 select CPU_ARM922T
557 select ARCH_REQUIRE_GPIOLIB
558 select ARCH_USES_GETTIMEOFFSET
559 help
560 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
561 System-on-Chip devices.
562
563 config ARCH_NS9XXX
564 bool "NetSilicon NS9xxx"
565 select CPU_ARM926T
566 select GENERIC_GPIO
567 select GENERIC_CLOCKEVENTS
568 select HAVE_CLK
569 help
570 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
571 System.
572
573 <http://www.digi.com/products/microprocessors/index.jsp>
574
575 config ARCH_W90X900
576 bool "Nuvoton W90X900 CPU"
577 select CPU_ARM926T
578 select ARCH_REQUIRE_GPIOLIB
579 select CLKDEV_LOOKUP
580 select CLKSRC_MMIO
581 select GENERIC_CLOCKEVENTS
582 help
583 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
584 At present, the w90x900 has been renamed nuc900, regarding
585 the ARM series product line, you can login the following
586 link address to know more.
587
588 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
589 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
590
591 config ARCH_NUC93X
592 bool "Nuvoton NUC93X CPU"
593 select CPU_ARM926T
594 select CLKDEV_LOOKUP
595 help
596 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
597 low-power and high performance MPEG-4/JPEG multimedia controller chip.
598
599 config ARCH_TEGRA
600 bool "NVIDIA Tegra"
601 select CLKDEV_LOOKUP
602 select CLKSRC_MMIO
603 select GENERIC_TIME
604 select GENERIC_CLOCKEVENTS
605 select GENERIC_GPIO
606 select HAVE_CLK
607 select HAVE_SCHED_CLOCK
608 select ARCH_HAS_BARRIERS if CACHE_L2X0
609 select ARCH_HAS_CPUFREQ
610 help
611 This enables support for NVIDIA Tegra based systems (Tegra APX,
612 Tegra 6xx and Tegra 2 series).
613
614 config ARCH_PNX4008
615 bool "Philips Nexperia PNX4008 Mobile"
616 select CPU_ARM926T
617 select CLKDEV_LOOKUP
618 select ARCH_USES_GETTIMEOFFSET
619 help
620 This enables support for Philips PNX4008 mobile platform.
621
622 config ARCH_PXA
623 bool "PXA2xx/PXA3xx-based"
624 depends on MMU
625 select ARCH_MTD_XIP
626 select ARCH_HAS_CPUFREQ
627 select CLKDEV_LOOKUP
628 select CLKSRC_MMIO
629 select ARCH_REQUIRE_GPIOLIB
630 select GENERIC_CLOCKEVENTS
631 select HAVE_SCHED_CLOCK
632 select TICK_ONESHOT
633 select PLAT_PXA
634 select SPARSE_IRQ
635 help
636 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
637
638 config ARCH_MSM
639 bool "Qualcomm MSM"
640 select HAVE_CLK
641 select GENERIC_CLOCKEVENTS
642 select ARCH_REQUIRE_GPIOLIB
643 select CLKDEV_LOOKUP
644 help
645 Support for Qualcomm MSM/QSD based systems. This runs on the
646 apps processor of the MSM/QSD and depends on a shared memory
647 interface to the modem processor which runs the baseband
648 stack and controls some vital subsystems
649 (clock and power control, etc).
650
651 config ARCH_SHMOBILE
652 bool "Renesas SH-Mobile / R-Mobile"
653 select HAVE_CLK
654 select CLKDEV_LOOKUP
655 select GENERIC_CLOCKEVENTS
656 select NO_IOPORT
657 select SPARSE_IRQ
658 select MULTI_IRQ_HANDLER
659 help
660 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
661
662 config ARCH_RPC
663 bool "RiscPC"
664 select ARCH_ACORN
665 select FIQ
666 select TIMER_ACORN
667 select ARCH_MAY_HAVE_PC_FDC
668 select HAVE_PATA_PLATFORM
669 select ISA_DMA_API
670 select NO_IOPORT
671 select ARCH_SPARSEMEM_ENABLE
672 select ARCH_USES_GETTIMEOFFSET
673 help
674 On the Acorn Risc-PC, Linux can support the internal IDE disk and
675 CD-ROM interface, serial and parallel port, and the floppy drive.
676
677 config ARCH_SA1100
678 bool "SA1100-based"
679 select CLKSRC_MMIO
680 select CPU_SA1100
681 select ISA
682 select ARCH_SPARSEMEM_ENABLE
683 select ARCH_MTD_XIP
684 select ARCH_HAS_CPUFREQ
685 select CPU_FREQ
686 select GENERIC_CLOCKEVENTS
687 select HAVE_CLK
688 select HAVE_SCHED_CLOCK
689 select TICK_ONESHOT
690 select ARCH_REQUIRE_GPIOLIB
691 help
692 Support for StrongARM 11x0 based boards.
693
694 config ARCH_S3C2410
695 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
696 select GENERIC_GPIO
697 select ARCH_HAS_CPUFREQ
698 select HAVE_CLK
699 select ARCH_USES_GETTIMEOFFSET
700 select HAVE_S3C2410_I2C if I2C
701 help
702 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
703 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
704 the Samsung SMDK2410 development board (and derivatives).
705
706 Note, the S3C2416 and the S3C2450 are so close that they even share
707 the same SoC ID code. This means that there is no separate machine
708 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
709
710 config ARCH_S3C64XX
711 bool "Samsung S3C64XX"
712 select PLAT_SAMSUNG
713 select CPU_V6
714 select ARM_VIC
715 select HAVE_CLK
716 select NO_IOPORT
717 select ARCH_USES_GETTIMEOFFSET
718 select ARCH_HAS_CPUFREQ
719 select ARCH_REQUIRE_GPIOLIB
720 select SAMSUNG_CLKSRC
721 select SAMSUNG_IRQ_VIC_TIMER
722 select SAMSUNG_IRQ_UART
723 select S3C_GPIO_TRACK
724 select S3C_GPIO_PULL_UPDOWN
725 select S3C_GPIO_CFG_S3C24XX
726 select S3C_GPIO_CFG_S3C64XX
727 select S3C_DEV_NAND
728 select USB_ARCH_HAS_OHCI
729 select SAMSUNG_GPIOLIB_4BIT
730 select HAVE_S3C2410_I2C if I2C
731 select HAVE_S3C2410_WATCHDOG if WATCHDOG
732 help
733 Samsung S3C64XX series based systems
734
735 config ARCH_S5P64X0
736 bool "Samsung S5P6440 S5P6450"
737 select CPU_V6
738 select GENERIC_GPIO
739 select HAVE_CLK
740 select HAVE_S3C2410_WATCHDOG if WATCHDOG
741 select GENERIC_CLOCKEVENTS
742 select HAVE_SCHED_CLOCK
743 select HAVE_S3C2410_I2C if I2C
744 select HAVE_S3C_RTC if RTC_CLASS
745 help
746 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
747 SMDK6450.
748
749 config ARCH_S5P6442
750 bool "Samsung S5P6442"
751 select CPU_V6
752 select GENERIC_GPIO
753 select HAVE_CLK
754 select ARCH_USES_GETTIMEOFFSET
755 select HAVE_S3C2410_WATCHDOG if WATCHDOG
756 help
757 Samsung S5P6442 CPU based systems
758
759 config ARCH_S5PC100
760 bool "Samsung S5PC100"
761 select GENERIC_GPIO
762 select HAVE_CLK
763 select CPU_V7
764 select ARM_L1_CACHE_SHIFT_6
765 select ARCH_USES_GETTIMEOFFSET
766 select HAVE_S3C2410_I2C if I2C
767 select HAVE_S3C_RTC if RTC_CLASS
768 select HAVE_S3C2410_WATCHDOG if WATCHDOG
769 help
770 Samsung S5PC100 series based systems
771
772 config ARCH_S5PV210
773 bool "Samsung S5PV210/S5PC110"
774 select CPU_V7
775 select ARCH_SPARSEMEM_ENABLE
776 select GENERIC_GPIO
777 select HAVE_CLK
778 select ARM_L1_CACHE_SHIFT_6
779 select ARCH_HAS_CPUFREQ
780 select GENERIC_CLOCKEVENTS
781 select HAVE_SCHED_CLOCK
782 select HAVE_S3C2410_I2C if I2C
783 select HAVE_S3C_RTC if RTC_CLASS
784 select HAVE_S3C2410_WATCHDOG if WATCHDOG
785 help
786 Samsung S5PV210/S5PC110 series based systems
787
788 config ARCH_EXYNOS4
789 bool "Samsung EXYNOS4"
790 select CPU_V7
791 select ARCH_SPARSEMEM_ENABLE
792 select GENERIC_GPIO
793 select HAVE_CLK
794 select ARCH_HAS_CPUFREQ
795 select GENERIC_CLOCKEVENTS
796 select HAVE_S3C_RTC if RTC_CLASS
797 select HAVE_S3C2410_I2C if I2C
798 select HAVE_S3C2410_WATCHDOG if WATCHDOG
799 help
800 Samsung EXYNOS4 series based systems
801
802 config ARCH_SHARK
803 bool "Shark"
804 select CPU_SA110
805 select ISA
806 select ISA_DMA
807 select ZONE_DMA
808 select PCI
809 select ARCH_USES_GETTIMEOFFSET
810 help
811 Support for the StrongARM based Digital DNARD machine, also known
812 as "Shark" (<http://www.shark-linux.de/shark.html>).
813
814 config ARCH_TCC_926
815 bool "Telechips TCC ARM926-based systems"
816 select CLKSRC_MMIO
817 select CPU_ARM926T
818 select HAVE_CLK
819 select CLKDEV_LOOKUP
820 select GENERIC_CLOCKEVENTS
821 help
822 Support for Telechips TCC ARM926-based systems.
823
824 config ARCH_U300
825 bool "ST-Ericsson U300 Series"
826 depends on MMU
827 select CLKSRC_MMIO
828 select CPU_ARM926T
829 select HAVE_SCHED_CLOCK
830 select HAVE_TCM
831 select ARM_AMBA
832 select ARM_VIC
833 select GENERIC_CLOCKEVENTS
834 select CLKDEV_LOOKUP
835 select GENERIC_GPIO
836 help
837 Support for ST-Ericsson U300 series mobile platforms.
838
839 config ARCH_U8500
840 bool "ST-Ericsson U8500 Series"
841 select CPU_V7
842 select ARM_AMBA
843 select GENERIC_CLOCKEVENTS
844 select CLKDEV_LOOKUP
845 select ARCH_REQUIRE_GPIOLIB
846 select ARCH_HAS_CPUFREQ
847 help
848 Support for ST-Ericsson's Ux500 architecture
849
850 config ARCH_NOMADIK
851 bool "STMicroelectronics Nomadik"
852 select ARM_AMBA
853 select ARM_VIC
854 select CPU_ARM926T
855 select CLKDEV_LOOKUP
856 select GENERIC_CLOCKEVENTS
857 select ARCH_REQUIRE_GPIOLIB
858 help
859 Support for the Nomadik platform by ST-Ericsson
860
861 config ARCH_DAVINCI
862 bool "TI DaVinci"
863 select GENERIC_CLOCKEVENTS
864 select ARCH_REQUIRE_GPIOLIB
865 select ZONE_DMA
866 select HAVE_IDE
867 select CLKDEV_LOOKUP
868 select GENERIC_ALLOCATOR
869 select ARCH_HAS_HOLES_MEMORYMODEL
870 help
871 Support for TI's DaVinci platform.
872
873 config ARCH_OMAP
874 bool "TI OMAP"
875 select HAVE_CLK
876 select ARCH_REQUIRE_GPIOLIB
877 select ARCH_HAS_CPUFREQ
878 select GENERIC_CLOCKEVENTS
879 select HAVE_SCHED_CLOCK
880 select ARCH_HAS_HOLES_MEMORYMODEL
881 help
882 Support for TI's OMAP platform (OMAP1/2/3/4).
883
884 config PLAT_SPEAR
885 bool "ST SPEAr"
886 select ARM_AMBA
887 select ARCH_REQUIRE_GPIOLIB
888 select CLKDEV_LOOKUP
889 select CLKSRC_MMIO
890 select GENERIC_CLOCKEVENTS
891 select HAVE_CLK
892 help
893 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
894
895 config ARCH_VT8500
896 bool "VIA/WonderMedia 85xx"
897 select CPU_ARM926T
898 select GENERIC_GPIO
899 select ARCH_HAS_CPUFREQ
900 select GENERIC_CLOCKEVENTS
901 select ARCH_REQUIRE_GPIOLIB
902 select HAVE_PWM
903 help
904 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
905 endchoice
906
907 #
908 # This is sorted alphabetically by mach-* pathname. However, plat-*
909 # Kconfigs may be included either alphabetically (according to the
910 # plat- suffix) or along side the corresponding mach-* source.
911 #
912 source "arch/arm/mach-at91/Kconfig"
913
914 source "arch/arm/mach-bcmring/Kconfig"
915
916 source "arch/arm/mach-clps711x/Kconfig"
917
918 source "arch/arm/mach-cns3xxx/Kconfig"
919
920 source "arch/arm/mach-davinci/Kconfig"
921
922 source "arch/arm/mach-dove/Kconfig"
923
924 source "arch/arm/mach-ep93xx/Kconfig"
925
926 source "arch/arm/mach-footbridge/Kconfig"
927
928 source "arch/arm/mach-gemini/Kconfig"
929
930 source "arch/arm/mach-h720x/Kconfig"
931
932 source "arch/arm/mach-integrator/Kconfig"
933
934 source "arch/arm/mach-iop32x/Kconfig"
935
936 source "arch/arm/mach-iop33x/Kconfig"
937
938 source "arch/arm/mach-iop13xx/Kconfig"
939
940 source "arch/arm/mach-ixp4xx/Kconfig"
941
942 source "arch/arm/mach-ixp2000/Kconfig"
943
944 source "arch/arm/mach-ixp23xx/Kconfig"
945
946 source "arch/arm/mach-kirkwood/Kconfig"
947
948 source "arch/arm/mach-ks8695/Kconfig"
949
950 source "arch/arm/mach-loki/Kconfig"
951
952 source "arch/arm/mach-lpc32xx/Kconfig"
953
954 source "arch/arm/mach-msm/Kconfig"
955
956 source "arch/arm/mach-mv78xx0/Kconfig"
957
958 source "arch/arm/plat-mxc/Kconfig"
959
960 source "arch/arm/mach-mxs/Kconfig"
961
962 source "arch/arm/mach-netx/Kconfig"
963
964 source "arch/arm/mach-nomadik/Kconfig"
965 source "arch/arm/plat-nomadik/Kconfig"
966
967 source "arch/arm/mach-ns9xxx/Kconfig"
968
969 source "arch/arm/mach-nuc93x/Kconfig"
970
971 source "arch/arm/plat-omap/Kconfig"
972
973 source "arch/arm/mach-omap1/Kconfig"
974
975 source "arch/arm/mach-omap2/Kconfig"
976
977 source "arch/arm/mach-orion5x/Kconfig"
978
979 source "arch/arm/mach-pxa/Kconfig"
980 source "arch/arm/plat-pxa/Kconfig"
981
982 source "arch/arm/mach-mmp/Kconfig"
983
984 source "arch/arm/mach-realview/Kconfig"
985
986 source "arch/arm/mach-sa1100/Kconfig"
987
988 source "arch/arm/plat-samsung/Kconfig"
989 source "arch/arm/plat-s3c24xx/Kconfig"
990 source "arch/arm/plat-s5p/Kconfig"
991
992 source "arch/arm/plat-spear/Kconfig"
993
994 source "arch/arm/plat-tcc/Kconfig"
995
996 if ARCH_S3C2410
997 source "arch/arm/mach-s3c2400/Kconfig"
998 source "arch/arm/mach-s3c2410/Kconfig"
999 source "arch/arm/mach-s3c2412/Kconfig"
1000 source "arch/arm/mach-s3c2416/Kconfig"
1001 source "arch/arm/mach-s3c2440/Kconfig"
1002 source "arch/arm/mach-s3c2443/Kconfig"
1003 endif
1004
1005 if ARCH_S3C64XX
1006 source "arch/arm/mach-s3c64xx/Kconfig"
1007 endif
1008
1009 source "arch/arm/mach-s5p64x0/Kconfig"
1010
1011 source "arch/arm/mach-s5p6442/Kconfig"
1012
1013 source "arch/arm/mach-s5pc100/Kconfig"
1014
1015 source "arch/arm/mach-s5pv210/Kconfig"
1016
1017 source "arch/arm/mach-exynos4/Kconfig"
1018
1019 source "arch/arm/mach-shmobile/Kconfig"
1020
1021 source "arch/arm/plat-stmp3xxx/Kconfig"
1022
1023 source "arch/arm/mach-tegra/Kconfig"
1024
1025 source "arch/arm/mach-u300/Kconfig"
1026
1027 source "arch/arm/mach-ux500/Kconfig"
1028
1029 source "arch/arm/mach-versatile/Kconfig"
1030
1031 source "arch/arm/mach-vexpress/Kconfig"
1032 source "arch/arm/plat-versatile/Kconfig"
1033
1034 source "arch/arm/mach-vt8500/Kconfig"
1035
1036 source "arch/arm/mach-w90x900/Kconfig"
1037
1038 # Definitions to make life easier
1039 config ARCH_ACORN
1040 bool
1041
1042 config PLAT_IOP
1043 bool
1044 select GENERIC_CLOCKEVENTS
1045 select HAVE_SCHED_CLOCK
1046
1047 config PLAT_ORION
1048 bool
1049 select CLKSRC_MMIO
1050 select HAVE_SCHED_CLOCK
1051
1052 config PLAT_PXA
1053 bool
1054
1055 config PLAT_VERSATILE
1056 bool
1057
1058 config ARM_TIMER_SP804
1059 bool
1060 select CLKSRC_MMIO
1061
1062 source arch/arm/mm/Kconfig
1063
1064 config IWMMXT
1065 bool "Enable iWMMXt support"
1066 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1067 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1068 help
1069 Enable support for iWMMXt context switching at run time if
1070 running on a CPU that supports it.
1071
1072 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1073 config XSCALE_PMU
1074 bool
1075 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1076 default y
1077
1078 config CPU_HAS_PMU
1079 depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1080 (!ARCH_OMAP3 || OMAP3_EMU)
1081 default y
1082 bool
1083
1084 config MULTI_IRQ_HANDLER
1085 bool
1086 help
1087 Allow each machine to specify it's own IRQ handler at run time.
1088
1089 if !MMU
1090 source "arch/arm/Kconfig-nommu"
1091 endif
1092
1093 config ARM_ERRATA_411920
1094 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1095 depends on CPU_V6 || CPU_V6K
1096 help
1097 Invalidation of the Instruction Cache operation can
1098 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1099 It does not affect the MPCore. This option enables the ARM Ltd.
1100 recommended workaround.
1101
1102 config ARM_ERRATA_430973
1103 bool "ARM errata: Stale prediction on replaced interworking branch"
1104 depends on CPU_V7
1105 help
1106 This option enables the workaround for the 430973 Cortex-A8
1107 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1108 interworking branch is replaced with another code sequence at the
1109 same virtual address, whether due to self-modifying code or virtual
1110 to physical address re-mapping, Cortex-A8 does not recover from the
1111 stale interworking branch prediction. This results in Cortex-A8
1112 executing the new code sequence in the incorrect ARM or Thumb state.
1113 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1114 and also flushes the branch target cache at every context switch.
1115 Note that setting specific bits in the ACTLR register may not be
1116 available in non-secure mode.
1117
1118 config ARM_ERRATA_458693
1119 bool "ARM errata: Processor deadlock when a false hazard is created"
1120 depends on CPU_V7
1121 help
1122 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1123 erratum. For very specific sequences of memory operations, it is
1124 possible for a hazard condition intended for a cache line to instead
1125 be incorrectly associated with a different cache line. This false
1126 hazard might then cause a processor deadlock. The workaround enables
1127 the L1 caching of the NEON accesses and disables the PLD instruction
1128 in the ACTLR register. Note that setting specific bits in the ACTLR
1129 register may not be available in non-secure mode.
1130
1131 config ARM_ERRATA_460075
1132 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1133 depends on CPU_V7
1134 help
1135 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1136 erratum. Any asynchronous access to the L2 cache may encounter a
1137 situation in which recent store transactions to the L2 cache are lost
1138 and overwritten with stale memory contents from external memory. The
1139 workaround disables the write-allocate mode for the L2 cache via the
1140 ACTLR register. Note that setting specific bits in the ACTLR register
1141 may not be available in non-secure mode.
1142
1143 config ARM_ERRATA_742230
1144 bool "ARM errata: DMB operation may be faulty"
1145 depends on CPU_V7 && SMP
1146 help
1147 This option enables the workaround for the 742230 Cortex-A9
1148 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1149 between two write operations may not ensure the correct visibility
1150 ordering of the two writes. This workaround sets a specific bit in
1151 the diagnostic register of the Cortex-A9 which causes the DMB
1152 instruction to behave as a DSB, ensuring the correct behaviour of
1153 the two writes.
1154
1155 config ARM_ERRATA_742231
1156 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1157 depends on CPU_V7 && SMP
1158 help
1159 This option enables the workaround for the 742231 Cortex-A9
1160 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1161 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1162 accessing some data located in the same cache line, may get corrupted
1163 data due to bad handling of the address hazard when the line gets
1164 replaced from one of the CPUs at the same time as another CPU is
1165 accessing it. This workaround sets specific bits in the diagnostic
1166 register of the Cortex-A9 which reduces the linefill issuing
1167 capabilities of the processor.
1168
1169 config PL310_ERRATA_588369
1170 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1171 depends on CACHE_L2X0
1172 help
1173 The PL310 L2 cache controller implements three types of Clean &
1174 Invalidate maintenance operations: by Physical Address
1175 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1176 They are architecturally defined to behave as the execution of a
1177 clean operation followed immediately by an invalidate operation,
1178 both performing to the same memory location. This functionality
1179 is not correctly implemented in PL310 as clean lines are not
1180 invalidated as a result of these operations.
1181
1182 config ARM_ERRATA_720789
1183 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1184 depends on CPU_V7 && SMP
1185 help
1186 This option enables the workaround for the 720789 Cortex-A9 (prior to
1187 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1188 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1189 As a consequence of this erratum, some TLB entries which should be
1190 invalidated are not, resulting in an incoherency in the system page
1191 tables. The workaround changes the TLB flushing routines to invalidate
1192 entries regardless of the ASID.
1193
1194 config PL310_ERRATA_727915
1195 bool "Background Clean & Invalidate by Way operation can cause data corruption"
1196 depends on CACHE_L2X0
1197 help
1198 PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1199 operation (offset 0x7FC). This operation runs in background so that
1200 PL310 can handle normal accesses while it is in progress. Under very
1201 rare circumstances, due to this erratum, write data can be lost when
1202 PL310 treats a cacheable write transaction during a Clean &
1203 Invalidate by Way operation.
1204
1205 config ARM_ERRATA_743622
1206 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1207 depends on CPU_V7
1208 help
1209 This option enables the workaround for the 743622 Cortex-A9
1210 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1211 optimisation in the Cortex-A9 Store Buffer may lead to data
1212 corruption. This workaround sets a specific bit in the diagnostic
1213 register of the Cortex-A9 which disables the Store Buffer
1214 optimisation, preventing the defect from occurring. This has no
1215 visible impact on the overall performance or power consumption of the
1216 processor.
1217
1218 config ARM_ERRATA_751472
1219 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1220 depends on CPU_V7 && SMP
1221 help
1222 This option enables the workaround for the 751472 Cortex-A9 (prior
1223 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1224 completion of a following broadcasted operation if the second
1225 operation is received by a CPU before the ICIALLUIS has completed,
1226 potentially leading to corrupted entries in the cache or TLB.
1227
1228 config ARM_ERRATA_753970
1229 bool "ARM errata: cache sync operation may be faulty"
1230 depends on CACHE_PL310
1231 help
1232 This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1233
1234 Under some condition the effect of cache sync operation on
1235 the store buffer still remains when the operation completes.
1236 This means that the store buffer is always asked to drain and
1237 this prevents it from merging any further writes. The workaround
1238 is to replace the normal offset of cache sync operation (0x730)
1239 by another offset targeting an unmapped PL310 register 0x740.
1240 This has the same effect as the cache sync operation: store buffer
1241 drain and waiting for all buffers empty.
1242
1243 config ARM_ERRATA_754322
1244 bool "ARM errata: possible faulty MMU translations following an ASID switch"
1245 depends on CPU_V7
1246 help
1247 This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1248 r3p*) erratum. A speculative memory access may cause a page table walk
1249 which starts prior to an ASID switch but completes afterwards. This
1250 can populate the micro-TLB with a stale entry which may be hit with
1251 the new ASID. This workaround places two dsb instructions in the mm
1252 switching code so that no page table walks can cross the ASID switch.
1253
1254 config ARM_ERRATA_754327
1255 bool "ARM errata: no automatic Store Buffer drain"
1256 depends on CPU_V7 && SMP
1257 help
1258 This option enables the workaround for the 754327 Cortex-A9 (prior to
1259 r2p0) erratum. The Store Buffer does not have any automatic draining
1260 mechanism and therefore a livelock may occur if an external agent
1261 continuously polls a memory location waiting to observe an update.
1262 This workaround defines cpu_relax() as smp_mb(), preventing correctly
1263 written polling loops from denying visibility of updates to memory.
1264
1265 endmenu
1266
1267 source "arch/arm/common/Kconfig"
1268
1269 menu "Bus support"
1270
1271 config ARM_AMBA
1272 bool
1273
1274 config ISA
1275 bool
1276 help
1277 Find out whether you have ISA slots on your motherboard. ISA is the
1278 name of a bus system, i.e. the way the CPU talks to the other stuff
1279 inside your box. Other bus systems are PCI, EISA, MicroChannel
1280 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1281 newer boards don't support it. If you have ISA, say Y, otherwise N.
1282
1283 # Select ISA DMA controller support
1284 config ISA_DMA
1285 bool
1286 select ISA_DMA_API
1287
1288 # Select ISA DMA interface
1289 config ISA_DMA_API
1290 bool
1291
1292 config PCI
1293 bool "PCI support" if MIGHT_HAVE_PCI
1294 help
1295 Find out whether you have a PCI motherboard. PCI is the name of a
1296 bus system, i.e. the way the CPU talks to the other stuff inside
1297 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1298 VESA. If you have PCI, say Y, otherwise N.
1299
1300 config PCI_DOMAINS
1301 bool
1302 depends on PCI
1303
1304 config PCI_NANOENGINE
1305 bool "BSE nanoEngine PCI support"
1306 depends on SA1100_NANOENGINE
1307 help
1308 Enable PCI on the BSE nanoEngine board.
1309
1310 config PCI_SYSCALL
1311 def_bool PCI
1312
1313 # Select the host bridge type
1314 config PCI_HOST_VIA82C505
1315 bool
1316 depends on PCI && ARCH_SHARK
1317 default y
1318
1319 config PCI_HOST_ITE8152
1320 bool
1321 depends on PCI && MACH_ARMCORE
1322 default y
1323 select DMABOUNCE
1324
1325 source "drivers/pci/Kconfig"
1326
1327 source "drivers/pcmcia/Kconfig"
1328
1329 endmenu
1330
1331 menu "Kernel Features"
1332
1333 source "kernel/time/Kconfig"
1334
1335 config SMP
1336 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1337 depends on EXPERIMENTAL
1338 depends on CPU_V6K || CPU_V7
1339 depends on GENERIC_CLOCKEVENTS
1340 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1341 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1342 ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1343 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1344 select USE_GENERIC_SMP_HELPERS
1345 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1346 help
1347 This enables support for systems with more than one CPU. If you have
1348 a system with only one CPU, like most personal computers, say N. If
1349 you have a system with more than one CPU, say Y.
1350
1351 If you say N here, the kernel will run on single and multiprocessor
1352 machines, but will use only one CPU of a multiprocessor machine. If
1353 you say Y here, the kernel will run on many, but not all, single
1354 processor machines. On a single processor machine, the kernel will
1355 run faster if you say N here.
1356
1357 See also <file:Documentation/i386/IO-APIC.txt>,
1358 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1359 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1360
1361 If you don't know what to do here, say N.
1362
1363 config SMP_ON_UP
1364 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1365 depends on EXPERIMENTAL
1366 depends on SMP && !XIP_KERNEL
1367 default y
1368 help
1369 SMP kernels contain instructions which fail on non-SMP processors.
1370 Enabling this option allows the kernel to modify itself to make
1371 these instructions safe. Disabling it allows about 1K of space
1372 savings.
1373
1374 If you don't know what to do here, say Y.
1375
1376 config HAVE_ARM_SCU
1377 bool
1378 depends on SMP
1379 help
1380 This option enables support for the ARM system coherency unit
1381
1382 config HAVE_ARM_TWD
1383 bool
1384 depends on SMP
1385 select TICK_ONESHOT
1386 help
1387 This options enables support for the ARM timer and watchdog unit
1388
1389 choice
1390 prompt "Memory split"
1391 default VMSPLIT_3G
1392 help
1393 Select the desired split between kernel and user memory.
1394
1395 If you are not absolutely sure what you are doing, leave this
1396 option alone!
1397
1398 config VMSPLIT_3G
1399 bool "3G/1G user/kernel split"
1400 config VMSPLIT_2G
1401 bool "2G/2G user/kernel split"
1402 config VMSPLIT_1G
1403 bool "1G/3G user/kernel split"
1404 endchoice
1405
1406 config PAGE_OFFSET
1407 hex
1408 default 0x40000000 if VMSPLIT_1G
1409 default 0x80000000 if VMSPLIT_2G
1410 default 0xC0000000
1411
1412 config NR_CPUS
1413 int "Maximum number of CPUs (2-32)"
1414 range 2 32
1415 depends on SMP
1416 default "4"
1417
1418 config HOTPLUG_CPU
1419 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1420 depends on SMP && HOTPLUG && EXPERIMENTAL
1421 depends on !ARCH_MSM
1422 help
1423 Say Y here to experiment with turning CPUs off and on. CPUs
1424 can be controlled through /sys/devices/system/cpu.
1425
1426 config LOCAL_TIMERS
1427 bool "Use local timer interrupts"
1428 depends on SMP
1429 default y
1430 select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1431 help
1432 Enable support for local timers on SMP platforms, rather then the
1433 legacy IPI broadcast method. Local timers allows the system
1434 accounting to be spread across the timer interval, preventing a
1435 "thundering herd" at every timer tick.
1436
1437 source kernel/Kconfig.preempt
1438
1439 config HZ
1440 int
1441 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1442 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_EXYNOS4
1443 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1444 default AT91_TIMER_HZ if ARCH_AT91
1445 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1446 default 100
1447
1448 config THUMB2_KERNEL
1449 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1450 depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1451 select AEABI
1452 select ARM_ASM_UNIFIED
1453 help
1454 By enabling this option, the kernel will be compiled in
1455 Thumb-2 mode. A compiler/assembler that understand the unified
1456 ARM-Thumb syntax is needed.
1457
1458 If unsure, say N.
1459
1460 config THUMB2_AVOID_R_ARM_THM_JUMP11
1461 bool "Work around buggy Thumb-2 short branch relocations in gas"
1462 depends on THUMB2_KERNEL && MODULES
1463 default y
1464 help
1465 Various binutils versions can resolve Thumb-2 branches to
1466 locally-defined, preemptible global symbols as short-range "b.n"
1467 branch instructions.
1468
1469 This is a problem, because there's no guarantee the final
1470 destination of the symbol, or any candidate locations for a
1471 trampoline, are within range of the branch. For this reason, the
1472 kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1473 relocation in modules at all, and it makes little sense to add
1474 support.
1475
1476 The symptom is that the kernel fails with an "unsupported
1477 relocation" error when loading some modules.
1478
1479 Until fixed tools are available, passing
1480 -fno-optimize-sibling-calls to gcc should prevent gcc generating
1481 code which hits this problem, at the cost of a bit of extra runtime
1482 stack usage in some cases.
1483
1484 The problem is described in more detail at:
1485 https://bugs.launchpad.net/binutils-linaro/+bug/725126
1486
1487 Only Thumb-2 kernels are affected.
1488
1489 Unless you are sure your tools don't have this problem, say Y.
1490
1491 config ARM_ASM_UNIFIED
1492 bool
1493
1494 config AEABI
1495 bool "Use the ARM EABI to compile the kernel"
1496 help
1497 This option allows for the kernel to be compiled using the latest
1498 ARM ABI (aka EABI). This is only useful if you are using a user
1499 space environment that is also compiled with EABI.
1500
1501 Since there are major incompatibilities between the legacy ABI and
1502 EABI, especially with regard to structure member alignment, this
1503 option also changes the kernel syscall calling convention to
1504 disambiguate both ABIs and allow for backward compatibility support
1505 (selected with CONFIG_OABI_COMPAT).
1506
1507 To use this you need GCC version 4.0.0 or later.
1508
1509 config OABI_COMPAT
1510 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1511 depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1512 default y
1513 help
1514 This option preserves the old syscall interface along with the
1515 new (ARM EABI) one. It also provides a compatibility layer to
1516 intercept syscalls that have structure arguments which layout
1517 in memory differs between the legacy ABI and the new ARM EABI
1518 (only for non "thumb" binaries). This option adds a tiny
1519 overhead to all syscalls and produces a slightly larger kernel.
1520 If you know you'll be using only pure EABI user space then you
1521 can say N here. If this option is not selected and you attempt
1522 to execute a legacy ABI binary then the result will be
1523 UNPREDICTABLE (in fact it can be predicted that it won't work
1524 at all). If in doubt say Y.
1525
1526 config ARCH_HAS_HOLES_MEMORYMODEL
1527 bool
1528
1529 config ARCH_SPARSEMEM_ENABLE
1530 bool
1531
1532 config ARCH_SPARSEMEM_DEFAULT
1533 def_bool ARCH_SPARSEMEM_ENABLE
1534
1535 config ARCH_SELECT_MEMORY_MODEL
1536 def_bool ARCH_SPARSEMEM_ENABLE
1537
1538 config HIGHMEM
1539 bool "High Memory Support (EXPERIMENTAL)"
1540 depends on MMU && EXPERIMENTAL
1541 help
1542 The address space of ARM processors is only 4 Gigabytes large
1543 and it has to accommodate user address space, kernel address
1544 space as well as some memory mapped IO. That means that, if you
1545 have a large amount of physical memory and/or IO, not all of the
1546 memory can be "permanently mapped" by the kernel. The physical
1547 memory that is not permanently mapped is called "high memory".
1548
1549 Depending on the selected kernel/user memory split, minimum
1550 vmalloc space and actual amount of RAM, you may not need this
1551 option which should result in a slightly faster kernel.
1552
1553 If unsure, say n.
1554
1555 config HIGHPTE
1556 bool "Allocate 2nd-level pagetables from highmem"
1557 depends on HIGHMEM
1558
1559 config HW_PERF_EVENTS
1560 bool "Enable hardware performance counter support for perf events"
1561 depends on PERF_EVENTS && CPU_HAS_PMU
1562 default y
1563 help
1564 Enable hardware performance counter support for perf events. If
1565 disabled, perf events will use software events only.
1566
1567 source "mm/Kconfig"
1568
1569 config FORCE_MAX_ZONEORDER
1570 int "Maximum zone order" if ARCH_SHMOBILE
1571 range 11 64 if ARCH_SHMOBILE
1572 default "9" if SA1111
1573 default "11"
1574 help
1575 The kernel memory allocator divides physically contiguous memory
1576 blocks into "zones", where each zone is a power of two number of
1577 pages. This option selects the largest power of two that the kernel
1578 keeps in the memory allocator. If you need to allocate very large
1579 blocks of physically contiguous memory, then you may need to
1580 increase this value.
1581
1582 This config option is actually maximum order plus one. For example,
1583 a value of 11 means that the largest free memory block is 2^10 pages.
1584
1585 config LEDS
1586 bool "Timer and CPU usage LEDs"
1587 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1588 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1589 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1590 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1591 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1592 ARCH_AT91 || ARCH_DAVINCI || \
1593 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1594 help
1595 If you say Y here, the LEDs on your machine will be used
1596 to provide useful information about your current system status.
1597
1598 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1599 be able to select which LEDs are active using the options below. If
1600 you are compiling a kernel for the EBSA-110 or the LART however, the
1601 red LED will simply flash regularly to indicate that the system is
1602 still functional. It is safe to say Y here if you have a CATS
1603 system, but the driver will do nothing.
1604
1605 config LEDS_TIMER
1606 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1607 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1608 || MACH_OMAP_PERSEUS2
1609 depends on LEDS
1610 depends on !GENERIC_CLOCKEVENTS
1611 default y if ARCH_EBSA110
1612 help
1613 If you say Y here, one of the system LEDs (the green one on the
1614 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1615 will flash regularly to indicate that the system is still
1616 operational. This is mainly useful to kernel hackers who are
1617 debugging unstable kernels.
1618
1619 The LART uses the same LED for both Timer LED and CPU usage LED
1620 functions. You may choose to use both, but the Timer LED function
1621 will overrule the CPU usage LED.
1622
1623 config LEDS_CPU
1624 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1625 !ARCH_OMAP) \
1626 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1627 || MACH_OMAP_PERSEUS2
1628 depends on LEDS
1629 help
1630 If you say Y here, the red LED will be used to give a good real
1631 time indication of CPU usage, by lighting whenever the idle task
1632 is not currently executing.
1633
1634 The LART uses the same LED for both Timer LED and CPU usage LED
1635 functions. You may choose to use both, but the Timer LED function
1636 will overrule the CPU usage LED.
1637
1638 config ALIGNMENT_TRAP
1639 bool
1640 depends on CPU_CP15_MMU
1641 default y if !ARCH_EBSA110
1642 select HAVE_PROC_CPU if PROC_FS
1643 help
1644 ARM processors cannot fetch/store information which is not
1645 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1646 address divisible by 4. On 32-bit ARM processors, these non-aligned
1647 fetch/store instructions will be emulated in software if you say
1648 here, which has a severe performance impact. This is necessary for
1649 correct operation of some network protocols. With an IP-only
1650 configuration it is safe to say N, otherwise say Y.
1651
1652 config UACCESS_WITH_MEMCPY
1653 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1654 depends on MMU && EXPERIMENTAL
1655 default y if CPU_FEROCEON
1656 help
1657 Implement faster copy_to_user and clear_user methods for CPU
1658 cores where a 8-word STM instruction give significantly higher
1659 memory write throughput than a sequence of individual 32bit stores.
1660
1661 A possible side effect is a slight increase in scheduling latency
1662 between threads sharing the same address space if they invoke
1663 such copy operations with large buffers.
1664
1665 However, if the CPU data cache is using a write-allocate mode,
1666 this option is unlikely to provide any performance gain.
1667
1668 config SECCOMP
1669 bool
1670 prompt "Enable seccomp to safely compute untrusted bytecode"
1671 ---help---
1672 This kernel feature is useful for number crunching applications
1673 that may need to compute untrusted bytecode during their
1674 execution. By using pipes or other transports made available to
1675 the process as file descriptors supporting the read/write
1676 syscalls, it's possible to isolate those applications in
1677 their own address space using seccomp. Once seccomp is
1678 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1679 and the task is only allowed to execute a few safe syscalls
1680 defined by each seccomp mode.
1681
1682 config CC_STACKPROTECTOR
1683 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1684 depends on EXPERIMENTAL
1685 help
1686 This option turns on the -fstack-protector GCC feature. This
1687 feature puts, at the beginning of functions, a canary value on
1688 the stack just before the return address, and validates
1689 the value just before actually returning. Stack based buffer
1690 overflows (that need to overwrite this return address) now also
1691 overwrite the canary, which gets detected and the attack is then
1692 neutralized via a kernel panic.
1693 This feature requires gcc version 4.2 or above.
1694
1695 config DEPRECATED_PARAM_STRUCT
1696 bool "Provide old way to pass kernel parameters"
1697 help
1698 This was deprecated in 2001 and announced to live on for 5 years.
1699 Some old boot loaders still use this way.
1700
1701 endmenu
1702
1703 menu "Boot options"
1704
1705 # Compressed boot loader in ROM. Yes, we really want to ask about
1706 # TEXT and BSS so we preserve their values in the config files.
1707 config ZBOOT_ROM_TEXT
1708 hex "Compressed ROM boot loader base address"
1709 default "0"
1710 help
1711 The physical address at which the ROM-able zImage is to be
1712 placed in the target. Platforms which normally make use of
1713 ROM-able zImage formats normally set this to a suitable
1714 value in their defconfig file.
1715
1716 If ZBOOT_ROM is not enabled, this has no effect.
1717
1718 config ZBOOT_ROM_BSS
1719 hex "Compressed ROM boot loader BSS address"
1720 default "0"
1721 help
1722 The base address of an area of read/write memory in the target
1723 for the ROM-able zImage which must be available while the
1724 decompressor is running. It must be large enough to hold the
1725 entire decompressed kernel plus an additional 128 KiB.
1726 Platforms which normally make use of ROM-able zImage formats
1727 normally set this to a suitable value in their defconfig file.
1728
1729 If ZBOOT_ROM is not enabled, this has no effect.
1730
1731 config ZBOOT_ROM
1732 bool "Compressed boot loader in ROM/flash"
1733 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1734 help
1735 Say Y here if you intend to execute your compressed kernel image
1736 (zImage) directly from ROM or flash. If unsure, say N.
1737
1738 config ZBOOT_ROM_MMCIF
1739 bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1740 depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1741 help
1742 Say Y here to include experimental MMCIF loading code in the
1743 ROM-able zImage. With this enabled it is possible to write the
1744 the ROM-able zImage kernel image to an MMC card and boot the
1745 kernel straight from the reset vector. At reset the processor
1746 Mask ROM will load the first part of the the ROM-able zImage
1747 which in turn loads the rest the kernel image to RAM using the
1748 MMCIF hardware block.
1749
1750 config CMDLINE
1751 string "Default kernel command string"
1752 default ""
1753 help
1754 On some architectures (EBSA110 and CATS), there is currently no way
1755 for the boot loader to pass arguments to the kernel. For these
1756 architectures, you should supply some command-line options at build
1757 time by entering them here. As a minimum, you should specify the
1758 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1759
1760 config CMDLINE_FORCE
1761 bool "Always use the default kernel command string"
1762 depends on CMDLINE != ""
1763 help
1764 Always use the default kernel command string, even if the boot
1765 loader passes other arguments to the kernel.
1766 This is useful if you cannot or don't want to change the
1767 command-line options your boot loader passes to the kernel.
1768
1769 If unsure, say N.
1770
1771 config XIP_KERNEL
1772 bool "Kernel Execute-In-Place from ROM"
1773 depends on !ZBOOT_ROM
1774 help
1775 Execute-In-Place allows the kernel to run from non-volatile storage
1776 directly addressable by the CPU, such as NOR flash. This saves RAM
1777 space since the text section of the kernel is not loaded from flash
1778 to RAM. Read-write sections, such as the data section and stack,
1779 are still copied to RAM. The XIP kernel is not compressed since
1780 it has to run directly from flash, so it will take more space to
1781 store it. The flash address used to link the kernel object files,
1782 and for storing it, is configuration dependent. Therefore, if you
1783 say Y here, you must know the proper physical address where to
1784 store the kernel image depending on your own flash memory usage.
1785
1786 Also note that the make target becomes "make xipImage" rather than
1787 "make zImage" or "make Image". The final kernel binary to put in
1788 ROM memory will be arch/arm/boot/xipImage.
1789
1790 If unsure, say N.
1791
1792 config XIP_PHYS_ADDR
1793 hex "XIP Kernel Physical Location"
1794 depends on XIP_KERNEL
1795 default "0x00080000"
1796 help
1797 This is the physical address in your flash memory the kernel will
1798 be linked for and stored to. This address is dependent on your
1799 own flash usage.
1800
1801 config KEXEC
1802 bool "Kexec system call (EXPERIMENTAL)"
1803 depends on EXPERIMENTAL
1804 help
1805 kexec is a system call that implements the ability to shutdown your
1806 current kernel, and to start another kernel. It is like a reboot
1807 but it is independent of the system firmware. And like a reboot
1808 you can start any kernel with it, not just Linux.
1809
1810 It is an ongoing process to be certain the hardware in a machine
1811 is properly shutdown, so do not be surprised if this code does not
1812 initially work for you. It may help to enable device hotplugging
1813 support.
1814
1815 config ATAGS_PROC
1816 bool "Export atags in procfs"
1817 depends on KEXEC
1818 default y
1819 help
1820 Should the atags used to boot the kernel be exported in an "atags"
1821 file in procfs. Useful with kexec.
1822
1823 config CRASH_DUMP
1824 bool "Build kdump crash kernel (EXPERIMENTAL)"
1825 depends on EXPERIMENTAL
1826 help
1827 Generate crash dump after being started by kexec. This should
1828 be normally only set in special crash dump kernels which are
1829 loaded in the main kernel with kexec-tools into a specially
1830 reserved region and then later executed after a crash by
1831 kdump/kexec. The crash dump kernel must be compiled to a
1832 memory address not used by the main kernel
1833
1834 For more details see Documentation/kdump/kdump.txt
1835
1836 config AUTO_ZRELADDR
1837 bool "Auto calculation of the decompressed kernel image address"
1838 depends on !ZBOOT_ROM && !ARCH_U300
1839 help
1840 ZRELADDR is the physical address where the decompressed kernel
1841 image will be placed. If AUTO_ZRELADDR is selected, the address
1842 will be determined at run-time by masking the current IP with
1843 0xf8000000. This assumes the zImage being placed in the first 128MB
1844 from start of memory.
1845
1846 endmenu
1847
1848 menu "CPU Power Management"
1849
1850 if ARCH_HAS_CPUFREQ
1851
1852 source "drivers/cpufreq/Kconfig"
1853
1854 config CPU_FREQ_IMX
1855 tristate "CPUfreq driver for i.MX CPUs"
1856 depends on ARCH_MXC && CPU_FREQ
1857 help
1858 This enables the CPUfreq driver for i.MX CPUs.
1859
1860 config CPU_FREQ_SA1100
1861 bool
1862
1863 config CPU_FREQ_SA1110
1864 bool
1865
1866 config CPU_FREQ_INTEGRATOR
1867 tristate "CPUfreq driver for ARM Integrator CPUs"
1868 depends on ARCH_INTEGRATOR && CPU_FREQ
1869 default y
1870 help
1871 This enables the CPUfreq driver for ARM Integrator CPUs.
1872
1873 For details, take a look at <file:Documentation/cpu-freq>.
1874
1875 If in doubt, say Y.
1876
1877 config CPU_FREQ_PXA
1878 bool
1879 depends on CPU_FREQ && ARCH_PXA && PXA25x
1880 default y
1881 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1882
1883 config CPU_FREQ_S3C64XX
1884 bool "CPUfreq support for Samsung S3C64XX CPUs"
1885 depends on CPU_FREQ && CPU_S3C6410
1886
1887 config CPU_FREQ_S3C
1888 bool
1889 help
1890 Internal configuration node for common cpufreq on Samsung SoC
1891
1892 config CPU_FREQ_S3C24XX
1893 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1894 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1895 select CPU_FREQ_S3C
1896 help
1897 This enables the CPUfreq driver for the Samsung S3C24XX family
1898 of CPUs.
1899
1900 For details, take a look at <file:Documentation/cpu-freq>.
1901
1902 If in doubt, say N.
1903
1904 config CPU_FREQ_S3C24XX_PLL
1905 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1906 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1907 help
1908 Compile in support for changing the PLL frequency from the
1909 S3C24XX series CPUfreq driver. The PLL takes time to settle
1910 after a frequency change, so by default it is not enabled.
1911
1912 This also means that the PLL tables for the selected CPU(s) will
1913 be built which may increase the size of the kernel image.
1914
1915 config CPU_FREQ_S3C24XX_DEBUG
1916 bool "Debug CPUfreq Samsung driver core"
1917 depends on CPU_FREQ_S3C24XX
1918 help
1919 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1920
1921 config CPU_FREQ_S3C24XX_IODEBUG
1922 bool "Debug CPUfreq Samsung driver IO timing"
1923 depends on CPU_FREQ_S3C24XX
1924 help
1925 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1926
1927 config CPU_FREQ_S3C24XX_DEBUGFS
1928 bool "Export debugfs for CPUFreq"
1929 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1930 help
1931 Export status information via debugfs.
1932
1933 endif
1934
1935 source "drivers/cpuidle/Kconfig"
1936
1937 endmenu
1938
1939 menu "Floating point emulation"
1940
1941 comment "At least one emulation must be selected"
1942
1943 config FPE_NWFPE
1944 bool "NWFPE math emulation"
1945 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1946 ---help---
1947 Say Y to include the NWFPE floating point emulator in the kernel.
1948 This is necessary to run most binaries. Linux does not currently
1949 support floating point hardware so you need to say Y here even if
1950 your machine has an FPA or floating point co-processor podule.
1951
1952 You may say N here if you are going to load the Acorn FPEmulator
1953 early in the bootup.
1954
1955 config FPE_NWFPE_XP
1956 bool "Support extended precision"
1957 depends on FPE_NWFPE
1958 help
1959 Say Y to include 80-bit support in the kernel floating-point
1960 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1961 Note that gcc does not generate 80-bit operations by default,
1962 so in most cases this option only enlarges the size of the
1963 floating point emulator without any good reason.
1964
1965 You almost surely want to say N here.
1966
1967 config FPE_FASTFPE
1968 bool "FastFPE math emulation (EXPERIMENTAL)"
1969 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1970 ---help---
1971 Say Y here to include the FAST floating point emulator in the kernel.
1972 This is an experimental much faster emulator which now also has full
1973 precision for the mantissa. It does not support any exceptions.
1974 It is very simple, and approximately 3-6 times faster than NWFPE.
1975
1976 It should be sufficient for most programs. It may be not suitable
1977 for scientific calculations, but you have to check this for yourself.
1978 If you do not feel you need a faster FP emulation you should better
1979 choose NWFPE.
1980
1981 config VFP
1982 bool "VFP-format floating point maths"
1983 depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1984 help
1985 Say Y to include VFP support code in the kernel. This is needed
1986 if your hardware includes a VFP unit.
1987
1988 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1989 release notes and additional status information.
1990
1991 Say N if your target does not have VFP hardware.
1992
1993 config VFPv3
1994 bool
1995 depends on VFP
1996 default y if CPU_V7
1997
1998 config NEON
1999 bool "Advanced SIMD (NEON) Extension support"
2000 depends on VFPv3 && CPU_V7
2001 help
2002 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2003 Extension.
2004
2005 endmenu
2006
2007 menu "Userspace binary formats"
2008
2009 source "fs/Kconfig.binfmt"
2010
2011 config ARTHUR
2012 tristate "RISC OS personality"
2013 depends on !AEABI
2014 help
2015 Say Y here to include the kernel code necessary if you want to run
2016 Acorn RISC OS/Arthur binaries under Linux. This code is still very
2017 experimental; if this sounds frightening, say N and sleep in peace.
2018 You can also say M here to compile this support as a module (which
2019 will be called arthur).
2020
2021 endmenu
2022
2023 menu "Power management options"
2024
2025 source "kernel/power/Kconfig"
2026
2027 config ARCH_SUSPEND_POSSIBLE
2028 depends on !ARCH_S5P64X0 && !ARCH_S5P6442
2029 depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2030 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2031 def_bool y
2032
2033 endmenu
2034
2035 source "net/Kconfig"
2036
2037 source "drivers/Kconfig"
2038
2039 source "fs/Kconfig"
2040
2041 source "arch/arm/Kconfig.debug"
2042
2043 source "security/Kconfig"
2044
2045 source "crypto/Kconfig"
2046
2047 source "lib/Kconfig"
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