arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
   5         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   6         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
   7         select ARCH_HAVE_CUSTOM_GPIO_H
   8         select ARCH_HAS_GCOV_PROFILE_ALL
   9         select ARCH_MIGHT_HAVE_PC_PARPORT
  10         select ARCH_SUPPORTS_ATOMIC_RMW
  11         select ARCH_USE_BUILTIN_BSWAP
  12         select ARCH_USE_CMPXCHG_LOCKREF
  13         select ARCH_WANT_IPC_PARSE_VERSION
  14         select BUILDTIME_EXTABLE_SORT if MMU
  15         select CLONE_BACKWARDS
  16         select CPU_PM if (SUSPEND || CPU_IDLE)
  17         select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
  18         select GENERIC_ALLOCATOR
  19         select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI)
  20         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  21         select GENERIC_IDLE_POLL_SETUP
  22         select GENERIC_IRQ_PROBE
  23         select GENERIC_IRQ_SHOW
  24         select GENERIC_PCI_IOMAP
  25         select GENERIC_SCHED_CLOCK
  26         select GENERIC_SMP_IDLE_THREAD
  27         select GENERIC_STRNCPY_FROM_USER
  28         select GENERIC_STRNLEN_USER
  29         select HANDLE_DOMAIN_IRQ
  30         select HARDIRQS_SW_RESEND
  31         select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT)
  32         select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) && !CPU_32v6
  33         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  34         select HAVE_ARCH_KGDB
  35         select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
  36         select HAVE_ARCH_TRACEHOOK
  37         select HAVE_BPF_JIT
  38         select HAVE_CC_STACKPROTECTOR
  39         select HAVE_CONTEXT_TRACKING
  40         select HAVE_C_RECORDMCOUNT
  41         select HAVE_DEBUG_KMEMLEAK
  42         select HAVE_DMA_API_DEBUG
  43         select HAVE_DMA_ATTRS
  44         select HAVE_DMA_CONTIGUOUS if MMU
  45         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  46         select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
  47         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  48         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  49         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  50         select HAVE_GENERIC_DMA_COHERENT
  51         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  52         select HAVE_IDE if PCI || ISA || PCMCIA
  53         select HAVE_IRQ_TIME_ACCOUNTING
  54         select HAVE_KERNEL_GZIP
  55         select HAVE_KERNEL_LZ4
  56         select HAVE_KERNEL_LZMA
  57         select HAVE_KERNEL_LZO
  58         select HAVE_KERNEL_XZ
  59         select HAVE_KPROBES if !XIP_KERNEL
  60         select HAVE_KRETPROBES if (HAVE_KPROBES)
  61         select HAVE_MEMBLOCK
  62         select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
  63         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  64         select HAVE_OPTPROBES if !THUMB2_KERNEL
  65         select HAVE_PERF_EVENTS
  66         select HAVE_PERF_REGS
  67         select HAVE_PERF_USER_STACK_DUMP
  68         select HAVE_RCU_TABLE_FREE if (SMP && ARM_LPAE)
  69         select HAVE_REGS_AND_STACK_ACCESS_API
  70         select HAVE_SYSCALL_TRACEPOINTS
  71         select HAVE_UID16
  72         select HAVE_VIRT_CPU_ACCOUNTING_GEN
  73         select IRQ_FORCED_THREADING
  74         select MODULES_USE_ELF_REL
  75         select NO_BOOTMEM
  76         select OLD_SIGACTION
  77         select OLD_SIGSUSPEND3
  78         select PERF_USE_VMALLOC
  79         select RTC_LIB
  80         select SYS_SUPPORTS_APM_EMULATION
  81         # Above selects are sorted alphabetically; please add new ones
  82         # according to that.  Thanks.
  83         help
  84           The ARM series is a line of low-power-consumption RISC chip designs
  85           licensed by ARM Ltd and targeted at embedded applications and
  86           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  87           manufactured, but legacy ARM-based PC hardware remains popular in
  88           Europe.  There is an ARM Linux project with a web page at
  89           <http://www.arm.linux.org.uk/>.
  90
  91 config ARM_HAS_SG_CHAIN
  92         select ARCH_HAS_SG_CHAIN
  93         bool
  94
  95 config NEED_SG_DMA_LENGTH
  96         bool
  97
  98 config ARM_DMA_USE_IOMMU
  99         bool
 100         select ARM_HAS_SG_CHAIN
 101         select NEED_SG_DMA_LENGTH
 102
 103 if ARM_DMA_USE_IOMMU
 104
 105 config ARM_DMA_IOMMU_ALIGNMENT
 106         int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
 107         range 4 9
 108         default 8
 109         help
 110           DMA mapping framework by default aligns all buffers to the smallest
 111           PAGE_SIZE order which is greater than or equal to the requested buffer
 112           size. This works well for buffers up to a few hundreds kilobytes, but
 113           for larger buffers it just a waste of address space. Drivers which has
 114           relatively small addressing window (like 64Mib) might run out of
 115           virtual space with just a few allocations.
 116
 117           With this parameter you can specify the maximum PAGE_SIZE order for
 118           DMA IOMMU buffers. Larger buffers will be aligned only to this
 119           specified order. The order is expressed as a power of two multiplied
 120           by the PAGE_SIZE.
 121
 122 endif
 123
 124 config MIGHT_HAVE_PCI
 125         bool
 126
 127 config SYS_SUPPORTS_APM_EMULATION
 128         bool
 129
 130 config HAVE_TCM
 131         bool
 132         select GENERIC_ALLOCATOR
 133
 134 config HAVE_PROC_CPU
 135         bool
 136
 137 config NO_IOPORT_MAP
 138         bool
 139
 140 config EISA
 141         bool
 142         ---help---
 143           The Extended Industry Standard Architecture (EISA) bus was
 144           developed as an open alternative to the IBM MicroChannel bus.
 145
 146           The EISA bus provided some of the features of the IBM MicroChannel
 147           bus while maintaining backward compatibility with cards made for
 148           the older ISA bus.  The EISA bus saw limited use between 1988 and
 149           1995 when it was made obsolete by the PCI bus.
 150
 151           Say Y here if you are building a kernel for an EISA-based machine.
 152
 153           Otherwise, say N.
 154
 155 config SBUS
 156         bool
 157
 158 config STACKTRACE_SUPPORT
 159         bool
 160         default y
 161
 162 config HAVE_LATENCYTOP_SUPPORT
 163         bool
 164         depends on !SMP
 165         default y
 166
 167 config LOCKDEP_SUPPORT
 168         bool
 169         default y
 170
 171 config TRACE_IRQFLAGS_SUPPORT
 172         bool
 173         default y
 174
 175 config RWSEM_XCHGADD_ALGORITHM
 176         bool
 177         default y
 178
 179 config ARCH_HAS_ILOG2_U32
 180         bool
 181
 182 config ARCH_HAS_ILOG2_U64
 183         bool
 184
 185 config ARCH_HAS_BANDGAP
 186         bool
 187
 188 config GENERIC_HWEIGHT
 189         bool
 190         default y
 191
 192 config GENERIC_CALIBRATE_DELAY
 193         bool
 194         default y
 195
 196 config ARCH_MAY_HAVE_PC_FDC
 197         bool
 198
 199 config ZONE_DMA
 200         bool
 201
 202 config NEED_DMA_MAP_STATE
 203        def_bool y
 204
 205 config ARCH_SUPPORTS_UPROBES
 206         def_bool y
 207
 208 config ARCH_HAS_DMA_SET_COHERENT_MASK
 209         bool
 210
 211 config GENERIC_ISA_DMA
 212         bool
 213
 214 config FIQ
 215         bool
 216
 217 config NEED_RET_TO_USER
 218         bool
 219
 220 config ARCH_MTD_XIP
 221         bool
 222
 223 config VECTORS_BASE
 224         hex
 225         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 226         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 227         default 0x00000000
 228         help
 229           The base address of exception vectors.  This must be two pages
 230           in size.
 231
 232 config ARM_PATCH_PHYS_VIRT
 233         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 234         default y
 235         depends on !XIP_KERNEL && MMU
 236         depends on !ARCH_REALVIEW || !SPARSEMEM
 237         help
 238           Patch phys-to-virt and virt-to-phys translation functions at
 239           boot and module load time according to the position of the
 240           kernel in system memory.
 241
 242           This can only be used with non-XIP MMU kernels where the base
 243           of physical memory is at a 16MB boundary.
 244
 245           Only disable this option if you know that you do not require
 246           this feature (eg, building a kernel for a single machine) and
 247           you need to shrink the kernel to the minimal size.
 248
 249 config NEED_MACH_IO_H
 250         bool
 251         help
 252           Select this when mach/io.h is required to provide special
 253           definitions for this platform.  The need for mach/io.h should
 254           be avoided when possible.
 255
 256 config NEED_MACH_MEMORY_H
 257         bool
 258         help
 259           Select this when mach/memory.h is required to provide special
 260           definitions for this platform.  The need for mach/memory.h should
 261           be avoided when possible.
 262
 263 config PHYS_OFFSET
 264         hex "Physical address of main memory" if MMU
 265         depends on !ARM_PATCH_PHYS_VIRT
 266         default DRAM_BASE if !MMU
 267         default 0x00000000 if ARCH_EBSA110 || \
 268                         EP93XX_SDCE3_SYNC_PHYS_OFFSET || \
 269                         ARCH_FOOTBRIDGE || \
 270                         ARCH_INTEGRATOR || \
 271                         ARCH_IOP13XX || \
 272                         ARCH_KS8695 || \
 273                         (ARCH_REALVIEW && !REALVIEW_HIGH_PHYS_OFFSET)
 274         default 0x10000000 if ARCH_OMAP1 || ARCH_RPC
 275         default 0x20000000 if ARCH_S5PV210
 276         default 0x70000000 if REALVIEW_HIGH_PHYS_OFFSET
 277         default 0xc0000000 if EP93XX_SDCE0_PHYS_OFFSET || ARCH_SA1100
 278         default 0xd0000000 if EP93XX_SDCE1_PHYS_OFFSET
 279         default 0xe0000000 if EP93XX_SDCE2_PHYS_OFFSET
 280         default 0xf0000000 if EP93XX_SDCE3_ASYNC_PHYS_OFFSET
 281         help
 282           Please provide the physical address corresponding to the
 283           location of main memory in your system.
 284
 285 config GENERIC_BUG
 286         def_bool y
 287         depends on BUG
 288
 289 source "init/Kconfig"
 290
 291 source "kernel/Kconfig.freezer"
 292
 293 menu "System Type"
 294
 295 config MMU
 296         bool "MMU-based Paged Memory Management Support"
 297         default y
 298         help
 299           Select if you want MMU-based virtualised addressing space
 300           support by paged memory management. If unsure, say 'Y'.
 301
 302 #
 303 # The "ARM system type" choice list is ordered alphabetically by option
 304 # text.  Please add new entries in the option alphabetic order.
 305 #
 306 choice
 307         prompt "ARM system type"
 308         default ARCH_VERSATILE if !MMU
 309         default ARCH_MULTIPLATFORM if MMU
 310
 311 config ARCH_MULTIPLATFORM
 312         bool "Allow multiple platforms to be selected"
 313         depends on MMU
 314         select ARCH_WANT_OPTIONAL_GPIOLIB
 315         select ARM_HAS_SG_CHAIN
 316         select ARM_PATCH_PHYS_VIRT
 317         select AUTO_ZRELADDR
 318         select CLKSRC_OF
 319         select COMMON_CLK
 320         select GENERIC_CLOCKEVENTS
 321         select MIGHT_HAVE_PCI
 322         select MULTI_IRQ_HANDLER
 323         select SPARSE_IRQ
 324         select USE_OF
 325
 326 config ARCH_REALVIEW
 327         bool "ARM Ltd. RealView family"
 328         select ARCH_WANT_OPTIONAL_GPIOLIB
 329         select ARM_AMBA
 330         select ARM_TIMER_SP804
 331         select COMMON_CLK
 332         select COMMON_CLK_VERSATILE
 333         select GENERIC_CLOCKEVENTS
 334         select GPIO_PL061 if GPIOLIB
 335         select ICST
 336         select NEED_MACH_MEMORY_H
 337         select PLAT_VERSATILE
 338         select PLAT_VERSATILE_SCHED_CLOCK
 339         help
 340           This enables support for ARM Ltd RealView boards.
 341
 342 config ARCH_VERSATILE
 343         bool "ARM Ltd. Versatile family"
 344         select ARCH_WANT_OPTIONAL_GPIOLIB
 345         select ARM_AMBA
 346         select ARM_TIMER_SP804
 347         select ARM_VIC
 348         select CLKDEV_LOOKUP
 349         select GENERIC_CLOCKEVENTS
 350         select HAVE_MACH_CLKDEV
 351         select ICST
 352         select PLAT_VERSATILE
 353         select PLAT_VERSATILE_CLOCK
 354         select PLAT_VERSATILE_SCHED_CLOCK
 355         select VERSATILE_FPGA_IRQ
 356         help
 357           This enables support for ARM Ltd Versatile board.
 358
 359 config ARCH_CLPS711X
 360         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 361         select ARCH_REQUIRE_GPIOLIB
 362         select AUTO_ZRELADDR
 363         select CLKSRC_MMIO
 364         select COMMON_CLK
 365         select CPU_ARM720T
 366         select GENERIC_CLOCKEVENTS
 367         select MFD_SYSCON
 368         select SOC_BUS
 369         help
 370           Support for Cirrus Logic 711x/721x/731x based boards.
 371
 372 config ARCH_GEMINI
 373         bool "Cortina Systems Gemini"
 374         select ARCH_REQUIRE_GPIOLIB
 375         select CLKSRC_MMIO
 376         select CPU_FA526
 377         select GENERIC_CLOCKEVENTS
 378         help
 379           Support for the Cortina Systems Gemini family SoCs
 380
 381 config ARCH_EBSA110
 382         bool "EBSA-110"
 383         select ARCH_USES_GETTIMEOFFSET
 384         select CPU_SA110
 385         select ISA
 386         select NEED_MACH_IO_H
 387         select NEED_MACH_MEMORY_H
 388         select NO_IOPORT_MAP
 389         help
 390           This is an evaluation board for the StrongARM processor available
 391           from Digital. It has limited hardware on-board, including an
 392           Ethernet interface, two PCMCIA sockets, two serial ports and a
 393           parallel port.
 394
 395 config ARCH_EFM32
 396         bool "Energy Micro efm32"
 397         depends on !MMU
 398         select ARCH_REQUIRE_GPIOLIB
 399         select ARM_NVIC
 400         select AUTO_ZRELADDR
 401         select CLKSRC_OF
 402         select COMMON_CLK
 403         select CPU_V7M
 404         select GENERIC_CLOCKEVENTS
 405         select NO_DMA
 406         select NO_IOPORT_MAP
 407         select SPARSE_IRQ
 408         select USE_OF
 409         help
 410           Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
 411           processors.
 412
 413 config ARCH_EP93XX
 414         bool "EP93xx-based"
 415         select ARCH_HAS_HOLES_MEMORYMODEL
 416         select ARCH_REQUIRE_GPIOLIB
 417         select ARCH_USES_GETTIMEOFFSET
 418         select ARM_AMBA
 419         select ARM_VIC
 420         select CLKDEV_LOOKUP
 421         select CPU_ARM920T
 422         help
 423           This enables support for the Cirrus EP93xx series of CPUs.
 424
 425 config ARCH_FOOTBRIDGE
 426         bool "FootBridge"
 427         select CPU_SA110
 428         select FOOTBRIDGE
 429         select GENERIC_CLOCKEVENTS
 430         select HAVE_IDE
 431         select NEED_MACH_IO_H if !MMU
 432         select NEED_MACH_MEMORY_H
 433         help
 434           Support for systems based on the DC21285 companion chip
 435           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 436
 437 config ARCH_NETX
 438         bool "Hilscher NetX based"
 439         select ARM_VIC
 440         select CLKSRC_MMIO
 441         select CPU_ARM926T
 442         select GENERIC_CLOCKEVENTS
 443         help
 444           This enables support for systems based on the Hilscher NetX Soc
 445
 446 config ARCH_IOP13XX
 447         bool "IOP13xx-based"
 448         depends on MMU
 449         select CPU_XSC3
 450         select NEED_MACH_MEMORY_H
 451         select NEED_RET_TO_USER
 452         select PCI
 453         select PLAT_IOP
 454         select VMSPLIT_1G
 455         select SPARSE_IRQ
 456         help
 457           Support for Intel's IOP13XX (XScale) family of processors.
 458
 459 config ARCH_IOP32X
 460         bool "IOP32x-based"
 461         depends on MMU
 462         select ARCH_REQUIRE_GPIOLIB
 463         select CPU_XSCALE
 464         select GPIO_IOP
 465         select NEED_RET_TO_USER
 466         select PCI
 467         select PLAT_IOP
 468         help
 469           Support for Intel's 80219 and IOP32X (XScale) family of
 470           processors.
 471
 472 config ARCH_IOP33X
 473         bool "IOP33x-based"
 474         depends on MMU
 475         select ARCH_REQUIRE_GPIOLIB
 476         select CPU_XSCALE
 477         select GPIO_IOP
 478         select NEED_RET_TO_USER
 479         select PCI
 480         select PLAT_IOP
 481         help
 482           Support for Intel's IOP33X (XScale) family of processors.
 483
 484 config ARCH_IXP4XX
 485         bool "IXP4xx-based"
 486         depends on MMU
 487         select ARCH_HAS_DMA_SET_COHERENT_MASK
 488         select ARCH_REQUIRE_GPIOLIB
 489         select ARCH_SUPPORTS_BIG_ENDIAN
 490         select CLKSRC_MMIO
 491         select CPU_XSCALE
 492         select DMABOUNCE if PCI
 493         select GENERIC_CLOCKEVENTS
 494         select MIGHT_HAVE_PCI
 495         select NEED_MACH_IO_H
 496         select USB_EHCI_BIG_ENDIAN_DESC
 497         select USB_EHCI_BIG_ENDIAN_MMIO
 498         help
 499           Support for Intel's IXP4XX (XScale) family of processors.
 500
 501 config ARCH_DOVE
 502         bool "Marvell Dove"
 503         select ARCH_REQUIRE_GPIOLIB
 504         select CPU_PJ4
 505         select GENERIC_CLOCKEVENTS
 506         select MIGHT_HAVE_PCI
 507         select MVEBU_MBUS
 508         select PINCTRL
 509         select PINCTRL_DOVE
 510         select PLAT_ORION_LEGACY
 511         help
 512           Support for the Marvell Dove SoC 88AP510
 513
 514 config ARCH_MV78XX0
 515         bool "Marvell MV78xx0"
 516         select ARCH_REQUIRE_GPIOLIB
 517         select CPU_FEROCEON
 518         select GENERIC_CLOCKEVENTS
 519         select MVEBU_MBUS
 520         select PCI
 521         select PLAT_ORION_LEGACY
 522         help
 523           Support for the following Marvell MV78xx0 series SoCs:
 524           MV781x0, MV782x0.
 525
 526 config ARCH_ORION5X
 527         bool "Marvell Orion"
 528         depends on MMU
 529         select ARCH_REQUIRE_GPIOLIB
 530         select CPU_FEROCEON
 531         select GENERIC_CLOCKEVENTS
 532         select MVEBU_MBUS
 533         select PCI
 534         select PLAT_ORION_LEGACY
 535         help
 536           Support for the following Marvell Orion 5x series SoCs:
 537           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 538           Orion-2 (5281), Orion-1-90 (6183).
 539
 540 config ARCH_MMP
 541         bool "Marvell PXA168/910/MMP2"
 542         depends on MMU
 543         select ARCH_REQUIRE_GPIOLIB
 544         select CLKDEV_LOOKUP
 545         select GENERIC_ALLOCATOR
 546         select GENERIC_CLOCKEVENTS
 547         select GPIO_PXA
 548         select IRQ_DOMAIN
 549         select MULTI_IRQ_HANDLER
 550         select PINCTRL
 551         select PLAT_PXA
 552         select SPARSE_IRQ
 553         help
 554           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 555
 556 config ARCH_KS8695
 557         bool "Micrel/Kendin KS8695"
 558         select ARCH_REQUIRE_GPIOLIB
 559         select CLKSRC_MMIO
 560         select CPU_ARM922T
 561         select GENERIC_CLOCKEVENTS
 562         select NEED_MACH_MEMORY_H
 563         help
 564           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 565           System-on-Chip devices.
 566
 567 config ARCH_W90X900
 568         bool "Nuvoton W90X900 CPU"
 569         select ARCH_REQUIRE_GPIOLIB
 570         select CLKDEV_LOOKUP
 571         select CLKSRC_MMIO
 572         select CPU_ARM926T
 573         select GENERIC_CLOCKEVENTS
 574         help
 575           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 576           At present, the w90x900 has been renamed nuc900, regarding
 577           the ARM series product line, you can login the following
 578           link address to know more.
 579
 580           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 581                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 582
 583 config ARCH_LPC32XX
 584         bool "NXP LPC32XX"
 585         select ARCH_REQUIRE_GPIOLIB
 586         select ARM_AMBA
 587         select CLKDEV_LOOKUP
 588         select CLKSRC_MMIO
 589         select CPU_ARM926T
 590         select GENERIC_CLOCKEVENTS
 591         select HAVE_IDE
 592         select USE_OF
 593         help
 594           Support for the NXP LPC32XX family of processors
 595
 596 config ARCH_PXA
 597         bool "PXA2xx/PXA3xx-based"
 598         depends on MMU
 599         select ARCH_MTD_XIP
 600         select ARCH_REQUIRE_GPIOLIB
 601         select ARM_CPU_SUSPEND if PM
 602         select AUTO_ZRELADDR
 603         select CLKDEV_LOOKUP
 604         select CLKSRC_MMIO
 605         select CLKSRC_OF
 606         select GENERIC_CLOCKEVENTS
 607         select GPIO_PXA
 608         select HAVE_IDE
 609         select MULTI_IRQ_HANDLER
 610         select PLAT_PXA
 611         select SPARSE_IRQ
 612         help
 613           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 614
 615 config ARCH_MSM
 616         bool "Qualcomm MSM (non-multiplatform)"
 617         select ARCH_REQUIRE_GPIOLIB
 618         select COMMON_CLK
 619         select GENERIC_CLOCKEVENTS
 620         help
 621           Support for Qualcomm MSM/QSD based systems.  This runs on the
 622           apps processor of the MSM/QSD and depends on a shared memory
 623           interface to the modem processor which runs the baseband
 624           stack and controls some vital subsystems
 625           (clock and power control, etc).
 626
 627 config ARCH_SHMOBILE_LEGACY
 628         bool "Renesas ARM SoCs (non-multiplatform)"
 629         select ARCH_SHMOBILE
 630         select ARM_PATCH_PHYS_VIRT if MMU
 631         select CLKDEV_LOOKUP
 632         select CPU_V7
 633         select GENERIC_CLOCKEVENTS
 634         select HAVE_ARM_SCU if SMP
 635         select HAVE_ARM_TWD if SMP
 636         select HAVE_MACH_CLKDEV
 637         select HAVE_SMP
 638         select MIGHT_HAVE_CACHE_L2X0
 639         select MULTI_IRQ_HANDLER
 640         select NO_IOPORT_MAP
 641         select PINCTRL
 642         select PM_GENERIC_DOMAINS if PM
 643         select SH_CLK_CPG
 644         select SPARSE_IRQ
 645         help
 646           Support for Renesas ARM SoC platforms using a non-multiplatform
 647           kernel. This includes the SH-Mobile, R-Mobile, EMMA-Mobile, R-Car
 648           and RZ families.
 649
 650 config ARCH_RPC
 651         bool "RiscPC"
 652         select ARCH_ACORN
 653         select ARCH_MAY_HAVE_PC_FDC
 654         select ARCH_SPARSEMEM_ENABLE
 655         select ARCH_USES_GETTIMEOFFSET
 656         select CPU_SA110
 657         select FIQ
 658         select HAVE_IDE
 659         select HAVE_PATA_PLATFORM
 660         select ISA_DMA_API
 661         select NEED_MACH_IO_H
 662         select NEED_MACH_MEMORY_H
 663         select NO_IOPORT_MAP
 664         select VIRT_TO_BUS
 665         help
 666           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 667           CD-ROM interface, serial and parallel port, and the floppy drive.
 668
 669 config ARCH_SA1100
 670         bool "SA1100-based"
 671         select ARCH_MTD_XIP
 672         select ARCH_REQUIRE_GPIOLIB
 673         select ARCH_SPARSEMEM_ENABLE
 674         select CLKDEV_LOOKUP
 675         select CLKSRC_MMIO
 676         select CPU_FREQ
 677         select CPU_SA1100
 678         select GENERIC_CLOCKEVENTS
 679         select HAVE_IDE
 680         select IRQ_DOMAIN
 681         select ISA
 682         select MULTI_IRQ_HANDLER
 683         select NEED_MACH_MEMORY_H
 684         select SPARSE_IRQ
 685         help
 686           Support for StrongARM 11x0 based boards.
 687
 688 config ARCH_S3C24XX
 689         bool "Samsung S3C24XX SoCs"
 690         select ARCH_REQUIRE_GPIOLIB
 691         select ATAGS
 692         select CLKDEV_LOOKUP
 693         select CLKSRC_SAMSUNG_PWM
 694         select GENERIC_CLOCKEVENTS
 695         select GPIO_SAMSUNG
 696         select HAVE_S3C2410_I2C if I2C
 697         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 698         select HAVE_S3C_RTC if RTC_CLASS
 699         select MULTI_IRQ_HANDLER
 700         select NEED_MACH_IO_H
 701         select SAMSUNG_ATAGS
 702         help
 703           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 704           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 705           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 706           Samsung SMDK2410 development board (and derivatives).
 707
 708 config ARCH_S3C64XX
 709         bool "Samsung S3C64XX"
 710         select ARCH_REQUIRE_GPIOLIB
 711         select ARM_AMBA
 712         select ARM_VIC
 713         select ATAGS
 714         select CLKDEV_LOOKUP
 715         select CLKSRC_SAMSUNG_PWM
 716         select COMMON_CLK_SAMSUNG
 717         select CPU_V6K
 718         select GENERIC_CLOCKEVENTS
 719         select GPIO_SAMSUNG
 720         select HAVE_S3C2410_I2C if I2C
 721         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 722         select HAVE_TCM
 723         select NO_IOPORT_MAP
 724         select PLAT_SAMSUNG
 725         select PM_GENERIC_DOMAINS if PM
 726         select S3C_DEV_NAND
 727         select S3C_GPIO_TRACK
 728         select SAMSUNG_ATAGS
 729         select SAMSUNG_WAKEMASK
 730         select SAMSUNG_WDT_RESET
 731         help
 732           Samsung S3C64XX series based systems
 733
 734 config ARCH_DAVINCI
 735         bool "TI DaVinci"
 736         select ARCH_HAS_HOLES_MEMORYMODEL
 737         select ARCH_REQUIRE_GPIOLIB
 738         select CLKDEV_LOOKUP
 739         select GENERIC_ALLOCATOR
 740         select GENERIC_CLOCKEVENTS
 741         select GENERIC_IRQ_CHIP
 742         select HAVE_IDE
 743         select TI_PRIV_EDMA
 744         select USE_OF
 745         select ZONE_DMA
 746         help
 747           Support for TI's DaVinci platform.
 748
 749 config ARCH_OMAP1
 750         bool "TI OMAP1"
 751         depends on MMU
 752         select ARCH_HAS_HOLES_MEMORYMODEL
 753         select ARCH_OMAP
 754         select ARCH_REQUIRE_GPIOLIB
 755         select CLKDEV_LOOKUP
 756         select CLKSRC_MMIO
 757         select GENERIC_CLOCKEVENTS
 758         select GENERIC_IRQ_CHIP
 759         select HAVE_IDE
 760         select IRQ_DOMAIN
 761         select NEED_MACH_IO_H if PCCARD
 762         select NEED_MACH_MEMORY_H
 763         help
 764           Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
 765
 766 endchoice
 767
 768 menu "Multiple platform selection"
 769         depends on ARCH_MULTIPLATFORM
 770
 771 comment "CPU Core family selection"
 772
 773 config ARCH_MULTI_V4
 774         bool "ARMv4 based platforms (FA526)"
 775         depends on !ARCH_MULTI_V6_V7
 776         select ARCH_MULTI_V4_V5
 777         select CPU_FA526
 778
 779 config ARCH_MULTI_V4T
 780         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
 781         depends on !ARCH_MULTI_V6_V7
 782         select ARCH_MULTI_V4_V5
 783         select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \
 784                 CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \
 785                 CPU_ARM925T || CPU_ARM940T)
 786
 787 config ARCH_MULTI_V5
 788         bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
 789         depends on !ARCH_MULTI_V6_V7
 790         select ARCH_MULTI_V4_V5
 791         select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
 792                 CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
 793                 CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
 794
 795 config ARCH_MULTI_V4_V5
 796         bool
 797
 798 config ARCH_MULTI_V6
 799         bool "ARMv6 based platforms (ARM11)"
 800         select ARCH_MULTI_V6_V7
 801         select CPU_V6K
 802
 803 config ARCH_MULTI_V7
 804         bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
 805         default y
 806         select ARCH_MULTI_V6_V7
 807         select CPU_V7
 808         select HAVE_SMP
 809
 810 config ARCH_MULTI_V6_V7
 811         bool
 812         select MIGHT_HAVE_CACHE_L2X0
 813
 814 config ARCH_MULTI_CPU_AUTO
 815         def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
 816         select ARCH_MULTI_V5
 817
 818 endmenu
 819
 820 config ARCH_VIRT
 821         bool "Dummy Virtual Machine" if ARCH_MULTI_V7
 822         select ARM_AMBA
 823         select ARM_GIC
 824         select ARM_PSCI
 825         select HAVE_ARM_ARCH_TIMER
 826
 827 #
 828 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 829 # Kconfigs may be included either alphabetically (according to the
 830 # plat- suffix) or along side the corresponding mach-* source.
 831 #
 832 source "arch/arm/mach-mvebu/Kconfig"
 833
 834 source "arch/arm/mach-asm9260/Kconfig"
 835
 836 source "arch/arm/mach-at91/Kconfig"
 837
 838 source "arch/arm/mach-axxia/Kconfig"
 839
 840 source "arch/arm/mach-bcm/Kconfig"
 841
 842 source "arch/arm/mach-berlin/Kconfig"
 843
 844 source "arch/arm/mach-clps711x/Kconfig"
 845
 846 source "arch/arm/mach-cns3xxx/Kconfig"
 847
 848 source "arch/arm/mach-davinci/Kconfig"
 849
 850 source "arch/arm/mach-digicolor/Kconfig"
 851
 852 source "arch/arm/mach-dove/Kconfig"
 853
 854 source "arch/arm/mach-ep93xx/Kconfig"
 855
 856 source "arch/arm/mach-footbridge/Kconfig"
 857
 858 source "arch/arm/mach-gemini/Kconfig"
 859
 860 source "arch/arm/mach-highbank/Kconfig"
 861
 862 source "arch/arm/mach-hisi/Kconfig"
 863
 864 source "arch/arm/mach-integrator/Kconfig"
 865
 866 source "arch/arm/mach-iop32x/Kconfig"
 867
 868 source "arch/arm/mach-iop33x/Kconfig"
 869
 870 source "arch/arm/mach-iop13xx/Kconfig"
 871
 872 source "arch/arm/mach-ixp4xx/Kconfig"
 873
 874 source "arch/arm/mach-keystone/Kconfig"
 875
 876 source "arch/arm/mach-ks8695/Kconfig"
 877
 878 source "arch/arm/mach-meson/Kconfig"
 879
 880 source "arch/arm/mach-msm/Kconfig"
 881
 882 source "arch/arm/mach-moxart/Kconfig"
 883
 884 source "arch/arm/mach-mv78xx0/Kconfig"
 885
 886 source "arch/arm/mach-imx/Kconfig"
 887
 888 source "arch/arm/mach-mediatek/Kconfig"
 889
 890 source "arch/arm/mach-mxs/Kconfig"
 891
 892 source "arch/arm/mach-netx/Kconfig"
 893
 894 source "arch/arm/mach-nomadik/Kconfig"
 895
 896 source "arch/arm/mach-nspire/Kconfig"
 897
 898 source "arch/arm/plat-omap/Kconfig"
 899
 900 source "arch/arm/mach-omap1/Kconfig"
 901
 902 source "arch/arm/mach-omap2/Kconfig"
 903
 904 source "arch/arm/mach-orion5x/Kconfig"
 905
 906 source "arch/arm/mach-picoxcell/Kconfig"
 907
 908 source "arch/arm/mach-pxa/Kconfig"
 909 source "arch/arm/plat-pxa/Kconfig"
 910
 911 source "arch/arm/mach-mmp/Kconfig"
 912
 913 source "arch/arm/mach-qcom/Kconfig"
 914
 915 source "arch/arm/mach-realview/Kconfig"
 916
 917 source "arch/arm/mach-rockchip/Kconfig"
 918
 919 source "arch/arm/mach-sa1100/Kconfig"
 920
 921 source "arch/arm/mach-socfpga/Kconfig"
 922
 923 source "arch/arm/mach-spear/Kconfig"
 924
 925 source "arch/arm/mach-sti/Kconfig"
 926
 927 source "arch/arm/mach-s3c24xx/Kconfig"
 928
 929 source "arch/arm/mach-s3c64xx/Kconfig"
 930
 931 source "arch/arm/mach-s5pv210/Kconfig"
 932
 933 source "arch/arm/mach-exynos/Kconfig"
 934 source "arch/arm/plat-samsung/Kconfig"
 935
 936 source "arch/arm/mach-shmobile/Kconfig"
 937
 938 source "arch/arm/mach-sunxi/Kconfig"
 939
 940 source "arch/arm/mach-prima2/Kconfig"
 941
 942 source "arch/arm/mach-tegra/Kconfig"
 943
 944 source "arch/arm/mach-u300/Kconfig"
 945
 946 source "arch/arm/mach-ux500/Kconfig"
 947
 948 source "arch/arm/mach-versatile/Kconfig"
 949
 950 source "arch/arm/mach-vexpress/Kconfig"
 951 source "arch/arm/plat-versatile/Kconfig"
 952
 953 source "arch/arm/mach-vt8500/Kconfig"
 954
 955 source "arch/arm/mach-w90x900/Kconfig"
 956
 957 source "arch/arm/mach-zynq/Kconfig"
 958
 959 # Definitions to make life easier
 960 config ARCH_ACORN
 961         bool
 962
 963 config PLAT_IOP
 964         bool
 965         select GENERIC_CLOCKEVENTS
 966
 967 config PLAT_ORION
 968         bool
 969         select CLKSRC_MMIO
 970         select COMMON_CLK
 971         select GENERIC_IRQ_CHIP
 972         select IRQ_DOMAIN
 973
 974 config PLAT_ORION_LEGACY
 975         bool
 976         select PLAT_ORION
 977
 978 config PLAT_PXA
 979         bool
 980
 981 config PLAT_VERSATILE
 982         bool
 983
 984 config ARM_TIMER_SP804
 985         bool
 986         select CLKSRC_MMIO
 987         select CLKSRC_OF if OF
 988
 989 source "arch/arm/firmware/Kconfig"
 990
 991 source arch/arm/mm/Kconfig
 992
 993 config IWMMXT
 994         bool "Enable iWMMXt support"
 995         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
 996         default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
 997         help
 998           Enable support for iWMMXt context switching at run time if
 999           running on a CPU that supports it.
1000
1001 config MULTI_IRQ_HANDLER
1002         bool
1003         help
1004           Allow each machine to specify it's own IRQ handler at run time.
1005
1006 if !MMU
1007 source "arch/arm/Kconfig-nommu"
1008 endif
1009
1010 config PJ4B_ERRATA_4742
1011         bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
1012         depends on CPU_PJ4B && MACH_ARMADA_370
1013         default y
1014         help
1015           When coming out of either a Wait for Interrupt (WFI) or a Wait for
1016           Event (WFE) IDLE states, a specific timing sensitivity exists between
1017           the retiring WFI/WFE instructions and the newly issued subsequent
1018           instructions.  This sensitivity can result in a CPU hang scenario.
1019           Workaround:
1020           The software must insert either a Data Synchronization Barrier (DSB)
1021           or Data Memory Barrier (DMB) command immediately after the WFI/WFE
1022           instruction
1023
1024 config ARM_ERRATA_326103
1025         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1026         depends on CPU_V6
1027         help
1028           Executing a SWP instruction to read-only memory does not set bit 11
1029           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1030           treat the access as a read, preventing a COW from occurring and
1031           causing the faulting task to livelock.
1032
1033 config ARM_ERRATA_411920
1034         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1035         depends on CPU_V6 || CPU_V6K
1036         help
1037           Invalidation of the Instruction Cache operation can
1038           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1039           It does not affect the MPCore. This option enables the ARM Ltd.
1040           recommended workaround.
1041
1042 config ARM_ERRATA_430973
1043         bool "ARM errata: Stale prediction on replaced interworking branch"
1044         depends on CPU_V7
1045         help
1046           This option enables the workaround for the 430973 Cortex-A8
1047           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1048           interworking branch is replaced with another code sequence at the
1049           same virtual address, whether due to self-modifying code or virtual
1050           to physical address re-mapping, Cortex-A8 does not recover from the
1051           stale interworking branch prediction. This results in Cortex-A8
1052           executing the new code sequence in the incorrect ARM or Thumb state.
1053           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1054           and also flushes the branch target cache at every context switch.
1055           Note that setting specific bits in the ACTLR register may not be
1056           available in non-secure mode.
1057
1058 config ARM_ERRATA_458693
1059         bool "ARM errata: Processor deadlock when a false hazard is created"
1060         depends on CPU_V7
1061         depends on !ARCH_MULTIPLATFORM
1062         help
1063           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1064           erratum. For very specific sequences of memory operations, it is
1065           possible for a hazard condition intended for a cache line to instead
1066           be incorrectly associated with a different cache line. This false
1067           hazard might then cause a processor deadlock. The workaround enables
1068           the L1 caching of the NEON accesses and disables the PLD instruction
1069           in the ACTLR register. Note that setting specific bits in the ACTLR
1070           register may not be available in non-secure mode.
1071
1072 config ARM_ERRATA_460075
1073         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1074         depends on CPU_V7
1075         depends on !ARCH_MULTIPLATFORM
1076         help
1077           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1078           erratum. Any asynchronous access to the L2 cache may encounter a
1079           situation in which recent store transactions to the L2 cache are lost
1080           and overwritten with stale memory contents from external memory. The
1081           workaround disables the write-allocate mode for the L2 cache via the
1082           ACTLR register. Note that setting specific bits in the ACTLR register
1083           may not be available in non-secure mode.
1084
1085 config ARM_ERRATA_742230
1086         bool "ARM errata: DMB operation may be faulty"
1087         depends on CPU_V7 && SMP
1088         depends on !ARCH_MULTIPLATFORM
1089         help
1090           This option enables the workaround for the 742230 Cortex-A9
1091           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1092           between two write operations may not ensure the correct visibility
1093           ordering of the two writes. This workaround sets a specific bit in
1094           the diagnostic register of the Cortex-A9 which causes the DMB
1095           instruction to behave as a DSB, ensuring the correct behaviour of
1096           the two writes.
1097
1098 config ARM_ERRATA_742231
1099         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1100         depends on CPU_V7 && SMP
1101         depends on !ARCH_MULTIPLATFORM
1102         help
1103           This option enables the workaround for the 742231 Cortex-A9
1104           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1105           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1106           accessing some data located in the same cache line, may get corrupted
1107           data due to bad handling of the address hazard when the line gets
1108           replaced from one of the CPUs at the same time as another CPU is
1109           accessing it. This workaround sets specific bits in the diagnostic
1110           register of the Cortex-A9 which reduces the linefill issuing
1111           capabilities of the processor.
1112
1113 config ARM_ERRATA_643719
1114         bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
1115         depends on CPU_V7 && SMP
1116         help
1117           This option enables the workaround for the 643719 Cortex-A9 (prior to
1118           r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
1119           register returns zero when it should return one. The workaround
1120           corrects this value, ensuring cache maintenance operations which use
1121           it behave as intended and avoiding data corruption.
1122
1123 config ARM_ERRATA_720789
1124         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1125         depends on CPU_V7
1126         help
1127           This option enables the workaround for the 720789 Cortex-A9 (prior to
1128           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1129           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1130           As a consequence of this erratum, some TLB entries which should be
1131           invalidated are not, resulting in an incoherency in the system page
1132           tables. The workaround changes the TLB flushing routines to invalidate
1133           entries regardless of the ASID.
1134
1135 config ARM_ERRATA_743622
1136         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1137         depends on CPU_V7
1138         depends on !ARCH_MULTIPLATFORM
1139         help
1140           This option enables the workaround for the 743622 Cortex-A9
1141           (r2p*) erratum. Under very rare conditions, a faulty
1142           optimisation in the Cortex-A9 Store Buffer may lead to data
1143           corruption. This workaround sets a specific bit in the diagnostic
1144           register of the Cortex-A9 which disables the Store Buffer
1145           optimisation, preventing the defect from occurring. This has no
1146           visible impact on the overall performance or power consumption of the
1147           processor.
1148
1149 config ARM_ERRATA_751472
1150         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1151         depends on CPU_V7
1152         depends on !ARCH_MULTIPLATFORM
1153         help
1154           This option enables the workaround for the 751472 Cortex-A9 (prior
1155           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1156           completion of a following broadcasted operation if the second
1157           operation is received by a CPU before the ICIALLUIS has completed,
1158           potentially leading to corrupted entries in the cache or TLB.
1159
1160 config ARM_ERRATA_754322
1161         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1162         depends on CPU_V7
1163         help
1164           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1165           r3p*) erratum. A speculative memory access may cause a page table walk
1166           which starts prior to an ASID switch but completes afterwards. This
1167           can populate the micro-TLB with a stale entry which may be hit with
1168           the new ASID. This workaround places two dsb instructions in the mm
1169           switching code so that no page table walks can cross the ASID switch.
1170
1171 config ARM_ERRATA_754327
1172         bool "ARM errata: no automatic Store Buffer drain"
1173         depends on CPU_V7 && SMP
1174         help
1175           This option enables the workaround for the 754327 Cortex-A9 (prior to
1176           r2p0) erratum. The Store Buffer does not have any automatic draining
1177           mechanism and therefore a livelock may occur if an external agent
1178           continuously polls a memory location waiting to observe an update.
1179           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1180           written polling loops from denying visibility of updates to memory.
1181
1182 config ARM_ERRATA_364296
1183         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1184         depends on CPU_V6
1185         help
1186           This options enables the workaround for the 364296 ARM1136
1187           r0p2 erratum (possible cache data corruption with
1188           hit-under-miss enabled). It sets the undocumented bit 31 in
1189           the auxiliary control register and the FI bit in the control
1190           register, thus disabling hit-under-miss without putting the
1191           processor into full low interrupt latency mode. ARM11MPCore
1192           is not affected.
1193
1194 config ARM_ERRATA_764369
1195         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1196         depends on CPU_V7 && SMP
1197         help
1198           This option enables the workaround for erratum 764369
1199           affecting Cortex-A9 MPCore with two or more processors (all
1200           current revisions). Under certain timing circumstances, a data
1201           cache line maintenance operation by MVA targeting an Inner
1202           Shareable memory region may fail to proceed up to either the
1203           Point of Coherency or to the Point of Unification of the
1204           system. This workaround adds a DSB instruction before the
1205           relevant cache maintenance functions and sets a specific bit
1206           in the diagnostic control register of the SCU.
1207
1208 config ARM_ERRATA_775420
1209        bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1210        depends on CPU_V7
1211        help
1212          This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1213          r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1214          operation aborts with MMU exception, it might cause the processor
1215          to deadlock. This workaround puts DSB before executing ISB if
1216          an abort may occur on cache maintenance.
1217
1218 config ARM_ERRATA_798181
1219         bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1220         depends on CPU_V7 && SMP
1221         help
1222           On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1223           adequately shooting down all use of the old entries. This
1224           option enables the Linux kernel workaround for this erratum
1225           which sends an IPI to the CPUs that are running the same ASID
1226           as the one being invalidated.
1227
1228 config ARM_ERRATA_773022
1229         bool "ARM errata: incorrect instructions may be executed from loop buffer"
1230         depends on CPU_V7
1231         help
1232           This option enables the workaround for the 773022 Cortex-A15
1233           (up to r0p4) erratum. In certain rare sequences of code, the
1234           loop buffer may deliver incorrect instructions. This
1235           workaround disables the loop buffer to avoid the erratum.
1236
1237 endmenu
1238
1239 source "arch/arm/common/Kconfig"
1240
1241 menu "Bus support"
1242
1243 config ISA
1244         bool
1245         help
1246           Find out whether you have ISA slots on your motherboard.  ISA is the
1247           name of a bus system, i.e. the way the CPU talks to the other stuff
1248           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1249           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1250           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1251
1252 # Select ISA DMA controller support
1253 config ISA_DMA
1254         bool
1255         select ISA_DMA_API
1256
1257 # Select ISA DMA interface
1258 config ISA_DMA_API
1259         bool
1260
1261 config PCI
1262         bool "PCI support" if MIGHT_HAVE_PCI
1263         help
1264           Find out whether you have a PCI motherboard. PCI is the name of a
1265           bus system, i.e. the way the CPU talks to the other stuff inside
1266           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1267           VESA. If you have PCI, say Y, otherwise N.
1268
1269 config PCI_DOMAINS
1270         bool
1271         depends on PCI
1272
1273 config PCI_DOMAINS_GENERIC
1274         def_bool PCI_DOMAINS
1275
1276 config PCI_NANOENGINE
1277         bool "BSE nanoEngine PCI support"
1278         depends on SA1100_NANOENGINE
1279         help
1280           Enable PCI on the BSE nanoEngine board.
1281
1282 config PCI_SYSCALL
1283         def_bool PCI
1284
1285 config PCI_HOST_ITE8152
1286         bool
1287         depends on PCI && MACH_ARMCORE
1288         default y
1289         select DMABOUNCE
1290
1291 source "drivers/pci/Kconfig"
1292 source "drivers/pci/pcie/Kconfig"
1293
1294 source "drivers/pcmcia/Kconfig"
1295
1296 endmenu
1297
1298 menu "Kernel Features"
1299
1300 config HAVE_SMP
1301         bool
1302         help
1303           This option should be selected by machines which have an SMP-
1304           capable CPU.
1305
1306           The only effect of this option is to make the SMP-related
1307           options available to the user for configuration.
1308
1309 config SMP
1310         bool "Symmetric Multi-Processing"
1311         depends on CPU_V6K || CPU_V7
1312         depends on GENERIC_CLOCKEVENTS
1313         depends on HAVE_SMP
1314         depends on MMU || ARM_MPU
1315         help
1316           This enables support for systems with more than one CPU. If you have
1317           a system with only one CPU, say N. If you have a system with more
1318           than one CPU, say Y.
1319
1320           If you say N here, the kernel will run on uni- and multiprocessor
1321           machines, but will use only one CPU of a multiprocessor machine. If
1322           you say Y here, the kernel will run on many, but not all,
1323           uniprocessor machines. On a uniprocessor machine, the kernel
1324           will run faster if you say N here.
1325
1326           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1327           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1328           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1329
1330           If you don't know what to do here, say N.
1331
1332 config SMP_ON_UP
1333         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1334         depends on SMP && !XIP_KERNEL && MMU
1335         default y
1336         help
1337           SMP kernels contain instructions which fail on non-SMP processors.
1338           Enabling this option allows the kernel to modify itself to make
1339           these instructions safe.  Disabling it allows about 1K of space
1340           savings.
1341
1342           If you don't know what to do here, say Y.
1343
1344 config ARM_CPU_TOPOLOGY
1345         bool "Support cpu topology definition"
1346         depends on SMP && CPU_V7
1347         default y
1348         help
1349           Support ARM cpu topology definition. The MPIDR register defines
1350           affinity between processors which is then used to describe the cpu
1351           topology of an ARM System.
1352
1353 config SCHED_MC
1354         bool "Multi-core scheduler support"
1355         depends on ARM_CPU_TOPOLOGY
1356         help
1357           Multi-core scheduler support improves the CPU scheduler's decision
1358           making when dealing with multi-core CPU chips at a cost of slightly
1359           increased overhead in some places. If unsure say N here.
1360
1361 config SCHED_SMT
1362         bool "SMT scheduler support"
1363         depends on ARM_CPU_TOPOLOGY
1364         help
1365           Improves the CPU scheduler's decision making when dealing with
1366           MultiThreading at a cost of slightly increased overhead in some
1367           places. If unsure say N here.
1368
1369 config HAVE_ARM_SCU
1370         bool
1371         help
1372           This option enables support for the ARM system coherency unit
1373
1374 config HAVE_ARM_ARCH_TIMER
1375         bool "Architected timer support"
1376         depends on CPU_V7
1377         select ARM_ARCH_TIMER
1378         select GENERIC_CLOCKEVENTS
1379         help
1380           This option enables support for the ARM architected timer
1381
1382 config HAVE_ARM_TWD
1383         bool
1384         depends on SMP
1385         select CLKSRC_OF if OF
1386         help
1387           This options enables support for the ARM timer and watchdog unit
1388
1389 config MCPM
1390         bool "Multi-Cluster Power Management"
1391         depends on CPU_V7 && SMP
1392         help
1393           This option provides the common power management infrastructure
1394           for (multi-)cluster based systems, such as big.LITTLE based
1395           systems.
1396
1397 config MCPM_QUAD_CLUSTER
1398         bool
1399         depends on MCPM
1400         help
1401           To avoid wasting resources unnecessarily, MCPM only supports up
1402           to 2 clusters by default.
1403           Platforms with 3 or 4 clusters that use MCPM must select this
1404           option to allow the additional clusters to be managed.
1405
1406 config BIG_LITTLE
1407         bool "big.LITTLE support (Experimental)"
1408         depends on CPU_V7 && SMP
1409         select MCPM
1410         help
1411           This option enables support selections for the big.LITTLE
1412           system architecture.
1413
1414 config BL_SWITCHER
1415         bool "big.LITTLE switcher support"
1416         depends on BIG_LITTLE && MCPM && HOTPLUG_CPU
1417         select ARM_CPU_SUSPEND
1418         select CPU_PM
1419         help
1420           The big.LITTLE "switcher" provides the core functionality to
1421           transparently handle transition between a cluster of A15's
1422           and a cluster of A7's in a big.LITTLE system.
1423
1424 config BL_SWITCHER_DUMMY_IF
1425         tristate "Simple big.LITTLE switcher user interface"
1426         depends on BL_SWITCHER && DEBUG_KERNEL
1427         help
1428           This is a simple and dummy char dev interface to control
1429           the big.LITTLE switcher core code.  It is meant for
1430           debugging purposes only.
1431
1432 choice
1433         prompt "Memory split"
1434         depends on MMU
1435         default VMSPLIT_3G
1436         help
1437           Select the desired split between kernel and user memory.
1438
1439           If you are not absolutely sure what you are doing, leave this
1440           option alone!
1441
1442         config VMSPLIT_3G
1443                 bool "3G/1G user/kernel split"
1444         config VMSPLIT_2G
1445                 bool "2G/2G user/kernel split"
1446         config VMSPLIT_1G
1447                 bool "1G/3G user/kernel split"
1448 endchoice
1449
1450 config PAGE_OFFSET
1451         hex
1452         default PHYS_OFFSET if !MMU
1453         default 0x40000000 if VMSPLIT_1G
1454         default 0x80000000 if VMSPLIT_2G
1455         default 0xC0000000
1456
1457 config NR_CPUS
1458         int "Maximum number of CPUs (2-32)"
1459         range 2 32
1460         depends on SMP
1461         default "4"
1462
1463 config HOTPLUG_CPU
1464         bool "Support for hot-pluggable CPUs"
1465         depends on SMP
1466         help
1467           Say Y here to experiment with turning CPUs off and on.  CPUs
1468           can be controlled through /sys/devices/system/cpu.
1469
1470 config ARM_PSCI
1471         bool "Support for the ARM Power State Coordination Interface (PSCI)"
1472         depends on CPU_V7
1473         help
1474           Say Y here if you want Linux to communicate with system firmware
1475           implementing the PSCI specification for CPU-centric power
1476           management operations described in ARM document number ARM DEN
1477           0022A ("Power State Coordination Interface System Software on
1478           ARM processors").
1479
1480 # The GPIO number here must be sorted by descending number. In case of
1481 # a multiplatform kernel, we just want the highest value required by the
1482 # selected platforms.
1483 config ARCH_NR_GPIO
1484         int
1485         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA || ARCH_ZYNQ
1486         default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \
1487                 SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210
1488         default 416 if ARCH_SUNXI
1489         default 392 if ARCH_U8500
1490         default 352 if ARCH_VT8500
1491         default 288 if ARCH_ROCKCHIP
1492         default 264 if MACH_H4700
1493         default 0
1494         help
1495           Maximum number of GPIOs in the system.
1496
1497           If unsure, leave the default value.
1498
1499 source kernel/Kconfig.preempt
1500
1501 config HZ_FIXED
1502         int
1503         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \
1504                 ARCH_S5PV210 || ARCH_EXYNOS4
1505         default AT91_TIMER_HZ if ARCH_AT91
1506         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
1507         default 0
1508
1509 choice
1510         depends on HZ_FIXED = 0
1511         prompt "Timer frequency"
1512
1513 config HZ_100
1514         bool "100 Hz"
1515
1516 config HZ_200
1517         bool "200 Hz"
1518
1519 config HZ_250
1520         bool "250 Hz"
1521
1522 config HZ_300
1523         bool "300 Hz"
1524
1525 config HZ_500
1526         bool "500 Hz"
1527
1528 config HZ_1000
1529         bool "1000 Hz"
1530
1531 endchoice
1532
1533 config HZ
1534         int
1535         default HZ_FIXED if HZ_FIXED != 0
1536         default 100 if HZ_100
1537         default 200 if HZ_200
1538         default 250 if HZ_250
1539         default 300 if HZ_300
1540         default 500 if HZ_500
1541         default 1000
1542
1543 config SCHED_HRTICK
1544         def_bool HIGH_RES_TIMERS
1545
1546 config THUMB2_KERNEL
1547         bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
1548         depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
1549         default y if CPU_THUMBONLY
1550         select AEABI
1551         select ARM_ASM_UNIFIED
1552         select ARM_UNWIND
1553         help
1554           By enabling this option, the kernel will be compiled in
1555           Thumb-2 mode. A compiler/assembler that understand the unified
1556           ARM-Thumb syntax is needed.
1557
1558           If unsure, say N.
1559
1560 config THUMB2_AVOID_R_ARM_THM_JUMP11
1561         bool "Work around buggy Thumb-2 short branch relocations in gas"
1562         depends on THUMB2_KERNEL && MODULES
1563         default y
1564         help
1565           Various binutils versions can resolve Thumb-2 branches to
1566           locally-defined, preemptible global symbols as short-range "b.n"
1567           branch instructions.
1568
1569           This is a problem, because there's no guarantee the final
1570           destination of the symbol, or any candidate locations for a
1571           trampoline, are within range of the branch.  For this reason, the
1572           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1573           relocation in modules at all, and it makes little sense to add
1574           support.
1575
1576           The symptom is that the kernel fails with an "unsupported
1577           relocation" error when loading some modules.
1578
1579           Until fixed tools are available, passing
1580           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1581           code which hits this problem, at the cost of a bit of extra runtime
1582           stack usage in some cases.
1583
1584           The problem is described in more detail at:
1585               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1586
1587           Only Thumb-2 kernels are affected.
1588
1589           Unless you are sure your tools don't have this problem, say Y.
1590
1591 config ARM_ASM_UNIFIED
1592         bool
1593
1594 config AEABI
1595         bool "Use the ARM EABI to compile the kernel"
1596         help
1597           This option allows for the kernel to be compiled using the latest
1598           ARM ABI (aka EABI).  This is only useful if you are using a user
1599           space environment that is also compiled with EABI.
1600
1601           Since there are major incompatibilities between the legacy ABI and
1602           EABI, especially with regard to structure member alignment, this
1603           option also changes the kernel syscall calling convention to
1604           disambiguate both ABIs and allow for backward compatibility support
1605           (selected with CONFIG_OABI_COMPAT).
1606
1607           To use this you need GCC version 4.0.0 or later.
1608
1609 config OABI_COMPAT
1610         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1611         depends on AEABI && !THUMB2_KERNEL
1612         help
1613           This option preserves the old syscall interface along with the
1614           new (ARM EABI) one. It also provides a compatibility layer to
1615           intercept syscalls that have structure arguments which layout
1616           in memory differs between the legacy ABI and the new ARM EABI
1617           (only for non "thumb" binaries). This option adds a tiny
1618           overhead to all syscalls and produces a slightly larger kernel.
1619
1620           The seccomp filter system will not be available when this is
1621           selected, since there is no way yet to sensibly distinguish
1622           between calling conventions during filtering.
1623
1624           If you know you'll be using only pure EABI user space then you
1625           can say N here. If this option is not selected and you attempt
1626           to execute a legacy ABI binary then the result will be
1627           UNPREDICTABLE (in fact it can be predicted that it won't work
1628           at all). If in doubt say N.
1629
1630 config ARCH_HAS_HOLES_MEMORYMODEL
1631         bool
1632
1633 config ARCH_SPARSEMEM_ENABLE
1634         bool
1635
1636 config ARCH_SPARSEMEM_DEFAULT
1637         def_bool ARCH_SPARSEMEM_ENABLE
1638
1639 config ARCH_SELECT_MEMORY_MODEL
1640         def_bool ARCH_SPARSEMEM_ENABLE
1641
1642 config HAVE_ARCH_PFN_VALID
1643         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1644
1645 config HAVE_GENERIC_RCU_GUP
1646         def_bool y
1647         depends on ARM_LPAE
1648
1649 config HIGHMEM
1650         bool "High Memory Support"
1651         depends on MMU
1652         help
1653           The address space of ARM processors is only 4 Gigabytes large
1654           and it has to accommodate user address space, kernel address
1655           space as well as some memory mapped IO. That means that, if you
1656           have a large amount of physical memory and/or IO, not all of the
1657           memory can be "permanently mapped" by the kernel. The physical
1658           memory that is not permanently mapped is called "high memory".
1659
1660           Depending on the selected kernel/user memory split, minimum
1661           vmalloc space and actual amount of RAM, you may not need this
1662           option which should result in a slightly faster kernel.
1663
1664           If unsure, say n.
1665
1666 config HIGHPTE
1667         bool "Allocate 2nd-level pagetables from highmem"
1668         depends on HIGHMEM
1669
1670 config HW_PERF_EVENTS
1671         bool "Enable hardware performance counter support for perf events"
1672         depends on PERF_EVENTS
1673         default y
1674         help
1675           Enable hardware performance counter support for perf events. If
1676           disabled, perf events will use software events only.
1677
1678 config SYS_SUPPORTS_HUGETLBFS
1679        def_bool y
1680        depends on ARM_LPAE
1681
1682 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
1683        def_bool y
1684        depends on ARM_LPAE
1685
1686 config ARCH_WANT_GENERAL_HUGETLB
1687         def_bool y
1688
1689 source "mm/Kconfig"
1690
1691 config FORCE_MAX_ZONEORDER
1692         int "Maximum zone order" if ARCH_SHMOBILE_LEGACY
1693         range 11 64 if ARCH_SHMOBILE_LEGACY
1694         default "12" if SOC_AM33XX
1695         default "9" if SA1111 || ARCH_EFM32
1696         default "11"
1697         help
1698           The kernel memory allocator divides physically contiguous memory
1699           blocks into "zones", where each zone is a power of two number of
1700           pages.  This option selects the largest power of two that the kernel
1701           keeps in the memory allocator.  If you need to allocate very large
1702           blocks of physically contiguous memory, then you may need to
1703           increase this value.
1704
1705           This config option is actually maximum order plus one. For example,
1706           a value of 11 means that the largest free memory block is 2^10 pages.
1707
1708 config ALIGNMENT_TRAP
1709         bool
1710         depends on CPU_CP15_MMU
1711         default y if !ARCH_EBSA110
1712         select HAVE_PROC_CPU if PROC_FS
1713         help
1714           ARM processors cannot fetch/store information which is not
1715           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1716           address divisible by 4. On 32-bit ARM processors, these non-aligned
1717           fetch/store instructions will be emulated in software if you say
1718           here, which has a severe performance impact. This is necessary for
1719           correct operation of some network protocols. With an IP-only
1720           configuration it is safe to say N, otherwise say Y.
1721
1722 config UACCESS_WITH_MEMCPY
1723         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1724         depends on MMU
1725         default y if CPU_FEROCEON
1726         help
1727           Implement faster copy_to_user and clear_user methods for CPU
1728           cores where a 8-word STM instruction give significantly higher
1729           memory write throughput than a sequence of individual 32bit stores.
1730
1731           A possible side effect is a slight increase in scheduling latency
1732           between threads sharing the same address space if they invoke
1733           such copy operations with large buffers.
1734
1735           However, if the CPU data cache is using a write-allocate mode,
1736           this option is unlikely to provide any performance gain.
1737
1738 config SECCOMP
1739         bool
1740         prompt "Enable seccomp to safely compute untrusted bytecode"
1741         ---help---
1742           This kernel feature is useful for number crunching applications
1743           that may need to compute untrusted bytecode during their
1744           execution. By using pipes or other transports made available to
1745           the process as file descriptors supporting the read/write
1746           syscalls, it's possible to isolate those applications in
1747           their own address space using seccomp. Once seccomp is
1748           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1749           and the task is only allowed to execute a few safe syscalls
1750           defined by each seccomp mode.
1751
1752 config SWIOTLB
1753         def_bool y
1754
1755 config IOMMU_HELPER
1756         def_bool SWIOTLB
1757
1758 config XEN_DOM0
1759         def_bool y
1760         depends on XEN
1761
1762 config XEN
1763         bool "Xen guest support on ARM"
1764         depends on ARM && AEABI && OF
1765         depends on CPU_V7 && !CPU_V6
1766         depends on !GENERIC_ATOMIC64
1767         depends on MMU
1768         select ARCH_DMA_ADDR_T_64BIT
1769         select ARM_PSCI
1770         select SWIOTLB_XEN
1771         help
1772           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1773
1774 endmenu
1775
1776 menu "Boot options"
1777
1778 config USE_OF
1779         bool "Flattened Device Tree support"
1780         select IRQ_DOMAIN
1781         select OF
1782         select OF_EARLY_FLATTREE
1783         select OF_RESERVED_MEM
1784         help
1785           Include support for flattened device tree machine descriptions.
1786
1787 config ATAGS
1788         bool "Support for the traditional ATAGS boot data passing" if USE_OF
1789         default y
1790         help
1791           This is the traditional way of passing data to the kernel at boot
1792           time. If you are solely relying on the flattened device tree (or
1793           the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1794           to remove ATAGS support from your kernel binary.  If unsure,
1795           leave this to y.
1796
1797 config DEPRECATED_PARAM_STRUCT
1798         bool "Provide old way to pass kernel parameters"
1799         depends on ATAGS
1800         help
1801           This was deprecated in 2001 and announced to live on for 5 years.
1802           Some old boot loaders still use this way.
1803
1804 # Compressed boot loader in ROM.  Yes, we really want to ask about
1805 # TEXT and BSS so we preserve their values in the config files.
1806 config ZBOOT_ROM_TEXT
1807         hex "Compressed ROM boot loader base address"
1808         default "0"
1809         help
1810           The physical address at which the ROM-able zImage is to be
1811           placed in the target.  Platforms which normally make use of
1812           ROM-able zImage formats normally set this to a suitable
1813           value in their defconfig file.
1814
1815           If ZBOOT_ROM is not enabled, this has no effect.
1816
1817 config ZBOOT_ROM_BSS
1818         hex "Compressed ROM boot loader BSS address"
1819         default "0"
1820         help
1821           The base address of an area of read/write memory in the target
1822           for the ROM-able zImage which must be available while the
1823           decompressor is running. It must be large enough to hold the
1824           entire decompressed kernel plus an additional 128 KiB.
1825           Platforms which normally make use of ROM-able zImage formats
1826           normally set this to a suitable value in their defconfig file.
1827
1828           If ZBOOT_ROM is not enabled, this has no effect.
1829
1830 config ZBOOT_ROM
1831         bool "Compressed boot loader in ROM/flash"
1832         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1833         depends on !ARM_APPENDED_DTB && !XIP_KERNEL && !AUTO_ZRELADDR
1834         help
1835           Say Y here if you intend to execute your compressed kernel image
1836           (zImage) directly from ROM or flash.  If unsure, say N.
1837
1838 choice
1839         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1840         depends on ZBOOT_ROM && ARCH_SH7372
1841         default ZBOOT_ROM_NONE
1842         help
1843           Include experimental SD/MMC loading code in the ROM-able zImage.
1844           With this enabled it is possible to write the ROM-able zImage
1845           kernel image to an MMC or SD card and boot the kernel straight
1846           from the reset vector. At reset the processor Mask ROM will load
1847           the first part of the ROM-able zImage which in turn loads the
1848           rest the kernel image to RAM.
1849
1850 config ZBOOT_ROM_NONE
1851         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1852         help
1853           Do not load image from SD or MMC
1854
1855 config ZBOOT_ROM_MMCIF
1856         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1857         help
1858           Load image from MMCIF hardware block.
1859
1860 config ZBOOT_ROM_SH_MOBILE_SDHI
1861         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1862         help
1863           Load image from SDHI hardware block
1864
1865 endchoice
1866
1867 config ARM_APPENDED_DTB
1868         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1869         depends on OF
1870         help
1871           With this option, the boot code will look for a device tree binary
1872           (DTB) appended to zImage
1873           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1874
1875           This is meant as a backward compatibility convenience for those
1876           systems with a bootloader that can't be upgraded to accommodate
1877           the documented boot protocol using a device tree.
1878
1879           Beware that there is very little in terms of protection against
1880           this option being confused by leftover garbage in memory that might
1881           look like a DTB header after a reboot if no actual DTB is appended
1882           to zImage.  Do not leave this option active in a production kernel
1883           if you don't intend to always append a DTB.  Proper passing of the
1884           location into r2 of a bootloader provided DTB is always preferable
1885           to this option.
1886
1887 config ARM_ATAG_DTB_COMPAT
1888         bool "Supplement the appended DTB with traditional ATAG information"
1889         depends on ARM_APPENDED_DTB
1890         help
1891           Some old bootloaders can't be updated to a DTB capable one, yet
1892           they provide ATAGs with memory configuration, the ramdisk address,
1893           the kernel cmdline string, etc.  Such information is dynamically
1894           provided by the bootloader and can't always be stored in a static
1895           DTB.  To allow a device tree enabled kernel to be used with such
1896           bootloaders, this option allows zImage to extract the information
1897           from the ATAG list and store it at run time into the appended DTB.
1898
1899 choice
1900         prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1901         default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1902
1903 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1904         bool "Use bootloader kernel arguments if available"
1905         help
1906           Uses the command-line options passed by the boot loader instead of
1907           the device tree bootargs property. If the boot loader doesn't provide
1908           any, the device tree bootargs property will be used.
1909
1910 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1911         bool "Extend with bootloader kernel arguments"
1912         help
1913           The command-line arguments provided by the boot loader will be
1914           appended to the the device tree bootargs property.
1915
1916 endchoice
1917
1918 config CMDLINE
1919         string "Default kernel command string"
1920         default ""
1921         help
1922           On some architectures (EBSA110 and CATS), there is currently no way
1923           for the boot loader to pass arguments to the kernel. For these
1924           architectures, you should supply some command-line options at build
1925           time by entering them here. As a minimum, you should specify the
1926           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1927
1928 choice
1929         prompt "Kernel command line type" if CMDLINE != ""
1930         default CMDLINE_FROM_BOOTLOADER
1931         depends on ATAGS
1932
1933 config CMDLINE_FROM_BOOTLOADER
1934         bool "Use bootloader kernel arguments if available"
1935         help
1936           Uses the command-line options passed by the boot loader. If
1937           the boot loader doesn't provide any, the default kernel command
1938           string provided in CMDLINE will be used.
1939
1940 config CMDLINE_EXTEND
1941         bool "Extend bootloader kernel arguments"
1942         help
1943           The command-line arguments provided by the boot loader will be
1944           appended to the default kernel command string.
1945
1946 config CMDLINE_FORCE
1947         bool "Always use the default kernel command string"
1948         help
1949           Always use the default kernel command string, even if the boot
1950           loader passes other arguments to the kernel.
1951           This is useful if you cannot or don't want to change the
1952           command-line options your boot loader passes to the kernel.
1953 endchoice
1954
1955 config XIP_KERNEL
1956         bool "Kernel Execute-In-Place from ROM"
1957         depends on !ARM_LPAE && !ARCH_MULTIPLATFORM
1958         help
1959           Execute-In-Place allows the kernel to run from non-volatile storage
1960           directly addressable by the CPU, such as NOR flash. This saves RAM
1961           space since the text section of the kernel is not loaded from flash
1962           to RAM.  Read-write sections, such as the data section and stack,
1963           are still copied to RAM.  The XIP kernel is not compressed since
1964           it has to run directly from flash, so it will take more space to
1965           store it.  The flash address used to link the kernel object files,
1966           and for storing it, is configuration dependent. Therefore, if you
1967           say Y here, you must know the proper physical address where to
1968           store the kernel image depending on your own flash memory usage.
1969
1970           Also note that the make target becomes "make xipImage" rather than
1971           "make zImage" or "make Image".  The final kernel binary to put in
1972           ROM memory will be arch/arm/boot/xipImage.
1973
1974           If unsure, say N.
1975
1976 config XIP_PHYS_ADDR
1977         hex "XIP Kernel Physical Location"
1978         depends on XIP_KERNEL
1979         default "0x00080000"
1980         help
1981           This is the physical address in your flash memory the kernel will
1982           be linked for and stored to.  This address is dependent on your
1983           own flash usage.
1984
1985 config KEXEC
1986         bool "Kexec system call (EXPERIMENTAL)"
1987         depends on (!SMP || PM_SLEEP_SMP)
1988         help
1989           kexec is a system call that implements the ability to shutdown your
1990           current kernel, and to start another kernel.  It is like a reboot
1991           but it is independent of the system firmware.   And like a reboot
1992           you can start any kernel with it, not just Linux.
1993
1994           It is an ongoing process to be certain the hardware in a machine
1995           is properly shutdown, so do not be surprised if this code does not
1996           initially work for you.
1997
1998 config ATAGS_PROC
1999         bool "Export atags in procfs"
2000         depends on ATAGS && KEXEC
2001         default y
2002         help
2003           Should the atags used to boot the kernel be exported in an "atags"
2004           file in procfs. Useful with kexec.
2005
2006 config CRASH_DUMP
2007         bool "Build kdump crash kernel (EXPERIMENTAL)"
2008         help
2009           Generate crash dump after being started by kexec. This should
2010           be normally only set in special crash dump kernels which are
2011           loaded in the main kernel with kexec-tools into a specially
2012           reserved region and then later executed after a crash by
2013           kdump/kexec. The crash dump kernel must be compiled to a
2014           memory address not used by the main kernel
2015
2016           For more details see Documentation/kdump/kdump.txt
2017
2018 config AUTO_ZRELADDR
2019         bool "Auto calculation of the decompressed kernel image address"
2020         help
2021           ZRELADDR is the physical address where the decompressed kernel
2022           image will be placed. If AUTO_ZRELADDR is selected, the address
2023           will be determined at run-time by masking the current IP with
2024           0xf8000000. This assumes the zImage being placed in the first 128MB
2025           from start of memory.
2026
2027 endmenu
2028
2029 menu "CPU Power Management"
2030
2031 source "drivers/cpufreq/Kconfig"
2032
2033 source "drivers/cpuidle/Kconfig"
2034
2035 endmenu
2036
2037 menu "Floating point emulation"
2038
2039 comment "At least one emulation must be selected"
2040
2041 config FPE_NWFPE
2042         bool "NWFPE math emulation"
2043         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2044         ---help---
2045           Say Y to include the NWFPE floating point emulator in the kernel.
2046           This is necessary to run most binaries. Linux does not currently
2047           support floating point hardware so you need to say Y here even if
2048           your machine has an FPA or floating point co-processor podule.
2049
2050           You may say N here if you are going to load the Acorn FPEmulator
2051           early in the bootup.
2052
2053 config FPE_NWFPE_XP
2054         bool "Support extended precision"
2055         depends on FPE_NWFPE
2056         help
2057           Say Y to include 80-bit support in the kernel floating-point
2058           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2059           Note that gcc does not generate 80-bit operations by default,
2060           so in most cases this option only enlarges the size of the
2061           floating point emulator without any good reason.
2062
2063           You almost surely want to say N here.
2064
2065 config FPE_FASTFPE
2066         bool "FastFPE math emulation (EXPERIMENTAL)"
2067         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
2068         ---help---
2069           Say Y here to include the FAST floating point emulator in the kernel.
2070           This is an experimental much faster emulator which now also has full
2071           precision for the mantissa.  It does not support any exceptions.
2072           It is very simple, and approximately 3-6 times faster than NWFPE.
2073
2074           It should be sufficient for most programs.  It may be not suitable
2075           for scientific calculations, but you have to check this for yourself.
2076           If you do not feel you need a faster FP emulation you should better
2077           choose NWFPE.
2078
2079 config VFP
2080         bool "VFP-format floating point maths"
2081         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2082         help
2083           Say Y to include VFP support code in the kernel. This is needed
2084           if your hardware includes a VFP unit.
2085
2086           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2087           release notes and additional status information.
2088
2089           Say N if your target does not have VFP hardware.
2090
2091 config VFPv3
2092         bool
2093         depends on VFP
2094         default y if CPU_V7
2095
2096 config NEON
2097         bool "Advanced SIMD (NEON) Extension support"
2098         depends on VFPv3 && CPU_V7
2099         help
2100           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2101           Extension.
2102
2103 config KERNEL_MODE_NEON
2104         bool "Support for NEON in kernel mode"
2105         depends on NEON && AEABI
2106         help
2107           Say Y to include support for NEON in kernel mode.
2108
2109 endmenu
2110
2111 menu "Userspace binary formats"
2112
2113 source "fs/Kconfig.binfmt"
2114
2115 config ARTHUR
2116         tristate "RISC OS personality"
2117         depends on !AEABI
2118         help
2119           Say Y here to include the kernel code necessary if you want to run
2120           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2121           experimental; if this sounds frightening, say N and sleep in peace.
2122           You can also say M here to compile this support as a module (which
2123           will be called arthur).
2124
2125 endmenu
2126
2127 menu "Power management options"
2128
2129 source "kernel/power/Kconfig"
2130
2131 config ARCH_SUSPEND_POSSIBLE
2132         depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \
2133                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2134         def_bool y
2135
2136 config ARM_CPU_SUSPEND
2137         def_bool PM_SLEEP
2138
2139 config ARCH_HIBERNATION_POSSIBLE
2140         bool
2141         depends on MMU
2142         default y if ARCH_SUSPEND_POSSIBLE
2143
2144 endmenu
2145
2146 source "net/Kconfig"
2147
2148 source "drivers/Kconfig"
2149
2150 source "fs/Kconfig"
2151
2152 source "arch/arm/Kconfig.debug"
2153
2154 source "security/Kconfig"
2155
2156 source "crypto/Kconfig"
2157
2158 source "lib/Kconfig"
2159
2160 source "arch/arm/kvm/Kconfig"