arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
   5         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   6         select ARCH_HAVE_CUSTOM_GPIO_H
   7         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
   8         select ARCH_WANT_IPC_PARSE_VERSION
   9         select BUILDTIME_EXTABLE_SORT if MMU
  10         select CPU_PM if (SUSPEND || CPU_IDLE)
  11         select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU
  12         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  13         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  14         select GENERIC_IRQ_PROBE
  15         select GENERIC_IRQ_SHOW
  16         select GENERIC_PCI_IOMAP
  17         select GENERIC_SMP_IDLE_THREAD
  18         select GENERIC_IDLE_POLL_SETUP
  19         select GENERIC_STRNCPY_FROM_USER
  20         select GENERIC_STRNLEN_USER
  21         select HARDIRQS_SW_RESEND
  22         select HAVE_AOUT
  23         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  24         select HAVE_ARCH_KGDB
  25         select HAVE_ARCH_SECCOMP_FILTER
  26         select HAVE_ARCH_TRACEHOOK
  27         select HAVE_BPF_JIT
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_DEBUG_KMEMLEAK
  30         select HAVE_DMA_API_DEBUG
  31         select HAVE_DMA_ATTRS
  32         select HAVE_DMA_CONTIGUOUS if MMU
  33         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  34         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  35         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  36         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  37         select HAVE_GENERIC_DMA_COHERENT
  38         select HAVE_GENERIC_HARDIRQS
  39         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  40         select HAVE_IDE if PCI || ISA || PCMCIA
  41         select HAVE_IRQ_TIME_ACCOUNTING
  42         select HAVE_KERNEL_GZIP
  43         select HAVE_KERNEL_LZMA
  44         select HAVE_KERNEL_LZO
  45         select HAVE_KERNEL_XZ
  46         select HAVE_KPROBES if !XIP_KERNEL
  47         select HAVE_KRETPROBES if (HAVE_KPROBES)
  48         select HAVE_MEMBLOCK
  49         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  50         select HAVE_PERF_EVENTS
  51         select HAVE_REGS_AND_STACK_ACCESS_API
  52         select HAVE_SYSCALL_TRACEPOINTS
  53         select HAVE_UID16
  54         select KTIME_SCALAR
  55         select PERF_USE_VMALLOC
  56         select RTC_LIB
  57         select SYS_SUPPORTS_APM_EMULATION
  58         select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
  59         select MODULES_USE_ELF_REL
  60         select CLONE_BACKWARDS
  61         select OLD_SIGSUSPEND3
  62         select OLD_SIGACTION
  63         select HAVE_CONTEXT_TRACKING
  64         help
  65           The ARM series is a line of low-power-consumption RISC chip designs
  66           licensed by ARM Ltd and targeted at embedded applications and
  67           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  68           manufactured, but legacy ARM-based PC hardware remains popular in
  69           Europe.  There is an ARM Linux project with a web page at
  70           <http://www.arm.linux.org.uk/>.
  71
  72 config ARM_HAS_SG_CHAIN
  73         bool
  74
  75 config NEED_SG_DMA_LENGTH
  76         bool
  77
  78 config ARM_DMA_USE_IOMMU
  79         bool
  80         select ARM_HAS_SG_CHAIN
  81         select NEED_SG_DMA_LENGTH
  82
  83 if ARM_DMA_USE_IOMMU
  84
  85 config ARM_DMA_IOMMU_ALIGNMENT
  86         int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
  87         range 4 9
  88         default 8
  89         help
  90           DMA mapping framework by default aligns all buffers to the smallest
  91           PAGE_SIZE order which is greater than or equal to the requested buffer
  92           size. This works well for buffers up to a few hundreds kilobytes, but
  93           for larger buffers it just a waste of address space. Drivers which has
  94           relatively small addressing window (like 64Mib) might run out of
  95           virtual space with just a few allocations.
  96
  97           With this parameter you can specify the maximum PAGE_SIZE order for
  98           DMA IOMMU buffers. Larger buffers will be aligned only to this
  99           specified order. The order is expressed as a power of two multiplied
 100           by the PAGE_SIZE.
 101
 102 endif
 103
 104 config HAVE_PWM
 105         bool
 106
 107 config MIGHT_HAVE_PCI
 108         bool
 109
 110 config SYS_SUPPORTS_APM_EMULATION
 111         bool
 112
 113 config GENERIC_GPIO
 114         bool
 115
 116 config HAVE_TCM
 117         bool
 118         select GENERIC_ALLOCATOR
 119
 120 config HAVE_PROC_CPU
 121         bool
 122
 123 config NO_IOPORT
 124         bool
 125
 126 config EISA
 127         bool
 128         ---help---
 129           The Extended Industry Standard Architecture (EISA) bus was
 130           developed as an open alternative to the IBM MicroChannel bus.
 131
 132           The EISA bus provided some of the features of the IBM MicroChannel
 133           bus while maintaining backward compatibility with cards made for
 134           the older ISA bus.  The EISA bus saw limited use between 1988 and
 135           1995 when it was made obsolete by the PCI bus.
 136
 137           Say Y here if you are building a kernel for an EISA-based machine.
 138
 139           Otherwise, say N.
 140
 141 config SBUS
 142         bool
 143
 144 config STACKTRACE_SUPPORT
 145         bool
 146         default y
 147
 148 config HAVE_LATENCYTOP_SUPPORT
 149         bool
 150         depends on !SMP
 151         default y
 152
 153 config LOCKDEP_SUPPORT
 154         bool
 155         default y
 156
 157 config TRACE_IRQFLAGS_SUPPORT
 158         bool
 159         default y
 160
 161 config RWSEM_GENERIC_SPINLOCK
 162         bool
 163         default y
 164
 165 config RWSEM_XCHGADD_ALGORITHM
 166         bool
 167
 168 config ARCH_HAS_ILOG2_U32
 169         bool
 170
 171 config ARCH_HAS_ILOG2_U64
 172         bool
 173
 174 config ARCH_HAS_CPUFREQ
 175         bool
 176         help
 177           Internal node to signify that the ARCH has CPUFREQ support
 178           and that the relevant menu configurations are displayed for
 179           it.
 180
 181 config GENERIC_HWEIGHT
 182         bool
 183         default y
 184
 185 config GENERIC_CALIBRATE_DELAY
 186         bool
 187         default y
 188
 189 config ARCH_MAY_HAVE_PC_FDC
 190         bool
 191
 192 config ZONE_DMA
 193         bool
 194
 195 config NEED_DMA_MAP_STATE
 196        def_bool y
 197
 198 config ARCH_HAS_DMA_SET_COHERENT_MASK
 199         bool
 200
 201 config GENERIC_ISA_DMA
 202         bool
 203
 204 config FIQ
 205         bool
 206
 207 config NEED_RET_TO_USER
 208         bool
 209
 210 config ARCH_MTD_XIP
 211         bool
 212
 213 config VECTORS_BASE
 214         hex
 215         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 216         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 217         default 0x00000000
 218         help
 219           The base address of exception vectors.
 220
 221 config ARM_PATCH_PHYS_VIRT
 222         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 223         default y
 224         depends on !XIP_KERNEL && MMU
 225         depends on !ARCH_REALVIEW || !SPARSEMEM
 226         help
 227           Patch phys-to-virt and virt-to-phys translation functions at
 228           boot and module load time according to the position of the
 229           kernel in system memory.
 230
 231           This can only be used with non-XIP MMU kernels where the base
 232           of physical memory is at a 16MB boundary.
 233
 234           Only disable this option if you know that you do not require
 235           this feature (eg, building a kernel for a single machine) and
 236           you need to shrink the kernel to the minimal size.
 237
 238 config NEED_MACH_GPIO_H
 239         bool
 240         help
 241           Select this when mach/gpio.h is required to provide special
 242           definitions for this platform. The need for mach/gpio.h should
 243           be avoided when possible.
 244
 245 config NEED_MACH_IO_H
 246         bool
 247         help
 248           Select this when mach/io.h is required to provide special
 249           definitions for this platform.  The need for mach/io.h should
 250           be avoided when possible.
 251
 252 config NEED_MACH_MEMORY_H
 253         bool
 254         help
 255           Select this when mach/memory.h is required to provide special
 256           definitions for this platform.  The need for mach/memory.h should
 257           be avoided when possible.
 258
 259 config PHYS_OFFSET
 260         hex "Physical address of main memory" if MMU
 261         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 262         default DRAM_BASE if !MMU
 263         help
 264           Please provide the physical address corresponding to the
 265           location of main memory in your system.
 266
 267 config GENERIC_BUG
 268         def_bool y
 269         depends on BUG
 270
 271 source "init/Kconfig"
 272
 273 source "kernel/Kconfig.freezer"
 274
 275 menu "System Type"
 276
 277 config MMU
 278         bool "MMU-based Paged Memory Management Support"
 279         default y
 280         help
 281           Select if you want MMU-based virtualised addressing space
 282           support by paged memory management. If unsure, say 'Y'.
 283
 284 #
 285 # The "ARM system type" choice list is ordered alphabetically by option
 286 # text.  Please add new entries in the option alphabetic order.
 287 #
 288 choice
 289         prompt "ARM system type"
 290         default ARCH_VERSATILE if !MMU
 291         default ARCH_MULTIPLATFORM if MMU
 292
 293 config ARCH_MULTIPLATFORM
 294         bool "Allow multiple platforms to be selected"
 295         depends on MMU
 296         select ARM_PATCH_PHYS_VIRT
 297         select AUTO_ZRELADDR
 298         select COMMON_CLK
 299         select MULTI_IRQ_HANDLER
 300         select SPARSE_IRQ
 301         select USE_OF
 302
 303 config ARCH_INTEGRATOR
 304         bool "ARM Ltd. Integrator family"
 305         select ARCH_HAS_CPUFREQ
 306         select ARM_AMBA
 307         select COMMON_CLK
 308         select COMMON_CLK_VERSATILE
 309         select GENERIC_CLOCKEVENTS
 310         select HAVE_TCM
 311         select ICST
 312         select MULTI_IRQ_HANDLER
 313         select NEED_MACH_MEMORY_H
 314         select PLAT_VERSATILE
 315         select SPARSE_IRQ
 316         select VERSATILE_FPGA_IRQ
 317         help
 318           Support for ARM's Integrator platform.
 319
 320 config ARCH_REALVIEW
 321         bool "ARM Ltd. RealView family"
 322         select ARCH_WANT_OPTIONAL_GPIOLIB
 323         select ARM_AMBA
 324         select ARM_TIMER_SP804
 325         select COMMON_CLK
 326         select COMMON_CLK_VERSATILE
 327         select GENERIC_CLOCKEVENTS
 328         select GPIO_PL061 if GPIOLIB
 329         select ICST
 330         select NEED_MACH_MEMORY_H
 331         select PLAT_VERSATILE
 332         select PLAT_VERSATILE_CLCD
 333         help
 334           This enables support for ARM Ltd RealView boards.
 335
 336 config ARCH_VERSATILE
 337         bool "ARM Ltd. Versatile family"
 338         select ARCH_WANT_OPTIONAL_GPIOLIB
 339         select ARM_AMBA
 340         select ARM_TIMER_SP804
 341         select ARM_VIC
 342         select CLKDEV_LOOKUP
 343         select GENERIC_CLOCKEVENTS
 344         select HAVE_MACH_CLKDEV
 345         select ICST
 346         select PLAT_VERSATILE
 347         select PLAT_VERSATILE_CLCD
 348         select PLAT_VERSATILE_CLOCK
 349         select VERSATILE_FPGA_IRQ
 350         help
 351           This enables support for ARM Ltd Versatile board.
 352
 353 config ARCH_AT91
 354         bool "Atmel AT91"
 355         select ARCH_REQUIRE_GPIOLIB
 356         select CLKDEV_LOOKUP
 357         select HAVE_CLK
 358         select IRQ_DOMAIN
 359         select NEED_MACH_GPIO_H
 360         select NEED_MACH_IO_H if PCCARD
 361         select PINCTRL
 362         select PINCTRL_AT91 if USE_OF
 363         help
 364           This enables support for systems based on Atmel
 365           AT91RM9200 and AT91SAM9* processors.
 366
 367 config ARCH_CLPS711X
 368         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 369         select ARCH_REQUIRE_GPIOLIB
 370         select AUTO_ZRELADDR
 371         select CLKDEV_LOOKUP
 372         select COMMON_CLK
 373         select CPU_ARM720T
 374         select GENERIC_CLOCKEVENTS
 375         select MULTI_IRQ_HANDLER
 376         select NEED_MACH_MEMORY_H
 377         select SPARSE_IRQ
 378         help
 379           Support for Cirrus Logic 711x/721x/731x based boards.
 380
 381 config ARCH_GEMINI
 382         bool "Cortina Systems Gemini"
 383         select ARCH_REQUIRE_GPIOLIB
 384         select ARCH_USES_GETTIMEOFFSET
 385         select NEED_MACH_GPIO_H
 386         select CPU_FA526
 387         help
 388           Support for the Cortina Systems Gemini family SoCs
 389
 390 config ARCH_EBSA110
 391         bool "EBSA-110"
 392         select ARCH_USES_GETTIMEOFFSET
 393         select CPU_SA110
 394         select ISA
 395         select NEED_MACH_IO_H
 396         select NEED_MACH_MEMORY_H
 397         select NO_IOPORT
 398         help
 399           This is an evaluation board for the StrongARM processor available
 400           from Digital. It has limited hardware on-board, including an
 401           Ethernet interface, two PCMCIA sockets, two serial ports and a
 402           parallel port.
 403
 404 config ARCH_EP93XX
 405         bool "EP93xx-based"
 406         select ARCH_HAS_HOLES_MEMORYMODEL
 407         select ARCH_REQUIRE_GPIOLIB
 408         select ARCH_USES_GETTIMEOFFSET
 409         select ARM_AMBA
 410         select ARM_VIC
 411         select CLKDEV_LOOKUP
 412         select CPU_ARM920T
 413         select NEED_MACH_MEMORY_H
 414         help
 415           This enables support for the Cirrus EP93xx series of CPUs.
 416
 417 config ARCH_FOOTBRIDGE
 418         bool "FootBridge"
 419         select CPU_SA110
 420         select FOOTBRIDGE
 421         select GENERIC_CLOCKEVENTS
 422         select HAVE_IDE
 423         select NEED_MACH_IO_H if !MMU
 424         select NEED_MACH_MEMORY_H
 425         help
 426           Support for systems based on the DC21285 companion chip
 427           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 428
 429 config ARCH_NETX
 430         bool "Hilscher NetX based"
 431         select ARM_VIC
 432         select CLKSRC_MMIO
 433         select CPU_ARM926T
 434         select GENERIC_CLOCKEVENTS
 435         help
 436           This enables support for systems based on the Hilscher NetX Soc
 437
 438 config ARCH_IOP13XX
 439         bool "IOP13xx-based"
 440         depends on MMU
 441         select ARCH_SUPPORTS_MSI
 442         select CPU_XSC3
 443         select NEED_MACH_MEMORY_H
 444         select NEED_RET_TO_USER
 445         select PCI
 446         select PLAT_IOP
 447         select VMSPLIT_1G
 448         help
 449           Support for Intel's IOP13XX (XScale) family of processors.
 450
 451 config ARCH_IOP32X
 452         bool "IOP32x-based"
 453         depends on MMU
 454         select ARCH_REQUIRE_GPIOLIB
 455         select CPU_XSCALE
 456         select NEED_MACH_GPIO_H
 457         select NEED_RET_TO_USER
 458         select PCI
 459         select PLAT_IOP
 460         help
 461           Support for Intel's 80219 and IOP32X (XScale) family of
 462           processors.
 463
 464 config ARCH_IOP33X
 465         bool "IOP33x-based"
 466         depends on MMU
 467         select ARCH_REQUIRE_GPIOLIB
 468         select CPU_XSCALE
 469         select NEED_MACH_GPIO_H
 470         select NEED_RET_TO_USER
 471         select PCI
 472         select PLAT_IOP
 473         help
 474           Support for Intel's IOP33X (XScale) family of processors.
 475
 476 config ARCH_IXP4XX
 477         bool "IXP4xx-based"
 478         depends on MMU
 479         select ARCH_HAS_DMA_SET_COHERENT_MASK
 480         select ARCH_REQUIRE_GPIOLIB
 481         select CLKSRC_MMIO
 482         select CPU_XSCALE
 483         select DMABOUNCE if PCI
 484         select GENERIC_CLOCKEVENTS
 485         select MIGHT_HAVE_PCI
 486         select NEED_MACH_IO_H
 487         select USB_EHCI_BIG_ENDIAN_MMIO
 488         select USB_EHCI_BIG_ENDIAN_DESC
 489         help
 490           Support for Intel's IXP4XX (XScale) family of processors.
 491
 492 config ARCH_DOVE
 493         bool "Marvell Dove"
 494         select ARCH_REQUIRE_GPIOLIB
 495         select CPU_V7
 496         select GENERIC_CLOCKEVENTS
 497         select MIGHT_HAVE_PCI
 498         select PINCTRL
 499         select PINCTRL_DOVE
 500         select PLAT_ORION_LEGACY
 501         select USB_ARCH_HAS_EHCI
 502         help
 503           Support for the Marvell Dove SoC 88AP510
 504
 505 config ARCH_KIRKWOOD
 506         bool "Marvell Kirkwood"
 507         select ARCH_REQUIRE_GPIOLIB
 508         select CPU_FEROCEON
 509         select GENERIC_CLOCKEVENTS
 510         select PCI
 511         select PCI_QUIRKS
 512         select PINCTRL
 513         select PINCTRL_KIRKWOOD
 514         select PLAT_ORION_LEGACY
 515         help
 516           Support for the following Marvell Kirkwood series SoCs:
 517           88F6180, 88F6192 and 88F6281.
 518
 519 config ARCH_MV78XX0
 520         bool "Marvell MV78xx0"
 521         select ARCH_REQUIRE_GPIOLIB
 522         select CPU_FEROCEON
 523         select GENERIC_CLOCKEVENTS
 524         select PCI
 525         select PLAT_ORION_LEGACY
 526         help
 527           Support for the following Marvell MV78xx0 series SoCs:
 528           MV781x0, MV782x0.
 529
 530 config ARCH_ORION5X
 531         bool "Marvell Orion"
 532         depends on MMU
 533         select ARCH_REQUIRE_GPIOLIB
 534         select CPU_FEROCEON
 535         select GENERIC_CLOCKEVENTS
 536         select PCI
 537         select PLAT_ORION_LEGACY
 538         help
 539           Support for the following Marvell Orion 5x series SoCs:
 540           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 541           Orion-2 (5281), Orion-1-90 (6183).
 542
 543 config ARCH_MMP
 544         bool "Marvell PXA168/910/MMP2"
 545         depends on MMU
 546         select ARCH_REQUIRE_GPIOLIB
 547         select CLKDEV_LOOKUP
 548         select GENERIC_ALLOCATOR
 549         select GENERIC_CLOCKEVENTS
 550         select GPIO_PXA
 551         select IRQ_DOMAIN
 552         select NEED_MACH_GPIO_H
 553         select PINCTRL
 554         select PLAT_PXA
 555         select SPARSE_IRQ
 556         help
 557           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 558
 559 config ARCH_KS8695
 560         bool "Micrel/Kendin KS8695"
 561         select ARCH_REQUIRE_GPIOLIB
 562         select CLKSRC_MMIO
 563         select CPU_ARM922T
 564         select GENERIC_CLOCKEVENTS
 565         select NEED_MACH_MEMORY_H
 566         help
 567           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 568           System-on-Chip devices.
 569
 570 config ARCH_W90X900
 571         bool "Nuvoton W90X900 CPU"
 572         select ARCH_REQUIRE_GPIOLIB
 573         select CLKDEV_LOOKUP
 574         select CLKSRC_MMIO
 575         select CPU_ARM926T
 576         select GENERIC_CLOCKEVENTS
 577         help
 578           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 579           At present, the w90x900 has been renamed nuc900, regarding
 580           the ARM series product line, you can login the following
 581           link address to know more.
 582
 583           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 584                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 585
 586 config ARCH_LPC32XX
 587         bool "NXP LPC32XX"
 588         select ARCH_REQUIRE_GPIOLIB
 589         select ARM_AMBA
 590         select CLKDEV_LOOKUP
 591         select CLKSRC_MMIO
 592         select CPU_ARM926T
 593         select GENERIC_CLOCKEVENTS
 594         select HAVE_IDE
 595         select HAVE_PWM
 596         select USB_ARCH_HAS_OHCI
 597         select USE_OF
 598         help
 599           Support for the NXP LPC32XX family of processors
 600
 601 config ARCH_PXA
 602         bool "PXA2xx/PXA3xx-based"
 603         depends on MMU
 604         select ARCH_HAS_CPUFREQ
 605         select ARCH_MTD_XIP
 606         select ARCH_REQUIRE_GPIOLIB
 607         select ARM_CPU_SUSPEND if PM
 608         select AUTO_ZRELADDR
 609         select CLKDEV_LOOKUP
 610         select CLKSRC_MMIO
 611         select GENERIC_CLOCKEVENTS
 612         select GPIO_PXA
 613         select HAVE_IDE
 614         select MULTI_IRQ_HANDLER
 615         select NEED_MACH_GPIO_H
 616         select PLAT_PXA
 617         select SPARSE_IRQ
 618         help
 619           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 620
 621 config ARCH_MSM
 622         bool "Qualcomm MSM"
 623         select ARCH_REQUIRE_GPIOLIB
 624         select CLKDEV_LOOKUP
 625         select GENERIC_CLOCKEVENTS
 626         select HAVE_CLK
 627         help
 628           Support for Qualcomm MSM/QSD based systems.  This runs on the
 629           apps processor of the MSM/QSD and depends on a shared memory
 630           interface to the modem processor which runs the baseband
 631           stack and controls some vital subsystems
 632           (clock and power control, etc).
 633
 634 config ARCH_SHMOBILE
 635         bool "Renesas SH-Mobile / R-Mobile"
 636         select CLKDEV_LOOKUP
 637         select GENERIC_CLOCKEVENTS
 638         select HAVE_ARM_SCU if SMP
 639         select HAVE_ARM_TWD if LOCAL_TIMERS
 640         select HAVE_CLK
 641         select HAVE_MACH_CLKDEV
 642         select HAVE_SMP
 643         select MIGHT_HAVE_CACHE_L2X0
 644         select MULTI_IRQ_HANDLER
 645         select NEED_MACH_MEMORY_H
 646         select NO_IOPORT
 647         select PINCTRL
 648         select PM_GENERIC_DOMAINS if PM
 649         select SPARSE_IRQ
 650         help
 651           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 652
 653 config ARCH_RPC
 654         bool "RiscPC"
 655         select ARCH_ACORN
 656         select ARCH_MAY_HAVE_PC_FDC
 657         select ARCH_SPARSEMEM_ENABLE
 658         select ARCH_USES_GETTIMEOFFSET
 659         select FIQ
 660         select HAVE_IDE
 661         select HAVE_PATA_PLATFORM
 662         select ISA_DMA_API
 663         select NEED_MACH_IO_H
 664         select NEED_MACH_MEMORY_H
 665         select NO_IOPORT
 666         select VIRT_TO_BUS
 667         help
 668           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 669           CD-ROM interface, serial and parallel port, and the floppy drive.
 670
 671 config ARCH_SA1100
 672         bool "SA1100-based"
 673         select ARCH_HAS_CPUFREQ
 674         select ARCH_MTD_XIP
 675         select ARCH_REQUIRE_GPIOLIB
 676         select ARCH_SPARSEMEM_ENABLE
 677         select CLKDEV_LOOKUP
 678         select CLKSRC_MMIO
 679         select CPU_FREQ
 680         select CPU_SA1100
 681         select GENERIC_CLOCKEVENTS
 682         select HAVE_IDE
 683         select ISA
 684         select NEED_MACH_GPIO_H
 685         select NEED_MACH_MEMORY_H
 686         select SPARSE_IRQ
 687         help
 688           Support for StrongARM 11x0 based boards.
 689
 690 config ARCH_S3C24XX
 691         bool "Samsung S3C24XX SoCs"
 692         select ARCH_HAS_CPUFREQ
 693         select ARCH_USES_GETTIMEOFFSET
 694         select CLKDEV_LOOKUP
 695         select HAVE_CLK
 696         select HAVE_S3C2410_I2C if I2C
 697         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 698         select HAVE_S3C_RTC if RTC_CLASS
 699         select NEED_MACH_GPIO_H
 700         select NEED_MACH_IO_H
 701         help
 702           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 703           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 704           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 705           Samsung SMDK2410 development board (and derivatives).
 706
 707 config ARCH_S3C64XX
 708         bool "Samsung S3C64XX"
 709         select ARCH_HAS_CPUFREQ
 710         select ARCH_REQUIRE_GPIOLIB
 711         select ARCH_USES_GETTIMEOFFSET
 712         select ARM_VIC
 713         select CLKDEV_LOOKUP
 714         select CPU_V6
 715         select HAVE_CLK
 716         select HAVE_S3C2410_I2C if I2C
 717         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 718         select HAVE_TCM
 719         select NEED_MACH_GPIO_H
 720         select NO_IOPORT
 721         select PLAT_SAMSUNG
 722         select S3C_DEV_NAND
 723         select S3C_GPIO_TRACK
 724         select SAMSUNG_CLKSRC
 725         select SAMSUNG_GPIOLIB_4BIT
 726         select SAMSUNG_IRQ_VIC_TIMER
 727         select USB_ARCH_HAS_OHCI
 728         help
 729           Samsung S3C64XX series based systems
 730
 731 config ARCH_S5P64X0
 732         bool "Samsung S5P6440 S5P6450"
 733         select CLKDEV_LOOKUP
 734         select CLKSRC_MMIO
 735         select CPU_V6
 736         select GENERIC_CLOCKEVENTS
 737         select HAVE_CLK
 738         select HAVE_S3C2410_I2C if I2C
 739         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 740         select HAVE_S3C_RTC if RTC_CLASS
 741         select NEED_MACH_GPIO_H
 742         help
 743           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 744           SMDK6450.
 745
 746 config ARCH_S5PC100
 747         bool "Samsung S5PC100"
 748         select ARCH_USES_GETTIMEOFFSET
 749         select CLKDEV_LOOKUP
 750         select CPU_V7
 751         select HAVE_CLK
 752         select HAVE_S3C2410_I2C if I2C
 753         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 754         select HAVE_S3C_RTC if RTC_CLASS
 755         select NEED_MACH_GPIO_H
 756         help
 757           Samsung S5PC100 series based systems
 758
 759 config ARCH_S5PV210
 760         bool "Samsung S5PV210/S5PC110"
 761         select ARCH_HAS_CPUFREQ
 762         select ARCH_HAS_HOLES_MEMORYMODEL
 763         select ARCH_SPARSEMEM_ENABLE
 764         select CLKDEV_LOOKUP
 765         select CLKSRC_MMIO
 766         select CPU_V7
 767         select GENERIC_CLOCKEVENTS
 768         select HAVE_CLK
 769         select HAVE_S3C2410_I2C if I2C
 770         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 771         select HAVE_S3C_RTC if RTC_CLASS
 772         select NEED_MACH_GPIO_H
 773         select NEED_MACH_MEMORY_H
 774         help
 775           Samsung S5PV210/S5PC110 series based systems
 776
 777 config ARCH_EXYNOS
 778         bool "Samsung EXYNOS"
 779         select ARCH_HAS_CPUFREQ
 780         select ARCH_HAS_HOLES_MEMORYMODEL
 781         select ARCH_SPARSEMEM_ENABLE
 782         select CLKDEV_LOOKUP
 783         select CPU_V7
 784         select GENERIC_CLOCKEVENTS
 785         select HAVE_CLK
 786         select HAVE_S3C2410_I2C if I2C
 787         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 788         select HAVE_S3C_RTC if RTC_CLASS
 789         select NEED_MACH_GPIO_H
 790         select NEED_MACH_MEMORY_H
 791         help
 792           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 793
 794 config ARCH_SHARK
 795         bool "Shark"
 796         select ARCH_USES_GETTIMEOFFSET
 797         select CPU_SA110
 798         select ISA
 799         select ISA_DMA
 800         select NEED_MACH_MEMORY_H
 801         select PCI
 802         select VIRT_TO_BUS
 803         select ZONE_DMA
 804         help
 805           Support for the StrongARM based Digital DNARD machine, also known
 806           as "Shark" (<http://www.shark-linux.de/shark.html>).
 807
 808 config ARCH_U300
 809         bool "ST-Ericsson U300 Series"
 810         depends on MMU
 811         select ARCH_REQUIRE_GPIOLIB
 812         select ARM_AMBA
 813         select ARM_PATCH_PHYS_VIRT
 814         select ARM_VIC
 815         select CLKDEV_LOOKUP
 816         select CLKSRC_MMIO
 817         select COMMON_CLK
 818         select CPU_ARM926T
 819         select GENERIC_CLOCKEVENTS
 820         select HAVE_TCM
 821         select SPARSE_IRQ
 822         help
 823           Support for ST-Ericsson U300 series mobile platforms.
 824
 825 config ARCH_DAVINCI
 826         bool "TI DaVinci"
 827         select ARCH_HAS_HOLES_MEMORYMODEL
 828         select ARCH_REQUIRE_GPIOLIB
 829         select CLKDEV_LOOKUP
 830         select GENERIC_ALLOCATOR
 831         select GENERIC_CLOCKEVENTS
 832         select GENERIC_IRQ_CHIP
 833         select HAVE_IDE
 834         select NEED_MACH_GPIO_H
 835         select USE_OF
 836         select ZONE_DMA
 837         help
 838           Support for TI's DaVinci platform.
 839
 840 config ARCH_OMAP1
 841         bool "TI OMAP1"
 842         depends on MMU
 843         select ARCH_HAS_CPUFREQ
 844         select ARCH_HAS_HOLES_MEMORYMODEL
 845         select ARCH_OMAP
 846         select ARCH_REQUIRE_GPIOLIB
 847         select CLKDEV_LOOKUP
 848         select CLKSRC_MMIO
 849         select GENERIC_CLOCKEVENTS
 850         select GENERIC_IRQ_CHIP
 851         select HAVE_CLK
 852         select HAVE_IDE
 853         select IRQ_DOMAIN
 854         select NEED_MACH_IO_H if PCCARD
 855         select NEED_MACH_MEMORY_H
 856         help
 857           Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
 858
 859 endchoice
 860
 861 menu "Multiple platform selection"
 862         depends on ARCH_MULTIPLATFORM
 863
 864 comment "CPU Core family selection"
 865
 866 config ARCH_MULTI_V4
 867         bool "ARMv4 based platforms (FA526, StrongARM)"
 868         depends on !ARCH_MULTI_V6_V7
 869         select ARCH_MULTI_V4_V5
 870
 871 config ARCH_MULTI_V4T
 872         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
 873         depends on !ARCH_MULTI_V6_V7
 874         select ARCH_MULTI_V4_V5
 875
 876 config ARCH_MULTI_V5
 877         bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
 878         depends on !ARCH_MULTI_V6_V7
 879         select ARCH_MULTI_V4_V5
 880
 881 config ARCH_MULTI_V4_V5
 882         bool
 883
 884 config ARCH_MULTI_V6
 885         bool "ARMv6 based platforms (ARM11)"
 886         select ARCH_MULTI_V6_V7
 887         select CPU_V6
 888
 889 config ARCH_MULTI_V7
 890         bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
 891         default y
 892         select ARCH_MULTI_V6_V7
 893         select ARCH_VEXPRESS
 894         select CPU_V7
 895
 896 config ARCH_MULTI_V6_V7
 897         bool
 898
 899 config ARCH_MULTI_CPU_AUTO
 900         def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
 901         select ARCH_MULTI_V5
 902
 903 endmenu
 904
 905 #
 906 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 907 # Kconfigs may be included either alphabetically (according to the
 908 # plat- suffix) or along side the corresponding mach-* source.
 909 #
 910 source "arch/arm/mach-mvebu/Kconfig"
 911
 912 source "arch/arm/mach-at91/Kconfig"
 913
 914 source "arch/arm/mach-bcm/Kconfig"
 915
 916 source "arch/arm/mach-bcm2835/Kconfig"
 917
 918 source "arch/arm/mach-clps711x/Kconfig"
 919
 920 source "arch/arm/mach-cns3xxx/Kconfig"
 921
 922 source "arch/arm/mach-davinci/Kconfig"
 923
 924 source "arch/arm/mach-dove/Kconfig"
 925
 926 source "arch/arm/mach-ep93xx/Kconfig"
 927
 928 source "arch/arm/mach-footbridge/Kconfig"
 929
 930 source "arch/arm/mach-gemini/Kconfig"
 931
 932 source "arch/arm/mach-highbank/Kconfig"
 933
 934 source "arch/arm/mach-integrator/Kconfig"
 935
 936 source "arch/arm/mach-iop32x/Kconfig"
 937
 938 source "arch/arm/mach-iop33x/Kconfig"
 939
 940 source "arch/arm/mach-iop13xx/Kconfig"
 941
 942 source "arch/arm/mach-ixp4xx/Kconfig"
 943
 944 source "arch/arm/mach-kirkwood/Kconfig"
 945
 946 source "arch/arm/mach-ks8695/Kconfig"
 947
 948 source "arch/arm/mach-msm/Kconfig"
 949
 950 source "arch/arm/mach-mv78xx0/Kconfig"
 951
 952 source "arch/arm/mach-imx/Kconfig"
 953
 954 source "arch/arm/mach-mxs/Kconfig"
 955
 956 source "arch/arm/mach-netx/Kconfig"
 957
 958 source "arch/arm/mach-nomadik/Kconfig"
 959
 960 source "arch/arm/plat-omap/Kconfig"
 961
 962 source "arch/arm/mach-omap1/Kconfig"
 963
 964 source "arch/arm/mach-omap2/Kconfig"
 965
 966 source "arch/arm/mach-orion5x/Kconfig"
 967
 968 source "arch/arm/mach-picoxcell/Kconfig"
 969
 970 source "arch/arm/mach-pxa/Kconfig"
 971 source "arch/arm/plat-pxa/Kconfig"
 972
 973 source "arch/arm/mach-mmp/Kconfig"
 974
 975 source "arch/arm/mach-realview/Kconfig"
 976
 977 source "arch/arm/mach-sa1100/Kconfig"
 978
 979 source "arch/arm/plat-samsung/Kconfig"
 980
 981 source "arch/arm/mach-socfpga/Kconfig"
 982
 983 source "arch/arm/mach-spear/Kconfig"
 984
 985 source "arch/arm/mach-s3c24xx/Kconfig"
 986
 987 if ARCH_S3C64XX
 988 source "arch/arm/mach-s3c64xx/Kconfig"
 989 endif
 990
 991 source "arch/arm/mach-s5p64x0/Kconfig"
 992
 993 source "arch/arm/mach-s5pc100/Kconfig"
 994
 995 source "arch/arm/mach-s5pv210/Kconfig"
 996
 997 source "arch/arm/mach-exynos/Kconfig"
 998
 999 source "arch/arm/mach-shmobile/Kconfig"
1000
1001 source "arch/arm/mach-sunxi/Kconfig"
1002
1003 source "arch/arm/mach-prima2/Kconfig"
1004
1005 source "arch/arm/mach-tegra/Kconfig"
1006
1007 source "arch/arm/mach-u300/Kconfig"
1008
1009 source "arch/arm/mach-ux500/Kconfig"
1010
1011 source "arch/arm/mach-versatile/Kconfig"
1012
1013 source "arch/arm/mach-vexpress/Kconfig"
1014 source "arch/arm/plat-versatile/Kconfig"
1015
1016 source "arch/arm/mach-virt/Kconfig"
1017
1018 source "arch/arm/mach-vt8500/Kconfig"
1019
1020 source "arch/arm/mach-w90x900/Kconfig"
1021
1022 source "arch/arm/mach-zynq/Kconfig"
1023
1024 # Definitions to make life easier
1025 config ARCH_ACORN
1026         bool
1027
1028 config PLAT_IOP
1029         bool
1030         select GENERIC_CLOCKEVENTS
1031
1032 config PLAT_ORION
1033         bool
1034         select CLKSRC_MMIO
1035         select COMMON_CLK
1036         select GENERIC_IRQ_CHIP
1037         select IRQ_DOMAIN
1038
1039 config PLAT_ORION_LEGACY
1040         bool
1041         select PLAT_ORION
1042
1043 config PLAT_PXA
1044         bool
1045
1046 config PLAT_VERSATILE
1047         bool
1048
1049 config ARM_TIMER_SP804
1050         bool
1051         select CLKSRC_MMIO
1052
1053 source arch/arm/mm/Kconfig
1054
1055 config ARM_NR_BANKS
1056         int
1057         default 16 if ARCH_EP93XX
1058         default 8
1059
1060 config IWMMXT
1061         bool "Enable iWMMXt support" if !CPU_PJ4
1062         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1063         default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4
1064         help
1065           Enable support for iWMMXt context switching at run time if
1066           running on a CPU that supports it.
1067
1068 config XSCALE_PMU
1069         bool
1070         depends on CPU_XSCALE
1071         default y
1072
1073 config MULTI_IRQ_HANDLER
1074         bool
1075         help
1076           Allow each machine to specify it's own IRQ handler at run time.
1077
1078 if !MMU
1079 source "arch/arm/Kconfig-nommu"
1080 endif
1081
1082 config ARM_ERRATA_326103
1083         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1084         depends on CPU_V6
1085         help
1086           Executing a SWP instruction to read-only memory does not set bit 11
1087           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1088           treat the access as a read, preventing a COW from occurring and
1089           causing the faulting task to livelock.
1090
1091 config ARM_ERRATA_411920
1092         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1093         depends on CPU_V6 || CPU_V6K
1094         help
1095           Invalidation of the Instruction Cache operation can
1096           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1097           It does not affect the MPCore. This option enables the ARM Ltd.
1098           recommended workaround.
1099
1100 config ARM_ERRATA_430973
1101         bool "ARM errata: Stale prediction on replaced interworking branch"
1102         depends on CPU_V7
1103         help
1104           This option enables the workaround for the 430973 Cortex-A8
1105           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1106           interworking branch is replaced with another code sequence at the
1107           same virtual address, whether due to self-modifying code or virtual
1108           to physical address re-mapping, Cortex-A8 does not recover from the
1109           stale interworking branch prediction. This results in Cortex-A8
1110           executing the new code sequence in the incorrect ARM or Thumb state.
1111           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1112           and also flushes the branch target cache at every context switch.
1113           Note that setting specific bits in the ACTLR register may not be
1114           available in non-secure mode.
1115
1116 config ARM_ERRATA_458693
1117         bool "ARM errata: Processor deadlock when a false hazard is created"
1118         depends on CPU_V7
1119         depends on !ARCH_MULTIPLATFORM
1120         help
1121           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1122           erratum. For very specific sequences of memory operations, it is
1123           possible for a hazard condition intended for a cache line to instead
1124           be incorrectly associated with a different cache line. This false
1125           hazard might then cause a processor deadlock. The workaround enables
1126           the L1 caching of the NEON accesses and disables the PLD instruction
1127           in the ACTLR register. Note that setting specific bits in the ACTLR
1128           register may not be available in non-secure mode.
1129
1130 config ARM_ERRATA_460075
1131         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1132         depends on CPU_V7
1133         depends on !ARCH_MULTIPLATFORM
1134         help
1135           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1136           erratum. Any asynchronous access to the L2 cache may encounter a
1137           situation in which recent store transactions to the L2 cache are lost
1138           and overwritten with stale memory contents from external memory. The
1139           workaround disables the write-allocate mode for the L2 cache via the
1140           ACTLR register. Note that setting specific bits in the ACTLR register
1141           may not be available in non-secure mode.
1142
1143 config ARM_ERRATA_742230
1144         bool "ARM errata: DMB operation may be faulty"
1145         depends on CPU_V7 && SMP
1146         depends on !ARCH_MULTIPLATFORM
1147         help
1148           This option enables the workaround for the 742230 Cortex-A9
1149           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1150           between two write operations may not ensure the correct visibility
1151           ordering of the two writes. This workaround sets a specific bit in
1152           the diagnostic register of the Cortex-A9 which causes the DMB
1153           instruction to behave as a DSB, ensuring the correct behaviour of
1154           the two writes.
1155
1156 config ARM_ERRATA_742231
1157         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1158         depends on CPU_V7 && SMP
1159         depends on !ARCH_MULTIPLATFORM
1160         help
1161           This option enables the workaround for the 742231 Cortex-A9
1162           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1163           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1164           accessing some data located in the same cache line, may get corrupted
1165           data due to bad handling of the address hazard when the line gets
1166           replaced from one of the CPUs at the same time as another CPU is
1167           accessing it. This workaround sets specific bits in the diagnostic
1168           register of the Cortex-A9 which reduces the linefill issuing
1169           capabilities of the processor.
1170
1171 config PL310_ERRATA_588369
1172         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1173         depends on CACHE_L2X0
1174         help
1175            The PL310 L2 cache controller implements three types of Clean &
1176            Invalidate maintenance operations: by Physical Address
1177            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1178            They are architecturally defined to behave as the execution of a
1179            clean operation followed immediately by an invalidate operation,
1180            both performing to the same memory location. This functionality
1181            is not correctly implemented in PL310 as clean lines are not
1182            invalidated as a result of these operations.
1183
1184 config ARM_ERRATA_720789
1185         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1186         depends on CPU_V7
1187         help
1188           This option enables the workaround for the 720789 Cortex-A9 (prior to
1189           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1190           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1191           As a consequence of this erratum, some TLB entries which should be
1192           invalidated are not, resulting in an incoherency in the system page
1193           tables. The workaround changes the TLB flushing routines to invalidate
1194           entries regardless of the ASID.
1195
1196 config PL310_ERRATA_727915
1197         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1198         depends on CACHE_L2X0
1199         help
1200           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1201           operation (offset 0x7FC). This operation runs in background so that
1202           PL310 can handle normal accesses while it is in progress. Under very
1203           rare circumstances, due to this erratum, write data can be lost when
1204           PL310 treats a cacheable write transaction during a Clean &
1205           Invalidate by Way operation.
1206
1207 config ARM_ERRATA_743622
1208         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1209         depends on CPU_V7
1210         depends on !ARCH_MULTIPLATFORM
1211         help
1212           This option enables the workaround for the 743622 Cortex-A9
1213           (r2p*) erratum. Under very rare conditions, a faulty
1214           optimisation in the Cortex-A9 Store Buffer may lead to data
1215           corruption. This workaround sets a specific bit in the diagnostic
1216           register of the Cortex-A9 which disables the Store Buffer
1217           optimisation, preventing the defect from occurring. This has no
1218           visible impact on the overall performance or power consumption of the
1219           processor.
1220
1221 config ARM_ERRATA_751472
1222         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1223         depends on CPU_V7
1224         depends on !ARCH_MULTIPLATFORM
1225         help
1226           This option enables the workaround for the 751472 Cortex-A9 (prior
1227           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1228           completion of a following broadcasted operation if the second
1229           operation is received by a CPU before the ICIALLUIS has completed,
1230           potentially leading to corrupted entries in the cache or TLB.
1231
1232 config PL310_ERRATA_753970
1233         bool "PL310 errata: cache sync operation may be faulty"
1234         depends on CACHE_PL310
1235         help
1236           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1237
1238           Under some condition the effect of cache sync operation on
1239           the store buffer still remains when the operation completes.
1240           This means that the store buffer is always asked to drain and
1241           this prevents it from merging any further writes. The workaround
1242           is to replace the normal offset of cache sync operation (0x730)
1243           by another offset targeting an unmapped PL310 register 0x740.
1244           This has the same effect as the cache sync operation: store buffer
1245           drain and waiting for all buffers empty.
1246
1247 config ARM_ERRATA_754322
1248         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1249         depends on CPU_V7
1250         help
1251           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1252           r3p*) erratum. A speculative memory access may cause a page table walk
1253           which starts prior to an ASID switch but completes afterwards. This
1254           can populate the micro-TLB with a stale entry which may be hit with
1255           the new ASID. This workaround places two dsb instructions in the mm
1256           switching code so that no page table walks can cross the ASID switch.
1257
1258 config ARM_ERRATA_754327
1259         bool "ARM errata: no automatic Store Buffer drain"
1260         depends on CPU_V7 && SMP
1261         help
1262           This option enables the workaround for the 754327 Cortex-A9 (prior to
1263           r2p0) erratum. The Store Buffer does not have any automatic draining
1264           mechanism and therefore a livelock may occur if an external agent
1265           continuously polls a memory location waiting to observe an update.
1266           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1267           written polling loops from denying visibility of updates to memory.
1268
1269 config ARM_ERRATA_364296
1270         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1271         depends on CPU_V6 && !SMP
1272         help
1273           This options enables the workaround for the 364296 ARM1136
1274           r0p2 erratum (possible cache data corruption with
1275           hit-under-miss enabled). It sets the undocumented bit 31 in
1276           the auxiliary control register and the FI bit in the control
1277           register, thus disabling hit-under-miss without putting the
1278           processor into full low interrupt latency mode. ARM11MPCore
1279           is not affected.
1280
1281 config ARM_ERRATA_764369
1282         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1283         depends on CPU_V7 && SMP
1284         help
1285           This option enables the workaround for erratum 764369
1286           affecting Cortex-A9 MPCore with two or more processors (all
1287           current revisions). Under certain timing circumstances, a data
1288           cache line maintenance operation by MVA targeting an Inner
1289           Shareable memory region may fail to proceed up to either the
1290           Point of Coherency or to the Point of Unification of the
1291           system. This workaround adds a DSB instruction before the
1292           relevant cache maintenance functions and sets a specific bit
1293           in the diagnostic control register of the SCU.
1294
1295 config PL310_ERRATA_769419
1296         bool "PL310 errata: no automatic Store Buffer drain"
1297         depends on CACHE_L2X0
1298         help
1299           On revisions of the PL310 prior to r3p2, the Store Buffer does
1300           not automatically drain. This can cause normal, non-cacheable
1301           writes to be retained when the memory system is idle, leading
1302           to suboptimal I/O performance for drivers using coherent DMA.
1303           This option adds a write barrier to the cpu_idle loop so that,
1304           on systems with an outer cache, the store buffer is drained
1305           explicitly.
1306
1307 config ARM_ERRATA_775420
1308        bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1309        depends on CPU_V7
1310        help
1311          This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1312          r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1313          operation aborts with MMU exception, it might cause the processor
1314          to deadlock. This workaround puts DSB before executing ISB if
1315          an abort may occur on cache maintenance.
1316
1317 config ARM_ERRATA_798181
1318         bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1319         depends on CPU_V7 && SMP
1320         help
1321           On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1322           adequately shooting down all use of the old entries. This
1323           option enables the Linux kernel workaround for this erratum
1324           which sends an IPI to the CPUs that are running the same ASID
1325           as the one being invalidated.
1326
1327 endmenu
1328
1329 source "arch/arm/common/Kconfig"
1330
1331 menu "Bus support"
1332
1333 config ARM_AMBA
1334         bool
1335
1336 config ISA
1337         bool
1338         help
1339           Find out whether you have ISA slots on your motherboard.  ISA is the
1340           name of a bus system, i.e. the way the CPU talks to the other stuff
1341           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1342           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1343           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1344
1345 # Select ISA DMA controller support
1346 config ISA_DMA
1347         bool
1348         select ISA_DMA_API
1349
1350 # Select ISA DMA interface
1351 config ISA_DMA_API
1352         bool
1353
1354 config PCI
1355         bool "PCI support" if MIGHT_HAVE_PCI
1356         help
1357           Find out whether you have a PCI motherboard. PCI is the name of a
1358           bus system, i.e. the way the CPU talks to the other stuff inside
1359           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1360           VESA. If you have PCI, say Y, otherwise N.
1361
1362 config PCI_DOMAINS
1363         bool
1364         depends on PCI
1365
1366 config PCI_NANOENGINE
1367         bool "BSE nanoEngine PCI support"
1368         depends on SA1100_NANOENGINE
1369         help
1370           Enable PCI on the BSE nanoEngine board.
1371
1372 config PCI_SYSCALL
1373         def_bool PCI
1374
1375 # Select the host bridge type
1376 config PCI_HOST_VIA82C505
1377         bool
1378         depends on PCI && ARCH_SHARK
1379         default y
1380
1381 config PCI_HOST_ITE8152
1382         bool
1383         depends on PCI && MACH_ARMCORE
1384         default y
1385         select DMABOUNCE
1386
1387 source "drivers/pci/Kconfig"
1388
1389 source "drivers/pcmcia/Kconfig"
1390
1391 endmenu
1392
1393 menu "Kernel Features"
1394
1395 config HAVE_SMP
1396         bool
1397         help
1398           This option should be selected by machines which have an SMP-
1399           capable CPU.
1400
1401           The only effect of this option is to make the SMP-related
1402           options available to the user for configuration.
1403
1404 config SMP
1405         bool "Symmetric Multi-Processing"
1406         depends on CPU_V6K || CPU_V7
1407         depends on GENERIC_CLOCKEVENTS
1408         depends on HAVE_SMP
1409         depends on MMU
1410         select USE_GENERIC_SMP_HELPERS
1411         help
1412           This enables support for systems with more than one CPU. If you have
1413           a system with only one CPU, like most personal computers, say N. If
1414           you have a system with more than one CPU, say Y.
1415
1416           If you say N here, the kernel will run on single and multiprocessor
1417           machines, but will use only one CPU of a multiprocessor machine. If
1418           you say Y here, the kernel will run on many, but not all, single
1419           processor machines. On a single processor machine, the kernel will
1420           run faster if you say N here.
1421
1422           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1423           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1424           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1425
1426           If you don't know what to do here, say N.
1427
1428 config SMP_ON_UP
1429         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1430         depends on SMP && !XIP_KERNEL
1431         default y
1432         help
1433           SMP kernels contain instructions which fail on non-SMP processors.
1434           Enabling this option allows the kernel to modify itself to make
1435           these instructions safe.  Disabling it allows about 1K of space
1436           savings.
1437
1438           If you don't know what to do here, say Y.
1439
1440 config ARM_CPU_TOPOLOGY
1441         bool "Support cpu topology definition"
1442         depends on SMP && CPU_V7
1443         default y
1444         help
1445           Support ARM cpu topology definition. The MPIDR register defines
1446           affinity between processors which is then used to describe the cpu
1447           topology of an ARM System.
1448
1449 config SCHED_MC
1450         bool "Multi-core scheduler support"
1451         depends on ARM_CPU_TOPOLOGY
1452         help
1453           Multi-core scheduler support improves the CPU scheduler's decision
1454           making when dealing with multi-core CPU chips at a cost of slightly
1455           increased overhead in some places. If unsure say N here.
1456
1457 config SCHED_SMT
1458         bool "SMT scheduler support"
1459         depends on ARM_CPU_TOPOLOGY
1460         help
1461           Improves the CPU scheduler's decision making when dealing with
1462           MultiThreading at a cost of slightly increased overhead in some
1463           places. If unsure say N here.
1464
1465 config HAVE_ARM_SCU
1466         bool
1467         help
1468           This option enables support for the ARM system coherency unit
1469
1470 config HAVE_ARM_ARCH_TIMER
1471         bool "Architected timer support"
1472         depends on CPU_V7
1473         select ARM_ARCH_TIMER
1474         help
1475           This option enables support for the ARM architected timer
1476
1477 config HAVE_ARM_TWD
1478         bool
1479         depends on SMP
1480         select CLKSRC_OF if OF
1481         help
1482           This options enables support for the ARM timer and watchdog unit
1483
1484 config MCPM
1485         bool "Multi-Cluster Power Management"
1486         depends on CPU_V7 && SMP
1487         help
1488           This option provides the common power management infrastructure
1489           for (multi-)cluster based systems, such as big.LITTLE based
1490           systems.
1491
1492 choice
1493         prompt "Memory split"
1494         default VMSPLIT_3G
1495         help
1496           Select the desired split between kernel and user memory.
1497
1498           If you are not absolutely sure what you are doing, leave this
1499           option alone!
1500
1501         config VMSPLIT_3G
1502                 bool "3G/1G user/kernel split"
1503         config VMSPLIT_2G
1504                 bool "2G/2G user/kernel split"
1505         config VMSPLIT_1G
1506                 bool "1G/3G user/kernel split"
1507 endchoice
1508
1509 config PAGE_OFFSET
1510         hex
1511         default 0x40000000 if VMSPLIT_1G
1512         default 0x80000000 if VMSPLIT_2G
1513         default 0xC0000000
1514
1515 config NR_CPUS
1516         int "Maximum number of CPUs (2-32)"
1517         range 2 32
1518         depends on SMP
1519         default "4"
1520
1521 config HOTPLUG_CPU
1522         bool "Support for hot-pluggable CPUs"
1523         depends on SMP && HOTPLUG
1524         help
1525           Say Y here to experiment with turning CPUs off and on.  CPUs
1526           can be controlled through /sys/devices/system/cpu.
1527
1528 config ARM_PSCI
1529         bool "Support for the ARM Power State Coordination Interface (PSCI)"
1530         depends on CPU_V7
1531         help
1532           Say Y here if you want Linux to communicate with system firmware
1533           implementing the PSCI specification for CPU-centric power
1534           management operations described in ARM document number ARM DEN
1535           0022A ("Power State Coordination Interface System Software on
1536           ARM processors").
1537
1538 config LOCAL_TIMERS
1539         bool "Use local timer interrupts"
1540         depends on SMP
1541         default y
1542         help
1543           Enable support for local timers on SMP platforms, rather then the
1544           legacy IPI broadcast method.  Local timers allows the system
1545           accounting to be spread across the timer interval, preventing a
1546           "thundering herd" at every timer tick.
1547
1548 # The GPIO number here must be sorted by descending number. In case of
1549 # a multiplatform kernel, we just want the highest value required by the
1550 # selected platforms.
1551 config ARCH_NR_GPIO
1552         int
1553         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1554         default 512 if SOC_OMAP5
1555         default 392 if ARCH_U8500
1556         default 288 if ARCH_VT8500 || ARCH_SUNXI
1557         default 264 if MACH_H4700
1558         default 0
1559         help
1560           Maximum number of GPIOs in the system.
1561
1562           If unsure, leave the default value.
1563
1564 source kernel/Kconfig.preempt
1565
1566 config HZ
1567         int
1568         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1569                 ARCH_S5PV210 || ARCH_EXYNOS4
1570         default AT91_TIMER_HZ if ARCH_AT91
1571         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1572         default 100
1573
1574 config SCHED_HRTICK
1575         def_bool HIGH_RES_TIMERS
1576
1577 config THUMB2_KERNEL
1578         bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
1579         depends on CPU_V7 && !CPU_V6 && !CPU_V6K
1580         default y if CPU_THUMBONLY
1581         select AEABI
1582         select ARM_ASM_UNIFIED
1583         select ARM_UNWIND
1584         help
1585           By enabling this option, the kernel will be compiled in
1586           Thumb-2 mode. A compiler/assembler that understand the unified
1587           ARM-Thumb syntax is needed.
1588
1589           If unsure, say N.
1590
1591 config THUMB2_AVOID_R_ARM_THM_JUMP11
1592         bool "Work around buggy Thumb-2 short branch relocations in gas"
1593         depends on THUMB2_KERNEL && MODULES
1594         default y
1595         help
1596           Various binutils versions can resolve Thumb-2 branches to
1597           locally-defined, preemptible global symbols as short-range "b.n"
1598           branch instructions.
1599
1600           This is a problem, because there's no guarantee the final
1601           destination of the symbol, or any candidate locations for a
1602           trampoline, are within range of the branch.  For this reason, the
1603           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1604           relocation in modules at all, and it makes little sense to add
1605           support.
1606
1607           The symptom is that the kernel fails with an "unsupported
1608           relocation" error when loading some modules.
1609
1610           Until fixed tools are available, passing
1611           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1612           code which hits this problem, at the cost of a bit of extra runtime
1613           stack usage in some cases.
1614
1615           The problem is described in more detail at:
1616               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1617
1618           Only Thumb-2 kernels are affected.
1619
1620           Unless you are sure your tools don't have this problem, say Y.
1621
1622 config ARM_ASM_UNIFIED
1623         bool
1624
1625 config AEABI
1626         bool "Use the ARM EABI to compile the kernel"
1627         help
1628           This option allows for the kernel to be compiled using the latest
1629           ARM ABI (aka EABI).  This is only useful if you are using a user
1630           space environment that is also compiled with EABI.
1631
1632           Since there are major incompatibilities between the legacy ABI and
1633           EABI, especially with regard to structure member alignment, this
1634           option also changes the kernel syscall calling convention to
1635           disambiguate both ABIs and allow for backward compatibility support
1636           (selected with CONFIG_OABI_COMPAT).
1637
1638           To use this you need GCC version 4.0.0 or later.
1639
1640 config OABI_COMPAT
1641         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1642         depends on AEABI && !THUMB2_KERNEL
1643         default y
1644         help
1645           This option preserves the old syscall interface along with the
1646           new (ARM EABI) one. It also provides a compatibility layer to
1647           intercept syscalls that have structure arguments which layout
1648           in memory differs between the legacy ABI and the new ARM EABI
1649           (only for non "thumb" binaries). This option adds a tiny
1650           overhead to all syscalls and produces a slightly larger kernel.
1651           If you know you'll be using only pure EABI user space then you
1652           can say N here. If this option is not selected and you attempt
1653           to execute a legacy ABI binary then the result will be
1654           UNPREDICTABLE (in fact it can be predicted that it won't work
1655           at all). If in doubt say Y.
1656
1657 config ARCH_HAS_HOLES_MEMORYMODEL
1658         bool
1659
1660 config ARCH_SPARSEMEM_ENABLE
1661         bool
1662
1663 config ARCH_SPARSEMEM_DEFAULT
1664         def_bool ARCH_SPARSEMEM_ENABLE
1665
1666 config ARCH_SELECT_MEMORY_MODEL
1667         def_bool ARCH_SPARSEMEM_ENABLE
1668
1669 config HAVE_ARCH_PFN_VALID
1670         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1671
1672 config HIGHMEM
1673         bool "High Memory Support"
1674         depends on MMU
1675         help
1676           The address space of ARM processors is only 4 Gigabytes large
1677           and it has to accommodate user address space, kernel address
1678           space as well as some memory mapped IO. That means that, if you
1679           have a large amount of physical memory and/or IO, not all of the
1680           memory can be "permanently mapped" by the kernel. The physical
1681           memory that is not permanently mapped is called "high memory".
1682
1683           Depending on the selected kernel/user memory split, minimum
1684           vmalloc space and actual amount of RAM, you may not need this
1685           option which should result in a slightly faster kernel.
1686
1687           If unsure, say n.
1688
1689 config HIGHPTE
1690         bool "Allocate 2nd-level pagetables from highmem"
1691         depends on HIGHMEM
1692
1693 config HW_PERF_EVENTS
1694         bool "Enable hardware performance counter support for perf events"
1695         depends on PERF_EVENTS
1696         default y
1697         help
1698           Enable hardware performance counter support for perf events. If
1699           disabled, perf events will use software events only.
1700
1701 source "mm/Kconfig"
1702
1703 config FORCE_MAX_ZONEORDER
1704         int "Maximum zone order" if ARCH_SHMOBILE
1705         range 11 64 if ARCH_SHMOBILE
1706         default "12" if SOC_AM33XX
1707         default "9" if SA1111
1708         default "11"
1709         help
1710           The kernel memory allocator divides physically contiguous memory
1711           blocks into "zones", where each zone is a power of two number of
1712           pages.  This option selects the largest power of two that the kernel
1713           keeps in the memory allocator.  If you need to allocate very large
1714           blocks of physically contiguous memory, then you may need to
1715           increase this value.
1716
1717           This config option is actually maximum order plus one. For example,
1718           a value of 11 means that the largest free memory block is 2^10 pages.
1719
1720 config ALIGNMENT_TRAP
1721         bool
1722         depends on CPU_CP15_MMU
1723         default y if !ARCH_EBSA110
1724         select HAVE_PROC_CPU if PROC_FS
1725         help
1726           ARM processors cannot fetch/store information which is not
1727           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1728           address divisible by 4. On 32-bit ARM processors, these non-aligned
1729           fetch/store instructions will be emulated in software if you say
1730           here, which has a severe performance impact. This is necessary for
1731           correct operation of some network protocols. With an IP-only
1732           configuration it is safe to say N, otherwise say Y.
1733
1734 config UACCESS_WITH_MEMCPY
1735         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1736         depends on MMU
1737         default y if CPU_FEROCEON
1738         help
1739           Implement faster copy_to_user and clear_user methods for CPU
1740           cores where a 8-word STM instruction give significantly higher
1741           memory write throughput than a sequence of individual 32bit stores.
1742
1743           A possible side effect is a slight increase in scheduling latency
1744           between threads sharing the same address space if they invoke
1745           such copy operations with large buffers.
1746
1747           However, if the CPU data cache is using a write-allocate mode,
1748           this option is unlikely to provide any performance gain.
1749
1750 config SECCOMP
1751         bool
1752         prompt "Enable seccomp to safely compute untrusted bytecode"
1753         ---help---
1754           This kernel feature is useful for number crunching applications
1755           that may need to compute untrusted bytecode during their
1756           execution. By using pipes or other transports made available to
1757           the process as file descriptors supporting the read/write
1758           syscalls, it's possible to isolate those applications in
1759           their own address space using seccomp. Once seccomp is
1760           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1761           and the task is only allowed to execute a few safe syscalls
1762           defined by each seccomp mode.
1763
1764 config CC_STACKPROTECTOR
1765         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1766         help
1767           This option turns on the -fstack-protector GCC feature. This
1768           feature puts, at the beginning of functions, a canary value on
1769           the stack just before the return address, and validates
1770           the value just before actually returning.  Stack based buffer
1771           overflows (that need to overwrite this return address) now also
1772           overwrite the canary, which gets detected and the attack is then
1773           neutralized via a kernel panic.
1774           This feature requires gcc version 4.2 or above.
1775
1776 config XEN_DOM0
1777         def_bool y
1778         depends on XEN
1779
1780 config XEN
1781         bool "Xen guest support on ARM (EXPERIMENTAL)"
1782         depends on ARM && AEABI && OF
1783         depends on CPU_V7 && !CPU_V6
1784         depends on !GENERIC_ATOMIC64
1785         help
1786           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1787
1788 endmenu
1789
1790 menu "Boot options"
1791
1792 config USE_OF
1793         bool "Flattened Device Tree support"
1794         select IRQ_DOMAIN
1795         select OF
1796         select OF_EARLY_FLATTREE
1797         help
1798           Include support for flattened device tree machine descriptions.
1799
1800 config ATAGS
1801         bool "Support for the traditional ATAGS boot data passing" if USE_OF
1802         default y
1803         help
1804           This is the traditional way of passing data to the kernel at boot
1805           time. If you are solely relying on the flattened device tree (or
1806           the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1807           to remove ATAGS support from your kernel binary.  If unsure,
1808           leave this to y.
1809
1810 config DEPRECATED_PARAM_STRUCT
1811         bool "Provide old way to pass kernel parameters"
1812         depends on ATAGS
1813         help
1814           This was deprecated in 2001 and announced to live on for 5 years.
1815           Some old boot loaders still use this way.
1816
1817 # Compressed boot loader in ROM.  Yes, we really want to ask about
1818 # TEXT and BSS so we preserve their values in the config files.
1819 config ZBOOT_ROM_TEXT
1820         hex "Compressed ROM boot loader base address"
1821         default "0"
1822         help
1823           The physical address at which the ROM-able zImage is to be
1824           placed in the target.  Platforms which normally make use of
1825           ROM-able zImage formats normally set this to a suitable
1826           value in their defconfig file.
1827
1828           If ZBOOT_ROM is not enabled, this has no effect.
1829
1830 config ZBOOT_ROM_BSS
1831         hex "Compressed ROM boot loader BSS address"
1832         default "0"
1833         help
1834           The base address of an area of read/write memory in the target
1835           for the ROM-able zImage which must be available while the
1836           decompressor is running. It must be large enough to hold the
1837           entire decompressed kernel plus an additional 128 KiB.
1838           Platforms which normally make use of ROM-able zImage formats
1839           normally set this to a suitable value in their defconfig file.
1840
1841           If ZBOOT_ROM is not enabled, this has no effect.
1842
1843 config ZBOOT_ROM
1844         bool "Compressed boot loader in ROM/flash"
1845         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1846         help
1847           Say Y here if you intend to execute your compressed kernel image
1848           (zImage) directly from ROM or flash.  If unsure, say N.
1849
1850 choice
1851         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1852         depends on ZBOOT_ROM && ARCH_SH7372
1853         default ZBOOT_ROM_NONE
1854         help
1855           Include experimental SD/MMC loading code in the ROM-able zImage.
1856           With this enabled it is possible to write the ROM-able zImage
1857           kernel image to an MMC or SD card and boot the kernel straight
1858           from the reset vector. At reset the processor Mask ROM will load
1859           the first part of the ROM-able zImage which in turn loads the
1860           rest the kernel image to RAM.
1861
1862 config ZBOOT_ROM_NONE
1863         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1864         help
1865           Do not load image from SD or MMC
1866
1867 config ZBOOT_ROM_MMCIF
1868         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1869         help
1870           Load image from MMCIF hardware block.
1871
1872 config ZBOOT_ROM_SH_MOBILE_SDHI
1873         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1874         help
1875           Load image from SDHI hardware block
1876
1877 endchoice
1878
1879 config ARM_APPENDED_DTB
1880         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1881         depends on OF && !ZBOOT_ROM
1882         help
1883           With this option, the boot code will look for a device tree binary
1884           (DTB) appended to zImage
1885           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1886
1887           This is meant as a backward compatibility convenience for those
1888           systems with a bootloader that can't be upgraded to accommodate
1889           the documented boot protocol using a device tree.
1890
1891           Beware that there is very little in terms of protection against
1892           this option being confused by leftover garbage in memory that might
1893           look like a DTB header after a reboot if no actual DTB is appended
1894           to zImage.  Do not leave this option active in a production kernel
1895           if you don't intend to always append a DTB.  Proper passing of the
1896           location into r2 of a bootloader provided DTB is always preferable
1897           to this option.
1898
1899 config ARM_ATAG_DTB_COMPAT
1900         bool "Supplement the appended DTB with traditional ATAG information"
1901         depends on ARM_APPENDED_DTB
1902         help
1903           Some old bootloaders can't be updated to a DTB capable one, yet
1904           they provide ATAGs with memory configuration, the ramdisk address,
1905           the kernel cmdline string, etc.  Such information is dynamically
1906           provided by the bootloader and can't always be stored in a static
1907           DTB.  To allow a device tree enabled kernel to be used with such
1908           bootloaders, this option allows zImage to extract the information
1909           from the ATAG list and store it at run time into the appended DTB.
1910
1911 choice
1912         prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1913         default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1914
1915 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1916         bool "Use bootloader kernel arguments if available"
1917         help
1918           Uses the command-line options passed by the boot loader instead of
1919           the device tree bootargs property. If the boot loader doesn't provide
1920           any, the device tree bootargs property will be used.
1921
1922 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1923         bool "Extend with bootloader kernel arguments"
1924         help
1925           The command-line arguments provided by the boot loader will be
1926           appended to the the device tree bootargs property.
1927
1928 endchoice
1929
1930 config CMDLINE
1931         string "Default kernel command string"
1932         default ""
1933         help
1934           On some architectures (EBSA110 and CATS), there is currently no way
1935           for the boot loader to pass arguments to the kernel. For these
1936           architectures, you should supply some command-line options at build
1937           time by entering them here. As a minimum, you should specify the
1938           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1939
1940 choice
1941         prompt "Kernel command line type" if CMDLINE != ""
1942         default CMDLINE_FROM_BOOTLOADER
1943         depends on ATAGS
1944
1945 config CMDLINE_FROM_BOOTLOADER
1946         bool "Use bootloader kernel arguments if available"
1947         help
1948           Uses the command-line options passed by the boot loader. If
1949           the boot loader doesn't provide any, the default kernel command
1950           string provided in CMDLINE will be used.
1951
1952 config CMDLINE_EXTEND
1953         bool "Extend bootloader kernel arguments"
1954         help
1955           The command-line arguments provided by the boot loader will be
1956           appended to the default kernel command string.
1957
1958 config CMDLINE_FORCE
1959         bool "Always use the default kernel command string"
1960         help
1961           Always use the default kernel command string, even if the boot
1962           loader passes other arguments to the kernel.
1963           This is useful if you cannot or don't want to change the
1964           command-line options your boot loader passes to the kernel.
1965 endchoice
1966
1967 config XIP_KERNEL
1968         bool "Kernel Execute-In-Place from ROM"
1969         depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM
1970         help
1971           Execute-In-Place allows the kernel to run from non-volatile storage
1972           directly addressable by the CPU, such as NOR flash. This saves RAM
1973           space since the text section of the kernel is not loaded from flash
1974           to RAM.  Read-write sections, such as the data section and stack,
1975           are still copied to RAM.  The XIP kernel is not compressed since
1976           it has to run directly from flash, so it will take more space to
1977           store it.  The flash address used to link the kernel object files,
1978           and for storing it, is configuration dependent. Therefore, if you
1979           say Y here, you must know the proper physical address where to
1980           store the kernel image depending on your own flash memory usage.
1981
1982           Also note that the make target becomes "make xipImage" rather than
1983           "make zImage" or "make Image".  The final kernel binary to put in
1984           ROM memory will be arch/arm/boot/xipImage.
1985
1986           If unsure, say N.
1987
1988 config XIP_PHYS_ADDR
1989         hex "XIP Kernel Physical Location"
1990         depends on XIP_KERNEL
1991         default "0x00080000"
1992         help
1993           This is the physical address in your flash memory the kernel will
1994           be linked for and stored to.  This address is dependent on your
1995           own flash usage.
1996
1997 config KEXEC
1998         bool "Kexec system call (EXPERIMENTAL)"
1999         depends on (!SMP || HOTPLUG_CPU)
2000         help
2001           kexec is a system call that implements the ability to shutdown your
2002           current kernel, and to start another kernel.  It is like a reboot
2003           but it is independent of the system firmware.   And like a reboot
2004           you can start any kernel with it, not just Linux.
2005
2006           It is an ongoing process to be certain the hardware in a machine
2007           is properly shutdown, so do not be surprised if this code does not
2008           initially work for you.  It may help to enable device hotplugging
2009           support.
2010
2011 config ATAGS_PROC
2012         bool "Export atags in procfs"
2013         depends on ATAGS && KEXEC
2014         default y
2015         help
2016           Should the atags used to boot the kernel be exported in an "atags"
2017           file in procfs. Useful with kexec.
2018
2019 config CRASH_DUMP
2020         bool "Build kdump crash kernel (EXPERIMENTAL)"
2021         help
2022           Generate crash dump after being started by kexec. This should
2023           be normally only set in special crash dump kernels which are
2024           loaded in the main kernel with kexec-tools into a specially
2025           reserved region and then later executed after a crash by
2026           kdump/kexec. The crash dump kernel must be compiled to a
2027           memory address not used by the main kernel
2028
2029           For more details see Documentation/kdump/kdump.txt
2030
2031 config AUTO_ZRELADDR
2032         bool "Auto calculation of the decompressed kernel image address"
2033         depends on !ZBOOT_ROM && !ARCH_U300
2034         help
2035           ZRELADDR is the physical address where the decompressed kernel
2036           image will be placed. If AUTO_ZRELADDR is selected, the address
2037           will be determined at run-time by masking the current IP with
2038           0xf8000000. This assumes the zImage being placed in the first 128MB
2039           from start of memory.
2040
2041 endmenu
2042
2043 menu "CPU Power Management"
2044
2045 if ARCH_HAS_CPUFREQ
2046 source "drivers/cpufreq/Kconfig"
2047
2048 config CPU_FREQ_S3C
2049         bool
2050         help
2051           Internal configuration node for common cpufreq on Samsung SoC
2052
2053 config CPU_FREQ_S3C24XX
2054         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2055         depends on ARCH_S3C24XX && CPU_FREQ
2056         select CPU_FREQ_S3C
2057         help
2058           This enables the CPUfreq driver for the Samsung S3C24XX family
2059           of CPUs.
2060
2061           For details, take a look at <file:Documentation/cpu-freq>.
2062
2063           If in doubt, say N.
2064
2065 config CPU_FREQ_S3C24XX_PLL
2066         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2067         depends on CPU_FREQ_S3C24XX
2068         help
2069           Compile in support for changing the PLL frequency from the
2070           S3C24XX series CPUfreq driver. The PLL takes time to settle
2071           after a frequency change, so by default it is not enabled.
2072
2073           This also means that the PLL tables for the selected CPU(s) will
2074           be built which may increase the size of the kernel image.
2075
2076 config CPU_FREQ_S3C24XX_DEBUG
2077         bool "Debug CPUfreq Samsung driver core"
2078         depends on CPU_FREQ_S3C24XX
2079         help
2080           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2081
2082 config CPU_FREQ_S3C24XX_IODEBUG
2083         bool "Debug CPUfreq Samsung driver IO timing"
2084         depends on CPU_FREQ_S3C24XX
2085         help
2086           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2087
2088 config CPU_FREQ_S3C24XX_DEBUGFS
2089         bool "Export debugfs for CPUFreq"
2090         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2091         help
2092           Export status information via debugfs.
2093
2094 endif
2095
2096 source "drivers/cpuidle/Kconfig"
2097
2098 endmenu
2099
2100 menu "Floating point emulation"
2101
2102 comment "At least one emulation must be selected"
2103
2104 config FPE_NWFPE
2105         bool "NWFPE math emulation"
2106         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2107         ---help---
2108           Say Y to include the NWFPE floating point emulator in the kernel.
2109           This is necessary to run most binaries. Linux does not currently
2110           support floating point hardware so you need to say Y here even if
2111           your machine has an FPA or floating point co-processor podule.
2112
2113           You may say N here if you are going to load the Acorn FPEmulator
2114           early in the bootup.
2115
2116 config FPE_NWFPE_XP
2117         bool "Support extended precision"
2118         depends on FPE_NWFPE
2119         help
2120           Say Y to include 80-bit support in the kernel floating-point
2121           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2122           Note that gcc does not generate 80-bit operations by default,
2123           so in most cases this option only enlarges the size of the
2124           floating point emulator without any good reason.
2125
2126           You almost surely want to say N here.
2127
2128 config FPE_FASTFPE
2129         bool "FastFPE math emulation (EXPERIMENTAL)"
2130         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
2131         ---help---
2132           Say Y here to include the FAST floating point emulator in the kernel.
2133           This is an experimental much faster emulator which now also has full
2134           precision for the mantissa.  It does not support any exceptions.
2135           It is very simple, and approximately 3-6 times faster than NWFPE.
2136
2137           It should be sufficient for most programs.  It may be not suitable
2138           for scientific calculations, but you have to check this for yourself.
2139           If you do not feel you need a faster FP emulation you should better
2140           choose NWFPE.
2141
2142 config VFP
2143         bool "VFP-format floating point maths"
2144         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2145         help
2146           Say Y to include VFP support code in the kernel. This is needed
2147           if your hardware includes a VFP unit.
2148
2149           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2150           release notes and additional status information.
2151
2152           Say N if your target does not have VFP hardware.
2153
2154 config VFPv3
2155         bool
2156         depends on VFP
2157         default y if CPU_V7
2158
2159 config NEON
2160         bool "Advanced SIMD (NEON) Extension support"
2161         depends on VFPv3 && CPU_V7
2162         help
2163           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2164           Extension.
2165
2166 endmenu
2167
2168 menu "Userspace binary formats"
2169
2170 source "fs/Kconfig.binfmt"
2171
2172 config ARTHUR
2173         tristate "RISC OS personality"
2174         depends on !AEABI
2175         help
2176           Say Y here to include the kernel code necessary if you want to run
2177           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2178           experimental; if this sounds frightening, say N and sleep in peace.
2179           You can also say M here to compile this support as a module (which
2180           will be called arthur).
2181
2182 endmenu
2183
2184 menu "Power management options"
2185
2186 source "kernel/power/Kconfig"
2187
2188 config ARCH_SUSPEND_POSSIBLE
2189         depends on !ARCH_S5PC100
2190         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2191                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2192         def_bool y
2193
2194 config ARM_CPU_SUSPEND
2195         def_bool PM_SLEEP
2196
2197 endmenu
2198
2199 source "net/Kconfig"
2200
2201 source "drivers/Kconfig"
2202
2203 source "fs/Kconfig"
2204
2205 source "arch/arm/Kconfig.debug"
2206
2207 source "security/Kconfig"
2208
2209 source "crypto/Kconfig"
2210
2211 source "lib/Kconfig"
2212
2213 source "arch/arm/kvm/Kconfig"