arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if !XIP_KERNEL
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         select GENERIC_IRQ_SHOW
  32         help
  33           The ARM series is a line of low-power-consumption RISC chip designs
  34           licensed by ARM Ltd and targeted at embedded applications and
  35           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  36           manufactured, but legacy ARM-based PC hardware remains popular in
  37           Europe.  There is an ARM Linux project with a web page at
  38           <http://www.arm.linux.org.uk/>.
  39
  40 config ARM_HAS_SG_CHAIN
  41         bool
  42
  43 config HAVE_PWM
  44         bool
  45
  46 config MIGHT_HAVE_PCI
  47         bool
  48
  49 config SYS_SUPPORTS_APM_EMULATION
  50         bool
  51
  52 config HAVE_SCHED_CLOCK
  53         bool
  54
  55 config GENERIC_GPIO
  56         bool
  57
  58 config ARCH_USES_GETTIMEOFFSET
  59         bool
  60         default n
  61
  62 config GENERIC_CLOCKEVENTS
  63         bool
  64
  65 config GENERIC_CLOCKEVENTS_BROADCAST
  66         bool
  67         depends on GENERIC_CLOCKEVENTS
  68         default y if SMP
  69
  70 config KTIME_SCALAR
  71         bool
  72         default y
  73
  74 config HAVE_TCM
  75         bool
  76         select GENERIC_ALLOCATOR
  77
  78 config HAVE_PROC_CPU
  79         bool
  80
  81 config NO_IOPORT
  82         bool
  83
  84 config EISA
  85         bool
  86         ---help---
  87           The Extended Industry Standard Architecture (EISA) bus was
  88           developed as an open alternative to the IBM MicroChannel bus.
  89
  90           The EISA bus provided some of the features of the IBM MicroChannel
  91           bus while maintaining backward compatibility with cards made for
  92           the older ISA bus.  The EISA bus saw limited use between 1988 and
  93           1995 when it was made obsolete by the PCI bus.
  94
  95           Say Y here if you are building a kernel for an EISA-based machine.
  96
  97           Otherwise, say N.
  98
  99 config SBUS
 100         bool
 101
 102 config MCA
 103         bool
 104         help
 105           MicroChannel Architecture is found in some IBM PS/2 machines and
 106           laptops.  It is a bus system similar to PCI or ISA. See
 107           <file:Documentation/mca.txt> (and especially the web page given
 108           there) before attempting to build an MCA bus kernel.
 109
 110 config STACKTRACE_SUPPORT
 111         bool
 112         default y
 113
 114 config HAVE_LATENCYTOP_SUPPORT
 115         bool
 116         depends on !SMP
 117         default y
 118
 119 config LOCKDEP_SUPPORT
 120         bool
 121         default y
 122
 123 config TRACE_IRQFLAGS_SUPPORT
 124         bool
 125         default y
 126
 127 config HARDIRQS_SW_RESEND
 128         bool
 129         default y
 130
 131 config GENERIC_IRQ_PROBE
 132         bool
 133         default y
 134
 135 config GENERIC_LOCKBREAK
 136         bool
 137         default y
 138         depends on SMP && PREEMPT
 139
 140 config RWSEM_GENERIC_SPINLOCK
 141         bool
 142         default y
 143
 144 config RWSEM_XCHGADD_ALGORITHM
 145         bool
 146
 147 config ARCH_HAS_ILOG2_U32
 148         bool
 149
 150 config ARCH_HAS_ILOG2_U64
 151         bool
 152
 153 config ARCH_HAS_CPUFREQ
 154         bool
 155         help
 156           Internal node to signify that the ARCH has CPUFREQ support
 157           and that the relevant menu configurations are displayed for
 158           it.
 159
 160 config ARCH_HAS_CPU_IDLE_WAIT
 161        def_bool y
 162
 163 config GENERIC_HWEIGHT
 164         bool
 165         default y
 166
 167 config GENERIC_CALIBRATE_DELAY
 168         bool
 169         default y
 170
 171 config ARCH_MAY_HAVE_PC_FDC
 172         bool
 173
 174 config ZONE_DMA
 175         bool
 176
 177 config NEED_DMA_MAP_STATE
 178        def_bool y
 179
 180 config GENERIC_ISA_DMA
 181         bool
 182
 183 config FIQ
 184         bool
 185
 186 config ARCH_MTD_XIP
 187         bool
 188
 189 config VECTORS_BASE
 190         hex
 191         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 192         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 193         default 0x00000000
 194         help
 195           The base address of exception vectors.
 196
 197 config ARM_PATCH_PHYS_VIRT
 198         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 199         default y
 200         depends on !XIP_KERNEL && MMU
 201         depends on !ARCH_REALVIEW || !SPARSEMEM
 202         help
 203           Patch phys-to-virt and virt-to-phys translation functions at
 204           boot and module load time according to the position of the
 205           kernel in system memory.
 206
 207           This can only be used with non-XIP MMU kernels where the base
 208           of physical memory is at a 16MB boundary.
 209
 210           Only disable this option if you know that you do not require
 211           this feature (eg, building a kernel for a single machine) and
 212           you need to shrink the kernel to the minimal size.
 213
 214 config NEED_MACH_MEMORY_H
 215         bool
 216         help
 217           Select this when mach/memory.h is required to provide special
 218           definitions for this platform.  The need for mach/memory.h should
 219           be avoided when possible.
 220
 221 config PHYS_OFFSET
 222         hex "Physical address of main memory"
 223         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 224         help
 225           Please provide the physical address corresponding to the
 226           location of main memory in your system.
 227
 228 source "init/Kconfig"
 229
 230 source "kernel/Kconfig.freezer"
 231
 232 menu "System Type"
 233
 234 config MMU
 235         bool "MMU-based Paged Memory Management Support"
 236         default y
 237         help
 238           Select if you want MMU-based virtualised addressing space
 239           support by paged memory management. If unsure, say 'Y'.
 240
 241 #
 242 # The "ARM system type" choice list is ordered alphabetically by option
 243 # text.  Please add new entries in the option alphabetic order.
 244 #
 245 choice
 246         prompt "ARM system type"
 247         default ARCH_VERSATILE
 248
 249 config ARCH_INTEGRATOR
 250         bool "ARM Ltd. Integrator family"
 251         select ARM_AMBA
 252         select ARCH_HAS_CPUFREQ
 253         select CLKDEV_LOOKUP
 254         select HAVE_MACH_CLKDEV
 255         select ICST
 256         select GENERIC_CLOCKEVENTS
 257         select PLAT_VERSATILE
 258         select PLAT_VERSATILE_FPGA_IRQ
 259         select NEED_MACH_MEMORY_H
 260         help
 261           Support for ARM's Integrator platform.
 262
 263 config ARCH_REALVIEW
 264         bool "ARM Ltd. RealView family"
 265         select ARM_AMBA
 266         select CLKDEV_LOOKUP
 267         select HAVE_MACH_CLKDEV
 268         select ICST
 269         select GENERIC_CLOCKEVENTS
 270         select ARCH_WANT_OPTIONAL_GPIOLIB
 271         select PLAT_VERSATILE
 272         select PLAT_VERSATILE_CLCD
 273         select ARM_TIMER_SP804
 274         select GPIO_PL061 if GPIOLIB
 275         select NEED_MACH_MEMORY_H
 276         help
 277           This enables support for ARM Ltd RealView boards.
 278
 279 config ARCH_VERSATILE
 280         bool "ARM Ltd. Versatile family"
 281         select ARM_AMBA
 282         select ARM_VIC
 283         select CLKDEV_LOOKUP
 284         select HAVE_MACH_CLKDEV
 285         select ICST
 286         select GENERIC_CLOCKEVENTS
 287         select ARCH_WANT_OPTIONAL_GPIOLIB
 288         select PLAT_VERSATILE
 289         select PLAT_VERSATILE_CLCD
 290         select PLAT_VERSATILE_FPGA_IRQ
 291         select ARM_TIMER_SP804
 292         help
 293           This enables support for ARM Ltd Versatile board.
 294
 295 config ARCH_VEXPRESS
 296         bool "ARM Ltd. Versatile Express family"
 297         select ARCH_WANT_OPTIONAL_GPIOLIB
 298         select ARM_AMBA
 299         select ARM_TIMER_SP804
 300         select CLKDEV_LOOKUP
 301         select HAVE_MACH_CLKDEV
 302         select GENERIC_CLOCKEVENTS
 303         select HAVE_CLK
 304         select HAVE_PATA_PLATFORM
 305         select ICST
 306         select PLAT_VERSATILE
 307         select PLAT_VERSATILE_CLCD
 308         help
 309           This enables support for the ARM Ltd Versatile Express boards.
 310
 311 config ARCH_AT91
 312         bool "Atmel AT91"
 313         select ARCH_REQUIRE_GPIOLIB
 314         select HAVE_CLK
 315         select CLKDEV_LOOKUP
 316         help
 317           This enables support for systems based on the Atmel AT91RM9200,
 318           AT91SAM9 and AT91CAP9 processors.
 319
 320 config ARCH_BCMRING
 321         bool "Broadcom BCMRING"
 322         depends on MMU
 323         select CPU_V6
 324         select ARM_AMBA
 325         select ARM_TIMER_SP804
 326         select CLKDEV_LOOKUP
 327         select GENERIC_CLOCKEVENTS
 328         select ARCH_WANT_OPTIONAL_GPIOLIB
 329         help
 330           Support for Broadcom's BCMRing platform.
 331
 332 config ARCH_CLPS711X
 333         bool "Cirrus Logic CLPS711x/EP721x-based"
 334         select CPU_ARM720T
 335         select ARCH_USES_GETTIMEOFFSET
 336         select NEED_MACH_MEMORY_H
 337         help
 338           Support for Cirrus Logic 711x/721x based boards.
 339
 340 config ARCH_CNS3XXX
 341         bool "Cavium Networks CNS3XXX family"
 342         select CPU_V6K
 343         select GENERIC_CLOCKEVENTS
 344         select ARM_GIC
 345         select MIGHT_HAVE_PCI
 346         select PCI_DOMAINS if PCI
 347         help
 348           Support for Cavium Networks CNS3XXX platform.
 349
 350 config ARCH_GEMINI
 351         bool "Cortina Systems Gemini"
 352         select CPU_FA526
 353         select ARCH_REQUIRE_GPIOLIB
 354         select ARCH_USES_GETTIMEOFFSET
 355         help
 356           Support for the Cortina Systems Gemini family SoCs
 357
 358 config ARCH_PRIMA2
 359         bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 360         select CPU_V7
 361         select GENERIC_TIME
 362         select NO_IOPORT
 363         select GENERIC_CLOCKEVENTS
 364         select CLKDEV_LOOKUP
 365         select GENERIC_IRQ_CHIP
 366         select USE_OF
 367         select ZONE_DMA
 368         help
 369           Support for CSR SiRFSoC ARM Cortex A9 Platform
 370
 371 config ARCH_EBSA110
 372         bool "EBSA-110"
 373         select CPU_SA110
 374         select ISA
 375         select NO_IOPORT
 376         select ARCH_USES_GETTIMEOFFSET
 377         select NEED_MACH_MEMORY_H
 378         help
 379           This is an evaluation board for the StrongARM processor available
 380           from Digital. It has limited hardware on-board, including an
 381           Ethernet interface, two PCMCIA sockets, two serial ports and a
 382           parallel port.
 383
 384 config ARCH_EP93XX
 385         bool "EP93xx-based"
 386         select CPU_ARM920T
 387         select ARM_AMBA
 388         select ARM_VIC
 389         select CLKDEV_LOOKUP
 390         select ARCH_REQUIRE_GPIOLIB
 391         select ARCH_HAS_HOLES_MEMORYMODEL
 392         select ARCH_USES_GETTIMEOFFSET
 393         select NEED_MEMORY_H
 394         help
 395           This enables support for the Cirrus EP93xx series of CPUs.
 396
 397 config ARCH_FOOTBRIDGE
 398         bool "FootBridge"
 399         select CPU_SA110
 400         select FOOTBRIDGE
 401         select GENERIC_CLOCKEVENTS
 402         select NEED_MACH_MEMORY_H
 403         help
 404           Support for systems based on the DC21285 companion chip
 405           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 406
 407 config ARCH_MXC
 408         bool "Freescale MXC/iMX-based"
 409         select GENERIC_CLOCKEVENTS
 410         select ARCH_REQUIRE_GPIOLIB
 411         select CLKDEV_LOOKUP
 412         select CLKSRC_MMIO
 413         select GENERIC_IRQ_CHIP
 414         select HAVE_SCHED_CLOCK
 415         help
 416           Support for Freescale MXC/iMX-based family of processors
 417
 418 config ARCH_MXS
 419         bool "Freescale MXS-based"
 420         select GENERIC_CLOCKEVENTS
 421         select ARCH_REQUIRE_GPIOLIB
 422         select CLKDEV_LOOKUP
 423         select CLKSRC_MMIO
 424         help
 425           Support for Freescale MXS-based family of processors
 426
 427 config ARCH_NETX
 428         bool "Hilscher NetX based"
 429         select CLKSRC_MMIO
 430         select CPU_ARM926T
 431         select ARM_VIC
 432         select GENERIC_CLOCKEVENTS
 433         help
 434           This enables support for systems based on the Hilscher NetX Soc
 435
 436 config ARCH_H720X
 437         bool "Hynix HMS720x-based"
 438         select CPU_ARM720T
 439         select ISA_DMA_API
 440         select ARCH_USES_GETTIMEOFFSET
 441         help
 442           This enables support for systems based on the Hynix HMS720x
 443
 444 config ARCH_IOP13XX
 445         bool "IOP13xx-based"
 446         depends on MMU
 447         select CPU_XSC3
 448         select PLAT_IOP
 449         select PCI
 450         select ARCH_SUPPORTS_MSI
 451         select VMSPLIT_1G
 452         select NEED_MACH_MEMORY_H
 453         help
 454           Support for Intel's IOP13XX (XScale) family of processors.
 455
 456 config ARCH_IOP32X
 457         bool "IOP32x-based"
 458         depends on MMU
 459         select CPU_XSCALE
 460         select PLAT_IOP
 461         select PCI
 462         select ARCH_REQUIRE_GPIOLIB
 463         help
 464           Support for Intel's 80219 and IOP32X (XScale) family of
 465           processors.
 466
 467 config ARCH_IOP33X
 468         bool "IOP33x-based"
 469         depends on MMU
 470         select CPU_XSCALE
 471         select PLAT_IOP
 472         select PCI
 473         select ARCH_REQUIRE_GPIOLIB
 474         help
 475           Support for Intel's IOP33X (XScale) family of processors.
 476
 477 config ARCH_IXP23XX
 478         bool "IXP23XX-based"
 479         depends on MMU
 480         select CPU_XSC3
 481         select PCI
 482         select ARCH_USES_GETTIMEOFFSET
 483         select NEED_MACH_MEMORY_H
 484         help
 485           Support for Intel's IXP23xx (XScale) family of processors.
 486
 487 config ARCH_IXP2000
 488         bool "IXP2400/2800-based"
 489         depends on MMU
 490         select CPU_XSCALE
 491         select PCI
 492         select ARCH_USES_GETTIMEOFFSET
 493         select NEED_MACH_MEMORY_H
 494         help
 495           Support for Intel's IXP2400/2800 (XScale) family of processors.
 496
 497 config ARCH_IXP4XX
 498         bool "IXP4xx-based"
 499         depends on MMU
 500         select CLKSRC_MMIO
 501         select CPU_XSCALE
 502         select GENERIC_GPIO
 503         select GENERIC_CLOCKEVENTS
 504         select HAVE_SCHED_CLOCK
 505         select MIGHT_HAVE_PCI
 506         select DMABOUNCE if PCI
 507         help
 508           Support for Intel's IXP4XX (XScale) family of processors.
 509
 510 config ARCH_DOVE
 511         bool "Marvell Dove"
 512         select CPU_V7
 513         select PCI
 514         select ARCH_REQUIRE_GPIOLIB
 515         select GENERIC_CLOCKEVENTS
 516         select PLAT_ORION
 517         help
 518           Support for the Marvell Dove SoC 88AP510
 519
 520 config ARCH_KIRKWOOD
 521         bool "Marvell Kirkwood"
 522         select CPU_FEROCEON
 523         select PCI
 524         select ARCH_REQUIRE_GPIOLIB
 525         select GENERIC_CLOCKEVENTS
 526         select PLAT_ORION
 527         help
 528           Support for the following Marvell Kirkwood series SoCs:
 529           88F6180, 88F6192 and 88F6281.
 530
 531 config ARCH_LPC32XX
 532         bool "NXP LPC32XX"
 533         select CLKSRC_MMIO
 534         select CPU_ARM926T
 535         select ARCH_REQUIRE_GPIOLIB
 536         select HAVE_IDE
 537         select ARM_AMBA
 538         select USB_ARCH_HAS_OHCI
 539         select CLKDEV_LOOKUP
 540         select GENERIC_TIME
 541         select GENERIC_CLOCKEVENTS
 542         help
 543           Support for the NXP LPC32XX family of processors
 544
 545 config ARCH_MV78XX0
 546         bool "Marvell MV78xx0"
 547         select CPU_FEROCEON
 548         select PCI
 549         select ARCH_REQUIRE_GPIOLIB
 550         select GENERIC_CLOCKEVENTS
 551         select PLAT_ORION
 552         help
 553           Support for the following Marvell MV78xx0 series SoCs:
 554           MV781x0, MV782x0.
 555
 556 config ARCH_ORION5X
 557         bool "Marvell Orion"
 558         depends on MMU
 559         select CPU_FEROCEON
 560         select PCI
 561         select ARCH_REQUIRE_GPIOLIB
 562         select GENERIC_CLOCKEVENTS
 563         select PLAT_ORION
 564         help
 565           Support for the following Marvell Orion 5x series SoCs:
 566           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 567           Orion-2 (5281), Orion-1-90 (6183).
 568
 569 config ARCH_MMP
 570         bool "Marvell PXA168/910/MMP2"
 571         depends on MMU
 572         select ARCH_REQUIRE_GPIOLIB
 573         select CLKDEV_LOOKUP
 574         select GENERIC_CLOCKEVENTS
 575         select HAVE_SCHED_CLOCK
 576         select TICK_ONESHOT
 577         select PLAT_PXA
 578         select SPARSE_IRQ
 579         help
 580           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 581
 582 config ARCH_KS8695
 583         bool "Micrel/Kendin KS8695"
 584         select CPU_ARM922T
 585         select ARCH_REQUIRE_GPIOLIB
 586         select ARCH_USES_GETTIMEOFFSET
 587         select NEED_MACH_MEMORY_H
 588         help
 589           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 590           System-on-Chip devices.
 591
 592 config ARCH_W90X900
 593         bool "Nuvoton W90X900 CPU"
 594         select CPU_ARM926T
 595         select ARCH_REQUIRE_GPIOLIB
 596         select CLKDEV_LOOKUP
 597         select CLKSRC_MMIO
 598         select GENERIC_CLOCKEVENTS
 599         help
 600           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 601           At present, the w90x900 has been renamed nuc900, regarding
 602           the ARM series product line, you can login the following
 603           link address to know more.
 604
 605           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 606                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 607
 608 config ARCH_NUC93X
 609         bool "Nuvoton NUC93X CPU"
 610         select CPU_ARM926T
 611         select CLKDEV_LOOKUP
 612         help
 613           Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
 614           low-power and high performance MPEG-4/JPEG multimedia controller chip.
 615
 616 config ARCH_TEGRA
 617         bool "NVIDIA Tegra"
 618         select CLKDEV_LOOKUP
 619         select CLKSRC_MMIO
 620         select GENERIC_TIME
 621         select GENERIC_CLOCKEVENTS
 622         select GENERIC_GPIO
 623         select HAVE_CLK
 624         select HAVE_SCHED_CLOCK
 625         select ARCH_HAS_CPUFREQ
 626         help
 627           This enables support for NVIDIA Tegra based systems (Tegra APX,
 628           Tegra 6xx and Tegra 2 series).
 629
 630 config ARCH_PNX4008
 631         bool "Philips Nexperia PNX4008 Mobile"
 632         select CPU_ARM926T
 633         select CLKDEV_LOOKUP
 634         select ARCH_USES_GETTIMEOFFSET
 635         help
 636           This enables support for Philips PNX4008 mobile platform.
 637
 638 config ARCH_PXA
 639         bool "PXA2xx/PXA3xx-based"
 640         depends on MMU
 641         select ARCH_MTD_XIP
 642         select ARCH_HAS_CPUFREQ
 643         select CLKDEV_LOOKUP
 644         select CLKSRC_MMIO
 645         select ARCH_REQUIRE_GPIOLIB
 646         select GENERIC_CLOCKEVENTS
 647         select HAVE_SCHED_CLOCK
 648         select TICK_ONESHOT
 649         select PLAT_PXA
 650         select SPARSE_IRQ
 651         select AUTO_ZRELADDR
 652         select MULTI_IRQ_HANDLER
 653         help
 654           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 655
 656 config ARCH_MSM
 657         bool "Qualcomm MSM"
 658         select HAVE_CLK
 659         select GENERIC_CLOCKEVENTS
 660         select ARCH_REQUIRE_GPIOLIB
 661         select CLKDEV_LOOKUP
 662         help
 663           Support for Qualcomm MSM/QSD based systems.  This runs on the
 664           apps processor of the MSM/QSD and depends on a shared memory
 665           interface to the modem processor which runs the baseband
 666           stack and controls some vital subsystems
 667           (clock and power control, etc).
 668
 669 config ARCH_SHMOBILE
 670         bool "Renesas SH-Mobile / R-Mobile"
 671         select HAVE_CLK
 672         select CLKDEV_LOOKUP
 673         select HAVE_MACH_CLKDEV
 674         select GENERIC_CLOCKEVENTS
 675         select NO_IOPORT
 676         select SPARSE_IRQ
 677         select MULTI_IRQ_HANDLER
 678         select PM_GENERIC_DOMAINS if PM
 679         select NEED_MACH_MEMORY_H
 680         help
 681           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 682
 683 config ARCH_RPC
 684         bool "RiscPC"
 685         select ARCH_ACORN
 686         select FIQ
 687         select TIMER_ACORN
 688         select ARCH_MAY_HAVE_PC_FDC
 689         select HAVE_PATA_PLATFORM
 690         select ISA_DMA_API
 691         select NO_IOPORT
 692         select ARCH_SPARSEMEM_ENABLE
 693         select ARCH_USES_GETTIMEOFFSET
 694         select NEED_MACH_MEMORY_H
 695         help
 696           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 697           CD-ROM interface, serial and parallel port, and the floppy drive.
 698
 699 config ARCH_SA1100
 700         bool "SA1100-based"
 701         select CLKSRC_MMIO
 702         select CPU_SA1100
 703         select ISA
 704         select ARCH_SPARSEMEM_ENABLE
 705         select ARCH_MTD_XIP
 706         select ARCH_HAS_CPUFREQ
 707         select CPU_FREQ
 708         select GENERIC_CLOCKEVENTS
 709         select HAVE_CLK
 710         select HAVE_SCHED_CLOCK
 711         select TICK_ONESHOT
 712         select ARCH_REQUIRE_GPIOLIB
 713         select NEED_MACH_MEMORY_H
 714         help
 715           Support for StrongARM 11x0 based boards.
 716
 717 config ARCH_S3C2410
 718         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 719         select GENERIC_GPIO
 720         select ARCH_HAS_CPUFREQ
 721         select HAVE_CLK
 722         select CLKDEV_LOOKUP
 723         select ARCH_USES_GETTIMEOFFSET
 724         select HAVE_S3C2410_I2C if I2C
 725         help
 726           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 727           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 728           the Samsung SMDK2410 development board (and derivatives).
 729
 730           Note, the S3C2416 and the S3C2450 are so close that they even share
 731           the same SoC ID code. This means that there is no separate machine
 732           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 733
 734 config ARCH_S3C64XX
 735         bool "Samsung S3C64XX"
 736         select PLAT_SAMSUNG
 737         select CPU_V6
 738         select ARM_VIC
 739         select HAVE_CLK
 740         select CLKDEV_LOOKUP
 741         select NO_IOPORT
 742         select ARCH_USES_GETTIMEOFFSET
 743         select ARCH_HAS_CPUFREQ
 744         select ARCH_REQUIRE_GPIOLIB
 745         select SAMSUNG_CLKSRC
 746         select SAMSUNG_IRQ_VIC_TIMER
 747         select SAMSUNG_IRQ_UART
 748         select S3C_GPIO_TRACK
 749         select S3C_GPIO_PULL_UPDOWN
 750         select S3C_GPIO_CFG_S3C24XX
 751         select S3C_GPIO_CFG_S3C64XX
 752         select S3C_DEV_NAND
 753         select USB_ARCH_HAS_OHCI
 754         select SAMSUNG_GPIOLIB_4BIT
 755         select HAVE_S3C2410_I2C if I2C
 756         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 757         help
 758           Samsung S3C64XX series based systems
 759
 760 config ARCH_S5P64X0
 761         bool "Samsung S5P6440 S5P6450"
 762         select CPU_V6
 763         select GENERIC_GPIO
 764         select HAVE_CLK
 765         select CLKDEV_LOOKUP
 766         select CLKSRC_MMIO
 767         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 768         select GENERIC_CLOCKEVENTS
 769         select HAVE_SCHED_CLOCK
 770         select HAVE_S3C2410_I2C if I2C
 771         select HAVE_S3C_RTC if RTC_CLASS
 772         help
 773           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 774           SMDK6450.
 775
 776 config ARCH_S5PC100
 777         bool "Samsung S5PC100"
 778         select GENERIC_GPIO
 779         select HAVE_CLK
 780         select CLKDEV_LOOKUP
 781         select CPU_V7
 782         select ARM_L1_CACHE_SHIFT_6
 783         select ARCH_USES_GETTIMEOFFSET
 784         select HAVE_S3C2410_I2C if I2C
 785         select HAVE_S3C_RTC if RTC_CLASS
 786         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 787         help
 788           Samsung S5PC100 series based systems
 789
 790 config ARCH_S5PV210
 791         bool "Samsung S5PV210/S5PC110"
 792         select CPU_V7
 793         select ARCH_SPARSEMEM_ENABLE
 794         select ARCH_HAS_HOLES_MEMORYMODEL
 795         select GENERIC_GPIO
 796         select HAVE_CLK
 797         select CLKDEV_LOOKUP
 798         select CLKSRC_MMIO
 799         select ARM_L1_CACHE_SHIFT_6
 800         select ARCH_HAS_CPUFREQ
 801         select GENERIC_CLOCKEVENTS
 802         select HAVE_SCHED_CLOCK
 803         select HAVE_S3C2410_I2C if I2C
 804         select HAVE_S3C_RTC if RTC_CLASS
 805         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 806         select NEED_MACH_MEMORY_H
 807         help
 808           Samsung S5PV210/S5PC110 series based systems
 809
 810 config ARCH_EXYNOS4
 811         bool "Samsung EXYNOS4"
 812         select CPU_V7
 813         select ARCH_SPARSEMEM_ENABLE
 814         select ARCH_HAS_HOLES_MEMORYMODEL
 815         select GENERIC_GPIO
 816         select HAVE_CLK
 817         select CLKDEV_LOOKUP
 818         select ARCH_HAS_CPUFREQ
 819         select GENERIC_CLOCKEVENTS
 820         select HAVE_S3C_RTC if RTC_CLASS
 821         select HAVE_S3C2410_I2C if I2C
 822         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 823         select NEED_MACH_MEMORY_H
 824         help
 825           Samsung EXYNOS4 series based systems
 826
 827 config ARCH_SHARK
 828         bool "Shark"
 829         select CPU_SA110
 830         select ISA
 831         select ISA_DMA
 832         select ZONE_DMA
 833         select PCI
 834         select ARCH_USES_GETTIMEOFFSET
 835         select NEED_MACH_MEMORY_H
 836         help
 837           Support for the StrongARM based Digital DNARD machine, also known
 838           as "Shark" (<http://www.shark-linux.de/shark.html>).
 839
 840 config ARCH_TCC_926
 841         bool "Telechips TCC ARM926-based systems"
 842         select CLKSRC_MMIO
 843         select CPU_ARM926T
 844         select HAVE_CLK
 845         select CLKDEV_LOOKUP
 846         select GENERIC_CLOCKEVENTS
 847         help
 848           Support for Telechips TCC ARM926-based systems.
 849
 850 config ARCH_U300
 851         bool "ST-Ericsson U300 Series"
 852         depends on MMU
 853         select CLKSRC_MMIO
 854         select CPU_ARM926T
 855         select HAVE_SCHED_CLOCK
 856         select HAVE_TCM
 857         select ARM_AMBA
 858         select ARM_VIC
 859         select GENERIC_CLOCKEVENTS
 860         select CLKDEV_LOOKUP
 861         select HAVE_MACH_CLKDEV
 862         select GENERIC_GPIO
 863         select NEED_MACH_MEMORY_H
 864         help
 865           Support for ST-Ericsson U300 series mobile platforms.
 866
 867 config ARCH_U8500
 868         bool "ST-Ericsson U8500 Series"
 869         select CPU_V7
 870         select ARM_AMBA
 871         select GENERIC_CLOCKEVENTS
 872         select CLKDEV_LOOKUP
 873         select ARCH_REQUIRE_GPIOLIB
 874         select ARCH_HAS_CPUFREQ
 875         help
 876           Support for ST-Ericsson's Ux500 architecture
 877
 878 config ARCH_NOMADIK
 879         bool "STMicroelectronics Nomadik"
 880         select ARM_AMBA
 881         select ARM_VIC
 882         select CPU_ARM926T
 883         select CLKDEV_LOOKUP
 884         select GENERIC_CLOCKEVENTS
 885         select ARCH_REQUIRE_GPIOLIB
 886         help
 887           Support for the Nomadik platform by ST-Ericsson
 888
 889 config ARCH_DAVINCI
 890         bool "TI DaVinci"
 891         select GENERIC_CLOCKEVENTS
 892         select ARCH_REQUIRE_GPIOLIB
 893         select ZONE_DMA
 894         select HAVE_IDE
 895         select CLKDEV_LOOKUP
 896         select GENERIC_ALLOCATOR
 897         select GENERIC_IRQ_CHIP
 898         select ARCH_HAS_HOLES_MEMORYMODEL
 899         help
 900           Support for TI's DaVinci platform.
 901
 902 config ARCH_OMAP
 903         bool "TI OMAP"
 904         select HAVE_CLK
 905         select ARCH_REQUIRE_GPIOLIB
 906         select ARCH_HAS_CPUFREQ
 907         select CLKSRC_MMIO
 908         select GENERIC_CLOCKEVENTS
 909         select HAVE_SCHED_CLOCK
 910         select ARCH_HAS_HOLES_MEMORYMODEL
 911         help
 912           Support for TI's OMAP platform (OMAP1/2/3/4).
 913
 914 config PLAT_SPEAR
 915         bool "ST SPEAr"
 916         select ARM_AMBA
 917         select ARCH_REQUIRE_GPIOLIB
 918         select CLKDEV_LOOKUP
 919         select CLKSRC_MMIO
 920         select GENERIC_CLOCKEVENTS
 921         select HAVE_CLK
 922         help
 923           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 924
 925 config ARCH_VT8500
 926         bool "VIA/WonderMedia 85xx"
 927         select CPU_ARM926T
 928         select GENERIC_GPIO
 929         select ARCH_HAS_CPUFREQ
 930         select GENERIC_CLOCKEVENTS
 931         select ARCH_REQUIRE_GPIOLIB
 932         select HAVE_PWM
 933         help
 934           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 935
 936 config ARCH_ZYNQ
 937         bool "Xilinx Zynq ARM Cortex A9 Platform"
 938         select CPU_V7
 939         select GENERIC_TIME
 940         select GENERIC_CLOCKEVENTS
 941         select CLKDEV_LOOKUP
 942         select ARM_GIC
 943         select ARM_AMBA
 944         select ICST
 945         select USE_OF
 946         help
 947           Support for Xilinx Zynq ARM Cortex A9 Platform
 948 endchoice
 949
 950 #
 951 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 952 # Kconfigs may be included either alphabetically (according to the
 953 # plat- suffix) or along side the corresponding mach-* source.
 954 #
 955 source "arch/arm/mach-at91/Kconfig"
 956
 957 source "arch/arm/mach-bcmring/Kconfig"
 958
 959 source "arch/arm/mach-clps711x/Kconfig"
 960
 961 source "arch/arm/mach-cns3xxx/Kconfig"
 962
 963 source "arch/arm/mach-davinci/Kconfig"
 964
 965 source "arch/arm/mach-dove/Kconfig"
 966
 967 source "arch/arm/mach-ep93xx/Kconfig"
 968
 969 source "arch/arm/mach-footbridge/Kconfig"
 970
 971 source "arch/arm/mach-gemini/Kconfig"
 972
 973 source "arch/arm/mach-h720x/Kconfig"
 974
 975 source "arch/arm/mach-integrator/Kconfig"
 976
 977 source "arch/arm/mach-iop32x/Kconfig"
 978
 979 source "arch/arm/mach-iop33x/Kconfig"
 980
 981 source "arch/arm/mach-iop13xx/Kconfig"
 982
 983 source "arch/arm/mach-ixp4xx/Kconfig"
 984
 985 source "arch/arm/mach-ixp2000/Kconfig"
 986
 987 source "arch/arm/mach-ixp23xx/Kconfig"
 988
 989 source "arch/arm/mach-kirkwood/Kconfig"
 990
 991 source "arch/arm/mach-ks8695/Kconfig"
 992
 993 source "arch/arm/mach-lpc32xx/Kconfig"
 994
 995 source "arch/arm/mach-msm/Kconfig"
 996
 997 source "arch/arm/mach-mv78xx0/Kconfig"
 998
 999 source "arch/arm/plat-mxc/Kconfig"
1000
1001 source "arch/arm/mach-mxs/Kconfig"
1002
1003 source "arch/arm/mach-netx/Kconfig"
1004
1005 source "arch/arm/mach-nomadik/Kconfig"
1006 source "arch/arm/plat-nomadik/Kconfig"
1007
1008 source "arch/arm/mach-nuc93x/Kconfig"
1009
1010 source "arch/arm/plat-omap/Kconfig"
1011
1012 source "arch/arm/mach-omap1/Kconfig"
1013
1014 source "arch/arm/mach-omap2/Kconfig"
1015
1016 source "arch/arm/mach-orion5x/Kconfig"
1017
1018 source "arch/arm/mach-pxa/Kconfig"
1019 source "arch/arm/plat-pxa/Kconfig"
1020
1021 source "arch/arm/mach-mmp/Kconfig"
1022
1023 source "arch/arm/mach-realview/Kconfig"
1024
1025 source "arch/arm/mach-sa1100/Kconfig"
1026
1027 source "arch/arm/plat-samsung/Kconfig"
1028 source "arch/arm/plat-s3c24xx/Kconfig"
1029 source "arch/arm/plat-s5p/Kconfig"
1030
1031 source "arch/arm/plat-spear/Kconfig"
1032
1033 source "arch/arm/plat-tcc/Kconfig"
1034
1035 if ARCH_S3C2410
1036 source "arch/arm/mach-s3c2410/Kconfig"
1037 source "arch/arm/mach-s3c2412/Kconfig"
1038 source "arch/arm/mach-s3c2416/Kconfig"
1039 source "arch/arm/mach-s3c2440/Kconfig"
1040 source "arch/arm/mach-s3c2443/Kconfig"
1041 endif
1042
1043 if ARCH_S3C64XX
1044 source "arch/arm/mach-s3c64xx/Kconfig"
1045 endif
1046
1047 source "arch/arm/mach-s5p64x0/Kconfig"
1048
1049 source "arch/arm/mach-s5pc100/Kconfig"
1050
1051 source "arch/arm/mach-s5pv210/Kconfig"
1052
1053 source "arch/arm/mach-exynos4/Kconfig"
1054
1055 source "arch/arm/mach-shmobile/Kconfig"
1056
1057 source "arch/arm/mach-tegra/Kconfig"
1058
1059 source "arch/arm/mach-u300/Kconfig"
1060
1061 source "arch/arm/mach-ux500/Kconfig"
1062
1063 source "arch/arm/mach-versatile/Kconfig"
1064
1065 source "arch/arm/mach-vexpress/Kconfig"
1066 source "arch/arm/plat-versatile/Kconfig"
1067
1068 source "arch/arm/mach-vt8500/Kconfig"
1069
1070 source "arch/arm/mach-w90x900/Kconfig"
1071
1072 # Definitions to make life easier
1073 config ARCH_ACORN
1074         bool
1075
1076 config PLAT_IOP
1077         bool
1078         select GENERIC_CLOCKEVENTS
1079         select HAVE_SCHED_CLOCK
1080
1081 config PLAT_ORION
1082         bool
1083         select CLKSRC_MMIO
1084         select GENERIC_IRQ_CHIP
1085         select HAVE_SCHED_CLOCK
1086
1087 config PLAT_PXA
1088         bool
1089
1090 config PLAT_VERSATILE
1091         bool
1092
1093 config ARM_TIMER_SP804
1094         bool
1095         select CLKSRC_MMIO
1096
1097 source arch/arm/mm/Kconfig
1098
1099 config IWMMXT
1100         bool "Enable iWMMXt support"
1101         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1102         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1103         help
1104           Enable support for iWMMXt context switching at run time if
1105           running on a CPU that supports it.
1106
1107 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1108 config XSCALE_PMU
1109         bool
1110         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1111         default y
1112
1113 config CPU_HAS_PMU
1114         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1115                    (!ARCH_OMAP3 || OMAP3_EMU)
1116         default y
1117         bool
1118
1119 config MULTI_IRQ_HANDLER
1120         bool
1121         help
1122           Allow each machine to specify it's own IRQ handler at run time.
1123
1124 if !MMU
1125 source "arch/arm/Kconfig-nommu"
1126 endif
1127
1128 config ARM_ERRATA_411920
1129         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1130         depends on CPU_V6 || CPU_V6K
1131         help
1132           Invalidation of the Instruction Cache operation can
1133           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1134           It does not affect the MPCore. This option enables the ARM Ltd.
1135           recommended workaround.
1136
1137 config ARM_ERRATA_430973
1138         bool "ARM errata: Stale prediction on replaced interworking branch"
1139         depends on CPU_V7
1140         help
1141           This option enables the workaround for the 430973 Cortex-A8
1142           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1143           interworking branch is replaced with another code sequence at the
1144           same virtual address, whether due to self-modifying code or virtual
1145           to physical address re-mapping, Cortex-A8 does not recover from the
1146           stale interworking branch prediction. This results in Cortex-A8
1147           executing the new code sequence in the incorrect ARM or Thumb state.
1148           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1149           and also flushes the branch target cache at every context switch.
1150           Note that setting specific bits in the ACTLR register may not be
1151           available in non-secure mode.
1152
1153 config ARM_ERRATA_458693
1154         bool "ARM errata: Processor deadlock when a false hazard is created"
1155         depends on CPU_V7
1156         help
1157           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1158           erratum. For very specific sequences of memory operations, it is
1159           possible for a hazard condition intended for a cache line to instead
1160           be incorrectly associated with a different cache line. This false
1161           hazard might then cause a processor deadlock. The workaround enables
1162           the L1 caching of the NEON accesses and disables the PLD instruction
1163           in the ACTLR register. Note that setting specific bits in the ACTLR
1164           register may not be available in non-secure mode.
1165
1166 config ARM_ERRATA_460075
1167         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1168         depends on CPU_V7
1169         help
1170           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1171           erratum. Any asynchronous access to the L2 cache may encounter a
1172           situation in which recent store transactions to the L2 cache are lost
1173           and overwritten with stale memory contents from external memory. The
1174           workaround disables the write-allocate mode for the L2 cache via the
1175           ACTLR register. Note that setting specific bits in the ACTLR register
1176           may not be available in non-secure mode.
1177
1178 config ARM_ERRATA_742230
1179         bool "ARM errata: DMB operation may be faulty"
1180         depends on CPU_V7 && SMP
1181         help
1182           This option enables the workaround for the 742230 Cortex-A9
1183           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1184           between two write operations may not ensure the correct visibility
1185           ordering of the two writes. This workaround sets a specific bit in
1186           the diagnostic register of the Cortex-A9 which causes the DMB
1187           instruction to behave as a DSB, ensuring the correct behaviour of
1188           the two writes.
1189
1190 config ARM_ERRATA_742231
1191         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1192         depends on CPU_V7 && SMP
1193         help
1194           This option enables the workaround for the 742231 Cortex-A9
1195           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1196           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1197           accessing some data located in the same cache line, may get corrupted
1198           data due to bad handling of the address hazard when the line gets
1199           replaced from one of the CPUs at the same time as another CPU is
1200           accessing it. This workaround sets specific bits in the diagnostic
1201           register of the Cortex-A9 which reduces the linefill issuing
1202           capabilities of the processor.
1203
1204 config PL310_ERRATA_588369
1205         bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1206         depends on CACHE_L2X0
1207         help
1208            The PL310 L2 cache controller implements three types of Clean &
1209            Invalidate maintenance operations: by Physical Address
1210            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1211            They are architecturally defined to behave as the execution of a
1212            clean operation followed immediately by an invalidate operation,
1213            both performing to the same memory location. This functionality
1214            is not correctly implemented in PL310 as clean lines are not
1215            invalidated as a result of these operations.
1216
1217 config ARM_ERRATA_720789
1218         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1219         depends on CPU_V7 && SMP
1220         help
1221           This option enables the workaround for the 720789 Cortex-A9 (prior to
1222           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1223           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1224           As a consequence of this erratum, some TLB entries which should be
1225           invalidated are not, resulting in an incoherency in the system page
1226           tables. The workaround changes the TLB flushing routines to invalidate
1227           entries regardless of the ASID.
1228
1229 config PL310_ERRATA_727915
1230         bool "Background Clean & Invalidate by Way operation can cause data corruption"
1231         depends on CACHE_L2X0
1232         help
1233           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1234           operation (offset 0x7FC). This operation runs in background so that
1235           PL310 can handle normal accesses while it is in progress. Under very
1236           rare circumstances, due to this erratum, write data can be lost when
1237           PL310 treats a cacheable write transaction during a Clean &
1238           Invalidate by Way operation.
1239
1240 config ARM_ERRATA_743622
1241         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1242         depends on CPU_V7
1243         help
1244           This option enables the workaround for the 743622 Cortex-A9
1245           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1246           optimisation in the Cortex-A9 Store Buffer may lead to data
1247           corruption. This workaround sets a specific bit in the diagnostic
1248           register of the Cortex-A9 which disables the Store Buffer
1249           optimisation, preventing the defect from occurring. This has no
1250           visible impact on the overall performance or power consumption of the
1251           processor.
1252
1253 config ARM_ERRATA_751472
1254         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1255         depends on CPU_V7 && SMP
1256         help
1257           This option enables the workaround for the 751472 Cortex-A9 (prior
1258           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1259           completion of a following broadcasted operation if the second
1260           operation is received by a CPU before the ICIALLUIS has completed,
1261           potentially leading to corrupted entries in the cache or TLB.
1262
1263 config ARM_ERRATA_753970
1264         bool "ARM errata: cache sync operation may be faulty"
1265         depends on CACHE_PL310
1266         help
1267           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1268
1269           Under some condition the effect of cache sync operation on
1270           the store buffer still remains when the operation completes.
1271           This means that the store buffer is always asked to drain and
1272           this prevents it from merging any further writes. The workaround
1273           is to replace the normal offset of cache sync operation (0x730)
1274           by another offset targeting an unmapped PL310 register 0x740.
1275           This has the same effect as the cache sync operation: store buffer
1276           drain and waiting for all buffers empty.
1277
1278 config ARM_ERRATA_754322
1279         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1280         depends on CPU_V7
1281         help
1282           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1283           r3p*) erratum. A speculative memory access may cause a page table walk
1284           which starts prior to an ASID switch but completes afterwards. This
1285           can populate the micro-TLB with a stale entry which may be hit with
1286           the new ASID. This workaround places two dsb instructions in the mm
1287           switching code so that no page table walks can cross the ASID switch.
1288
1289 config ARM_ERRATA_754327
1290         bool "ARM errata: no automatic Store Buffer drain"
1291         depends on CPU_V7 && SMP
1292         help
1293           This option enables the workaround for the 754327 Cortex-A9 (prior to
1294           r2p0) erratum. The Store Buffer does not have any automatic draining
1295           mechanism and therefore a livelock may occur if an external agent
1296           continuously polls a memory location waiting to observe an update.
1297           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1298           written polling loops from denying visibility of updates to memory.
1299
1300 endmenu
1301
1302 source "arch/arm/common/Kconfig"
1303
1304 menu "Bus support"
1305
1306 config ARM_AMBA
1307         bool
1308
1309 config ISA
1310         bool
1311         help
1312           Find out whether you have ISA slots on your motherboard.  ISA is the
1313           name of a bus system, i.e. the way the CPU talks to the other stuff
1314           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1315           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1316           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1317
1318 # Select ISA DMA controller support
1319 config ISA_DMA
1320         bool
1321         select ISA_DMA_API
1322
1323 # Select ISA DMA interface
1324 config ISA_DMA_API
1325         bool
1326
1327 config PCI
1328         bool "PCI support" if MIGHT_HAVE_PCI
1329         help
1330           Find out whether you have a PCI motherboard. PCI is the name of a
1331           bus system, i.e. the way the CPU talks to the other stuff inside
1332           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1333           VESA. If you have PCI, say Y, otherwise N.
1334
1335 config PCI_DOMAINS
1336         bool
1337         depends on PCI
1338
1339 config PCI_NANOENGINE
1340         bool "BSE nanoEngine PCI support"
1341         depends on SA1100_NANOENGINE
1342         help
1343           Enable PCI on the BSE nanoEngine board.
1344
1345 config PCI_SYSCALL
1346         def_bool PCI
1347
1348 # Select the host bridge type
1349 config PCI_HOST_VIA82C505
1350         bool
1351         depends on PCI && ARCH_SHARK
1352         default y
1353
1354 config PCI_HOST_ITE8152
1355         bool
1356         depends on PCI && MACH_ARMCORE
1357         default y
1358         select DMABOUNCE
1359
1360 source "drivers/pci/Kconfig"
1361
1362 source "drivers/pcmcia/Kconfig"
1363
1364 endmenu
1365
1366 menu "Kernel Features"
1367
1368 source "kernel/time/Kconfig"
1369
1370 config SMP
1371         bool "Symmetric Multi-Processing"
1372         depends on CPU_V6K || CPU_V7
1373         depends on GENERIC_CLOCKEVENTS
1374         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1375                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1376                  ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1377                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1378         select USE_GENERIC_SMP_HELPERS
1379         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1380         help
1381           This enables support for systems with more than one CPU. If you have
1382           a system with only one CPU, like most personal computers, say N. If
1383           you have a system with more than one CPU, say Y.
1384
1385           If you say N here, the kernel will run on single and multiprocessor
1386           machines, but will use only one CPU of a multiprocessor machine. If
1387           you say Y here, the kernel will run on many, but not all, single
1388           processor machines. On a single processor machine, the kernel will
1389           run faster if you say N here.
1390
1391           See also <file:Documentation/i386/IO-APIC.txt>,
1392           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1393           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1394
1395           If you don't know what to do here, say N.
1396
1397 config SMP_ON_UP
1398         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1399         depends on EXPERIMENTAL
1400         depends on SMP && !XIP_KERNEL
1401         default y
1402         help
1403           SMP kernels contain instructions which fail on non-SMP processors.
1404           Enabling this option allows the kernel to modify itself to make
1405           these instructions safe.  Disabling it allows about 1K of space
1406           savings.
1407
1408           If you don't know what to do here, say Y.
1409
1410 config HAVE_ARM_SCU
1411         bool
1412         help
1413           This option enables support for the ARM system coherency unit
1414
1415 config HAVE_ARM_TWD
1416         bool
1417         depends on SMP
1418         select TICK_ONESHOT
1419         help
1420           This options enables support for the ARM timer and watchdog unit
1421
1422 choice
1423         prompt "Memory split"
1424         default VMSPLIT_3G
1425         help
1426           Select the desired split between kernel and user memory.
1427
1428           If you are not absolutely sure what you are doing, leave this
1429           option alone!
1430
1431         config VMSPLIT_3G
1432                 bool "3G/1G user/kernel split"
1433         config VMSPLIT_2G
1434                 bool "2G/2G user/kernel split"
1435         config VMSPLIT_1G
1436                 bool "1G/3G user/kernel split"
1437 endchoice
1438
1439 config PAGE_OFFSET
1440         hex
1441         default 0x40000000 if VMSPLIT_1G
1442         default 0x80000000 if VMSPLIT_2G
1443         default 0xC0000000
1444
1445 config NR_CPUS
1446         int "Maximum number of CPUs (2-32)"
1447         range 2 32
1448         depends on SMP
1449         default "4"
1450
1451 config HOTPLUG_CPU
1452         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1453         depends on SMP && HOTPLUG && EXPERIMENTAL
1454         help
1455           Say Y here to experiment with turning CPUs off and on.  CPUs
1456           can be controlled through /sys/devices/system/cpu.
1457
1458 config LOCAL_TIMERS
1459         bool "Use local timer interrupts"
1460         depends on SMP
1461         default y
1462         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1463         help
1464           Enable support for local timers on SMP platforms, rather then the
1465           legacy IPI broadcast method.  Local timers allows the system
1466           accounting to be spread across the timer interval, preventing a
1467           "thundering herd" at every timer tick.
1468
1469 source kernel/Kconfig.preempt
1470
1471 config HZ
1472         int
1473         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1474                 ARCH_S5PV210 || ARCH_EXYNOS4
1475         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1476         default AT91_TIMER_HZ if ARCH_AT91
1477         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1478         default 100
1479
1480 config THUMB2_KERNEL
1481         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1482         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1483         select AEABI
1484         select ARM_ASM_UNIFIED
1485         help
1486           By enabling this option, the kernel will be compiled in
1487           Thumb-2 mode. A compiler/assembler that understand the unified
1488           ARM-Thumb syntax is needed.
1489
1490           If unsure, say N.
1491
1492 config THUMB2_AVOID_R_ARM_THM_JUMP11
1493         bool "Work around buggy Thumb-2 short branch relocations in gas"
1494         depends on THUMB2_KERNEL && MODULES
1495         default y
1496         help
1497           Various binutils versions can resolve Thumb-2 branches to
1498           locally-defined, preemptible global symbols as short-range "b.n"
1499           branch instructions.
1500
1501           This is a problem, because there's no guarantee the final
1502           destination of the symbol, or any candidate locations for a
1503           trampoline, are within range of the branch.  For this reason, the
1504           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1505           relocation in modules at all, and it makes little sense to add
1506           support.
1507
1508           The symptom is that the kernel fails with an "unsupported
1509           relocation" error when loading some modules.
1510
1511           Until fixed tools are available, passing
1512           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1513           code which hits this problem, at the cost of a bit of extra runtime
1514           stack usage in some cases.
1515
1516           The problem is described in more detail at:
1517               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1518
1519           Only Thumb-2 kernels are affected.
1520
1521           Unless you are sure your tools don't have this problem, say Y.
1522
1523 config ARM_ASM_UNIFIED
1524         bool
1525
1526 config AEABI
1527         bool "Use the ARM EABI to compile the kernel"
1528         help
1529           This option allows for the kernel to be compiled using the latest
1530           ARM ABI (aka EABI).  This is only useful if you are using a user
1531           space environment that is also compiled with EABI.
1532
1533           Since there are major incompatibilities between the legacy ABI and
1534           EABI, especially with regard to structure member alignment, this
1535           option also changes the kernel syscall calling convention to
1536           disambiguate both ABIs and allow for backward compatibility support
1537           (selected with CONFIG_OABI_COMPAT).
1538
1539           To use this you need GCC version 4.0.0 or later.
1540
1541 config OABI_COMPAT
1542         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1543         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1544         default y
1545         help
1546           This option preserves the old syscall interface along with the
1547           new (ARM EABI) one. It also provides a compatibility layer to
1548           intercept syscalls that have structure arguments which layout
1549           in memory differs between the legacy ABI and the new ARM EABI
1550           (only for non "thumb" binaries). This option adds a tiny
1551           overhead to all syscalls and produces a slightly larger kernel.
1552           If you know you'll be using only pure EABI user space then you
1553           can say N here. If this option is not selected and you attempt
1554           to execute a legacy ABI binary then the result will be
1555           UNPREDICTABLE (in fact it can be predicted that it won't work
1556           at all). If in doubt say Y.
1557
1558 config ARCH_HAS_HOLES_MEMORYMODEL
1559         bool
1560
1561 config ARCH_SPARSEMEM_ENABLE
1562         bool
1563
1564 config ARCH_SPARSEMEM_DEFAULT
1565         def_bool ARCH_SPARSEMEM_ENABLE
1566
1567 config ARCH_SELECT_MEMORY_MODEL
1568         def_bool ARCH_SPARSEMEM_ENABLE
1569
1570 config HAVE_ARCH_PFN_VALID
1571         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1572
1573 config HIGHMEM
1574         bool "High Memory Support"
1575         depends on MMU
1576         help
1577           The address space of ARM processors is only 4 Gigabytes large
1578           and it has to accommodate user address space, kernel address
1579           space as well as some memory mapped IO. That means that, if you
1580           have a large amount of physical memory and/or IO, not all of the
1581           memory can be "permanently mapped" by the kernel. The physical
1582           memory that is not permanently mapped is called "high memory".
1583
1584           Depending on the selected kernel/user memory split, minimum
1585           vmalloc space and actual amount of RAM, you may not need this
1586           option which should result in a slightly faster kernel.
1587
1588           If unsure, say n.
1589
1590 config HIGHPTE
1591         bool "Allocate 2nd-level pagetables from highmem"
1592         depends on HIGHMEM
1593
1594 config HW_PERF_EVENTS
1595         bool "Enable hardware performance counter support for perf events"
1596         depends on PERF_EVENTS && CPU_HAS_PMU
1597         default y
1598         help
1599           Enable hardware performance counter support for perf events. If
1600           disabled, perf events will use software events only.
1601
1602 source "mm/Kconfig"
1603
1604 config FORCE_MAX_ZONEORDER
1605         int "Maximum zone order" if ARCH_SHMOBILE
1606         range 11 64 if ARCH_SHMOBILE
1607         default "9" if SA1111
1608         default "11"
1609         help
1610           The kernel memory allocator divides physically contiguous memory
1611           blocks into "zones", where each zone is a power of two number of
1612           pages.  This option selects the largest power of two that the kernel
1613           keeps in the memory allocator.  If you need to allocate very large
1614           blocks of physically contiguous memory, then you may need to
1615           increase this value.
1616
1617           This config option is actually maximum order plus one. For example,
1618           a value of 11 means that the largest free memory block is 2^10 pages.
1619
1620 config LEDS
1621         bool "Timer and CPU usage LEDs"
1622         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1623                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1624                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1625                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1626                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1627                    ARCH_AT91 || ARCH_DAVINCI || \
1628                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1629         help
1630           If you say Y here, the LEDs on your machine will be used
1631           to provide useful information about your current system status.
1632
1633           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1634           be able to select which LEDs are active using the options below. If
1635           you are compiling a kernel for the EBSA-110 or the LART however, the
1636           red LED will simply flash regularly to indicate that the system is
1637           still functional. It is safe to say Y here if you have a CATS
1638           system, but the driver will do nothing.
1639
1640 config LEDS_TIMER
1641         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1642                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1643                             || MACH_OMAP_PERSEUS2
1644         depends on LEDS
1645         depends on !GENERIC_CLOCKEVENTS
1646         default y if ARCH_EBSA110
1647         help
1648           If you say Y here, one of the system LEDs (the green one on the
1649           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1650           will flash regularly to indicate that the system is still
1651           operational. This is mainly useful to kernel hackers who are
1652           debugging unstable kernels.
1653
1654           The LART uses the same LED for both Timer LED and CPU usage LED
1655           functions. You may choose to use both, but the Timer LED function
1656           will overrule the CPU usage LED.
1657
1658 config LEDS_CPU
1659         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1660                         !ARCH_OMAP) \
1661                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1662                         || MACH_OMAP_PERSEUS2
1663         depends on LEDS
1664         help
1665           If you say Y here, the red LED will be used to give a good real
1666           time indication of CPU usage, by lighting whenever the idle task
1667           is not currently executing.
1668
1669           The LART uses the same LED for both Timer LED and CPU usage LED
1670           functions. You may choose to use both, but the Timer LED function
1671           will overrule the CPU usage LED.
1672
1673 config ALIGNMENT_TRAP
1674         bool
1675         depends on CPU_CP15_MMU
1676         default y if !ARCH_EBSA110
1677         select HAVE_PROC_CPU if PROC_FS
1678         help
1679           ARM processors cannot fetch/store information which is not
1680           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1681           address divisible by 4. On 32-bit ARM processors, these non-aligned
1682           fetch/store instructions will be emulated in software if you say
1683           here, which has a severe performance impact. This is necessary for
1684           correct operation of some network protocols. With an IP-only
1685           configuration it is safe to say N, otherwise say Y.
1686
1687 config UACCESS_WITH_MEMCPY
1688         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1689         depends on MMU && EXPERIMENTAL
1690         default y if CPU_FEROCEON
1691         help
1692           Implement faster copy_to_user and clear_user methods for CPU
1693           cores where a 8-word STM instruction give significantly higher
1694           memory write throughput than a sequence of individual 32bit stores.
1695
1696           A possible side effect is a slight increase in scheduling latency
1697           between threads sharing the same address space if they invoke
1698           such copy operations with large buffers.
1699
1700           However, if the CPU data cache is using a write-allocate mode,
1701           this option is unlikely to provide any performance gain.
1702
1703 config SECCOMP
1704         bool
1705         prompt "Enable seccomp to safely compute untrusted bytecode"
1706         ---help---
1707           This kernel feature is useful for number crunching applications
1708           that may need to compute untrusted bytecode during their
1709           execution. By using pipes or other transports made available to
1710           the process as file descriptors supporting the read/write
1711           syscalls, it's possible to isolate those applications in
1712           their own address space using seccomp. Once seccomp is
1713           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1714           and the task is only allowed to execute a few safe syscalls
1715           defined by each seccomp mode.
1716
1717 config CC_STACKPROTECTOR
1718         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1719         depends on EXPERIMENTAL
1720         help
1721           This option turns on the -fstack-protector GCC feature. This
1722           feature puts, at the beginning of functions, a canary value on
1723           the stack just before the return address, and validates
1724           the value just before actually returning.  Stack based buffer
1725           overflows (that need to overwrite this return address) now also
1726           overwrite the canary, which gets detected and the attack is then
1727           neutralized via a kernel panic.
1728           This feature requires gcc version 4.2 or above.
1729
1730 config DEPRECATED_PARAM_STRUCT
1731         bool "Provide old way to pass kernel parameters"
1732         help
1733           This was deprecated in 2001 and announced to live on for 5 years.
1734           Some old boot loaders still use this way.
1735
1736 endmenu
1737
1738 menu "Boot options"
1739
1740 config USE_OF
1741         bool "Flattened Device Tree support"
1742         select OF
1743         select OF_EARLY_FLATTREE
1744         select IRQ_DOMAIN
1745         help
1746           Include support for flattened device tree machine descriptions.
1747
1748 # Compressed boot loader in ROM.  Yes, we really want to ask about
1749 # TEXT and BSS so we preserve their values in the config files.
1750 config ZBOOT_ROM_TEXT
1751         hex "Compressed ROM boot loader base address"
1752         default "0"
1753         help
1754           The physical address at which the ROM-able zImage is to be
1755           placed in the target.  Platforms which normally make use of
1756           ROM-able zImage formats normally set this to a suitable
1757           value in their defconfig file.
1758
1759           If ZBOOT_ROM is not enabled, this has no effect.
1760
1761 config ZBOOT_ROM_BSS
1762         hex "Compressed ROM boot loader BSS address"
1763         default "0"
1764         help
1765           The base address of an area of read/write memory in the target
1766           for the ROM-able zImage which must be available while the
1767           decompressor is running. It must be large enough to hold the
1768           entire decompressed kernel plus an additional 128 KiB.
1769           Platforms which normally make use of ROM-able zImage formats
1770           normally set this to a suitable value in their defconfig file.
1771
1772           If ZBOOT_ROM is not enabled, this has no effect.
1773
1774 config ZBOOT_ROM
1775         bool "Compressed boot loader in ROM/flash"
1776         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1777         help
1778           Say Y here if you intend to execute your compressed kernel image
1779           (zImage) directly from ROM or flash.  If unsure, say N.
1780
1781 choice
1782         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1783         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1784         default ZBOOT_ROM_NONE
1785         help
1786           Include experimental SD/MMC loading code in the ROM-able zImage.
1787           With this enabled it is possible to write the the ROM-able zImage
1788           kernel image to an MMC or SD card and boot the kernel straight
1789           from the reset vector. At reset the processor Mask ROM will load
1790           the first part of the the ROM-able zImage which in turn loads the
1791           rest the kernel image to RAM.
1792
1793 config ZBOOT_ROM_NONE
1794         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1795         help
1796           Do not load image from SD or MMC
1797
1798 config ZBOOT_ROM_MMCIF
1799         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1800         help
1801           Load image from MMCIF hardware block.
1802
1803 config ZBOOT_ROM_SH_MOBILE_SDHI
1804         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1805         help
1806           Load image from SDHI hardware block
1807
1808 endchoice
1809
1810 config CMDLINE
1811         string "Default kernel command string"
1812         default ""
1813         help
1814           On some architectures (EBSA110 and CATS), there is currently no way
1815           for the boot loader to pass arguments to the kernel. For these
1816           architectures, you should supply some command-line options at build
1817           time by entering them here. As a minimum, you should specify the
1818           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1819
1820 choice
1821         prompt "Kernel command line type" if CMDLINE != ""
1822         default CMDLINE_FROM_BOOTLOADER
1823
1824 config CMDLINE_FROM_BOOTLOADER
1825         bool "Use bootloader kernel arguments if available"
1826         help
1827           Uses the command-line options passed by the boot loader. If
1828           the boot loader doesn't provide any, the default kernel command
1829           string provided in CMDLINE will be used.
1830
1831 config CMDLINE_EXTEND
1832         bool "Extend bootloader kernel arguments"
1833         help
1834           The command-line arguments provided by the boot loader will be
1835           appended to the default kernel command string.
1836
1837 config CMDLINE_FORCE
1838         bool "Always use the default kernel command string"
1839         help
1840           Always use the default kernel command string, even if the boot
1841           loader passes other arguments to the kernel.
1842           This is useful if you cannot or don't want to change the
1843           command-line options your boot loader passes to the kernel.
1844 endchoice
1845
1846 config XIP_KERNEL
1847         bool "Kernel Execute-In-Place from ROM"
1848         depends on !ZBOOT_ROM
1849         help
1850           Execute-In-Place allows the kernel to run from non-volatile storage
1851           directly addressable by the CPU, such as NOR flash. This saves RAM
1852           space since the text section of the kernel is not loaded from flash
1853           to RAM.  Read-write sections, such as the data section and stack,
1854           are still copied to RAM.  The XIP kernel is not compressed since
1855           it has to run directly from flash, so it will take more space to
1856           store it.  The flash address used to link the kernel object files,
1857           and for storing it, is configuration dependent. Therefore, if you
1858           say Y here, you must know the proper physical address where to
1859           store the kernel image depending on your own flash memory usage.
1860
1861           Also note that the make target becomes "make xipImage" rather than
1862           "make zImage" or "make Image".  The final kernel binary to put in
1863           ROM memory will be arch/arm/boot/xipImage.
1864
1865           If unsure, say N.
1866
1867 config XIP_PHYS_ADDR
1868         hex "XIP Kernel Physical Location"
1869         depends on XIP_KERNEL
1870         default "0x00080000"
1871         help
1872           This is the physical address in your flash memory the kernel will
1873           be linked for and stored to.  This address is dependent on your
1874           own flash usage.
1875
1876 config KEXEC
1877         bool "Kexec system call (EXPERIMENTAL)"
1878         depends on EXPERIMENTAL
1879         help
1880           kexec is a system call that implements the ability to shutdown your
1881           current kernel, and to start another kernel.  It is like a reboot
1882           but it is independent of the system firmware.   And like a reboot
1883           you can start any kernel with it, not just Linux.
1884
1885           It is an ongoing process to be certain the hardware in a machine
1886           is properly shutdown, so do not be surprised if this code does not
1887           initially work for you.  It may help to enable device hotplugging
1888           support.
1889
1890 config ATAGS_PROC
1891         bool "Export atags in procfs"
1892         depends on KEXEC
1893         default y
1894         help
1895           Should the atags used to boot the kernel be exported in an "atags"
1896           file in procfs. Useful with kexec.
1897
1898 config CRASH_DUMP
1899         bool "Build kdump crash kernel (EXPERIMENTAL)"
1900         depends on EXPERIMENTAL
1901         help
1902           Generate crash dump after being started by kexec. This should
1903           be normally only set in special crash dump kernels which are
1904           loaded in the main kernel with kexec-tools into a specially
1905           reserved region and then later executed after a crash by
1906           kdump/kexec. The crash dump kernel must be compiled to a
1907           memory address not used by the main kernel
1908
1909           For more details see Documentation/kdump/kdump.txt
1910
1911 config AUTO_ZRELADDR
1912         bool "Auto calculation of the decompressed kernel image address"
1913         depends on !ZBOOT_ROM && !ARCH_U300
1914         help
1915           ZRELADDR is the physical address where the decompressed kernel
1916           image will be placed. If AUTO_ZRELADDR is selected, the address
1917           will be determined at run-time by masking the current IP with
1918           0xf8000000. This assumes the zImage being placed in the first 128MB
1919           from start of memory.
1920
1921 endmenu
1922
1923 menu "CPU Power Management"
1924
1925 if ARCH_HAS_CPUFREQ
1926
1927 source "drivers/cpufreq/Kconfig"
1928
1929 config CPU_FREQ_IMX
1930         tristate "CPUfreq driver for i.MX CPUs"
1931         depends on ARCH_MXC && CPU_FREQ
1932         help
1933           This enables the CPUfreq driver for i.MX CPUs.
1934
1935 config CPU_FREQ_SA1100
1936         bool
1937
1938 config CPU_FREQ_SA1110
1939         bool
1940
1941 config CPU_FREQ_INTEGRATOR
1942         tristate "CPUfreq driver for ARM Integrator CPUs"
1943         depends on ARCH_INTEGRATOR && CPU_FREQ
1944         default y
1945         help
1946           This enables the CPUfreq driver for ARM Integrator CPUs.
1947
1948           For details, take a look at <file:Documentation/cpu-freq>.
1949
1950           If in doubt, say Y.
1951
1952 config CPU_FREQ_PXA
1953         bool
1954         depends on CPU_FREQ && ARCH_PXA && PXA25x
1955         default y
1956         select CPU_FREQ_DEFAULT_GOV_USERSPACE
1957
1958 config CPU_FREQ_S3C
1959         bool
1960         help
1961           Internal configuration node for common cpufreq on Samsung SoC
1962
1963 config CPU_FREQ_S3C24XX
1964         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1965         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1966         select CPU_FREQ_S3C
1967         help
1968           This enables the CPUfreq driver for the Samsung S3C24XX family
1969           of CPUs.
1970
1971           For details, take a look at <file:Documentation/cpu-freq>.
1972
1973           If in doubt, say N.
1974
1975 config CPU_FREQ_S3C24XX_PLL
1976         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1977         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1978         help
1979           Compile in support for changing the PLL frequency from the
1980           S3C24XX series CPUfreq driver. The PLL takes time to settle
1981           after a frequency change, so by default it is not enabled.
1982
1983           This also means that the PLL tables for the selected CPU(s) will
1984           be built which may increase the size of the kernel image.
1985
1986 config CPU_FREQ_S3C24XX_DEBUG
1987         bool "Debug CPUfreq Samsung driver core"
1988         depends on CPU_FREQ_S3C24XX
1989         help
1990           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1991
1992 config CPU_FREQ_S3C24XX_IODEBUG
1993         bool "Debug CPUfreq Samsung driver IO timing"
1994         depends on CPU_FREQ_S3C24XX
1995         help
1996           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1997
1998 config CPU_FREQ_S3C24XX_DEBUGFS
1999         bool "Export debugfs for CPUFreq"
2000         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2001         help
2002           Export status information via debugfs.
2003
2004 endif
2005
2006 source "drivers/cpuidle/Kconfig"
2007
2008 endmenu
2009
2010 menu "Floating point emulation"
2011
2012 comment "At least one emulation must be selected"
2013
2014 config FPE_NWFPE
2015         bool "NWFPE math emulation"
2016         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2017         ---help---
2018           Say Y to include the NWFPE floating point emulator in the kernel.
2019           This is necessary to run most binaries. Linux does not currently
2020           support floating point hardware so you need to say Y here even if
2021           your machine has an FPA or floating point co-processor podule.
2022
2023           You may say N here if you are going to load the Acorn FPEmulator
2024           early in the bootup.
2025
2026 config FPE_NWFPE_XP
2027         bool "Support extended precision"
2028         depends on FPE_NWFPE
2029         help
2030           Say Y to include 80-bit support in the kernel floating-point
2031           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2032           Note that gcc does not generate 80-bit operations by default,
2033           so in most cases this option only enlarges the size of the
2034           floating point emulator without any good reason.
2035
2036           You almost surely want to say N here.
2037
2038 config FPE_FASTFPE
2039         bool "FastFPE math emulation (EXPERIMENTAL)"
2040         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2041         ---help---
2042           Say Y here to include the FAST floating point emulator in the kernel.
2043           This is an experimental much faster emulator which now also has full
2044           precision for the mantissa.  It does not support any exceptions.
2045           It is very simple, and approximately 3-6 times faster than NWFPE.
2046
2047           It should be sufficient for most programs.  It may be not suitable
2048           for scientific calculations, but you have to check this for yourself.
2049           If you do not feel you need a faster FP emulation you should better
2050           choose NWFPE.
2051
2052 config VFP
2053         bool "VFP-format floating point maths"
2054         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2055         help
2056           Say Y to include VFP support code in the kernel. This is needed
2057           if your hardware includes a VFP unit.
2058
2059           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2060           release notes and additional status information.
2061
2062           Say N if your target does not have VFP hardware.
2063
2064 config VFPv3
2065         bool
2066         depends on VFP
2067         default y if CPU_V7
2068
2069 config NEON
2070         bool "Advanced SIMD (NEON) Extension support"
2071         depends on VFPv3 && CPU_V7
2072         help
2073           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2074           Extension.
2075
2076 endmenu
2077
2078 menu "Userspace binary formats"
2079
2080 source "fs/Kconfig.binfmt"
2081
2082 config ARTHUR
2083         tristate "RISC OS personality"
2084         depends on !AEABI
2085         help
2086           Say Y here to include the kernel code necessary if you want to run
2087           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2088           experimental; if this sounds frightening, say N and sleep in peace.
2089           You can also say M here to compile this support as a module (which
2090           will be called arthur).
2091
2092 endmenu
2093
2094 menu "Power management options"
2095
2096 source "kernel/power/Kconfig"
2097
2098 config ARCH_SUSPEND_POSSIBLE
2099         depends on !ARCH_S5P64X0 && !ARCH_S5PC100
2100         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2101                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2102         def_bool y
2103
2104 endmenu
2105
2106 source "net/Kconfig"
2107
2108 source "drivers/Kconfig"
2109
2110 source "fs/Kconfig"
2111
2112 source "arch/arm/Kconfig.debug"
2113
2114 source "security/Kconfig"
2115
2116 source "crypto/Kconfig"
2117
2118 source "lib/Kconfig"