arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE if PCI || ISA || PCMCIA
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if !XIP_KERNEL
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         select GENERIC_IRQ_SHOW
  32         select CPU_PM if (SUSPEND || CPU_IDLE)
  33         help
  34           The ARM series is a line of low-power-consumption RISC chip designs
  35           licensed by ARM Ltd and targeted at embedded applications and
  36           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  37           manufactured, but legacy ARM-based PC hardware remains popular in
  38           Europe.  There is an ARM Linux project with a web page at
  39           <http://www.arm.linux.org.uk/>.
  40
  41 config ARM_HAS_SG_CHAIN
  42         bool
  43
  44 config HAVE_PWM
  45         bool
  46
  47 config MIGHT_HAVE_PCI
  48         bool
  49
  50 config SYS_SUPPORTS_APM_EMULATION
  51         bool
  52
  53 config HAVE_SCHED_CLOCK
  54         bool
  55
  56 config GENERIC_GPIO
  57         bool
  58
  59 config ARCH_USES_GETTIMEOFFSET
  60         bool
  61         default n
  62
  63 config GENERIC_CLOCKEVENTS
  64         bool
  65
  66 config GENERIC_CLOCKEVENTS_BROADCAST
  67         bool
  68         depends on GENERIC_CLOCKEVENTS
  69         default y if SMP
  70
  71 config KTIME_SCALAR
  72         bool
  73         default y
  74
  75 config HAVE_TCM
  76         bool
  77         select GENERIC_ALLOCATOR
  78
  79 config HAVE_PROC_CPU
  80         bool
  81
  82 config NO_IOPORT
  83         bool
  84
  85 config EISA
  86         bool
  87         ---help---
  88           The Extended Industry Standard Architecture (EISA) bus was
  89           developed as an open alternative to the IBM MicroChannel bus.
  90
  91           The EISA bus provided some of the features of the IBM MicroChannel
  92           bus while maintaining backward compatibility with cards made for
  93           the older ISA bus.  The EISA bus saw limited use between 1988 and
  94           1995 when it was made obsolete by the PCI bus.
  95
  96           Say Y here if you are building a kernel for an EISA-based machine.
  97
  98           Otherwise, say N.
  99
 100 config SBUS
 101         bool
 102
 103 config MCA
 104         bool
 105         help
 106           MicroChannel Architecture is found in some IBM PS/2 machines and
 107           laptops.  It is a bus system similar to PCI or ISA. See
 108           <file:Documentation/mca.txt> (and especially the web page given
 109           there) before attempting to build an MCA bus kernel.
 110
 111 config STACKTRACE_SUPPORT
 112         bool
 113         default y
 114
 115 config HAVE_LATENCYTOP_SUPPORT
 116         bool
 117         depends on !SMP
 118         default y
 119
 120 config LOCKDEP_SUPPORT
 121         bool
 122         default y
 123
 124 config TRACE_IRQFLAGS_SUPPORT
 125         bool
 126         default y
 127
 128 config HARDIRQS_SW_RESEND
 129         bool
 130         default y
 131
 132 config GENERIC_IRQ_PROBE
 133         bool
 134         default y
 135
 136 config GENERIC_LOCKBREAK
 137         bool
 138         default y
 139         depends on SMP && PREEMPT
 140
 141 config RWSEM_GENERIC_SPINLOCK
 142         bool
 143         default y
 144
 145 config RWSEM_XCHGADD_ALGORITHM
 146         bool
 147
 148 config ARCH_HAS_ILOG2_U32
 149         bool
 150
 151 config ARCH_HAS_ILOG2_U64
 152         bool
 153
 154 config ARCH_HAS_CPUFREQ
 155         bool
 156         help
 157           Internal node to signify that the ARCH has CPUFREQ support
 158           and that the relevant menu configurations are displayed for
 159           it.
 160
 161 config ARCH_HAS_CPU_IDLE_WAIT
 162        def_bool y
 163
 164 config GENERIC_HWEIGHT
 165         bool
 166         default y
 167
 168 config GENERIC_CALIBRATE_DELAY
 169         bool
 170         default y
 171
 172 config ARCH_MAY_HAVE_PC_FDC
 173         bool
 174
 175 config ZONE_DMA
 176         bool
 177
 178 config NEED_DMA_MAP_STATE
 179        def_bool y
 180
 181 config GENERIC_ISA_DMA
 182         bool
 183
 184 config FIQ
 185         bool
 186
 187 config ARCH_MTD_XIP
 188         bool
 189
 190 config VECTORS_BASE
 191         hex
 192         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 193         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 194         default 0x00000000
 195         help
 196           The base address of exception vectors.
 197
 198 config ARM_PATCH_PHYS_VIRT
 199         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 200         default y
 201         depends on !XIP_KERNEL && MMU
 202         depends on !ARCH_REALVIEW || !SPARSEMEM
 203         help
 204           Patch phys-to-virt and virt-to-phys translation functions at
 205           boot and module load time according to the position of the
 206           kernel in system memory.
 207
 208           This can only be used with non-XIP MMU kernels where the base
 209           of physical memory is at a 16MB boundary.
 210
 211           Only disable this option if you know that you do not require
 212           this feature (eg, building a kernel for a single machine) and
 213           you need to shrink the kernel to the minimal size.
 214
 215 config NEED_MACH_MEMORY_H
 216         bool
 217         help
 218           Select this when mach/memory.h is required to provide special
 219           definitions for this platform.  The need for mach/memory.h should
 220           be avoided when possible.
 221
 222 config PHYS_OFFSET
 223         hex "Physical address of main memory" if MMU
 224         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 225         default DRAM_BASE if !MMU
 226         help
 227           Please provide the physical address corresponding to the
 228           location of main memory in your system.
 229
 230 config GENERIC_BUG
 231         def_bool y
 232         depends on BUG
 233
 234 source "init/Kconfig"
 235
 236 source "kernel/Kconfig.freezer"
 237
 238 menu "System Type"
 239
 240 config MMU
 241         bool "MMU-based Paged Memory Management Support"
 242         default y
 243         help
 244           Select if you want MMU-based virtualised addressing space
 245           support by paged memory management. If unsure, say 'Y'.
 246
 247 #
 248 # The "ARM system type" choice list is ordered alphabetically by option
 249 # text.  Please add new entries in the option alphabetic order.
 250 #
 251 choice
 252         prompt "ARM system type"
 253         default ARCH_VERSATILE
 254
 255 config ARCH_INTEGRATOR
 256         bool "ARM Ltd. Integrator family"
 257         select ARM_AMBA
 258         select ARCH_HAS_CPUFREQ
 259         select CLKDEV_LOOKUP
 260         select HAVE_MACH_CLKDEV
 261         select ICST
 262         select GENERIC_CLOCKEVENTS
 263         select PLAT_VERSATILE
 264         select PLAT_VERSATILE_FPGA_IRQ
 265         select NEED_MACH_MEMORY_H
 266         help
 267           Support for ARM's Integrator platform.
 268
 269 config ARCH_REALVIEW
 270         bool "ARM Ltd. RealView family"
 271         select ARM_AMBA
 272         select CLKDEV_LOOKUP
 273         select HAVE_MACH_CLKDEV
 274         select ICST
 275         select GENERIC_CLOCKEVENTS
 276         select ARCH_WANT_OPTIONAL_GPIOLIB
 277         select PLAT_VERSATILE
 278         select PLAT_VERSATILE_CLCD
 279         select ARM_TIMER_SP804
 280         select GPIO_PL061 if GPIOLIB
 281         select NEED_MACH_MEMORY_H
 282         help
 283           This enables support for ARM Ltd RealView boards.
 284
 285 config ARCH_VERSATILE
 286         bool "ARM Ltd. Versatile family"
 287         select ARM_AMBA
 288         select ARM_VIC
 289         select CLKDEV_LOOKUP
 290         select HAVE_MACH_CLKDEV
 291         select ICST
 292         select GENERIC_CLOCKEVENTS
 293         select ARCH_WANT_OPTIONAL_GPIOLIB
 294         select PLAT_VERSATILE
 295         select PLAT_VERSATILE_CLCD
 296         select PLAT_VERSATILE_FPGA_IRQ
 297         select ARM_TIMER_SP804
 298         help
 299           This enables support for ARM Ltd Versatile board.
 300
 301 config ARCH_VEXPRESS
 302         bool "ARM Ltd. Versatile Express family"
 303         select ARCH_WANT_OPTIONAL_GPIOLIB
 304         select ARM_AMBA
 305         select ARM_TIMER_SP804
 306         select CLKDEV_LOOKUP
 307         select HAVE_MACH_CLKDEV
 308         select GENERIC_CLOCKEVENTS
 309         select HAVE_CLK
 310         select HAVE_PATA_PLATFORM
 311         select ICST
 312         select PLAT_VERSATILE
 313         select PLAT_VERSATILE_CLCD
 314         help
 315           This enables support for the ARM Ltd Versatile Express boards.
 316
 317 config ARCH_AT91
 318         bool "Atmel AT91"
 319         select ARCH_REQUIRE_GPIOLIB
 320         select HAVE_CLK
 321         select CLKDEV_LOOKUP
 322         help
 323           This enables support for systems based on the Atmel AT91RM9200,
 324           AT91SAM9 and AT91CAP9 processors.
 325
 326 config ARCH_BCMRING
 327         bool "Broadcom BCMRING"
 328         depends on MMU
 329         select CPU_V6
 330         select ARM_AMBA
 331         select ARM_TIMER_SP804
 332         select CLKDEV_LOOKUP
 333         select GENERIC_CLOCKEVENTS
 334         select ARCH_WANT_OPTIONAL_GPIOLIB
 335         help
 336           Support for Broadcom's BCMRing platform.
 337
 338 config ARCH_HIGHBANK
 339         bool "Calxeda Highbank-based"
 340         select ARCH_WANT_OPTIONAL_GPIOLIB
 341         select ARM_AMBA
 342         select ARM_GIC
 343         select ARM_TIMER_SP804
 344         select CLKDEV_LOOKUP
 345         select CPU_V7
 346         select GENERIC_CLOCKEVENTS
 347         select HAVE_ARM_SCU
 348         select USE_OF
 349         help
 350           Support for the Calxeda Highbank SoC based boards.
 351
 352 config ARCH_CLPS711X
 353         bool "Cirrus Logic CLPS711x/EP721x-based"
 354         select CPU_ARM720T
 355         select ARCH_USES_GETTIMEOFFSET
 356         select NEED_MACH_MEMORY_H
 357         help
 358           Support for Cirrus Logic 711x/721x based boards.
 359
 360 config ARCH_CNS3XXX
 361         bool "Cavium Networks CNS3XXX family"
 362         select CPU_V6K
 363         select GENERIC_CLOCKEVENTS
 364         select ARM_GIC
 365         select MIGHT_HAVE_PCI
 366         select PCI_DOMAINS if PCI
 367         help
 368           Support for Cavium Networks CNS3XXX platform.
 369
 370 config ARCH_GEMINI
 371         bool "Cortina Systems Gemini"
 372         select CPU_FA526
 373         select ARCH_REQUIRE_GPIOLIB
 374         select ARCH_USES_GETTIMEOFFSET
 375         help
 376           Support for the Cortina Systems Gemini family SoCs
 377
 378 config ARCH_PRIMA2
 379         bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 380         select CPU_V7
 381         select NO_IOPORT
 382         select GENERIC_CLOCKEVENTS
 383         select CLKDEV_LOOKUP
 384         select GENERIC_IRQ_CHIP
 385         select USE_OF
 386         select ZONE_DMA
 387         help
 388           Support for CSR SiRFSoC ARM Cortex A9 Platform
 389
 390 config ARCH_EBSA110
 391         bool "EBSA-110"
 392         select CPU_SA110
 393         select ISA
 394         select NO_IOPORT
 395         select ARCH_USES_GETTIMEOFFSET
 396         select NEED_MACH_MEMORY_H
 397         help
 398           This is an evaluation board for the StrongARM processor available
 399           from Digital. It has limited hardware on-board, including an
 400           Ethernet interface, two PCMCIA sockets, two serial ports and a
 401           parallel port.
 402
 403 config ARCH_EP93XX
 404         bool "EP93xx-based"
 405         select CPU_ARM920T
 406         select ARM_AMBA
 407         select ARM_VIC
 408         select CLKDEV_LOOKUP
 409         select ARCH_REQUIRE_GPIOLIB
 410         select ARCH_HAS_HOLES_MEMORYMODEL
 411         select ARCH_USES_GETTIMEOFFSET
 412         select NEED_MACH_MEMORY_H
 413         help
 414           This enables support for the Cirrus EP93xx series of CPUs.
 415
 416 config ARCH_FOOTBRIDGE
 417         bool "FootBridge"
 418         select CPU_SA110
 419         select FOOTBRIDGE
 420         select GENERIC_CLOCKEVENTS
 421         select HAVE_IDE
 422         select NEED_MACH_MEMORY_H
 423         help
 424           Support for systems based on the DC21285 companion chip
 425           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 426
 427 config ARCH_MXC
 428         bool "Freescale MXC/iMX-based"
 429         select GENERIC_CLOCKEVENTS
 430         select ARCH_REQUIRE_GPIOLIB
 431         select CLKDEV_LOOKUP
 432         select CLKSRC_MMIO
 433         select GENERIC_IRQ_CHIP
 434         select HAVE_SCHED_CLOCK
 435         select MULTI_IRQ_HANDLER
 436         help
 437           Support for Freescale MXC/iMX-based family of processors
 438
 439 config ARCH_MXS
 440         bool "Freescale MXS-based"
 441         select GENERIC_CLOCKEVENTS
 442         select ARCH_REQUIRE_GPIOLIB
 443         select CLKDEV_LOOKUP
 444         select CLKSRC_MMIO
 445         help
 446           Support for Freescale MXS-based family of processors
 447
 448 config ARCH_NETX
 449         bool "Hilscher NetX based"
 450         select CLKSRC_MMIO
 451         select CPU_ARM926T
 452         select ARM_VIC
 453         select GENERIC_CLOCKEVENTS
 454         help
 455           This enables support for systems based on the Hilscher NetX Soc
 456
 457 config ARCH_H720X
 458         bool "Hynix HMS720x-based"
 459         select CPU_ARM720T
 460         select ISA_DMA_API
 461         select ARCH_USES_GETTIMEOFFSET
 462         help
 463           This enables support for systems based on the Hynix HMS720x
 464
 465 config ARCH_IOP13XX
 466         bool "IOP13xx-based"
 467         depends on MMU
 468         select CPU_XSC3
 469         select PLAT_IOP
 470         select PCI
 471         select ARCH_SUPPORTS_MSI
 472         select VMSPLIT_1G
 473         select NEED_MACH_MEMORY_H
 474         help
 475           Support for Intel's IOP13XX (XScale) family of processors.
 476
 477 config ARCH_IOP32X
 478         bool "IOP32x-based"
 479         depends on MMU
 480         select CPU_XSCALE
 481         select PLAT_IOP
 482         select PCI
 483         select ARCH_REQUIRE_GPIOLIB
 484         help
 485           Support for Intel's 80219 and IOP32X (XScale) family of
 486           processors.
 487
 488 config ARCH_IOP33X
 489         bool "IOP33x-based"
 490         depends on MMU
 491         select CPU_XSCALE
 492         select PLAT_IOP
 493         select PCI
 494         select ARCH_REQUIRE_GPIOLIB
 495         help
 496           Support for Intel's IOP33X (XScale) family of processors.
 497
 498 config ARCH_IXP23XX
 499         bool "IXP23XX-based"
 500         depends on MMU
 501         select CPU_XSC3
 502         select PCI
 503         select ARCH_USES_GETTIMEOFFSET
 504         select NEED_MACH_MEMORY_H
 505         help
 506           Support for Intel's IXP23xx (XScale) family of processors.
 507
 508 config ARCH_IXP2000
 509         bool "IXP2400/2800-based"
 510         depends on MMU
 511         select CPU_XSCALE
 512         select PCI
 513         select ARCH_USES_GETTIMEOFFSET
 514         select NEED_MACH_MEMORY_H
 515         help
 516           Support for Intel's IXP2400/2800 (XScale) family of processors.
 517
 518 config ARCH_IXP4XX
 519         bool "IXP4xx-based"
 520         depends on MMU
 521         select CLKSRC_MMIO
 522         select CPU_XSCALE
 523         select GENERIC_GPIO
 524         select GENERIC_CLOCKEVENTS
 525         select HAVE_SCHED_CLOCK
 526         select MIGHT_HAVE_PCI
 527         select DMABOUNCE if PCI
 528         help
 529           Support for Intel's IXP4XX (XScale) family of processors.
 530
 531 config ARCH_DOVE
 532         bool "Marvell Dove"
 533         select CPU_V7
 534         select PCI
 535         select ARCH_REQUIRE_GPIOLIB
 536         select GENERIC_CLOCKEVENTS
 537         select PLAT_ORION
 538         help
 539           Support for the Marvell Dove SoC 88AP510
 540
 541 config ARCH_KIRKWOOD
 542         bool "Marvell Kirkwood"
 543         select CPU_FEROCEON
 544         select PCI
 545         select ARCH_REQUIRE_GPIOLIB
 546         select GENERIC_CLOCKEVENTS
 547         select PLAT_ORION
 548         help
 549           Support for the following Marvell Kirkwood series SoCs:
 550           88F6180, 88F6192 and 88F6281.
 551
 552 config ARCH_LPC32XX
 553         bool "NXP LPC32XX"
 554         select CLKSRC_MMIO
 555         select CPU_ARM926T
 556         select ARCH_REQUIRE_GPIOLIB
 557         select HAVE_IDE
 558         select ARM_AMBA
 559         select USB_ARCH_HAS_OHCI
 560         select CLKDEV_LOOKUP
 561         select GENERIC_CLOCKEVENTS
 562         help
 563           Support for the NXP LPC32XX family of processors
 564
 565 config ARCH_MV78XX0
 566         bool "Marvell MV78xx0"
 567         select CPU_FEROCEON
 568         select PCI
 569         select ARCH_REQUIRE_GPIOLIB
 570         select GENERIC_CLOCKEVENTS
 571         select PLAT_ORION
 572         help
 573           Support for the following Marvell MV78xx0 series SoCs:
 574           MV781x0, MV782x0.
 575
 576 config ARCH_ORION5X
 577         bool "Marvell Orion"
 578         depends on MMU
 579         select CPU_FEROCEON
 580         select PCI
 581         select ARCH_REQUIRE_GPIOLIB
 582         select GENERIC_CLOCKEVENTS
 583         select PLAT_ORION
 584         help
 585           Support for the following Marvell Orion 5x series SoCs:
 586           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 587           Orion-2 (5281), Orion-1-90 (6183).
 588
 589 config ARCH_MMP
 590         bool "Marvell PXA168/910/MMP2"
 591         depends on MMU
 592         select ARCH_REQUIRE_GPIOLIB
 593         select CLKDEV_LOOKUP
 594         select GENERIC_CLOCKEVENTS
 595         select GPIO_PXA
 596         select HAVE_SCHED_CLOCK
 597         select TICK_ONESHOT
 598         select PLAT_PXA
 599         select SPARSE_IRQ
 600         select GENERIC_ALLOCATOR
 601         help
 602           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 603
 604 config ARCH_KS8695
 605         bool "Micrel/Kendin KS8695"
 606         select CPU_ARM922T
 607         select ARCH_REQUIRE_GPIOLIB
 608         select ARCH_USES_GETTIMEOFFSET
 609         select NEED_MACH_MEMORY_H
 610         help
 611           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 612           System-on-Chip devices.
 613
 614 config ARCH_W90X900
 615         bool "Nuvoton W90X900 CPU"
 616         select CPU_ARM926T
 617         select ARCH_REQUIRE_GPIOLIB
 618         select CLKDEV_LOOKUP
 619         select CLKSRC_MMIO
 620         select GENERIC_CLOCKEVENTS
 621         help
 622           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 623           At present, the w90x900 has been renamed nuc900, regarding
 624           the ARM series product line, you can login the following
 625           link address to know more.
 626
 627           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 628                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 629
 630 config ARCH_TEGRA
 631         bool "NVIDIA Tegra"
 632         select CLKDEV_LOOKUP
 633         select CLKSRC_MMIO
 634         select GENERIC_CLOCKEVENTS
 635         select GENERIC_GPIO
 636         select HAVE_CLK
 637         select HAVE_SCHED_CLOCK
 638         select ARCH_HAS_CPUFREQ
 639         help
 640           This enables support for NVIDIA Tegra based systems (Tegra APX,
 641           Tegra 6xx and Tegra 2 series).
 642
 643 config ARCH_PICOXCELL
 644         bool "Picochip picoXcell"
 645         select ARCH_REQUIRE_GPIOLIB
 646         select ARM_PATCH_PHYS_VIRT
 647         select ARM_VIC
 648         select CPU_V6K
 649         select DW_APB_TIMER
 650         select GENERIC_CLOCKEVENTS
 651         select GENERIC_GPIO
 652         select HAVE_SCHED_CLOCK
 653         select HAVE_TCM
 654         select NO_IOPORT
 655         select USE_OF
 656         help
 657           This enables support for systems based on the Picochip picoXcell
 658           family of Femtocell devices.  The picoxcell support requires device tree
 659           for all boards.
 660
 661 config ARCH_PNX4008
 662         bool "Philips Nexperia PNX4008 Mobile"
 663         select CPU_ARM926T
 664         select CLKDEV_LOOKUP
 665         select ARCH_USES_GETTIMEOFFSET
 666         help
 667           This enables support for Philips PNX4008 mobile platform.
 668
 669 config ARCH_PXA
 670         bool "PXA2xx/PXA3xx-based"
 671         depends on MMU
 672         select ARCH_MTD_XIP
 673         select ARCH_HAS_CPUFREQ
 674         select CLKDEV_LOOKUP
 675         select CLKSRC_MMIO
 676         select ARCH_REQUIRE_GPIOLIB
 677         select GENERIC_CLOCKEVENTS
 678         select GPIO_PXA
 679         select HAVE_SCHED_CLOCK
 680         select TICK_ONESHOT
 681         select PLAT_PXA
 682         select SPARSE_IRQ
 683         select AUTO_ZRELADDR
 684         select MULTI_IRQ_HANDLER
 685         select ARM_CPU_SUSPEND if PM
 686         select HAVE_IDE
 687         help
 688           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 689
 690 config ARCH_MSM
 691         bool "Qualcomm MSM"
 692         select HAVE_CLK
 693         select GENERIC_CLOCKEVENTS
 694         select ARCH_REQUIRE_GPIOLIB
 695         select CLKDEV_LOOKUP
 696         help
 697           Support for Qualcomm MSM/QSD based systems.  This runs on the
 698           apps processor of the MSM/QSD and depends on a shared memory
 699           interface to the modem processor which runs the baseband
 700           stack and controls some vital subsystems
 701           (clock and power control, etc).
 702
 703 config ARCH_SHMOBILE
 704         bool "Renesas SH-Mobile / R-Mobile"
 705         select HAVE_CLK
 706         select CLKDEV_LOOKUP
 707         select HAVE_MACH_CLKDEV
 708         select GENERIC_CLOCKEVENTS
 709         select NO_IOPORT
 710         select SPARSE_IRQ
 711         select MULTI_IRQ_HANDLER
 712         select PM_GENERIC_DOMAINS if PM
 713         select NEED_MACH_MEMORY_H
 714         help
 715           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 716
 717 config ARCH_RPC
 718         bool "RiscPC"
 719         select ARCH_ACORN
 720         select FIQ
 721         select TIMER_ACORN
 722         select ARCH_MAY_HAVE_PC_FDC
 723         select HAVE_PATA_PLATFORM
 724         select ISA_DMA_API
 725         select NO_IOPORT
 726         select ARCH_SPARSEMEM_ENABLE
 727         select ARCH_USES_GETTIMEOFFSET
 728         select HAVE_IDE
 729         select NEED_MACH_MEMORY_H
 730         help
 731           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 732           CD-ROM interface, serial and parallel port, and the floppy drive.
 733
 734 config ARCH_SA1100
 735         bool "SA1100-based"
 736         select CLKSRC_MMIO
 737         select CPU_SA1100
 738         select ISA
 739         select ARCH_SPARSEMEM_ENABLE
 740         select ARCH_MTD_XIP
 741         select ARCH_HAS_CPUFREQ
 742         select CPU_FREQ
 743         select GENERIC_CLOCKEVENTS
 744         select HAVE_CLK
 745         select HAVE_SCHED_CLOCK
 746         select TICK_ONESHOT
 747         select ARCH_REQUIRE_GPIOLIB
 748         select HAVE_IDE
 749         select NEED_MACH_MEMORY_H
 750         help
 751           Support for StrongARM 11x0 based boards.
 752
 753 config ARCH_S3C2410
 754         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 755         select GENERIC_GPIO
 756         select ARCH_HAS_CPUFREQ
 757         select HAVE_CLK
 758         select CLKDEV_LOOKUP
 759         select ARCH_USES_GETTIMEOFFSET
 760         select HAVE_S3C2410_I2C if I2C
 761         help
 762           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 763           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 764           the Samsung SMDK2410 development board (and derivatives).
 765
 766           Note, the S3C2416 and the S3C2450 are so close that they even share
 767           the same SoC ID code. This means that there is no separate machine
 768           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 769
 770 config ARCH_S3C64XX
 771         bool "Samsung S3C64XX"
 772         select PLAT_SAMSUNG
 773         select CPU_V6
 774         select ARM_VIC
 775         select HAVE_CLK
 776         select HAVE_TCM
 777         select CLKDEV_LOOKUP
 778         select NO_IOPORT
 779         select ARCH_USES_GETTIMEOFFSET
 780         select ARCH_HAS_CPUFREQ
 781         select ARCH_REQUIRE_GPIOLIB
 782         select SAMSUNG_CLKSRC
 783         select SAMSUNG_IRQ_VIC_TIMER
 784         select S3C_GPIO_TRACK
 785         select S3C_DEV_NAND
 786         select USB_ARCH_HAS_OHCI
 787         select SAMSUNG_GPIOLIB_4BIT
 788         select HAVE_S3C2410_I2C if I2C
 789         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 790         help
 791           Samsung S3C64XX series based systems
 792
 793 config ARCH_S5P64X0
 794         bool "Samsung S5P6440 S5P6450"
 795         select CPU_V6
 796         select GENERIC_GPIO
 797         select HAVE_CLK
 798         select CLKDEV_LOOKUP
 799         select CLKSRC_MMIO
 800         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 801         select GENERIC_CLOCKEVENTS
 802         select HAVE_SCHED_CLOCK
 803         select HAVE_S3C2410_I2C if I2C
 804         select HAVE_S3C_RTC if RTC_CLASS
 805         help
 806           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 807           SMDK6450.
 808
 809 config ARCH_S5PC100
 810         bool "Samsung S5PC100"
 811         select GENERIC_GPIO
 812         select HAVE_CLK
 813         select CLKDEV_LOOKUP
 814         select CPU_V7
 815         select ARM_L1_CACHE_SHIFT_6
 816         select ARCH_USES_GETTIMEOFFSET
 817         select HAVE_S3C2410_I2C if I2C
 818         select HAVE_S3C_RTC if RTC_CLASS
 819         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 820         help
 821           Samsung S5PC100 series based systems
 822
 823 config ARCH_S5PV210
 824         bool "Samsung S5PV210/S5PC110"
 825         select CPU_V7
 826         select ARCH_SPARSEMEM_ENABLE
 827         select ARCH_HAS_HOLES_MEMORYMODEL
 828         select GENERIC_GPIO
 829         select HAVE_CLK
 830         select CLKDEV_LOOKUP
 831         select CLKSRC_MMIO
 832         select ARM_L1_CACHE_SHIFT_6
 833         select ARCH_HAS_CPUFREQ
 834         select GENERIC_CLOCKEVENTS
 835         select HAVE_SCHED_CLOCK
 836         select HAVE_S3C2410_I2C if I2C
 837         select HAVE_S3C_RTC if RTC_CLASS
 838         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 839         select NEED_MACH_MEMORY_H
 840         help
 841           Samsung S5PV210/S5PC110 series based systems
 842
 843 config ARCH_EXYNOS
 844         bool "SAMSUNG EXYNOS"
 845         select CPU_V7
 846         select ARCH_SPARSEMEM_ENABLE
 847         select ARCH_HAS_HOLES_MEMORYMODEL
 848         select GENERIC_GPIO
 849         select HAVE_CLK
 850         select CLKDEV_LOOKUP
 851         select ARCH_HAS_CPUFREQ
 852         select GENERIC_CLOCKEVENTS
 853         select HAVE_S3C_RTC if RTC_CLASS
 854         select HAVE_S3C2410_I2C if I2C
 855         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 856         select NEED_MACH_MEMORY_H
 857         help
 858           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 859
 860 config ARCH_SHARK
 861         bool "Shark"
 862         select CPU_SA110
 863         select ISA
 864         select ISA_DMA
 865         select ZONE_DMA
 866         select PCI
 867         select ARCH_USES_GETTIMEOFFSET
 868         select NEED_MACH_MEMORY_H
 869         help
 870           Support for the StrongARM based Digital DNARD machine, also known
 871           as "Shark" (<http://www.shark-linux.de/shark.html>).
 872
 873 config ARCH_TCC_926
 874         bool "Telechips TCC ARM926-based systems"
 875         select CLKSRC_MMIO
 876         select CPU_ARM926T
 877         select HAVE_CLK
 878         select CLKDEV_LOOKUP
 879         select GENERIC_CLOCKEVENTS
 880         help
 881           Support for Telechips TCC ARM926-based systems.
 882
 883 config ARCH_U300
 884         bool "ST-Ericsson U300 Series"
 885         depends on MMU
 886         select CLKSRC_MMIO
 887         select CPU_ARM926T
 888         select HAVE_SCHED_CLOCK
 889         select HAVE_TCM
 890         select ARM_AMBA
 891         select ARM_PATCH_PHYS_VIRT
 892         select ARM_VIC
 893         select GENERIC_CLOCKEVENTS
 894         select CLKDEV_LOOKUP
 895         select HAVE_MACH_CLKDEV
 896         select GENERIC_GPIO
 897         select ARCH_REQUIRE_GPIOLIB
 898         select NEED_MACH_MEMORY_H
 899         help
 900           Support for ST-Ericsson U300 series mobile platforms.
 901
 902 config ARCH_U8500
 903         bool "ST-Ericsson U8500 Series"
 904         select CPU_V7
 905         select ARM_AMBA
 906         select GENERIC_CLOCKEVENTS
 907         select CLKDEV_LOOKUP
 908         select ARCH_REQUIRE_GPIOLIB
 909         select ARCH_HAS_CPUFREQ
 910         help
 911           Support for ST-Ericsson's Ux500 architecture
 912
 913 config ARCH_NOMADIK
 914         bool "STMicroelectronics Nomadik"
 915         select ARM_AMBA
 916         select ARM_VIC
 917         select CPU_ARM926T
 918         select CLKDEV_LOOKUP
 919         select GENERIC_CLOCKEVENTS
 920         select ARCH_REQUIRE_GPIOLIB
 921         help
 922           Support for the Nomadik platform by ST-Ericsson
 923
 924 config ARCH_DAVINCI
 925         bool "TI DaVinci"
 926         select GENERIC_CLOCKEVENTS
 927         select ARCH_REQUIRE_GPIOLIB
 928         select ZONE_DMA
 929         select HAVE_IDE
 930         select CLKDEV_LOOKUP
 931         select GENERIC_ALLOCATOR
 932         select GENERIC_IRQ_CHIP
 933         select ARCH_HAS_HOLES_MEMORYMODEL
 934         help
 935           Support for TI's DaVinci platform.
 936
 937 config ARCH_OMAP
 938         bool "TI OMAP"
 939         select HAVE_CLK
 940         select ARCH_REQUIRE_GPIOLIB
 941         select ARCH_HAS_CPUFREQ
 942         select CLKSRC_MMIO
 943         select GENERIC_CLOCKEVENTS
 944         select HAVE_SCHED_CLOCK
 945         select ARCH_HAS_HOLES_MEMORYMODEL
 946         help
 947           Support for TI's OMAP platform (OMAP1/2/3/4).
 948
 949 config PLAT_SPEAR
 950         bool "ST SPEAr"
 951         select ARM_AMBA
 952         select ARCH_REQUIRE_GPIOLIB
 953         select CLKDEV_LOOKUP
 954         select CLKSRC_MMIO
 955         select GENERIC_CLOCKEVENTS
 956         select HAVE_CLK
 957         help
 958           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 959
 960 config ARCH_VT8500
 961         bool "VIA/WonderMedia 85xx"
 962         select CPU_ARM926T
 963         select GENERIC_GPIO
 964         select ARCH_HAS_CPUFREQ
 965         select GENERIC_CLOCKEVENTS
 966         select ARCH_REQUIRE_GPIOLIB
 967         select HAVE_PWM
 968         help
 969           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 970
 971 config ARCH_ZYNQ
 972         bool "Xilinx Zynq ARM Cortex A9 Platform"
 973         select CPU_V7
 974         select GENERIC_CLOCKEVENTS
 975         select CLKDEV_LOOKUP
 976         select ARM_GIC
 977         select ARM_AMBA
 978         select ICST
 979         select USE_OF
 980         help
 981           Support for Xilinx Zynq ARM Cortex A9 Platform
 982 endchoice
 983
 984 #
 985 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 986 # Kconfigs may be included either alphabetically (according to the
 987 # plat- suffix) or along side the corresponding mach-* source.
 988 #
 989 source "arch/arm/mach-at91/Kconfig"
 990
 991 source "arch/arm/mach-bcmring/Kconfig"
 992
 993 source "arch/arm/mach-clps711x/Kconfig"
 994
 995 source "arch/arm/mach-cns3xxx/Kconfig"
 996
 997 source "arch/arm/mach-davinci/Kconfig"
 998
 999 source "arch/arm/mach-dove/Kconfig"
1000
1001 source "arch/arm/mach-ep93xx/Kconfig"
1002
1003 source "arch/arm/mach-footbridge/Kconfig"
1004
1005 source "arch/arm/mach-gemini/Kconfig"
1006
1007 source "arch/arm/mach-h720x/Kconfig"
1008
1009 source "arch/arm/mach-integrator/Kconfig"
1010
1011 source "arch/arm/mach-iop32x/Kconfig"
1012
1013 source "arch/arm/mach-iop33x/Kconfig"
1014
1015 source "arch/arm/mach-iop13xx/Kconfig"
1016
1017 source "arch/arm/mach-ixp4xx/Kconfig"
1018
1019 source "arch/arm/mach-ixp2000/Kconfig"
1020
1021 source "arch/arm/mach-ixp23xx/Kconfig"
1022
1023 source "arch/arm/mach-kirkwood/Kconfig"
1024
1025 source "arch/arm/mach-ks8695/Kconfig"
1026
1027 source "arch/arm/mach-lpc32xx/Kconfig"
1028
1029 source "arch/arm/mach-msm/Kconfig"
1030
1031 source "arch/arm/mach-mv78xx0/Kconfig"
1032
1033 source "arch/arm/plat-mxc/Kconfig"
1034
1035 source "arch/arm/mach-mxs/Kconfig"
1036
1037 source "arch/arm/mach-netx/Kconfig"
1038
1039 source "arch/arm/mach-nomadik/Kconfig"
1040 source "arch/arm/plat-nomadik/Kconfig"
1041
1042 source "arch/arm/plat-omap/Kconfig"
1043
1044 source "arch/arm/mach-omap1/Kconfig"
1045
1046 source "arch/arm/mach-omap2/Kconfig"
1047
1048 source "arch/arm/mach-orion5x/Kconfig"
1049
1050 source "arch/arm/mach-pxa/Kconfig"
1051 source "arch/arm/plat-pxa/Kconfig"
1052
1053 source "arch/arm/mach-mmp/Kconfig"
1054
1055 source "arch/arm/mach-realview/Kconfig"
1056
1057 source "arch/arm/mach-sa1100/Kconfig"
1058
1059 source "arch/arm/plat-samsung/Kconfig"
1060 source "arch/arm/plat-s3c24xx/Kconfig"
1061 source "arch/arm/plat-s5p/Kconfig"
1062
1063 source "arch/arm/plat-spear/Kconfig"
1064
1065 source "arch/arm/plat-tcc/Kconfig"
1066
1067 if ARCH_S3C2410
1068 source "arch/arm/mach-s3c2410/Kconfig"
1069 source "arch/arm/mach-s3c2412/Kconfig"
1070 source "arch/arm/mach-s3c2416/Kconfig"
1071 source "arch/arm/mach-s3c2440/Kconfig"
1072 source "arch/arm/mach-s3c2443/Kconfig"
1073 endif
1074
1075 if ARCH_S3C64XX
1076 source "arch/arm/mach-s3c64xx/Kconfig"
1077 endif
1078
1079 source "arch/arm/mach-s5p64x0/Kconfig"
1080
1081 source "arch/arm/mach-s5pc100/Kconfig"
1082
1083 source "arch/arm/mach-s5pv210/Kconfig"
1084
1085 source "arch/arm/mach-exynos/Kconfig"
1086
1087 source "arch/arm/mach-shmobile/Kconfig"
1088
1089 source "arch/arm/mach-tegra/Kconfig"
1090
1091 source "arch/arm/mach-u300/Kconfig"
1092
1093 source "arch/arm/mach-ux500/Kconfig"
1094
1095 source "arch/arm/mach-versatile/Kconfig"
1096
1097 source "arch/arm/mach-vexpress/Kconfig"
1098 source "arch/arm/plat-versatile/Kconfig"
1099
1100 source "arch/arm/mach-vt8500/Kconfig"
1101
1102 source "arch/arm/mach-w90x900/Kconfig"
1103
1104 # Definitions to make life easier
1105 config ARCH_ACORN
1106         bool
1107
1108 config PLAT_IOP
1109         bool
1110         select GENERIC_CLOCKEVENTS
1111         select HAVE_SCHED_CLOCK
1112
1113 config PLAT_ORION
1114         bool
1115         select CLKSRC_MMIO
1116         select GENERIC_IRQ_CHIP
1117         select HAVE_SCHED_CLOCK
1118
1119 config PLAT_PXA
1120         bool
1121
1122 config PLAT_VERSATILE
1123         bool
1124
1125 config ARM_TIMER_SP804
1126         bool
1127         select CLKSRC_MMIO
1128
1129 source arch/arm/mm/Kconfig
1130
1131 config IWMMXT
1132         bool "Enable iWMMXt support"
1133         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1134         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1135         help
1136           Enable support for iWMMXt context switching at run time if
1137           running on a CPU that supports it.
1138
1139 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1140 config XSCALE_PMU
1141         bool
1142         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1143         default y
1144
1145 config CPU_HAS_PMU
1146         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1147                    (!ARCH_OMAP3 || OMAP3_EMU)
1148         default y
1149         bool
1150
1151 config MULTI_IRQ_HANDLER
1152         bool
1153         help
1154           Allow each machine to specify it's own IRQ handler at run time.
1155
1156 if !MMU
1157 source "arch/arm/Kconfig-nommu"
1158 endif
1159
1160 config ARM_ERRATA_411920
1161         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1162         depends on CPU_V6 || CPU_V6K
1163         help
1164           Invalidation of the Instruction Cache operation can
1165           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1166           It does not affect the MPCore. This option enables the ARM Ltd.
1167           recommended workaround.
1168
1169 config ARM_ERRATA_430973
1170         bool "ARM errata: Stale prediction on replaced interworking branch"
1171         depends on CPU_V7
1172         help
1173           This option enables the workaround for the 430973 Cortex-A8
1174           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1175           interworking branch is replaced with another code sequence at the
1176           same virtual address, whether due to self-modifying code or virtual
1177           to physical address re-mapping, Cortex-A8 does not recover from the
1178           stale interworking branch prediction. This results in Cortex-A8
1179           executing the new code sequence in the incorrect ARM or Thumb state.
1180           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1181           and also flushes the branch target cache at every context switch.
1182           Note that setting specific bits in the ACTLR register may not be
1183           available in non-secure mode.
1184
1185 config ARM_ERRATA_458693
1186         bool "ARM errata: Processor deadlock when a false hazard is created"
1187         depends on CPU_V7
1188         help
1189           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1190           erratum. For very specific sequences of memory operations, it is
1191           possible for a hazard condition intended for a cache line to instead
1192           be incorrectly associated with a different cache line. This false
1193           hazard might then cause a processor deadlock. The workaround enables
1194           the L1 caching of the NEON accesses and disables the PLD instruction
1195           in the ACTLR register. Note that setting specific bits in the ACTLR
1196           register may not be available in non-secure mode.
1197
1198 config ARM_ERRATA_460075
1199         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1200         depends on CPU_V7
1201         help
1202           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1203           erratum. Any asynchronous access to the L2 cache may encounter a
1204           situation in which recent store transactions to the L2 cache are lost
1205           and overwritten with stale memory contents from external memory. The
1206           workaround disables the write-allocate mode for the L2 cache via the
1207           ACTLR register. Note that setting specific bits in the ACTLR register
1208           may not be available in non-secure mode.
1209
1210 config ARM_ERRATA_742230
1211         bool "ARM errata: DMB operation may be faulty"
1212         depends on CPU_V7 && SMP
1213         help
1214           This option enables the workaround for the 742230 Cortex-A9
1215           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1216           between two write operations may not ensure the correct visibility
1217           ordering of the two writes. This workaround sets a specific bit in
1218           the diagnostic register of the Cortex-A9 which causes the DMB
1219           instruction to behave as a DSB, ensuring the correct behaviour of
1220           the two writes.
1221
1222 config ARM_ERRATA_742231
1223         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1224         depends on CPU_V7 && SMP
1225         help
1226           This option enables the workaround for the 742231 Cortex-A9
1227           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1228           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1229           accessing some data located in the same cache line, may get corrupted
1230           data due to bad handling of the address hazard when the line gets
1231           replaced from one of the CPUs at the same time as another CPU is
1232           accessing it. This workaround sets specific bits in the diagnostic
1233           register of the Cortex-A9 which reduces the linefill issuing
1234           capabilities of the processor.
1235
1236 config PL310_ERRATA_588369
1237         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1238         depends on CACHE_L2X0
1239         help
1240            The PL310 L2 cache controller implements three types of Clean &
1241            Invalidate maintenance operations: by Physical Address
1242            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1243            They are architecturally defined to behave as the execution of a
1244            clean operation followed immediately by an invalidate operation,
1245            both performing to the same memory location. This functionality
1246            is not correctly implemented in PL310 as clean lines are not
1247            invalidated as a result of these operations.
1248
1249 config ARM_ERRATA_720789
1250         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1251         depends on CPU_V7 && SMP
1252         help
1253           This option enables the workaround for the 720789 Cortex-A9 (prior to
1254           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1255           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1256           As a consequence of this erratum, some TLB entries which should be
1257           invalidated are not, resulting in an incoherency in the system page
1258           tables. The workaround changes the TLB flushing routines to invalidate
1259           entries regardless of the ASID.
1260
1261 config PL310_ERRATA_727915
1262         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1263         depends on CACHE_L2X0
1264         help
1265           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1266           operation (offset 0x7FC). This operation runs in background so that
1267           PL310 can handle normal accesses while it is in progress. Under very
1268           rare circumstances, due to this erratum, write data can be lost when
1269           PL310 treats a cacheable write transaction during a Clean &
1270           Invalidate by Way operation.
1271
1272 config ARM_ERRATA_743622
1273         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1274         depends on CPU_V7
1275         help
1276           This option enables the workaround for the 743622 Cortex-A9
1277           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1278           optimisation in the Cortex-A9 Store Buffer may lead to data
1279           corruption. This workaround sets a specific bit in the diagnostic
1280           register of the Cortex-A9 which disables the Store Buffer
1281           optimisation, preventing the defect from occurring. This has no
1282           visible impact on the overall performance or power consumption of the
1283           processor.
1284
1285 config ARM_ERRATA_751472
1286         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1287         depends on CPU_V7 && SMP
1288         help
1289           This option enables the workaround for the 751472 Cortex-A9 (prior
1290           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1291           completion of a following broadcasted operation if the second
1292           operation is received by a CPU before the ICIALLUIS has completed,
1293           potentially leading to corrupted entries in the cache or TLB.
1294
1295 config PL310_ERRATA_753970
1296         bool "PL310 errata: cache sync operation may be faulty"
1297         depends on CACHE_PL310
1298         help
1299           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1300
1301           Under some condition the effect of cache sync operation on
1302           the store buffer still remains when the operation completes.
1303           This means that the store buffer is always asked to drain and
1304           this prevents it from merging any further writes. The workaround
1305           is to replace the normal offset of cache sync operation (0x730)
1306           by another offset targeting an unmapped PL310 register 0x740.
1307           This has the same effect as the cache sync operation: store buffer
1308           drain and waiting for all buffers empty.
1309
1310 config ARM_ERRATA_754322
1311         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1312         depends on CPU_V7
1313         help
1314           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1315           r3p*) erratum. A speculative memory access may cause a page table walk
1316           which starts prior to an ASID switch but completes afterwards. This
1317           can populate the micro-TLB with a stale entry which may be hit with
1318           the new ASID. This workaround places two dsb instructions in the mm
1319           switching code so that no page table walks can cross the ASID switch.
1320
1321 config ARM_ERRATA_754327
1322         bool "ARM errata: no automatic Store Buffer drain"
1323         depends on CPU_V7 && SMP
1324         help
1325           This option enables the workaround for the 754327 Cortex-A9 (prior to
1326           r2p0) erratum. The Store Buffer does not have any automatic draining
1327           mechanism and therefore a livelock may occur if an external agent
1328           continuously polls a memory location waiting to observe an update.
1329           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1330           written polling loops from denying visibility of updates to memory.
1331
1332 config ARM_ERRATA_364296
1333         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1334         depends on CPU_V6 && !SMP
1335         help
1336           This options enables the workaround for the 364296 ARM1136
1337           r0p2 erratum (possible cache data corruption with
1338           hit-under-miss enabled). It sets the undocumented bit 31 in
1339           the auxiliary control register and the FI bit in the control
1340           register, thus disabling hit-under-miss without putting the
1341           processor into full low interrupt latency mode. ARM11MPCore
1342           is not affected.
1343
1344 config ARM_ERRATA_764369
1345         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1346         depends on CPU_V7 && SMP
1347         help
1348           This option enables the workaround for erratum 764369
1349           affecting Cortex-A9 MPCore with two or more processors (all
1350           current revisions). Under certain timing circumstances, a data
1351           cache line maintenance operation by MVA targeting an Inner
1352           Shareable memory region may fail to proceed up to either the
1353           Point of Coherency or to the Point of Unification of the
1354           system. This workaround adds a DSB instruction before the
1355           relevant cache maintenance functions and sets a specific bit
1356           in the diagnostic control register of the SCU.
1357
1358 config PL310_ERRATA_769419
1359         bool "PL310 errata: no automatic Store Buffer drain"
1360         depends on CACHE_L2X0
1361         help
1362           On revisions of the PL310 prior to r3p2, the Store Buffer does
1363           not automatically drain. This can cause normal, non-cacheable
1364           writes to be retained when the memory system is idle, leading
1365           to suboptimal I/O performance for drivers using coherent DMA.
1366           This option adds a write barrier to the cpu_idle loop so that,
1367           on systems with an outer cache, the store buffer is drained
1368           explicitly.
1369
1370 endmenu
1371
1372 source "arch/arm/common/Kconfig"
1373
1374 menu "Bus support"
1375
1376 config ARM_AMBA
1377         bool
1378
1379 config ISA
1380         bool
1381         help
1382           Find out whether you have ISA slots on your motherboard.  ISA is the
1383           name of a bus system, i.e. the way the CPU talks to the other stuff
1384           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1385           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1386           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1387
1388 # Select ISA DMA controller support
1389 config ISA_DMA
1390         bool
1391         select ISA_DMA_API
1392
1393 # Select ISA DMA interface
1394 config ISA_DMA_API
1395         bool
1396
1397 config PCI
1398         bool "PCI support" if MIGHT_HAVE_PCI
1399         help
1400           Find out whether you have a PCI motherboard. PCI is the name of a
1401           bus system, i.e. the way the CPU talks to the other stuff inside
1402           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1403           VESA. If you have PCI, say Y, otherwise N.
1404
1405 config PCI_DOMAINS
1406         bool
1407         depends on PCI
1408
1409 config PCI_NANOENGINE
1410         bool "BSE nanoEngine PCI support"
1411         depends on SA1100_NANOENGINE
1412         help
1413           Enable PCI on the BSE nanoEngine board.
1414
1415 config PCI_SYSCALL
1416         def_bool PCI
1417
1418 # Select the host bridge type
1419 config PCI_HOST_VIA82C505
1420         bool
1421         depends on PCI && ARCH_SHARK
1422         default y
1423
1424 config PCI_HOST_ITE8152
1425         bool
1426         depends on PCI && MACH_ARMCORE
1427         default y
1428         select DMABOUNCE
1429
1430 source "drivers/pci/Kconfig"
1431
1432 source "drivers/pcmcia/Kconfig"
1433
1434 endmenu
1435
1436 menu "Kernel Features"
1437
1438 source "kernel/time/Kconfig"
1439
1440 config SMP
1441         bool "Symmetric Multi-Processing"
1442         depends on CPU_V6K || CPU_V7
1443         depends on GENERIC_CLOCKEVENTS
1444         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1445                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1446                  ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1447                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK || SOC_IMX6Q
1448         depends on MMU
1449         select USE_GENERIC_SMP_HELPERS
1450         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1451         help
1452           This enables support for systems with more than one CPU. If you have
1453           a system with only one CPU, like most personal computers, say N. If
1454           you have a system with more than one CPU, say Y.
1455
1456           If you say N here, the kernel will run on single and multiprocessor
1457           machines, but will use only one CPU of a multiprocessor machine. If
1458           you say Y here, the kernel will run on many, but not all, single
1459           processor machines. On a single processor machine, the kernel will
1460           run faster if you say N here.
1461
1462           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1463           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1464           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1465
1466           If you don't know what to do here, say N.
1467
1468 config SMP_ON_UP
1469         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1470         depends on EXPERIMENTAL
1471         depends on SMP && !XIP_KERNEL
1472         default y
1473         help
1474           SMP kernels contain instructions which fail on non-SMP processors.
1475           Enabling this option allows the kernel to modify itself to make
1476           these instructions safe.  Disabling it allows about 1K of space
1477           savings.
1478
1479           If you don't know what to do here, say Y.
1480
1481 config ARM_CPU_TOPOLOGY
1482         bool "Support cpu topology definition"
1483         depends on SMP && CPU_V7
1484         default y
1485         help
1486           Support ARM cpu topology definition. The MPIDR register defines
1487           affinity between processors which is then used to describe the cpu
1488           topology of an ARM System.
1489
1490 config SCHED_MC
1491         bool "Multi-core scheduler support"
1492         depends on ARM_CPU_TOPOLOGY
1493         help
1494           Multi-core scheduler support improves the CPU scheduler's decision
1495           making when dealing with multi-core CPU chips at a cost of slightly
1496           increased overhead in some places. If unsure say N here.
1497
1498 config SCHED_SMT
1499         bool "SMT scheduler support"
1500         depends on ARM_CPU_TOPOLOGY
1501         help
1502           Improves the CPU scheduler's decision making when dealing with
1503           MultiThreading at a cost of slightly increased overhead in some
1504           places. If unsure say N here.
1505
1506 config HAVE_ARM_SCU
1507         bool
1508         help
1509           This option enables support for the ARM system coherency unit
1510
1511 config HAVE_ARM_TWD
1512         bool
1513         depends on SMP
1514         select TICK_ONESHOT
1515         help
1516           This options enables support for the ARM timer and watchdog unit
1517
1518 choice
1519         prompt "Memory split"
1520         default VMSPLIT_3G
1521         help
1522           Select the desired split between kernel and user memory.
1523
1524           If you are not absolutely sure what you are doing, leave this
1525           option alone!
1526
1527         config VMSPLIT_3G
1528                 bool "3G/1G user/kernel split"
1529         config VMSPLIT_2G
1530                 bool "2G/2G user/kernel split"
1531         config VMSPLIT_1G
1532                 bool "1G/3G user/kernel split"
1533 endchoice
1534
1535 config PAGE_OFFSET
1536         hex
1537         default 0x40000000 if VMSPLIT_1G
1538         default 0x80000000 if VMSPLIT_2G
1539         default 0xC0000000
1540
1541 config NR_CPUS
1542         int "Maximum number of CPUs (2-32)"
1543         range 2 32
1544         depends on SMP
1545         default "4"
1546
1547 config HOTPLUG_CPU
1548         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1549         depends on SMP && HOTPLUG && EXPERIMENTAL
1550         help
1551           Say Y here to experiment with turning CPUs off and on.  CPUs
1552           can be controlled through /sys/devices/system/cpu.
1553
1554 config LOCAL_TIMERS
1555         bool "Use local timer interrupts"
1556         depends on SMP
1557         default y
1558         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1559         help
1560           Enable support for local timers on SMP platforms, rather then the
1561           legacy IPI broadcast method.  Local timers allows the system
1562           accounting to be spread across the timer interval, preventing a
1563           "thundering herd" at every timer tick.
1564
1565 source kernel/Kconfig.preempt
1566
1567 config HZ
1568         int
1569         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1570                 ARCH_S5PV210 || ARCH_EXYNOS4
1571         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1572         default AT91_TIMER_HZ if ARCH_AT91
1573         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1574         default 100
1575
1576 config THUMB2_KERNEL
1577         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1578         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1579         select AEABI
1580         select ARM_ASM_UNIFIED
1581         select ARM_UNWIND
1582         help
1583           By enabling this option, the kernel will be compiled in
1584           Thumb-2 mode. A compiler/assembler that understand the unified
1585           ARM-Thumb syntax is needed.
1586
1587           If unsure, say N.
1588
1589 config THUMB2_AVOID_R_ARM_THM_JUMP11
1590         bool "Work around buggy Thumb-2 short branch relocations in gas"
1591         depends on THUMB2_KERNEL && MODULES
1592         default y
1593         help
1594           Various binutils versions can resolve Thumb-2 branches to
1595           locally-defined, preemptible global symbols as short-range "b.n"
1596           branch instructions.
1597
1598           This is a problem, because there's no guarantee the final
1599           destination of the symbol, or any candidate locations for a
1600           trampoline, are within range of the branch.  For this reason, the
1601           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1602           relocation in modules at all, and it makes little sense to add
1603           support.
1604
1605           The symptom is that the kernel fails with an "unsupported
1606           relocation" error when loading some modules.
1607
1608           Until fixed tools are available, passing
1609           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1610           code which hits this problem, at the cost of a bit of extra runtime
1611           stack usage in some cases.
1612
1613           The problem is described in more detail at:
1614               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1615
1616           Only Thumb-2 kernels are affected.
1617
1618           Unless you are sure your tools don't have this problem, say Y.
1619
1620 config ARM_ASM_UNIFIED
1621         bool
1622
1623 config AEABI
1624         bool "Use the ARM EABI to compile the kernel"
1625         help
1626           This option allows for the kernel to be compiled using the latest
1627           ARM ABI (aka EABI).  This is only useful if you are using a user
1628           space environment that is also compiled with EABI.
1629
1630           Since there are major incompatibilities between the legacy ABI and
1631           EABI, especially with regard to structure member alignment, this
1632           option also changes the kernel syscall calling convention to
1633           disambiguate both ABIs and allow for backward compatibility support
1634           (selected with CONFIG_OABI_COMPAT).
1635
1636           To use this you need GCC version 4.0.0 or later.
1637
1638 config OABI_COMPAT
1639         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1640         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1641         default y
1642         help
1643           This option preserves the old syscall interface along with the
1644           new (ARM EABI) one. It also provides a compatibility layer to
1645           intercept syscalls that have structure arguments which layout
1646           in memory differs between the legacy ABI and the new ARM EABI
1647           (only for non "thumb" binaries). This option adds a tiny
1648           overhead to all syscalls and produces a slightly larger kernel.
1649           If you know you'll be using only pure EABI user space then you
1650           can say N here. If this option is not selected and you attempt
1651           to execute a legacy ABI binary then the result will be
1652           UNPREDICTABLE (in fact it can be predicted that it won't work
1653           at all). If in doubt say Y.
1654
1655 config ARCH_HAS_HOLES_MEMORYMODEL
1656         bool
1657
1658 config ARCH_SPARSEMEM_ENABLE
1659         bool
1660
1661 config ARCH_SPARSEMEM_DEFAULT
1662         def_bool ARCH_SPARSEMEM_ENABLE
1663
1664 config ARCH_SELECT_MEMORY_MODEL
1665         def_bool ARCH_SPARSEMEM_ENABLE
1666
1667 config HAVE_ARCH_PFN_VALID
1668         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1669
1670 config HIGHMEM
1671         bool "High Memory Support"
1672         depends on MMU
1673         help
1674           The address space of ARM processors is only 4 Gigabytes large
1675           and it has to accommodate user address space, kernel address
1676           space as well as some memory mapped IO. That means that, if you
1677           have a large amount of physical memory and/or IO, not all of the
1678           memory can be "permanently mapped" by the kernel. The physical
1679           memory that is not permanently mapped is called "high memory".
1680
1681           Depending on the selected kernel/user memory split, minimum
1682           vmalloc space and actual amount of RAM, you may not need this
1683           option which should result in a slightly faster kernel.
1684
1685           If unsure, say n.
1686
1687 config HIGHPTE
1688         bool "Allocate 2nd-level pagetables from highmem"
1689         depends on HIGHMEM
1690
1691 config HW_PERF_EVENTS
1692         bool "Enable hardware performance counter support for perf events"
1693         depends on PERF_EVENTS && CPU_HAS_PMU
1694         default y
1695         help
1696           Enable hardware performance counter support for perf events. If
1697           disabled, perf events will use software events only.
1698
1699 source "mm/Kconfig"
1700
1701 config FORCE_MAX_ZONEORDER
1702         int "Maximum zone order" if ARCH_SHMOBILE
1703         range 11 64 if ARCH_SHMOBILE
1704         default "9" if SA1111
1705         default "11"
1706         help
1707           The kernel memory allocator divides physically contiguous memory
1708           blocks into "zones", where each zone is a power of two number of
1709           pages.  This option selects the largest power of two that the kernel
1710           keeps in the memory allocator.  If you need to allocate very large
1711           blocks of physically contiguous memory, then you may need to
1712           increase this value.
1713
1714           This config option is actually maximum order plus one. For example,
1715           a value of 11 means that the largest free memory block is 2^10 pages.
1716
1717 config LEDS
1718         bool "Timer and CPU usage LEDs"
1719         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1720                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1721                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1722                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1723                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1724                    ARCH_AT91 || ARCH_DAVINCI || \
1725                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1726         help
1727           If you say Y here, the LEDs on your machine will be used
1728           to provide useful information about your current system status.
1729
1730           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1731           be able to select which LEDs are active using the options below. If
1732           you are compiling a kernel for the EBSA-110 or the LART however, the
1733           red LED will simply flash regularly to indicate that the system is
1734           still functional. It is safe to say Y here if you have a CATS
1735           system, but the driver will do nothing.
1736
1737 config LEDS_TIMER
1738         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1739                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1740                             || MACH_OMAP_PERSEUS2
1741         depends on LEDS
1742         depends on !GENERIC_CLOCKEVENTS
1743         default y if ARCH_EBSA110
1744         help
1745           If you say Y here, one of the system LEDs (the green one on the
1746           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1747           will flash regularly to indicate that the system is still
1748           operational. This is mainly useful to kernel hackers who are
1749           debugging unstable kernels.
1750
1751           The LART uses the same LED for both Timer LED and CPU usage LED
1752           functions. You may choose to use both, but the Timer LED function
1753           will overrule the CPU usage LED.
1754
1755 config LEDS_CPU
1756         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1757                         !ARCH_OMAP) \
1758                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1759                         || MACH_OMAP_PERSEUS2
1760         depends on LEDS
1761         help
1762           If you say Y here, the red LED will be used to give a good real
1763           time indication of CPU usage, by lighting whenever the idle task
1764           is not currently executing.
1765
1766           The LART uses the same LED for both Timer LED and CPU usage LED
1767           functions. You may choose to use both, but the Timer LED function
1768           will overrule the CPU usage LED.
1769
1770 config ALIGNMENT_TRAP
1771         bool
1772         depends on CPU_CP15_MMU
1773         default y if !ARCH_EBSA110
1774         select HAVE_PROC_CPU if PROC_FS
1775         help
1776           ARM processors cannot fetch/store information which is not
1777           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1778           address divisible by 4. On 32-bit ARM processors, these non-aligned
1779           fetch/store instructions will be emulated in software if you say
1780           here, which has a severe performance impact. This is necessary for
1781           correct operation of some network protocols. With an IP-only
1782           configuration it is safe to say N, otherwise say Y.
1783
1784 config UACCESS_WITH_MEMCPY
1785         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1786         depends on MMU && EXPERIMENTAL
1787         default y if CPU_FEROCEON
1788         help
1789           Implement faster copy_to_user and clear_user methods for CPU
1790           cores where a 8-word STM instruction give significantly higher
1791           memory write throughput than a sequence of individual 32bit stores.
1792
1793           A possible side effect is a slight increase in scheduling latency
1794           between threads sharing the same address space if they invoke
1795           such copy operations with large buffers.
1796
1797           However, if the CPU data cache is using a write-allocate mode,
1798           this option is unlikely to provide any performance gain.
1799
1800 config SECCOMP
1801         bool
1802         prompt "Enable seccomp to safely compute untrusted bytecode"
1803         ---help---
1804           This kernel feature is useful for number crunching applications
1805           that may need to compute untrusted bytecode during their
1806           execution. By using pipes or other transports made available to
1807           the process as file descriptors supporting the read/write
1808           syscalls, it's possible to isolate those applications in
1809           their own address space using seccomp. Once seccomp is
1810           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1811           and the task is only allowed to execute a few safe syscalls
1812           defined by each seccomp mode.
1813
1814 config CC_STACKPROTECTOR
1815         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1816         depends on EXPERIMENTAL
1817         help
1818           This option turns on the -fstack-protector GCC feature. This
1819           feature puts, at the beginning of functions, a canary value on
1820           the stack just before the return address, and validates
1821           the value just before actually returning.  Stack based buffer
1822           overflows (that need to overwrite this return address) now also
1823           overwrite the canary, which gets detected and the attack is then
1824           neutralized via a kernel panic.
1825           This feature requires gcc version 4.2 or above.
1826
1827 config DEPRECATED_PARAM_STRUCT
1828         bool "Provide old way to pass kernel parameters"
1829         help
1830           This was deprecated in 2001 and announced to live on for 5 years.
1831           Some old boot loaders still use this way.
1832
1833 endmenu
1834
1835 menu "Boot options"
1836
1837 config USE_OF
1838         bool "Flattened Device Tree support"
1839         select OF
1840         select OF_EARLY_FLATTREE
1841         select IRQ_DOMAIN
1842         help
1843           Include support for flattened device tree machine descriptions.
1844
1845 # Compressed boot loader in ROM.  Yes, we really want to ask about
1846 # TEXT and BSS so we preserve their values in the config files.
1847 config ZBOOT_ROM_TEXT
1848         hex "Compressed ROM boot loader base address"
1849         default "0"
1850         help
1851           The physical address at which the ROM-able zImage is to be
1852           placed in the target.  Platforms which normally make use of
1853           ROM-able zImage formats normally set this to a suitable
1854           value in their defconfig file.
1855
1856           If ZBOOT_ROM is not enabled, this has no effect.
1857
1858 config ZBOOT_ROM_BSS
1859         hex "Compressed ROM boot loader BSS address"
1860         default "0"
1861         help
1862           The base address of an area of read/write memory in the target
1863           for the ROM-able zImage which must be available while the
1864           decompressor is running. It must be large enough to hold the
1865           entire decompressed kernel plus an additional 128 KiB.
1866           Platforms which normally make use of ROM-able zImage formats
1867           normally set this to a suitable value in their defconfig file.
1868
1869           If ZBOOT_ROM is not enabled, this has no effect.
1870
1871 config ZBOOT_ROM
1872         bool "Compressed boot loader in ROM/flash"
1873         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1874         help
1875           Say Y here if you intend to execute your compressed kernel image
1876           (zImage) directly from ROM or flash.  If unsure, say N.
1877
1878 choice
1879         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1880         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1881         default ZBOOT_ROM_NONE
1882         help
1883           Include experimental SD/MMC loading code in the ROM-able zImage.
1884           With this enabled it is possible to write the the ROM-able zImage
1885           kernel image to an MMC or SD card and boot the kernel straight
1886           from the reset vector. At reset the processor Mask ROM will load
1887           the first part of the the ROM-able zImage which in turn loads the
1888           rest the kernel image to RAM.
1889
1890 config ZBOOT_ROM_NONE
1891         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1892         help
1893           Do not load image from SD or MMC
1894
1895 config ZBOOT_ROM_MMCIF
1896         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1897         help
1898           Load image from MMCIF hardware block.
1899
1900 config ZBOOT_ROM_SH_MOBILE_SDHI
1901         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1902         help
1903           Load image from SDHI hardware block
1904
1905 endchoice
1906
1907 config ARM_APPENDED_DTB
1908         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1909         depends on OF && !ZBOOT_ROM && EXPERIMENTAL
1910         help
1911           With this option, the boot code will look for a device tree binary
1912           (DTB) appended to zImage
1913           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1914
1915           This is meant as a backward compatibility convenience for those
1916           systems with a bootloader that can't be upgraded to accommodate
1917           the documented boot protocol using a device tree.
1918
1919           Beware that there is very little in terms of protection against
1920           this option being confused by leftover garbage in memory that might
1921           look like a DTB header after a reboot if no actual DTB is appended
1922           to zImage.  Do not leave this option active in a production kernel
1923           if you don't intend to always append a DTB.  Proper passing of the
1924           location into r2 of a bootloader provided DTB is always preferable
1925           to this option.
1926
1927 config ARM_ATAG_DTB_COMPAT
1928         bool "Supplement the appended DTB with traditional ATAG information"
1929         depends on ARM_APPENDED_DTB
1930         help
1931           Some old bootloaders can't be updated to a DTB capable one, yet
1932           they provide ATAGs with memory configuration, the ramdisk address,
1933           the kernel cmdline string, etc.  Such information is dynamically
1934           provided by the bootloader and can't always be stored in a static
1935           DTB.  To allow a device tree enabled kernel to be used with such
1936           bootloaders, this option allows zImage to extract the information
1937           from the ATAG list and store it at run time into the appended DTB.
1938
1939 config CMDLINE
1940         string "Default kernel command string"
1941         default ""
1942         help
1943           On some architectures (EBSA110 and CATS), there is currently no way
1944           for the boot loader to pass arguments to the kernel. For these
1945           architectures, you should supply some command-line options at build
1946           time by entering them here. As a minimum, you should specify the
1947           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1948
1949 choice
1950         prompt "Kernel command line type" if CMDLINE != ""
1951         default CMDLINE_FROM_BOOTLOADER
1952
1953 config CMDLINE_FROM_BOOTLOADER
1954         bool "Use bootloader kernel arguments if available"
1955         help
1956           Uses the command-line options passed by the boot loader. If
1957           the boot loader doesn't provide any, the default kernel command
1958           string provided in CMDLINE will be used.
1959
1960 config CMDLINE_EXTEND
1961         bool "Extend bootloader kernel arguments"
1962         help
1963           The command-line arguments provided by the boot loader will be
1964           appended to the default kernel command string.
1965
1966 config CMDLINE_FORCE
1967         bool "Always use the default kernel command string"
1968         help
1969           Always use the default kernel command string, even if the boot
1970           loader passes other arguments to the kernel.
1971           This is useful if you cannot or don't want to change the
1972           command-line options your boot loader passes to the kernel.
1973 endchoice
1974
1975 config XIP_KERNEL
1976         bool "Kernel Execute-In-Place from ROM"
1977         depends on !ZBOOT_ROM
1978         help
1979           Execute-In-Place allows the kernel to run from non-volatile storage
1980           directly addressable by the CPU, such as NOR flash. This saves RAM
1981           space since the text section of the kernel is not loaded from flash
1982           to RAM.  Read-write sections, such as the data section and stack,
1983           are still copied to RAM.  The XIP kernel is not compressed since
1984           it has to run directly from flash, so it will take more space to
1985           store it.  The flash address used to link the kernel object files,
1986           and for storing it, is configuration dependent. Therefore, if you
1987           say Y here, you must know the proper physical address where to
1988           store the kernel image depending on your own flash memory usage.
1989
1990           Also note that the make target becomes "make xipImage" rather than
1991           "make zImage" or "make Image".  The final kernel binary to put in
1992           ROM memory will be arch/arm/boot/xipImage.
1993
1994           If unsure, say N.
1995
1996 config XIP_PHYS_ADDR
1997         hex "XIP Kernel Physical Location"
1998         depends on XIP_KERNEL
1999         default "0x00080000"
2000         help
2001           This is the physical address in your flash memory the kernel will
2002           be linked for and stored to.  This address is dependent on your
2003           own flash usage.
2004
2005 config KEXEC
2006         bool "Kexec system call (EXPERIMENTAL)"
2007         depends on EXPERIMENTAL
2008         help
2009           kexec is a system call that implements the ability to shutdown your
2010           current kernel, and to start another kernel.  It is like a reboot
2011           but it is independent of the system firmware.   And like a reboot
2012           you can start any kernel with it, not just Linux.
2013
2014           It is an ongoing process to be certain the hardware in a machine
2015           is properly shutdown, so do not be surprised if this code does not
2016           initially work for you.  It may help to enable device hotplugging
2017           support.
2018
2019 config ATAGS_PROC
2020         bool "Export atags in procfs"
2021         depends on KEXEC
2022         default y
2023         help
2024           Should the atags used to boot the kernel be exported in an "atags"
2025           file in procfs. Useful with kexec.
2026
2027 config CRASH_DUMP
2028         bool "Build kdump crash kernel (EXPERIMENTAL)"
2029         depends on EXPERIMENTAL
2030         help
2031           Generate crash dump after being started by kexec. This should
2032           be normally only set in special crash dump kernels which are
2033           loaded in the main kernel with kexec-tools into a specially
2034           reserved region and then later executed after a crash by
2035           kdump/kexec. The crash dump kernel must be compiled to a
2036           memory address not used by the main kernel
2037
2038           For more details see Documentation/kdump/kdump.txt
2039
2040 config AUTO_ZRELADDR
2041         bool "Auto calculation of the decompressed kernel image address"
2042         depends on !ZBOOT_ROM && !ARCH_U300
2043         help
2044           ZRELADDR is the physical address where the decompressed kernel
2045           image will be placed. If AUTO_ZRELADDR is selected, the address
2046           will be determined at run-time by masking the current IP with
2047           0xf8000000. This assumes the zImage being placed in the first 128MB
2048           from start of memory.
2049
2050 endmenu
2051
2052 menu "CPU Power Management"
2053
2054 if ARCH_HAS_CPUFREQ
2055
2056 source "drivers/cpufreq/Kconfig"
2057
2058 config CPU_FREQ_IMX
2059         tristate "CPUfreq driver for i.MX CPUs"
2060         depends on ARCH_MXC && CPU_FREQ
2061         help
2062           This enables the CPUfreq driver for i.MX CPUs.
2063
2064 config CPU_FREQ_SA1100
2065         bool
2066
2067 config CPU_FREQ_SA1110
2068         bool
2069
2070 config CPU_FREQ_INTEGRATOR
2071         tristate "CPUfreq driver for ARM Integrator CPUs"
2072         depends on ARCH_INTEGRATOR && CPU_FREQ
2073         default y
2074         help
2075           This enables the CPUfreq driver for ARM Integrator CPUs.
2076
2077           For details, take a look at <file:Documentation/cpu-freq>.
2078
2079           If in doubt, say Y.
2080
2081 config CPU_FREQ_PXA
2082         bool
2083         depends on CPU_FREQ && ARCH_PXA && PXA25x
2084         default y
2085         select CPU_FREQ_TABLE
2086         select CPU_FREQ_DEFAULT_GOV_USERSPACE
2087
2088 config CPU_FREQ_S3C
2089         bool
2090         help
2091           Internal configuration node for common cpufreq on Samsung SoC
2092
2093 config CPU_FREQ_S3C24XX
2094         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2095         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
2096         select CPU_FREQ_S3C
2097         help
2098           This enables the CPUfreq driver for the Samsung S3C24XX family
2099           of CPUs.
2100
2101           For details, take a look at <file:Documentation/cpu-freq>.
2102
2103           If in doubt, say N.
2104
2105 config CPU_FREQ_S3C24XX_PLL
2106         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2107         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
2108         help
2109           Compile in support for changing the PLL frequency from the
2110           S3C24XX series CPUfreq driver. The PLL takes time to settle
2111           after a frequency change, so by default it is not enabled.
2112
2113           This also means that the PLL tables for the selected CPU(s) will
2114           be built which may increase the size of the kernel image.
2115
2116 config CPU_FREQ_S3C24XX_DEBUG
2117         bool "Debug CPUfreq Samsung driver core"
2118         depends on CPU_FREQ_S3C24XX
2119         help
2120           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2121
2122 config CPU_FREQ_S3C24XX_IODEBUG
2123         bool "Debug CPUfreq Samsung driver IO timing"
2124         depends on CPU_FREQ_S3C24XX
2125         help
2126           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2127
2128 config CPU_FREQ_S3C24XX_DEBUGFS
2129         bool "Export debugfs for CPUFreq"
2130         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2131         help
2132           Export status information via debugfs.
2133
2134 endif
2135
2136 source "drivers/cpuidle/Kconfig"
2137
2138 endmenu
2139
2140 menu "Floating point emulation"
2141
2142 comment "At least one emulation must be selected"
2143
2144 config FPE_NWFPE
2145         bool "NWFPE math emulation"
2146         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2147         ---help---
2148           Say Y to include the NWFPE floating point emulator in the kernel.
2149           This is necessary to run most binaries. Linux does not currently
2150           support floating point hardware so you need to say Y here even if
2151           your machine has an FPA or floating point co-processor podule.
2152
2153           You may say N here if you are going to load the Acorn FPEmulator
2154           early in the bootup.
2155
2156 config FPE_NWFPE_XP
2157         bool "Support extended precision"
2158         depends on FPE_NWFPE
2159         help
2160           Say Y to include 80-bit support in the kernel floating-point
2161           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2162           Note that gcc does not generate 80-bit operations by default,
2163           so in most cases this option only enlarges the size of the
2164           floating point emulator without any good reason.
2165
2166           You almost surely want to say N here.
2167
2168 config FPE_FASTFPE
2169         bool "FastFPE math emulation (EXPERIMENTAL)"
2170         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2171         ---help---
2172           Say Y here to include the FAST floating point emulator in the kernel.
2173           This is an experimental much faster emulator which now also has full
2174           precision for the mantissa.  It does not support any exceptions.
2175           It is very simple, and approximately 3-6 times faster than NWFPE.
2176
2177           It should be sufficient for most programs.  It may be not suitable
2178           for scientific calculations, but you have to check this for yourself.
2179           If you do not feel you need a faster FP emulation you should better
2180           choose NWFPE.
2181
2182 config VFP
2183         bool "VFP-format floating point maths"
2184         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2185         help
2186           Say Y to include VFP support code in the kernel. This is needed
2187           if your hardware includes a VFP unit.
2188
2189           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2190           release notes and additional status information.
2191
2192           Say N if your target does not have VFP hardware.
2193
2194 config VFPv3
2195         bool
2196         depends on VFP
2197         default y if CPU_V7
2198
2199 config NEON
2200         bool "Advanced SIMD (NEON) Extension support"
2201         depends on VFPv3 && CPU_V7
2202         help
2203           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2204           Extension.
2205
2206 endmenu
2207
2208 menu "Userspace binary formats"
2209
2210 source "fs/Kconfig.binfmt"
2211
2212 config ARTHUR
2213         tristate "RISC OS personality"
2214         depends on !AEABI
2215         help
2216           Say Y here to include the kernel code necessary if you want to run
2217           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2218           experimental; if this sounds frightening, say N and sleep in peace.
2219           You can also say M here to compile this support as a module (which
2220           will be called arthur).
2221
2222 endmenu
2223
2224 menu "Power management options"
2225
2226 source "kernel/power/Kconfig"
2227
2228 config ARCH_SUSPEND_POSSIBLE
2229         depends on !ARCH_S5PC100
2230         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2231                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2232         def_bool y
2233
2234 config ARM_CPU_SUSPEND
2235         def_bool PM_SLEEP
2236
2237 endmenu
2238
2239 source "net/Kconfig"
2240
2241 source "drivers/Kconfig"
2242
2243 source "fs/Kconfig"
2244
2245 source "arch/arm/Kconfig.debug"
2246
2247 source "security/Kconfig"
2248
2249 source "crypto/Kconfig"
2250
2251 source "lib/Kconfig"