arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if !XIP_KERNEL
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         select GENERIC_IRQ_SHOW
  32         help
  33           The ARM series is a line of low-power-consumption RISC chip designs
  34           licensed by ARM Ltd and targeted at embedded applications and
  35           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  36           manufactured, but legacy ARM-based PC hardware remains popular in
  37           Europe.  There is an ARM Linux project with a web page at
  38           <http://www.arm.linux.org.uk/>.
  39
  40 config ARM_HAS_SG_CHAIN
  41         bool
  42
  43 config HAVE_PWM
  44         bool
  45
  46 config MIGHT_HAVE_PCI
  47         bool
  48
  49 config SYS_SUPPORTS_APM_EMULATION
  50         bool
  51
  52 config HAVE_SCHED_CLOCK
  53         bool
  54
  55 config GENERIC_GPIO
  56         bool
  57
  58 config ARCH_USES_GETTIMEOFFSET
  59         bool
  60         default n
  61
  62 config GENERIC_CLOCKEVENTS
  63         bool
  64
  65 config GENERIC_CLOCKEVENTS_BROADCAST
  66         bool
  67         depends on GENERIC_CLOCKEVENTS
  68         default y if SMP
  69
  70 config KTIME_SCALAR
  71         bool
  72         default y
  73
  74 config HAVE_TCM
  75         bool
  76         select GENERIC_ALLOCATOR
  77
  78 config HAVE_PROC_CPU
  79         bool
  80
  81 config NO_IOPORT
  82         bool
  83
  84 config EISA
  85         bool
  86         ---help---
  87           The Extended Industry Standard Architecture (EISA) bus was
  88           developed as an open alternative to the IBM MicroChannel bus.
  89
  90           The EISA bus provided some of the features of the IBM MicroChannel
  91           bus while maintaining backward compatibility with cards made for
  92           the older ISA bus.  The EISA bus saw limited use between 1988 and
  93           1995 when it was made obsolete by the PCI bus.
  94
  95           Say Y here if you are building a kernel for an EISA-based machine.
  96
  97           Otherwise, say N.
  98
  99 config SBUS
 100         bool
 101
 102 config MCA
 103         bool
 104         help
 105           MicroChannel Architecture is found in some IBM PS/2 machines and
 106           laptops.  It is a bus system similar to PCI or ISA. See
 107           <file:Documentation/mca.txt> (and especially the web page given
 108           there) before attempting to build an MCA bus kernel.
 109
 110 config STACKTRACE_SUPPORT
 111         bool
 112         default y
 113
 114 config HAVE_LATENCYTOP_SUPPORT
 115         bool
 116         depends on !SMP
 117         default y
 118
 119 config LOCKDEP_SUPPORT
 120         bool
 121         default y
 122
 123 config TRACE_IRQFLAGS_SUPPORT
 124         bool
 125         default y
 126
 127 config HARDIRQS_SW_RESEND
 128         bool
 129         default y
 130
 131 config GENERIC_IRQ_PROBE
 132         bool
 133         default y
 134
 135 config GENERIC_LOCKBREAK
 136         bool
 137         default y
 138         depends on SMP && PREEMPT
 139
 140 config RWSEM_GENERIC_SPINLOCK
 141         bool
 142         default y
 143
 144 config RWSEM_XCHGADD_ALGORITHM
 145         bool
 146
 147 config ARCH_HAS_ILOG2_U32
 148         bool
 149
 150 config ARCH_HAS_ILOG2_U64
 151         bool
 152
 153 config ARCH_HAS_CPUFREQ
 154         bool
 155         help
 156           Internal node to signify that the ARCH has CPUFREQ support
 157           and that the relevant menu configurations are displayed for
 158           it.
 159
 160 config ARCH_HAS_CPU_IDLE_WAIT
 161        def_bool y
 162
 163 config GENERIC_HWEIGHT
 164         bool
 165         default y
 166
 167 config GENERIC_CALIBRATE_DELAY
 168         bool
 169         default y
 170
 171 config ARCH_MAY_HAVE_PC_FDC
 172         bool
 173
 174 config ZONE_DMA
 175         bool
 176
 177 config NEED_DMA_MAP_STATE
 178        def_bool y
 179
 180 config GENERIC_ISA_DMA
 181         bool
 182
 183 config FIQ
 184         bool
 185
 186 config ARCH_MTD_XIP
 187         bool
 188
 189 config VECTORS_BASE
 190         hex
 191         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 192         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 193         default 0x00000000
 194         help
 195           The base address of exception vectors.
 196
 197 config ARM_PATCH_PHYS_VIRT
 198         bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
 199         depends on EXPERIMENTAL
 200         depends on !XIP_KERNEL && MMU
 201         depends on !ARCH_REALVIEW || !SPARSEMEM
 202         help
 203           Patch phys-to-virt and virt-to-phys translation functions at
 204           boot and module load time according to the position of the
 205           kernel in system memory.
 206
 207           This can only be used with non-XIP MMU kernels where the base
 208           of physical memory is at a 16MB boundary, or theoretically 64K
 209           for the MSM machine class.
 210
 211 config ARM_PATCH_PHYS_VIRT_16BIT
 212         def_bool y
 213         depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
 214         help
 215           This option extends the physical to virtual translation patching
 216           to allow physical memory down to a theoretical minimum of 64K
 217           boundaries.
 218
 219 source "init/Kconfig"
 220
 221 source "kernel/Kconfig.freezer"
 222
 223 menu "System Type"
 224
 225 config MMU
 226         bool "MMU-based Paged Memory Management Support"
 227         default y
 228         help
 229           Select if you want MMU-based virtualised addressing space
 230           support by paged memory management. If unsure, say 'Y'.
 231
 232 #
 233 # The "ARM system type" choice list is ordered alphabetically by option
 234 # text.  Please add new entries in the option alphabetic order.
 235 #
 236 choice
 237         prompt "ARM system type"
 238         default ARCH_VERSATILE
 239
 240 config ARCH_INTEGRATOR
 241         bool "ARM Ltd. Integrator family"
 242         select ARM_AMBA
 243         select ARCH_HAS_CPUFREQ
 244         select CLKDEV_LOOKUP
 245         select ICST
 246         select GENERIC_CLOCKEVENTS
 247         select PLAT_VERSATILE
 248         select PLAT_VERSATILE_FPGA_IRQ
 249         help
 250           Support for ARM's Integrator platform.
 251
 252 config ARCH_REALVIEW
 253         bool "ARM Ltd. RealView family"
 254         select ARM_AMBA
 255         select CLKDEV_LOOKUP
 256         select ICST
 257         select GENERIC_CLOCKEVENTS
 258         select ARCH_WANT_OPTIONAL_GPIOLIB
 259         select PLAT_VERSATILE
 260         select PLAT_VERSATILE_CLCD
 261         select ARM_TIMER_SP804
 262         select GPIO_PL061 if GPIOLIB
 263         help
 264           This enables support for ARM Ltd RealView boards.
 265
 266 config ARCH_VERSATILE
 267         bool "ARM Ltd. Versatile family"
 268         select ARM_AMBA
 269         select ARM_VIC
 270         select CLKDEV_LOOKUP
 271         select ICST
 272         select GENERIC_CLOCKEVENTS
 273         select ARCH_WANT_OPTIONAL_GPIOLIB
 274         select PLAT_VERSATILE
 275         select PLAT_VERSATILE_CLCD
 276         select PLAT_VERSATILE_FPGA_IRQ
 277         select ARM_TIMER_SP804
 278         help
 279           This enables support for ARM Ltd Versatile board.
 280
 281 config ARCH_VEXPRESS
 282         bool "ARM Ltd. Versatile Express family"
 283         select ARCH_WANT_OPTIONAL_GPIOLIB
 284         select ARM_AMBA
 285         select ARM_TIMER_SP804
 286         select CLKDEV_LOOKUP
 287         select GENERIC_CLOCKEVENTS
 288         select HAVE_CLK
 289         select HAVE_PATA_PLATFORM
 290         select ICST
 291         select PLAT_VERSATILE
 292         select PLAT_VERSATILE_CLCD
 293         help
 294           This enables support for the ARM Ltd Versatile Express boards.
 295
 296 config ARCH_AT91
 297         bool "Atmel AT91"
 298         select ARCH_REQUIRE_GPIOLIB
 299         select HAVE_CLK
 300         select CLKDEV_LOOKUP
 301         select ARM_PATCH_PHYS_VIRT if MMU
 302         help
 303           This enables support for systems based on the Atmel AT91RM9200,
 304           AT91SAM9 and AT91CAP9 processors.
 305
 306 config ARCH_BCMRING
 307         bool "Broadcom BCMRING"
 308         depends on MMU
 309         select CPU_V6
 310         select ARM_AMBA
 311         select ARM_TIMER_SP804
 312         select CLKDEV_LOOKUP
 313         select GENERIC_CLOCKEVENTS
 314         select ARCH_WANT_OPTIONAL_GPIOLIB
 315         help
 316           Support for Broadcom's BCMRing platform.
 317
 318 config ARCH_CLPS711X
 319         bool "Cirrus Logic CLPS711x/EP721x-based"
 320         select CPU_ARM720T
 321         select ARCH_USES_GETTIMEOFFSET
 322         help
 323           Support for Cirrus Logic 711x/721x based boards.
 324
 325 config ARCH_CNS3XXX
 326         bool "Cavium Networks CNS3XXX family"
 327         select CPU_V6
 328         select GENERIC_CLOCKEVENTS
 329         select ARM_GIC
 330         select MIGHT_HAVE_PCI
 331         select PCI_DOMAINS if PCI
 332         help
 333           Support for Cavium Networks CNS3XXX platform.
 334
 335 config ARCH_GEMINI
 336         bool "Cortina Systems Gemini"
 337         select CPU_FA526
 338         select ARCH_REQUIRE_GPIOLIB
 339         select ARCH_USES_GETTIMEOFFSET
 340         help
 341           Support for the Cortina Systems Gemini family SoCs
 342
 343 config ARCH_EBSA110
 344         bool "EBSA-110"
 345         select CPU_SA110
 346         select ISA
 347         select NO_IOPORT
 348         select ARCH_USES_GETTIMEOFFSET
 349         help
 350           This is an evaluation board for the StrongARM processor available
 351           from Digital. It has limited hardware on-board, including an
 352           Ethernet interface, two PCMCIA sockets, two serial ports and a
 353           parallel port.
 354
 355 config ARCH_EP93XX
 356         bool "EP93xx-based"
 357         select CPU_ARM920T
 358         select ARM_AMBA
 359         select ARM_VIC
 360         select CLKDEV_LOOKUP
 361         select ARCH_REQUIRE_GPIOLIB
 362         select ARCH_HAS_HOLES_MEMORYMODEL
 363         select ARCH_USES_GETTIMEOFFSET
 364         help
 365           This enables support for the Cirrus EP93xx series of CPUs.
 366
 367 config ARCH_FOOTBRIDGE
 368         bool "FootBridge"
 369         select CPU_SA110
 370         select FOOTBRIDGE
 371         select GENERIC_CLOCKEVENTS
 372         help
 373           Support for systems based on the DC21285 companion chip
 374           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 375
 376 config ARCH_MXC
 377         bool "Freescale MXC/iMX-based"
 378         select GENERIC_CLOCKEVENTS
 379         select ARCH_REQUIRE_GPIOLIB
 380         select CLKDEV_LOOKUP
 381         select CLKSRC_MMIO
 382         select HAVE_SCHED_CLOCK
 383         help
 384           Support for Freescale MXC/iMX-based family of processors
 385
 386 config ARCH_MXS
 387         bool "Freescale MXS-based"
 388         select GENERIC_CLOCKEVENTS
 389         select ARCH_REQUIRE_GPIOLIB
 390         select CLKDEV_LOOKUP
 391         select CLKSRC_MMIO
 392         help
 393           Support for Freescale MXS-based family of processors
 394
 395 config ARCH_NETX
 396         bool "Hilscher NetX based"
 397         select CLKSRC_MMIO
 398         select CPU_ARM926T
 399         select ARM_VIC
 400         select GENERIC_CLOCKEVENTS
 401         help
 402           This enables support for systems based on the Hilscher NetX Soc
 403
 404 config ARCH_H720X
 405         bool "Hynix HMS720x-based"
 406         select CPU_ARM720T
 407         select ISA_DMA_API
 408         select ARCH_USES_GETTIMEOFFSET
 409         help
 410           This enables support for systems based on the Hynix HMS720x
 411
 412 config ARCH_IOP13XX
 413         bool "IOP13xx-based"
 414         depends on MMU
 415         select CPU_XSC3
 416         select PLAT_IOP
 417         select PCI
 418         select ARCH_SUPPORTS_MSI
 419         select VMSPLIT_1G
 420         help
 421           Support for Intel's IOP13XX (XScale) family of processors.
 422
 423 config ARCH_IOP32X
 424         bool "IOP32x-based"
 425         depends on MMU
 426         select CPU_XSCALE
 427         select PLAT_IOP
 428         select PCI
 429         select ARCH_REQUIRE_GPIOLIB
 430         help
 431           Support for Intel's 80219 and IOP32X (XScale) family of
 432           processors.
 433
 434 config ARCH_IOP33X
 435         bool "IOP33x-based"
 436         depends on MMU
 437         select CPU_XSCALE
 438         select PLAT_IOP
 439         select PCI
 440         select ARCH_REQUIRE_GPIOLIB
 441         help
 442           Support for Intel's IOP33X (XScale) family of processors.
 443
 444 config ARCH_IXP23XX
 445         bool "IXP23XX-based"
 446         depends on MMU
 447         select CPU_XSC3
 448         select PCI
 449         select ARCH_USES_GETTIMEOFFSET
 450         help
 451           Support for Intel's IXP23xx (XScale) family of processors.
 452
 453 config ARCH_IXP2000
 454         bool "IXP2400/2800-based"
 455         depends on MMU
 456         select CPU_XSCALE
 457         select PCI
 458         select ARCH_USES_GETTIMEOFFSET
 459         help
 460           Support for Intel's IXP2400/2800 (XScale) family of processors.
 461
 462 config ARCH_IXP4XX
 463         bool "IXP4xx-based"
 464         depends on MMU
 465         select CLKSRC_MMIO
 466         select CPU_XSCALE
 467         select GENERIC_GPIO
 468         select GENERIC_CLOCKEVENTS
 469         select HAVE_SCHED_CLOCK
 470         select MIGHT_HAVE_PCI
 471         select DMABOUNCE if PCI
 472         help
 473           Support for Intel's IXP4XX (XScale) family of processors.
 474
 475 config ARCH_DOVE
 476         bool "Marvell Dove"
 477         select CPU_V7
 478         select PCI
 479         select ARCH_REQUIRE_GPIOLIB
 480         select GENERIC_CLOCKEVENTS
 481         select PLAT_ORION
 482         help
 483           Support for the Marvell Dove SoC 88AP510
 484
 485 config ARCH_KIRKWOOD
 486         bool "Marvell Kirkwood"
 487         select CPU_FEROCEON
 488         select PCI
 489         select ARCH_REQUIRE_GPIOLIB
 490         select GENERIC_CLOCKEVENTS
 491         select PLAT_ORION
 492         help
 493           Support for the following Marvell Kirkwood series SoCs:
 494           88F6180, 88F6192 and 88F6281.
 495
 496 config ARCH_LOKI
 497         bool "Marvell Loki (88RC8480)"
 498         select CPU_FEROCEON
 499         select GENERIC_CLOCKEVENTS
 500         select PLAT_ORION
 501         help
 502           Support for the Marvell Loki (88RC8480) SoC.
 503
 504 config ARCH_LPC32XX
 505         bool "NXP LPC32XX"
 506         select CLKSRC_MMIO
 507         select CPU_ARM926T
 508         select ARCH_REQUIRE_GPIOLIB
 509         select HAVE_IDE
 510         select ARM_AMBA
 511         select USB_ARCH_HAS_OHCI
 512         select CLKDEV_LOOKUP
 513         select GENERIC_TIME
 514         select GENERIC_CLOCKEVENTS
 515         help
 516           Support for the NXP LPC32XX family of processors
 517
 518 config ARCH_MV78XX0
 519         bool "Marvell MV78xx0"
 520         select CPU_FEROCEON
 521         select PCI
 522         select ARCH_REQUIRE_GPIOLIB
 523         select GENERIC_CLOCKEVENTS
 524         select PLAT_ORION
 525         help
 526           Support for the following Marvell MV78xx0 series SoCs:
 527           MV781x0, MV782x0.
 528
 529 config ARCH_ORION5X
 530         bool "Marvell Orion"
 531         depends on MMU
 532         select CPU_FEROCEON
 533         select PCI
 534         select ARCH_REQUIRE_GPIOLIB
 535         select GENERIC_CLOCKEVENTS
 536         select PLAT_ORION
 537         help
 538           Support for the following Marvell Orion 5x series SoCs:
 539           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 540           Orion-2 (5281), Orion-1-90 (6183).
 541
 542 config ARCH_MMP
 543         bool "Marvell PXA168/910/MMP2"
 544         depends on MMU
 545         select ARCH_REQUIRE_GPIOLIB
 546         select CLKDEV_LOOKUP
 547         select GENERIC_CLOCKEVENTS
 548         select HAVE_SCHED_CLOCK
 549         select TICK_ONESHOT
 550         select PLAT_PXA
 551         select SPARSE_IRQ
 552         help
 553           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 554
 555 config ARCH_KS8695
 556         bool "Micrel/Kendin KS8695"
 557         select CPU_ARM922T
 558         select ARCH_REQUIRE_GPIOLIB
 559         select ARCH_USES_GETTIMEOFFSET
 560         help
 561           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 562           System-on-Chip devices.
 563
 564 config ARCH_W90X900
 565         bool "Nuvoton W90X900 CPU"
 566         select CPU_ARM926T
 567         select ARCH_REQUIRE_GPIOLIB
 568         select CLKDEV_LOOKUP
 569         select CLKSRC_MMIO
 570         select GENERIC_CLOCKEVENTS
 571         help
 572           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 573           At present, the w90x900 has been renamed nuc900, regarding
 574           the ARM series product line, you can login the following
 575           link address to know more.
 576
 577           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 578                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 579
 580 config ARCH_NUC93X
 581         bool "Nuvoton NUC93X CPU"
 582         select CPU_ARM926T
 583         select CLKDEV_LOOKUP
 584         help
 585           Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
 586           low-power and high performance MPEG-4/JPEG multimedia controller chip.
 587
 588 config ARCH_TEGRA
 589         bool "NVIDIA Tegra"
 590         select CLKDEV_LOOKUP
 591         select CLKSRC_MMIO
 592         select GENERIC_TIME
 593         select GENERIC_CLOCKEVENTS
 594         select GENERIC_GPIO
 595         select HAVE_CLK
 596         select HAVE_SCHED_CLOCK
 597         select ARCH_HAS_BARRIERS if CACHE_L2X0
 598         select ARCH_HAS_CPUFREQ
 599         help
 600           This enables support for NVIDIA Tegra based systems (Tegra APX,
 601           Tegra 6xx and Tegra 2 series).
 602
 603 config ARCH_PNX4008
 604         bool "Philips Nexperia PNX4008 Mobile"
 605         select CPU_ARM926T
 606         select CLKDEV_LOOKUP
 607         select ARCH_USES_GETTIMEOFFSET
 608         help
 609           This enables support for Philips PNX4008 mobile platform.
 610
 611 config ARCH_PXA
 612         bool "PXA2xx/PXA3xx-based"
 613         depends on MMU
 614         select ARCH_MTD_XIP
 615         select ARCH_HAS_CPUFREQ
 616         select CLKDEV_LOOKUP
 617         select CLKSRC_MMIO
 618         select ARCH_REQUIRE_GPIOLIB
 619         select GENERIC_CLOCKEVENTS
 620         select HAVE_SCHED_CLOCK
 621         select TICK_ONESHOT
 622         select PLAT_PXA
 623         select SPARSE_IRQ
 624         help
 625           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 626
 627 config ARCH_MSM
 628         bool "Qualcomm MSM"
 629         select HAVE_CLK
 630         select GENERIC_CLOCKEVENTS
 631         select ARCH_REQUIRE_GPIOLIB
 632         select CLKDEV_LOOKUP
 633         help
 634           Support for Qualcomm MSM/QSD based systems.  This runs on the
 635           apps processor of the MSM/QSD and depends on a shared memory
 636           interface to the modem processor which runs the baseband
 637           stack and controls some vital subsystems
 638           (clock and power control, etc).
 639
 640 config ARCH_SHMOBILE
 641         bool "Renesas SH-Mobile / R-Mobile"
 642         select HAVE_CLK
 643         select CLKDEV_LOOKUP
 644         select GENERIC_CLOCKEVENTS
 645         select NO_IOPORT
 646         select SPARSE_IRQ
 647         select MULTI_IRQ_HANDLER
 648         select PM_GENERIC_DOMAINS if PM
 649         help
 650           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 651
 652 config ARCH_RPC
 653         bool "RiscPC"
 654         select ARCH_ACORN
 655         select FIQ
 656         select TIMER_ACORN
 657         select ARCH_MAY_HAVE_PC_FDC
 658         select HAVE_PATA_PLATFORM
 659         select ISA_DMA_API
 660         select NO_IOPORT
 661         select ARCH_SPARSEMEM_ENABLE
 662         select ARCH_USES_GETTIMEOFFSET
 663         help
 664           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 665           CD-ROM interface, serial and parallel port, and the floppy drive.
 666
 667 config ARCH_SA1100
 668         bool "SA1100-based"
 669         select CLKSRC_MMIO
 670         select CPU_SA1100
 671         select ISA
 672         select ARCH_SPARSEMEM_ENABLE
 673         select ARCH_MTD_XIP
 674         select ARCH_HAS_CPUFREQ
 675         select CPU_FREQ
 676         select GENERIC_CLOCKEVENTS
 677         select HAVE_CLK
 678         select HAVE_SCHED_CLOCK
 679         select TICK_ONESHOT
 680         select ARCH_REQUIRE_GPIOLIB
 681         help
 682           Support for StrongARM 11x0 based boards.
 683
 684 config ARCH_S3C2410
 685         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 686         select GENERIC_GPIO
 687         select ARCH_HAS_CPUFREQ
 688         select HAVE_CLK
 689         select CLKDEV_LOOKUP
 690         select ARCH_USES_GETTIMEOFFSET
 691         select HAVE_S3C2410_I2C if I2C
 692         help
 693           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 694           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 695           the Samsung SMDK2410 development board (and derivatives).
 696
 697           Note, the S3C2416 and the S3C2450 are so close that they even share
 698           the same SoC ID code. This means that there is no separate machine
 699           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 700
 701 config ARCH_S3C64XX
 702         bool "Samsung S3C64XX"
 703         select PLAT_SAMSUNG
 704         select CPU_V6
 705         select ARM_VIC
 706         select HAVE_CLK
 707         select CLKDEV_LOOKUP
 708         select NO_IOPORT
 709         select ARCH_USES_GETTIMEOFFSET
 710         select ARCH_HAS_CPUFREQ
 711         select ARCH_REQUIRE_GPIOLIB
 712         select SAMSUNG_CLKSRC
 713         select SAMSUNG_IRQ_VIC_TIMER
 714         select SAMSUNG_IRQ_UART
 715         select S3C_GPIO_TRACK
 716         select S3C_GPIO_PULL_UPDOWN
 717         select S3C_GPIO_CFG_S3C24XX
 718         select S3C_GPIO_CFG_S3C64XX
 719         select S3C_DEV_NAND
 720         select USB_ARCH_HAS_OHCI
 721         select SAMSUNG_GPIOLIB_4BIT
 722         select HAVE_S3C2410_I2C if I2C
 723         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 724         help
 725           Samsung S3C64XX series based systems
 726
 727 config ARCH_S5P64X0
 728         bool "Samsung S5P6440 S5P6450"
 729         select CPU_V6
 730         select GENERIC_GPIO
 731         select HAVE_CLK
 732         select CLKDEV_LOOKUP
 733         select CLKSRC_MMIO
 734         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 735         select GENERIC_CLOCKEVENTS
 736         select HAVE_SCHED_CLOCK
 737         select HAVE_S3C2410_I2C if I2C
 738         select HAVE_S3C_RTC if RTC_CLASS
 739         help
 740           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 741           SMDK6450.
 742
 743 config ARCH_S5PC100
 744         bool "Samsung S5PC100"
 745         select GENERIC_GPIO
 746         select HAVE_CLK
 747         select CLKDEV_LOOKUP
 748         select CPU_V7
 749         select ARM_L1_CACHE_SHIFT_6
 750         select ARCH_USES_GETTIMEOFFSET
 751         select HAVE_S3C2410_I2C if I2C
 752         select HAVE_S3C_RTC if RTC_CLASS
 753         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 754         help
 755           Samsung S5PC100 series based systems
 756
 757 config ARCH_S5PV210
 758         bool "Samsung S5PV210/S5PC110"
 759         select CPU_V7
 760         select ARCH_SPARSEMEM_ENABLE
 761         select GENERIC_GPIO
 762         select HAVE_CLK
 763         select CLKDEV_LOOKUP
 764         select CLKSRC_MMIO
 765         select ARM_L1_CACHE_SHIFT_6
 766         select ARCH_HAS_CPUFREQ
 767         select GENERIC_CLOCKEVENTS
 768         select HAVE_SCHED_CLOCK
 769         select HAVE_S3C2410_I2C if I2C
 770         select HAVE_S3C_RTC if RTC_CLASS
 771         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 772         help
 773           Samsung S5PV210/S5PC110 series based systems
 774
 775 config ARCH_EXYNOS4
 776         bool "Samsung EXYNOS4"
 777         select CPU_V7
 778         select ARCH_SPARSEMEM_ENABLE
 779         select GENERIC_GPIO
 780         select HAVE_CLK
 781         select CLKDEV_LOOKUP
 782         select ARCH_HAS_CPUFREQ
 783         select GENERIC_CLOCKEVENTS
 784         select HAVE_S3C_RTC if RTC_CLASS
 785         select HAVE_S3C2410_I2C if I2C
 786         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 787         help
 788           Samsung EXYNOS4 series based systems
 789
 790 config ARCH_SHARK
 791         bool "Shark"
 792         select CPU_SA110
 793         select ISA
 794         select ISA_DMA
 795         select ZONE_DMA
 796         select PCI
 797         select ARCH_USES_GETTIMEOFFSET
 798         help
 799           Support for the StrongARM based Digital DNARD machine, also known
 800           as "Shark" (<http://www.shark-linux.de/shark.html>).
 801
 802 config ARCH_TCC_926
 803         bool "Telechips TCC ARM926-based systems"
 804         select CLKSRC_MMIO
 805         select CPU_ARM926T
 806         select HAVE_CLK
 807         select CLKDEV_LOOKUP
 808         select GENERIC_CLOCKEVENTS
 809         help
 810           Support for Telechips TCC ARM926-based systems.
 811
 812 config ARCH_U300
 813         bool "ST-Ericsson U300 Series"
 814         depends on MMU
 815         select CLKSRC_MMIO
 816         select CPU_ARM926T
 817         select HAVE_SCHED_CLOCK
 818         select HAVE_TCM
 819         select ARM_AMBA
 820         select ARM_VIC
 821         select GENERIC_CLOCKEVENTS
 822         select CLKDEV_LOOKUP
 823         select GENERIC_GPIO
 824         help
 825           Support for ST-Ericsson U300 series mobile platforms.
 826
 827 config ARCH_U8500
 828         bool "ST-Ericsson U8500 Series"
 829         select CPU_V7
 830         select ARM_AMBA
 831         select GENERIC_CLOCKEVENTS
 832         select CLKDEV_LOOKUP
 833         select ARCH_REQUIRE_GPIOLIB
 834         select ARCH_HAS_CPUFREQ
 835         help
 836           Support for ST-Ericsson's Ux500 architecture
 837
 838 config ARCH_NOMADIK
 839         bool "STMicroelectronics Nomadik"
 840         select ARM_AMBA
 841         select ARM_VIC
 842         select CPU_ARM926T
 843         select CLKDEV_LOOKUP
 844         select GENERIC_CLOCKEVENTS
 845         select ARCH_REQUIRE_GPIOLIB
 846         help
 847           Support for the Nomadik platform by ST-Ericsson
 848
 849 config ARCH_DAVINCI
 850         bool "TI DaVinci"
 851         select GENERIC_CLOCKEVENTS
 852         select ARCH_REQUIRE_GPIOLIB
 853         select ZONE_DMA
 854         select HAVE_IDE
 855         select CLKDEV_LOOKUP
 856         select GENERIC_ALLOCATOR
 857         select GENERIC_IRQ_CHIP
 858         select ARCH_HAS_HOLES_MEMORYMODEL
 859         help
 860           Support for TI's DaVinci platform.
 861
 862 config ARCH_OMAP
 863         bool "TI OMAP"
 864         select HAVE_CLK
 865         select ARCH_REQUIRE_GPIOLIB
 866         select ARCH_HAS_CPUFREQ
 867         select CLKSRC_MMIO
 868         select GENERIC_CLOCKEVENTS
 869         select HAVE_SCHED_CLOCK
 870         select ARCH_HAS_HOLES_MEMORYMODEL
 871         help
 872           Support for TI's OMAP platform (OMAP1/2/3/4).
 873
 874 config PLAT_SPEAR
 875         bool "ST SPEAr"
 876         select ARM_AMBA
 877         select ARCH_REQUIRE_GPIOLIB
 878         select CLKDEV_LOOKUP
 879         select CLKSRC_MMIO
 880         select GENERIC_CLOCKEVENTS
 881         select HAVE_CLK
 882         help
 883           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 884
 885 config ARCH_VT8500
 886         bool "VIA/WonderMedia 85xx"
 887         select CPU_ARM926T
 888         select GENERIC_GPIO
 889         select ARCH_HAS_CPUFREQ
 890         select GENERIC_CLOCKEVENTS
 891         select ARCH_REQUIRE_GPIOLIB
 892         select HAVE_PWM
 893         help
 894           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 895 endchoice
 896
 897 #
 898 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 899 # Kconfigs may be included either alphabetically (according to the
 900 # plat- suffix) or along side the corresponding mach-* source.
 901 #
 902 source "arch/arm/mach-at91/Kconfig"
 903
 904 source "arch/arm/mach-bcmring/Kconfig"
 905
 906 source "arch/arm/mach-clps711x/Kconfig"
 907
 908 source "arch/arm/mach-cns3xxx/Kconfig"
 909
 910 source "arch/arm/mach-davinci/Kconfig"
 911
 912 source "arch/arm/mach-dove/Kconfig"
 913
 914 source "arch/arm/mach-ep93xx/Kconfig"
 915
 916 source "arch/arm/mach-footbridge/Kconfig"
 917
 918 source "arch/arm/mach-gemini/Kconfig"
 919
 920 source "arch/arm/mach-h720x/Kconfig"
 921
 922 source "arch/arm/mach-integrator/Kconfig"
 923
 924 source "arch/arm/mach-iop32x/Kconfig"
 925
 926 source "arch/arm/mach-iop33x/Kconfig"
 927
 928 source "arch/arm/mach-iop13xx/Kconfig"
 929
 930 source "arch/arm/mach-ixp4xx/Kconfig"
 931
 932 source "arch/arm/mach-ixp2000/Kconfig"
 933
 934 source "arch/arm/mach-ixp23xx/Kconfig"
 935
 936 source "arch/arm/mach-kirkwood/Kconfig"
 937
 938 source "arch/arm/mach-ks8695/Kconfig"
 939
 940 source "arch/arm/mach-loki/Kconfig"
 941
 942 source "arch/arm/mach-lpc32xx/Kconfig"
 943
 944 source "arch/arm/mach-msm/Kconfig"
 945
 946 source "arch/arm/mach-mv78xx0/Kconfig"
 947
 948 source "arch/arm/plat-mxc/Kconfig"
 949
 950 source "arch/arm/mach-mxs/Kconfig"
 951
 952 source "arch/arm/mach-netx/Kconfig"
 953
 954 source "arch/arm/mach-nomadik/Kconfig"
 955 source "arch/arm/plat-nomadik/Kconfig"
 956
 957 source "arch/arm/mach-nuc93x/Kconfig"
 958
 959 source "arch/arm/plat-omap/Kconfig"
 960
 961 source "arch/arm/mach-omap1/Kconfig"
 962
 963 source "arch/arm/mach-omap2/Kconfig"
 964
 965 source "arch/arm/mach-orion5x/Kconfig"
 966
 967 source "arch/arm/mach-pxa/Kconfig"
 968 source "arch/arm/plat-pxa/Kconfig"
 969
 970 source "arch/arm/mach-mmp/Kconfig"
 971
 972 source "arch/arm/mach-realview/Kconfig"
 973
 974 source "arch/arm/mach-sa1100/Kconfig"
 975
 976 source "arch/arm/plat-samsung/Kconfig"
 977 source "arch/arm/plat-s3c24xx/Kconfig"
 978 source "arch/arm/plat-s5p/Kconfig"
 979
 980 source "arch/arm/plat-spear/Kconfig"
 981
 982 source "arch/arm/plat-tcc/Kconfig"
 983
 984 if ARCH_S3C2410
 985 source "arch/arm/mach-s3c2400/Kconfig"
 986 source "arch/arm/mach-s3c2410/Kconfig"
 987 source "arch/arm/mach-s3c2412/Kconfig"
 988 source "arch/arm/mach-s3c2416/Kconfig"
 989 source "arch/arm/mach-s3c2440/Kconfig"
 990 source "arch/arm/mach-s3c2443/Kconfig"
 991 endif
 992
 993 if ARCH_S3C64XX
 994 source "arch/arm/mach-s3c64xx/Kconfig"
 995 endif
 996
 997 source "arch/arm/mach-s5p64x0/Kconfig"
 998
 999 source "arch/arm/mach-s5pc100/Kconfig"
1000
1001 source "arch/arm/mach-s5pv210/Kconfig"
1002
1003 source "arch/arm/mach-exynos4/Kconfig"
1004
1005 source "arch/arm/mach-shmobile/Kconfig"
1006
1007 source "arch/arm/mach-tegra/Kconfig"
1008
1009 source "arch/arm/mach-u300/Kconfig"
1010
1011 source "arch/arm/mach-ux500/Kconfig"
1012
1013 source "arch/arm/mach-versatile/Kconfig"
1014
1015 source "arch/arm/mach-vexpress/Kconfig"
1016 source "arch/arm/plat-versatile/Kconfig"
1017
1018 source "arch/arm/mach-vt8500/Kconfig"
1019
1020 source "arch/arm/mach-w90x900/Kconfig"
1021
1022 # Definitions to make life easier
1023 config ARCH_ACORN
1024         bool
1025
1026 config PLAT_IOP
1027         bool
1028         select GENERIC_CLOCKEVENTS
1029         select HAVE_SCHED_CLOCK
1030
1031 config PLAT_ORION
1032         bool
1033         select CLKSRC_MMIO
1034         select GENERIC_IRQ_CHIP
1035         select HAVE_SCHED_CLOCK
1036
1037 config PLAT_PXA
1038         bool
1039
1040 config PLAT_VERSATILE
1041         bool
1042
1043 config ARM_TIMER_SP804
1044         bool
1045         select CLKSRC_MMIO
1046
1047 source arch/arm/mm/Kconfig
1048
1049 config IWMMXT
1050         bool "Enable iWMMXt support"
1051         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1052         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1053         help
1054           Enable support for iWMMXt context switching at run time if
1055           running on a CPU that supports it.
1056
1057 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1058 config XSCALE_PMU
1059         bool
1060         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1061         default y
1062
1063 config CPU_HAS_PMU
1064         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1065                    (!ARCH_OMAP3 || OMAP3_EMU)
1066         default y
1067         bool
1068
1069 config MULTI_IRQ_HANDLER
1070         bool
1071         help
1072           Allow each machine to specify it's own IRQ handler at run time.
1073
1074 if !MMU
1075 source "arch/arm/Kconfig-nommu"
1076 endif
1077
1078 config ARM_ERRATA_411920
1079         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1080         depends on CPU_V6 || CPU_V6K
1081         help
1082           Invalidation of the Instruction Cache operation can
1083           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1084           It does not affect the MPCore. This option enables the ARM Ltd.
1085           recommended workaround.
1086
1087 config ARM_ERRATA_430973
1088         bool "ARM errata: Stale prediction on replaced interworking branch"
1089         depends on CPU_V7
1090         help
1091           This option enables the workaround for the 430973 Cortex-A8
1092           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1093           interworking branch is replaced with another code sequence at the
1094           same virtual address, whether due to self-modifying code or virtual
1095           to physical address re-mapping, Cortex-A8 does not recover from the
1096           stale interworking branch prediction. This results in Cortex-A8
1097           executing the new code sequence in the incorrect ARM or Thumb state.
1098           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1099           and also flushes the branch target cache at every context switch.
1100           Note that setting specific bits in the ACTLR register may not be
1101           available in non-secure mode.
1102
1103 config ARM_ERRATA_458693
1104         bool "ARM errata: Processor deadlock when a false hazard is created"
1105         depends on CPU_V7
1106         help
1107           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1108           erratum. For very specific sequences of memory operations, it is
1109           possible for a hazard condition intended for a cache line to instead
1110           be incorrectly associated with a different cache line. This false
1111           hazard might then cause a processor deadlock. The workaround enables
1112           the L1 caching of the NEON accesses and disables the PLD instruction
1113           in the ACTLR register. Note that setting specific bits in the ACTLR
1114           register may not be available in non-secure mode.
1115
1116 config ARM_ERRATA_460075
1117         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1118         depends on CPU_V7
1119         help
1120           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1121           erratum. Any asynchronous access to the L2 cache may encounter a
1122           situation in which recent store transactions to the L2 cache are lost
1123           and overwritten with stale memory contents from external memory. The
1124           workaround disables the write-allocate mode for the L2 cache via the
1125           ACTLR register. Note that setting specific bits in the ACTLR register
1126           may not be available in non-secure mode.
1127
1128 config ARM_ERRATA_742230
1129         bool "ARM errata: DMB operation may be faulty"
1130         depends on CPU_V7 && SMP
1131         help
1132           This option enables the workaround for the 742230 Cortex-A9
1133           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1134           between two write operations may not ensure the correct visibility
1135           ordering of the two writes. This workaround sets a specific bit in
1136           the diagnostic register of the Cortex-A9 which causes the DMB
1137           instruction to behave as a DSB, ensuring the correct behaviour of
1138           the two writes.
1139
1140 config ARM_ERRATA_742231
1141         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1142         depends on CPU_V7 && SMP
1143         help
1144           This option enables the workaround for the 742231 Cortex-A9
1145           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1146           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1147           accessing some data located in the same cache line, may get corrupted
1148           data due to bad handling of the address hazard when the line gets
1149           replaced from one of the CPUs at the same time as another CPU is
1150           accessing it. This workaround sets specific bits in the diagnostic
1151           register of the Cortex-A9 which reduces the linefill issuing
1152           capabilities of the processor.
1153
1154 config PL310_ERRATA_588369
1155         bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1156         depends on CACHE_L2X0
1157         help
1158            The PL310 L2 cache controller implements three types of Clean &
1159            Invalidate maintenance operations: by Physical Address
1160            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1161            They are architecturally defined to behave as the execution of a
1162            clean operation followed immediately by an invalidate operation,
1163            both performing to the same memory location. This functionality
1164            is not correctly implemented in PL310 as clean lines are not
1165            invalidated as a result of these operations.
1166
1167 config ARM_ERRATA_720789
1168         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1169         depends on CPU_V7 && SMP
1170         help
1171           This option enables the workaround for the 720789 Cortex-A9 (prior to
1172           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1173           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1174           As a consequence of this erratum, some TLB entries which should be
1175           invalidated are not, resulting in an incoherency in the system page
1176           tables. The workaround changes the TLB flushing routines to invalidate
1177           entries regardless of the ASID.
1178
1179 config PL310_ERRATA_727915
1180         bool "Background Clean & Invalidate by Way operation can cause data corruption"
1181         depends on CACHE_L2X0
1182         help
1183           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1184           operation (offset 0x7FC). This operation runs in background so that
1185           PL310 can handle normal accesses while it is in progress. Under very
1186           rare circumstances, due to this erratum, write data can be lost when
1187           PL310 treats a cacheable write transaction during a Clean &
1188           Invalidate by Way operation.
1189
1190 config ARM_ERRATA_743622
1191         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1192         depends on CPU_V7
1193         help
1194           This option enables the workaround for the 743622 Cortex-A9
1195           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1196           optimisation in the Cortex-A9 Store Buffer may lead to data
1197           corruption. This workaround sets a specific bit in the diagnostic
1198           register of the Cortex-A9 which disables the Store Buffer
1199           optimisation, preventing the defect from occurring. This has no
1200           visible impact on the overall performance or power consumption of the
1201           processor.
1202
1203 config ARM_ERRATA_751472
1204         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1205         depends on CPU_V7 && SMP
1206         help
1207           This option enables the workaround for the 751472 Cortex-A9 (prior
1208           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1209           completion of a following broadcasted operation if the second
1210           operation is received by a CPU before the ICIALLUIS has completed,
1211           potentially leading to corrupted entries in the cache or TLB.
1212
1213 config ARM_ERRATA_753970
1214         bool "ARM errata: cache sync operation may be faulty"
1215         depends on CACHE_PL310
1216         help
1217           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1218
1219           Under some condition the effect of cache sync operation on
1220           the store buffer still remains when the operation completes.
1221           This means that the store buffer is always asked to drain and
1222           this prevents it from merging any further writes. The workaround
1223           is to replace the normal offset of cache sync operation (0x730)
1224           by another offset targeting an unmapped PL310 register 0x740.
1225           This has the same effect as the cache sync operation: store buffer
1226           drain and waiting for all buffers empty.
1227
1228 config ARM_ERRATA_754322
1229         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1230         depends on CPU_V7
1231         help
1232           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1233           r3p*) erratum. A speculative memory access may cause a page table walk
1234           which starts prior to an ASID switch but completes afterwards. This
1235           can populate the micro-TLB with a stale entry which may be hit with
1236           the new ASID. This workaround places two dsb instructions in the mm
1237           switching code so that no page table walks can cross the ASID switch.
1238
1239 config ARM_ERRATA_754327
1240         bool "ARM errata: no automatic Store Buffer drain"
1241         depends on CPU_V7 && SMP
1242         help
1243           This option enables the workaround for the 754327 Cortex-A9 (prior to
1244           r2p0) erratum. The Store Buffer does not have any automatic draining
1245           mechanism and therefore a livelock may occur if an external agent
1246           continuously polls a memory location waiting to observe an update.
1247           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1248           written polling loops from denying visibility of updates to memory.
1249
1250 endmenu
1251
1252 source "arch/arm/common/Kconfig"
1253
1254 menu "Bus support"
1255
1256 config ARM_AMBA
1257         bool
1258
1259 config ISA
1260         bool
1261         help
1262           Find out whether you have ISA slots on your motherboard.  ISA is the
1263           name of a bus system, i.e. the way the CPU talks to the other stuff
1264           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1265           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1266           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1267
1268 # Select ISA DMA controller support
1269 config ISA_DMA
1270         bool
1271         select ISA_DMA_API
1272
1273 # Select ISA DMA interface
1274 config ISA_DMA_API
1275         bool
1276
1277 config PCI
1278         bool "PCI support" if MIGHT_HAVE_PCI
1279         help
1280           Find out whether you have a PCI motherboard. PCI is the name of a
1281           bus system, i.e. the way the CPU talks to the other stuff inside
1282           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1283           VESA. If you have PCI, say Y, otherwise N.
1284
1285 config PCI_DOMAINS
1286         bool
1287         depends on PCI
1288
1289 config PCI_NANOENGINE
1290         bool "BSE nanoEngine PCI support"
1291         depends on SA1100_NANOENGINE
1292         help
1293           Enable PCI on the BSE nanoEngine board.
1294
1295 config PCI_SYSCALL
1296         def_bool PCI
1297
1298 # Select the host bridge type
1299 config PCI_HOST_VIA82C505
1300         bool
1301         depends on PCI && ARCH_SHARK
1302         default y
1303
1304 config PCI_HOST_ITE8152
1305         bool
1306         depends on PCI && MACH_ARMCORE
1307         default y
1308         select DMABOUNCE
1309
1310 source "drivers/pci/Kconfig"
1311
1312 source "drivers/pcmcia/Kconfig"
1313
1314 endmenu
1315
1316 menu "Kernel Features"
1317
1318 source "kernel/time/Kconfig"
1319
1320 config SMP
1321         bool "Symmetric Multi-Processing"
1322         depends on CPU_V6K || CPU_V7
1323         depends on GENERIC_CLOCKEVENTS
1324         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1325                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1326                  ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1327                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1328         select USE_GENERIC_SMP_HELPERS
1329         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1330         help
1331           This enables support for systems with more than one CPU. If you have
1332           a system with only one CPU, like most personal computers, say N. If
1333           you have a system with more than one CPU, say Y.
1334
1335           If you say N here, the kernel will run on single and multiprocessor
1336           machines, but will use only one CPU of a multiprocessor machine. If
1337           you say Y here, the kernel will run on many, but not all, single
1338           processor machines. On a single processor machine, the kernel will
1339           run faster if you say N here.
1340
1341           See also <file:Documentation/i386/IO-APIC.txt>,
1342           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1343           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1344
1345           If you don't know what to do here, say N.
1346
1347 config SMP_ON_UP
1348         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1349         depends on EXPERIMENTAL
1350         depends on SMP && !XIP_KERNEL
1351         default y
1352         help
1353           SMP kernels contain instructions which fail on non-SMP processors.
1354           Enabling this option allows the kernel to modify itself to make
1355           these instructions safe.  Disabling it allows about 1K of space
1356           savings.
1357
1358           If you don't know what to do here, say Y.
1359
1360 config HAVE_ARM_SCU
1361         bool
1362         help
1363           This option enables support for the ARM system coherency unit
1364
1365 config HAVE_ARM_TWD
1366         bool
1367         depends on SMP
1368         select TICK_ONESHOT
1369         help
1370           This options enables support for the ARM timer and watchdog unit
1371
1372 choice
1373         prompt "Memory split"
1374         default VMSPLIT_3G
1375         help
1376           Select the desired split between kernel and user memory.
1377
1378           If you are not absolutely sure what you are doing, leave this
1379           option alone!
1380
1381         config VMSPLIT_3G
1382                 bool "3G/1G user/kernel split"
1383         config VMSPLIT_2G
1384                 bool "2G/2G user/kernel split"
1385         config VMSPLIT_1G
1386                 bool "1G/3G user/kernel split"
1387 endchoice
1388
1389 config PAGE_OFFSET
1390         hex
1391         default 0x40000000 if VMSPLIT_1G
1392         default 0x80000000 if VMSPLIT_2G
1393         default 0xC0000000
1394
1395 config NR_CPUS
1396         int "Maximum number of CPUs (2-32)"
1397         range 2 32
1398         depends on SMP
1399         default "4"
1400
1401 config HOTPLUG_CPU
1402         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1403         depends on SMP && HOTPLUG && EXPERIMENTAL
1404         help
1405           Say Y here to experiment with turning CPUs off and on.  CPUs
1406           can be controlled through /sys/devices/system/cpu.
1407
1408 config LOCAL_TIMERS
1409         bool "Use local timer interrupts"
1410         depends on SMP
1411         default y
1412         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1413         help
1414           Enable support for local timers on SMP platforms, rather then the
1415           legacy IPI broadcast method.  Local timers allows the system
1416           accounting to be spread across the timer interval, preventing a
1417           "thundering herd" at every timer tick.
1418
1419 source kernel/Kconfig.preempt
1420
1421 config HZ
1422         int
1423         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1424                 ARCH_S5PV210 || ARCH_EXYNOS4
1425         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1426         default AT91_TIMER_HZ if ARCH_AT91
1427         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1428         default 100
1429
1430 config THUMB2_KERNEL
1431         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1432         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1433         select AEABI
1434         select ARM_ASM_UNIFIED
1435         help
1436           By enabling this option, the kernel will be compiled in
1437           Thumb-2 mode. A compiler/assembler that understand the unified
1438           ARM-Thumb syntax is needed.
1439
1440           If unsure, say N.
1441
1442 config THUMB2_AVOID_R_ARM_THM_JUMP11
1443         bool "Work around buggy Thumb-2 short branch relocations in gas"
1444         depends on THUMB2_KERNEL && MODULES
1445         default y
1446         help
1447           Various binutils versions can resolve Thumb-2 branches to
1448           locally-defined, preemptible global symbols as short-range "b.n"
1449           branch instructions.
1450
1451           This is a problem, because there's no guarantee the final
1452           destination of the symbol, or any candidate locations for a
1453           trampoline, are within range of the branch.  For this reason, the
1454           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1455           relocation in modules at all, and it makes little sense to add
1456           support.
1457
1458           The symptom is that the kernel fails with an "unsupported
1459           relocation" error when loading some modules.
1460
1461           Until fixed tools are available, passing
1462           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1463           code which hits this problem, at the cost of a bit of extra runtime
1464           stack usage in some cases.
1465
1466           The problem is described in more detail at:
1467               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1468
1469           Only Thumb-2 kernels are affected.
1470
1471           Unless you are sure your tools don't have this problem, say Y.
1472
1473 config ARM_ASM_UNIFIED
1474         bool
1475
1476 config AEABI
1477         bool "Use the ARM EABI to compile the kernel"
1478         help
1479           This option allows for the kernel to be compiled using the latest
1480           ARM ABI (aka EABI).  This is only useful if you are using a user
1481           space environment that is also compiled with EABI.
1482
1483           Since there are major incompatibilities between the legacy ABI and
1484           EABI, especially with regard to structure member alignment, this
1485           option also changes the kernel syscall calling convention to
1486           disambiguate both ABIs and allow for backward compatibility support
1487           (selected with CONFIG_OABI_COMPAT).
1488
1489           To use this you need GCC version 4.0.0 or later.
1490
1491 config OABI_COMPAT
1492         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1493         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1494         default y
1495         help
1496           This option preserves the old syscall interface along with the
1497           new (ARM EABI) one. It also provides a compatibility layer to
1498           intercept syscalls that have structure arguments which layout
1499           in memory differs between the legacy ABI and the new ARM EABI
1500           (only for non "thumb" binaries). This option adds a tiny
1501           overhead to all syscalls and produces a slightly larger kernel.
1502           If you know you'll be using only pure EABI user space then you
1503           can say N here. If this option is not selected and you attempt
1504           to execute a legacy ABI binary then the result will be
1505           UNPREDICTABLE (in fact it can be predicted that it won't work
1506           at all). If in doubt say Y.
1507
1508 config ARCH_HAS_HOLES_MEMORYMODEL
1509         bool
1510
1511 config ARCH_SPARSEMEM_ENABLE
1512         bool
1513
1514 config ARCH_SPARSEMEM_DEFAULT
1515         def_bool ARCH_SPARSEMEM_ENABLE
1516
1517 config ARCH_SELECT_MEMORY_MODEL
1518         def_bool ARCH_SPARSEMEM_ENABLE
1519
1520 config HAVE_ARCH_PFN_VALID
1521         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1522
1523 config HIGHMEM
1524         bool "High Memory Support"
1525         depends on MMU
1526         help
1527           The address space of ARM processors is only 4 Gigabytes large
1528           and it has to accommodate user address space, kernel address
1529           space as well as some memory mapped IO. That means that, if you
1530           have a large amount of physical memory and/or IO, not all of the
1531           memory can be "permanently mapped" by the kernel. The physical
1532           memory that is not permanently mapped is called "high memory".
1533
1534           Depending on the selected kernel/user memory split, minimum
1535           vmalloc space and actual amount of RAM, you may not need this
1536           option which should result in a slightly faster kernel.
1537
1538           If unsure, say n.
1539
1540 config HIGHPTE
1541         bool "Allocate 2nd-level pagetables from highmem"
1542         depends on HIGHMEM
1543
1544 config HW_PERF_EVENTS
1545         bool "Enable hardware performance counter support for perf events"
1546         depends on PERF_EVENTS && CPU_HAS_PMU
1547         default y
1548         help
1549           Enable hardware performance counter support for perf events. If
1550           disabled, perf events will use software events only.
1551
1552 source "mm/Kconfig"
1553
1554 config FORCE_MAX_ZONEORDER
1555         int "Maximum zone order" if ARCH_SHMOBILE
1556         range 11 64 if ARCH_SHMOBILE
1557         default "9" if SA1111
1558         default "11"
1559         help
1560           The kernel memory allocator divides physically contiguous memory
1561           blocks into "zones", where each zone is a power of two number of
1562           pages.  This option selects the largest power of two that the kernel
1563           keeps in the memory allocator.  If you need to allocate very large
1564           blocks of physically contiguous memory, then you may need to
1565           increase this value.
1566
1567           This config option is actually maximum order plus one. For example,
1568           a value of 11 means that the largest free memory block is 2^10 pages.
1569
1570 config LEDS
1571         bool "Timer and CPU usage LEDs"
1572         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1573                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1574                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1575                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1576                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1577                    ARCH_AT91 || ARCH_DAVINCI || \
1578                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1579         help
1580           If you say Y here, the LEDs on your machine will be used
1581           to provide useful information about your current system status.
1582
1583           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1584           be able to select which LEDs are active using the options below. If
1585           you are compiling a kernel for the EBSA-110 or the LART however, the
1586           red LED will simply flash regularly to indicate that the system is
1587           still functional. It is safe to say Y here if you have a CATS
1588           system, but the driver will do nothing.
1589
1590 config LEDS_TIMER
1591         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1592                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1593                             || MACH_OMAP_PERSEUS2
1594         depends on LEDS
1595         depends on !GENERIC_CLOCKEVENTS
1596         default y if ARCH_EBSA110
1597         help
1598           If you say Y here, one of the system LEDs (the green one on the
1599           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1600           will flash regularly to indicate that the system is still
1601           operational. This is mainly useful to kernel hackers who are
1602           debugging unstable kernels.
1603
1604           The LART uses the same LED for both Timer LED and CPU usage LED
1605           functions. You may choose to use both, but the Timer LED function
1606           will overrule the CPU usage LED.
1607
1608 config LEDS_CPU
1609         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1610                         !ARCH_OMAP) \
1611                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1612                         || MACH_OMAP_PERSEUS2
1613         depends on LEDS
1614         help
1615           If you say Y here, the red LED will be used to give a good real
1616           time indication of CPU usage, by lighting whenever the idle task
1617           is not currently executing.
1618
1619           The LART uses the same LED for both Timer LED and CPU usage LED
1620           functions. You may choose to use both, but the Timer LED function
1621           will overrule the CPU usage LED.
1622
1623 config ALIGNMENT_TRAP
1624         bool
1625         depends on CPU_CP15_MMU
1626         default y if !ARCH_EBSA110
1627         select HAVE_PROC_CPU if PROC_FS
1628         help
1629           ARM processors cannot fetch/store information which is not
1630           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1631           address divisible by 4. On 32-bit ARM processors, these non-aligned
1632           fetch/store instructions will be emulated in software if you say
1633           here, which has a severe performance impact. This is necessary for
1634           correct operation of some network protocols. With an IP-only
1635           configuration it is safe to say N, otherwise say Y.
1636
1637 config UACCESS_WITH_MEMCPY
1638         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1639         depends on MMU && EXPERIMENTAL
1640         default y if CPU_FEROCEON
1641         help
1642           Implement faster copy_to_user and clear_user methods for CPU
1643           cores where a 8-word STM instruction give significantly higher
1644           memory write throughput than a sequence of individual 32bit stores.
1645
1646           A possible side effect is a slight increase in scheduling latency
1647           between threads sharing the same address space if they invoke
1648           such copy operations with large buffers.
1649
1650           However, if the CPU data cache is using a write-allocate mode,
1651           this option is unlikely to provide any performance gain.
1652
1653 config SECCOMP
1654         bool
1655         prompt "Enable seccomp to safely compute untrusted bytecode"
1656         ---help---
1657           This kernel feature is useful for number crunching applications
1658           that may need to compute untrusted bytecode during their
1659           execution. By using pipes or other transports made available to
1660           the process as file descriptors supporting the read/write
1661           syscalls, it's possible to isolate those applications in
1662           their own address space using seccomp. Once seccomp is
1663           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1664           and the task is only allowed to execute a few safe syscalls
1665           defined by each seccomp mode.
1666
1667 config CC_STACKPROTECTOR
1668         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1669         depends on EXPERIMENTAL
1670         help
1671           This option turns on the -fstack-protector GCC feature. This
1672           feature puts, at the beginning of functions, a canary value on
1673           the stack just before the return address, and validates
1674           the value just before actually returning.  Stack based buffer
1675           overflows (that need to overwrite this return address) now also
1676           overwrite the canary, which gets detected and the attack is then
1677           neutralized via a kernel panic.
1678           This feature requires gcc version 4.2 or above.
1679
1680 config DEPRECATED_PARAM_STRUCT
1681         bool "Provide old way to pass kernel parameters"
1682         help
1683           This was deprecated in 2001 and announced to live on for 5 years.
1684           Some old boot loaders still use this way.
1685
1686 endmenu
1687
1688 menu "Boot options"
1689
1690 config USE_OF
1691         bool "Flattened Device Tree support"
1692         select OF
1693         select OF_EARLY_FLATTREE
1694         help
1695           Include support for flattened device tree machine descriptions.
1696
1697 # Compressed boot loader in ROM.  Yes, we really want to ask about
1698 # TEXT and BSS so we preserve their values in the config files.
1699 config ZBOOT_ROM_TEXT
1700         hex "Compressed ROM boot loader base address"
1701         default "0"
1702         help
1703           The physical address at which the ROM-able zImage is to be
1704           placed in the target.  Platforms which normally make use of
1705           ROM-able zImage formats normally set this to a suitable
1706           value in their defconfig file.
1707
1708           If ZBOOT_ROM is not enabled, this has no effect.
1709
1710 config ZBOOT_ROM_BSS
1711         hex "Compressed ROM boot loader BSS address"
1712         default "0"
1713         help
1714           The base address of an area of read/write memory in the target
1715           for the ROM-able zImage which must be available while the
1716           decompressor is running. It must be large enough to hold the
1717           entire decompressed kernel plus an additional 128 KiB.
1718           Platforms which normally make use of ROM-able zImage formats
1719           normally set this to a suitable value in their defconfig file.
1720
1721           If ZBOOT_ROM is not enabled, this has no effect.
1722
1723 config ZBOOT_ROM
1724         bool "Compressed boot loader in ROM/flash"
1725         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1726         help
1727           Say Y here if you intend to execute your compressed kernel image
1728           (zImage) directly from ROM or flash.  If unsure, say N.
1729
1730 choice
1731         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1732         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1733         default ZBOOT_ROM_NONE
1734         help
1735           Include experimental SD/MMC loading code in the ROM-able zImage.
1736           With this enabled it is possible to write the the ROM-able zImage
1737           kernel image to an MMC or SD card and boot the kernel straight
1738           from the reset vector. At reset the processor Mask ROM will load
1739           the first part of the the ROM-able zImage which in turn loads the
1740           rest the kernel image to RAM.
1741
1742 config ZBOOT_ROM_NONE
1743         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1744         help
1745           Do not load image from SD or MMC
1746
1747 config ZBOOT_ROM_MMCIF
1748         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1749         help
1750           Load image from MMCIF hardware block.
1751
1752 config ZBOOT_ROM_SH_MOBILE_SDHI
1753         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1754         help
1755           Load image from SDHI hardware block
1756
1757 endchoice
1758
1759 config CMDLINE
1760         string "Default kernel command string"
1761         default ""
1762         help
1763           On some architectures (EBSA110 and CATS), there is currently no way
1764           for the boot loader to pass arguments to the kernel. For these
1765           architectures, you should supply some command-line options at build
1766           time by entering them here. As a minimum, you should specify the
1767           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1768
1769 choice
1770         prompt "Kernel command line type" if CMDLINE != ""
1771         default CMDLINE_FROM_BOOTLOADER
1772
1773 config CMDLINE_FROM_BOOTLOADER
1774         bool "Use bootloader kernel arguments if available"
1775         help
1776           Uses the command-line options passed by the boot loader. If
1777           the boot loader doesn't provide any, the default kernel command
1778           string provided in CMDLINE will be used.
1779
1780 config CMDLINE_EXTEND
1781         bool "Extend bootloader kernel arguments"
1782         help
1783           The command-line arguments provided by the boot loader will be
1784           appended to the default kernel command string.
1785
1786 config CMDLINE_FORCE
1787         bool "Always use the default kernel command string"
1788         help
1789           Always use the default kernel command string, even if the boot
1790           loader passes other arguments to the kernel.
1791           This is useful if you cannot or don't want to change the
1792           command-line options your boot loader passes to the kernel.
1793 endchoice
1794
1795 config XIP_KERNEL
1796         bool "Kernel Execute-In-Place from ROM"
1797         depends on !ZBOOT_ROM
1798         help
1799           Execute-In-Place allows the kernel to run from non-volatile storage
1800           directly addressable by the CPU, such as NOR flash. This saves RAM
1801           space since the text section of the kernel is not loaded from flash
1802           to RAM.  Read-write sections, such as the data section and stack,
1803           are still copied to RAM.  The XIP kernel is not compressed since
1804           it has to run directly from flash, so it will take more space to
1805           store it.  The flash address used to link the kernel object files,
1806           and for storing it, is configuration dependent. Therefore, if you
1807           say Y here, you must know the proper physical address where to
1808           store the kernel image depending on your own flash memory usage.
1809
1810           Also note that the make target becomes "make xipImage" rather than
1811           "make zImage" or "make Image".  The final kernel binary to put in
1812           ROM memory will be arch/arm/boot/xipImage.
1813
1814           If unsure, say N.
1815
1816 config XIP_PHYS_ADDR
1817         hex "XIP Kernel Physical Location"
1818         depends on XIP_KERNEL
1819         default "0x00080000"
1820         help
1821           This is the physical address in your flash memory the kernel will
1822           be linked for and stored to.  This address is dependent on your
1823           own flash usage.
1824
1825 config KEXEC
1826         bool "Kexec system call (EXPERIMENTAL)"
1827         depends on EXPERIMENTAL
1828         help
1829           kexec is a system call that implements the ability to shutdown your
1830           current kernel, and to start another kernel.  It is like a reboot
1831           but it is independent of the system firmware.   And like a reboot
1832           you can start any kernel with it, not just Linux.
1833
1834           It is an ongoing process to be certain the hardware in a machine
1835           is properly shutdown, so do not be surprised if this code does not
1836           initially work for you.  It may help to enable device hotplugging
1837           support.
1838
1839 config ATAGS_PROC
1840         bool "Export atags in procfs"
1841         depends on KEXEC
1842         default y
1843         help
1844           Should the atags used to boot the kernel be exported in an "atags"
1845           file in procfs. Useful with kexec.
1846
1847 config CRASH_DUMP
1848         bool "Build kdump crash kernel (EXPERIMENTAL)"
1849         depends on EXPERIMENTAL
1850         help
1851           Generate crash dump after being started by kexec. This should
1852           be normally only set in special crash dump kernels which are
1853           loaded in the main kernel with kexec-tools into a specially
1854           reserved region and then later executed after a crash by
1855           kdump/kexec. The crash dump kernel must be compiled to a
1856           memory address not used by the main kernel
1857
1858           For more details see Documentation/kdump/kdump.txt
1859
1860 config AUTO_ZRELADDR
1861         bool "Auto calculation of the decompressed kernel image address"
1862         depends on !ZBOOT_ROM && !ARCH_U300
1863         help
1864           ZRELADDR is the physical address where the decompressed kernel
1865           image will be placed. If AUTO_ZRELADDR is selected, the address
1866           will be determined at run-time by masking the current IP with
1867           0xf8000000. This assumes the zImage being placed in the first 128MB
1868           from start of memory.
1869
1870 endmenu
1871
1872 menu "CPU Power Management"
1873
1874 if ARCH_HAS_CPUFREQ
1875
1876 source "drivers/cpufreq/Kconfig"
1877
1878 config CPU_FREQ_IMX
1879         tristate "CPUfreq driver for i.MX CPUs"
1880         depends on ARCH_MXC && CPU_FREQ
1881         help
1882           This enables the CPUfreq driver for i.MX CPUs.
1883
1884 config CPU_FREQ_SA1100
1885         bool
1886
1887 config CPU_FREQ_SA1110
1888         bool
1889
1890 config CPU_FREQ_INTEGRATOR
1891         tristate "CPUfreq driver for ARM Integrator CPUs"
1892         depends on ARCH_INTEGRATOR && CPU_FREQ
1893         default y
1894         help
1895           This enables the CPUfreq driver for ARM Integrator CPUs.
1896
1897           For details, take a look at <file:Documentation/cpu-freq>.
1898
1899           If in doubt, say Y.
1900
1901 config CPU_FREQ_PXA
1902         bool
1903         depends on CPU_FREQ && ARCH_PXA && PXA25x
1904         default y
1905         select CPU_FREQ_DEFAULT_GOV_USERSPACE
1906
1907 config CPU_FREQ_S3C
1908         bool
1909         help
1910           Internal configuration node for common cpufreq on Samsung SoC
1911
1912 config CPU_FREQ_S3C24XX
1913         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1914         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1915         select CPU_FREQ_S3C
1916         help
1917           This enables the CPUfreq driver for the Samsung S3C24XX family
1918           of CPUs.
1919
1920           For details, take a look at <file:Documentation/cpu-freq>.
1921
1922           If in doubt, say N.
1923
1924 config CPU_FREQ_S3C24XX_PLL
1925         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1926         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1927         help
1928           Compile in support for changing the PLL frequency from the
1929           S3C24XX series CPUfreq driver. The PLL takes time to settle
1930           after a frequency change, so by default it is not enabled.
1931
1932           This also means that the PLL tables for the selected CPU(s) will
1933           be built which may increase the size of the kernel image.
1934
1935 config CPU_FREQ_S3C24XX_DEBUG
1936         bool "Debug CPUfreq Samsung driver core"
1937         depends on CPU_FREQ_S3C24XX
1938         help
1939           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1940
1941 config CPU_FREQ_S3C24XX_IODEBUG
1942         bool "Debug CPUfreq Samsung driver IO timing"
1943         depends on CPU_FREQ_S3C24XX
1944         help
1945           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1946
1947 config CPU_FREQ_S3C24XX_DEBUGFS
1948         bool "Export debugfs for CPUFreq"
1949         depends on CPU_FREQ_S3C24XX && DEBUG_FS
1950         help
1951           Export status information via debugfs.
1952
1953 endif
1954
1955 source "drivers/cpuidle/Kconfig"
1956
1957 endmenu
1958
1959 menu "Floating point emulation"
1960
1961 comment "At least one emulation must be selected"
1962
1963 config FPE_NWFPE
1964         bool "NWFPE math emulation"
1965         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1966         ---help---
1967           Say Y to include the NWFPE floating point emulator in the kernel.
1968           This is necessary to run most binaries. Linux does not currently
1969           support floating point hardware so you need to say Y here even if
1970           your machine has an FPA or floating point co-processor podule.
1971
1972           You may say N here if you are going to load the Acorn FPEmulator
1973           early in the bootup.
1974
1975 config FPE_NWFPE_XP
1976         bool "Support extended precision"
1977         depends on FPE_NWFPE
1978         help
1979           Say Y to include 80-bit support in the kernel floating-point
1980           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
1981           Note that gcc does not generate 80-bit operations by default,
1982           so in most cases this option only enlarges the size of the
1983           floating point emulator without any good reason.
1984
1985           You almost surely want to say N here.
1986
1987 config FPE_FASTFPE
1988         bool "FastFPE math emulation (EXPERIMENTAL)"
1989         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1990         ---help---
1991           Say Y here to include the FAST floating point emulator in the kernel.
1992           This is an experimental much faster emulator which now also has full
1993           precision for the mantissa.  It does not support any exceptions.
1994           It is very simple, and approximately 3-6 times faster than NWFPE.
1995
1996           It should be sufficient for most programs.  It may be not suitable
1997           for scientific calculations, but you have to check this for yourself.
1998           If you do not feel you need a faster FP emulation you should better
1999           choose NWFPE.
2000
2001 config VFP
2002         bool "VFP-format floating point maths"
2003         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2004         help
2005           Say Y to include VFP support code in the kernel. This is needed
2006           if your hardware includes a VFP unit.
2007
2008           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2009           release notes and additional status information.
2010
2011           Say N if your target does not have VFP hardware.
2012
2013 config VFPv3
2014         bool
2015         depends on VFP
2016         default y if CPU_V7
2017
2018 config NEON
2019         bool "Advanced SIMD (NEON) Extension support"
2020         depends on VFPv3 && CPU_V7
2021         help
2022           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2023           Extension.
2024
2025 endmenu
2026
2027 menu "Userspace binary formats"
2028
2029 source "fs/Kconfig.binfmt"
2030
2031 config ARTHUR
2032         tristate "RISC OS personality"
2033         depends on !AEABI
2034         help
2035           Say Y here to include the kernel code necessary if you want to run
2036           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2037           experimental; if this sounds frightening, say N and sleep in peace.
2038           You can also say M here to compile this support as a module (which
2039           will be called arthur).
2040
2041 endmenu
2042
2043 menu "Power management options"
2044
2045 source "kernel/power/Kconfig"
2046
2047 config ARCH_SUSPEND_POSSIBLE
2048         depends on !ARCH_S5P64X0 && !ARCH_S5PC100
2049         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2050                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2051         def_bool y
2052
2053 endmenu
2054
2055 source "net/Kconfig"
2056
2057 source "drivers/Kconfig"
2058
2059 source "fs/Kconfig"
2060
2061 source "arch/arm/Kconfig.debug"
2062
2063 source "security/Kconfig"
2064
2065 source "crypto/Kconfig"
2066
2067 source "lib/Kconfig"