arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE if PCI || ISA || PCMCIA
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if !XIP_KERNEL
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         select GENERIC_IRQ_SHOW
  32         select CPU_PM if (SUSPEND || CPU_IDLE)
  33         help
  34           The ARM series is a line of low-power-consumption RISC chip designs
  35           licensed by ARM Ltd and targeted at embedded applications and
  36           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  37           manufactured, but legacy ARM-based PC hardware remains popular in
  38           Europe.  There is an ARM Linux project with a web page at
  39           <http://www.arm.linux.org.uk/>.
  40
  41 config ARM_HAS_SG_CHAIN
  42         bool
  43
  44 config HAVE_PWM
  45         bool
  46
  47 config MIGHT_HAVE_PCI
  48         bool
  49
  50 config SYS_SUPPORTS_APM_EMULATION
  51         bool
  52
  53 config HAVE_SCHED_CLOCK
  54         bool
  55
  56 config GENERIC_GPIO
  57         bool
  58
  59 config ARCH_USES_GETTIMEOFFSET
  60         bool
  61         default n
  62
  63 config GENERIC_CLOCKEVENTS
  64         bool
  65
  66 config GENERIC_CLOCKEVENTS_BROADCAST
  67         bool
  68         depends on GENERIC_CLOCKEVENTS
  69         default y if SMP
  70
  71 config KTIME_SCALAR
  72         bool
  73         default y
  74
  75 config HAVE_TCM
  76         bool
  77         select GENERIC_ALLOCATOR
  78
  79 config HAVE_PROC_CPU
  80         bool
  81
  82 config NO_IOPORT
  83         bool
  84
  85 config EISA
  86         bool
  87         ---help---
  88           The Extended Industry Standard Architecture (EISA) bus was
  89           developed as an open alternative to the IBM MicroChannel bus.
  90
  91           The EISA bus provided some of the features of the IBM MicroChannel
  92           bus while maintaining backward compatibility with cards made for
  93           the older ISA bus.  The EISA bus saw limited use between 1988 and
  94           1995 when it was made obsolete by the PCI bus.
  95
  96           Say Y here if you are building a kernel for an EISA-based machine.
  97
  98           Otherwise, say N.
  99
 100 config SBUS
 101         bool
 102
 103 config MCA
 104         bool
 105         help
 106           MicroChannel Architecture is found in some IBM PS/2 machines and
 107           laptops.  It is a bus system similar to PCI or ISA. See
 108           <file:Documentation/mca.txt> (and especially the web page given
 109           there) before attempting to build an MCA bus kernel.
 110
 111 config STACKTRACE_SUPPORT
 112         bool
 113         default y
 114
 115 config HAVE_LATENCYTOP_SUPPORT
 116         bool
 117         depends on !SMP
 118         default y
 119
 120 config LOCKDEP_SUPPORT
 121         bool
 122         default y
 123
 124 config TRACE_IRQFLAGS_SUPPORT
 125         bool
 126         default y
 127
 128 config HARDIRQS_SW_RESEND
 129         bool
 130         default y
 131
 132 config GENERIC_IRQ_PROBE
 133         bool
 134         default y
 135
 136 config GENERIC_LOCKBREAK
 137         bool
 138         default y
 139         depends on SMP && PREEMPT
 140
 141 config RWSEM_GENERIC_SPINLOCK
 142         bool
 143         default y
 144
 145 config RWSEM_XCHGADD_ALGORITHM
 146         bool
 147
 148 config ARCH_HAS_ILOG2_U32
 149         bool
 150
 151 config ARCH_HAS_ILOG2_U64
 152         bool
 153
 154 config ARCH_HAS_CPUFREQ
 155         bool
 156         help
 157           Internal node to signify that the ARCH has CPUFREQ support
 158           and that the relevant menu configurations are displayed for
 159           it.
 160
 161 config ARCH_HAS_CPU_IDLE_WAIT
 162        def_bool y
 163
 164 config GENERIC_HWEIGHT
 165         bool
 166         default y
 167
 168 config GENERIC_CALIBRATE_DELAY
 169         bool
 170         default y
 171
 172 config ARCH_MAY_HAVE_PC_FDC
 173         bool
 174
 175 config ZONE_DMA
 176         bool
 177
 178 config NEED_DMA_MAP_STATE
 179        def_bool y
 180
 181 config GENERIC_ISA_DMA
 182         bool
 183
 184 config FIQ
 185         bool
 186
 187 config ARCH_MTD_XIP
 188         bool
 189
 190 config VECTORS_BASE
 191         hex
 192         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 193         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 194         default 0x00000000
 195         help
 196           The base address of exception vectors.
 197
 198 config ARM_PATCH_PHYS_VIRT
 199         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 200         default y
 201         depends on !XIP_KERNEL && MMU
 202         depends on !ARCH_REALVIEW || !SPARSEMEM
 203         help
 204           Patch phys-to-virt and virt-to-phys translation functions at
 205           boot and module load time according to the position of the
 206           kernel in system memory.
 207
 208           This can only be used with non-XIP MMU kernels where the base
 209           of physical memory is at a 16MB boundary.
 210
 211           Only disable this option if you know that you do not require
 212           this feature (eg, building a kernel for a single machine) and
 213           you need to shrink the kernel to the minimal size.
 214
 215 config NEED_MACH_MEMORY_H
 216         bool
 217         help
 218           Select this when mach/memory.h is required to provide special
 219           definitions for this platform.  The need for mach/memory.h should
 220           be avoided when possible.
 221
 222 config PHYS_OFFSET
 223         hex "Physical address of main memory"
 224         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 225         help
 226           Please provide the physical address corresponding to the
 227           location of main memory in your system.
 228
 229 config GENERIC_BUG
 230         def_bool y
 231         depends on BUG
 232
 233 source "init/Kconfig"
 234
 235 source "kernel/Kconfig.freezer"
 236
 237 menu "System Type"
 238
 239 config MMU
 240         bool "MMU-based Paged Memory Management Support"
 241         default y
 242         help
 243           Select if you want MMU-based virtualised addressing space
 244           support by paged memory management. If unsure, say 'Y'.
 245
 246 #
 247 # The "ARM system type" choice list is ordered alphabetically by option
 248 # text.  Please add new entries in the option alphabetic order.
 249 #
 250 choice
 251         prompt "ARM system type"
 252         default ARCH_VERSATILE
 253
 254 config ARCH_INTEGRATOR
 255         bool "ARM Ltd. Integrator family"
 256         select ARM_AMBA
 257         select ARCH_HAS_CPUFREQ
 258         select CLKDEV_LOOKUP
 259         select HAVE_MACH_CLKDEV
 260         select ICST
 261         select GENERIC_CLOCKEVENTS
 262         select PLAT_VERSATILE
 263         select PLAT_VERSATILE_FPGA_IRQ
 264         select NEED_MACH_MEMORY_H
 265         help
 266           Support for ARM's Integrator platform.
 267
 268 config ARCH_REALVIEW
 269         bool "ARM Ltd. RealView family"
 270         select ARM_AMBA
 271         select CLKDEV_LOOKUP
 272         select HAVE_MACH_CLKDEV
 273         select ICST
 274         select GENERIC_CLOCKEVENTS
 275         select ARCH_WANT_OPTIONAL_GPIOLIB
 276         select PLAT_VERSATILE
 277         select PLAT_VERSATILE_CLCD
 278         select ARM_TIMER_SP804
 279         select GPIO_PL061 if GPIOLIB
 280         select NEED_MACH_MEMORY_H
 281         help
 282           This enables support for ARM Ltd RealView boards.
 283
 284 config ARCH_VERSATILE
 285         bool "ARM Ltd. Versatile family"
 286         select ARM_AMBA
 287         select ARM_VIC
 288         select CLKDEV_LOOKUP
 289         select HAVE_MACH_CLKDEV
 290         select ICST
 291         select GENERIC_CLOCKEVENTS
 292         select ARCH_WANT_OPTIONAL_GPIOLIB
 293         select PLAT_VERSATILE
 294         select PLAT_VERSATILE_CLCD
 295         select PLAT_VERSATILE_FPGA_IRQ
 296         select ARM_TIMER_SP804
 297         help
 298           This enables support for ARM Ltd Versatile board.
 299
 300 config ARCH_VEXPRESS
 301         bool "ARM Ltd. Versatile Express family"
 302         select ARCH_WANT_OPTIONAL_GPIOLIB
 303         select ARM_AMBA
 304         select ARM_TIMER_SP804
 305         select CLKDEV_LOOKUP
 306         select HAVE_MACH_CLKDEV
 307         select GENERIC_CLOCKEVENTS
 308         select HAVE_CLK
 309         select HAVE_PATA_PLATFORM
 310         select ICST
 311         select PLAT_VERSATILE
 312         select PLAT_VERSATILE_CLCD
 313         help
 314           This enables support for the ARM Ltd Versatile Express boards.
 315
 316 config ARCH_AT91
 317         bool "Atmel AT91"
 318         select ARCH_REQUIRE_GPIOLIB
 319         select HAVE_CLK
 320         select CLKDEV_LOOKUP
 321         help
 322           This enables support for systems based on the Atmel AT91RM9200,
 323           AT91SAM9 and AT91CAP9 processors.
 324
 325 config ARCH_BCMRING
 326         bool "Broadcom BCMRING"
 327         depends on MMU
 328         select CPU_V6
 329         select ARM_AMBA
 330         select ARM_TIMER_SP804
 331         select CLKDEV_LOOKUP
 332         select GENERIC_CLOCKEVENTS
 333         select ARCH_WANT_OPTIONAL_GPIOLIB
 334         help
 335           Support for Broadcom's BCMRing platform.
 336
 337 config ARCH_HIGHBANK
 338         bool "Calxeda Highbank-based"
 339         select ARCH_WANT_OPTIONAL_GPIOLIB
 340         select ARM_AMBA
 341         select ARM_GIC
 342         select ARM_TIMER_SP804
 343         select CLKDEV_LOOKUP
 344         select CPU_V7
 345         select GENERIC_CLOCKEVENTS
 346         select HAVE_ARM_SCU
 347         select HAVE_SMP
 348         select MIGHT_HAVE_CACHE_L2X0
 349         select USE_OF
 350         help
 351           Support for the Calxeda Highbank SoC based boards.
 352
 353 config ARCH_CLPS711X
 354         bool "Cirrus Logic CLPS711x/EP721x-based"
 355         select CPU_ARM720T
 356         select ARCH_USES_GETTIMEOFFSET
 357         select NEED_MACH_MEMORY_H
 358         help
 359           Support for Cirrus Logic 711x/721x based boards.
 360
 361 config ARCH_CNS3XXX
 362         bool "Cavium Networks CNS3XXX family"
 363         select CPU_V6K
 364         select GENERIC_CLOCKEVENTS
 365         select ARM_GIC
 366         select MIGHT_HAVE_CACHE_L2X0
 367         select MIGHT_HAVE_PCI
 368         select PCI_DOMAINS if PCI
 369         help
 370           Support for Cavium Networks CNS3XXX platform.
 371
 372 config ARCH_GEMINI
 373         bool "Cortina Systems Gemini"
 374         select CPU_FA526
 375         select ARCH_REQUIRE_GPIOLIB
 376         select ARCH_USES_GETTIMEOFFSET
 377         help
 378           Support for the Cortina Systems Gemini family SoCs
 379
 380 config ARCH_PRIMA2
 381         bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 382         select CPU_V7
 383         select NO_IOPORT
 384         select GENERIC_CLOCKEVENTS
 385         select CLKDEV_LOOKUP
 386         select GENERIC_IRQ_CHIP
 387         select MIGHT_HAVE_CACHE_L2X0
 388         select USE_OF
 389         select ZONE_DMA
 390         help
 391           Support for CSR SiRFSoC ARM Cortex A9 Platform
 392
 393 config ARCH_EBSA110
 394         bool "EBSA-110"
 395         select CPU_SA110
 396         select ISA
 397         select NO_IOPORT
 398         select ARCH_USES_GETTIMEOFFSET
 399         select NEED_MACH_MEMORY_H
 400         help
 401           This is an evaluation board for the StrongARM processor available
 402           from Digital. It has limited hardware on-board, including an
 403           Ethernet interface, two PCMCIA sockets, two serial ports and a
 404           parallel port.
 405
 406 config ARCH_EP93XX
 407         bool "EP93xx-based"
 408         select CPU_ARM920T
 409         select ARM_AMBA
 410         select ARM_VIC
 411         select CLKDEV_LOOKUP
 412         select ARCH_REQUIRE_GPIOLIB
 413         select ARCH_HAS_HOLES_MEMORYMODEL
 414         select ARCH_USES_GETTIMEOFFSET
 415         select NEED_MACH_MEMORY_H
 416         help
 417           This enables support for the Cirrus EP93xx series of CPUs.
 418
 419 config ARCH_FOOTBRIDGE
 420         bool "FootBridge"
 421         select CPU_SA110
 422         select FOOTBRIDGE
 423         select GENERIC_CLOCKEVENTS
 424         select HAVE_IDE
 425         select NEED_MACH_MEMORY_H
 426         help
 427           Support for systems based on the DC21285 companion chip
 428           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 429
 430 config ARCH_MXC
 431         bool "Freescale MXC/iMX-based"
 432         select GENERIC_CLOCKEVENTS
 433         select ARCH_REQUIRE_GPIOLIB
 434         select CLKDEV_LOOKUP
 435         select CLKSRC_MMIO
 436         select GENERIC_IRQ_CHIP
 437         select HAVE_SCHED_CLOCK
 438         select MULTI_IRQ_HANDLER
 439         help
 440           Support for Freescale MXC/iMX-based family of processors
 441
 442 config ARCH_MXS
 443         bool "Freescale MXS-based"
 444         select GENERIC_CLOCKEVENTS
 445         select ARCH_REQUIRE_GPIOLIB
 446         select CLKDEV_LOOKUP
 447         select CLKSRC_MMIO
 448         help
 449           Support for Freescale MXS-based family of processors
 450
 451 config ARCH_NETX
 452         bool "Hilscher NetX based"
 453         select CLKSRC_MMIO
 454         select CPU_ARM926T
 455         select ARM_VIC
 456         select GENERIC_CLOCKEVENTS
 457         help
 458           This enables support for systems based on the Hilscher NetX Soc
 459
 460 config ARCH_H720X
 461         bool "Hynix HMS720x-based"
 462         select CPU_ARM720T
 463         select ISA_DMA_API
 464         select ARCH_USES_GETTIMEOFFSET
 465         help
 466           This enables support for systems based on the Hynix HMS720x
 467
 468 config ARCH_IOP13XX
 469         bool "IOP13xx-based"
 470         depends on MMU
 471         select CPU_XSC3
 472         select PLAT_IOP
 473         select PCI
 474         select ARCH_SUPPORTS_MSI
 475         select VMSPLIT_1G
 476         select NEED_MACH_MEMORY_H
 477         help
 478           Support for Intel's IOP13XX (XScale) family of processors.
 479
 480 config ARCH_IOP32X
 481         bool "IOP32x-based"
 482         depends on MMU
 483         select CPU_XSCALE
 484         select PLAT_IOP
 485         select PCI
 486         select ARCH_REQUIRE_GPIOLIB
 487         help
 488           Support for Intel's 80219 and IOP32X (XScale) family of
 489           processors.
 490
 491 config ARCH_IOP33X
 492         bool "IOP33x-based"
 493         depends on MMU
 494         select CPU_XSCALE
 495         select PLAT_IOP
 496         select PCI
 497         select ARCH_REQUIRE_GPIOLIB
 498         help
 499           Support for Intel's IOP33X (XScale) family of processors.
 500
 501 config ARCH_IXP23XX
 502         bool "IXP23XX-based"
 503         depends on MMU
 504         select CPU_XSC3
 505         select PCI
 506         select ARCH_USES_GETTIMEOFFSET
 507         select NEED_MACH_MEMORY_H
 508         help
 509           Support for Intel's IXP23xx (XScale) family of processors.
 510
 511 config ARCH_IXP2000
 512         bool "IXP2400/2800-based"
 513         depends on MMU
 514         select CPU_XSCALE
 515         select PCI
 516         select ARCH_USES_GETTIMEOFFSET
 517         select NEED_MACH_MEMORY_H
 518         help
 519           Support for Intel's IXP2400/2800 (XScale) family of processors.
 520
 521 config ARCH_IXP4XX
 522         bool "IXP4xx-based"
 523         depends on MMU
 524         select CLKSRC_MMIO
 525         select CPU_XSCALE
 526         select GENERIC_GPIO
 527         select GENERIC_CLOCKEVENTS
 528         select HAVE_SCHED_CLOCK
 529         select MIGHT_HAVE_PCI
 530         select DMABOUNCE if PCI
 531         help
 532           Support for Intel's IXP4XX (XScale) family of processors.
 533
 534 config ARCH_DOVE
 535         bool "Marvell Dove"
 536         select CPU_V7
 537         select PCI
 538         select ARCH_REQUIRE_GPIOLIB
 539         select GENERIC_CLOCKEVENTS
 540         select PLAT_ORION
 541         help
 542           Support for the Marvell Dove SoC 88AP510
 543
 544 config ARCH_KIRKWOOD
 545         bool "Marvell Kirkwood"
 546         select CPU_FEROCEON
 547         select PCI
 548         select ARCH_REQUIRE_GPIOLIB
 549         select GENERIC_CLOCKEVENTS
 550         select PLAT_ORION
 551         help
 552           Support for the following Marvell Kirkwood series SoCs:
 553           88F6180, 88F6192 and 88F6281.
 554
 555 config ARCH_LPC32XX
 556         bool "NXP LPC32XX"
 557         select CLKSRC_MMIO
 558         select CPU_ARM926T
 559         select ARCH_REQUIRE_GPIOLIB
 560         select HAVE_IDE
 561         select ARM_AMBA
 562         select USB_ARCH_HAS_OHCI
 563         select CLKDEV_LOOKUP
 564         select GENERIC_CLOCKEVENTS
 565         help
 566           Support for the NXP LPC32XX family of processors
 567
 568 config ARCH_MV78XX0
 569         bool "Marvell MV78xx0"
 570         select CPU_FEROCEON
 571         select PCI
 572         select ARCH_REQUIRE_GPIOLIB
 573         select GENERIC_CLOCKEVENTS
 574         select PLAT_ORION
 575         help
 576           Support for the following Marvell MV78xx0 series SoCs:
 577           MV781x0, MV782x0.
 578
 579 config ARCH_ORION5X
 580         bool "Marvell Orion"
 581         depends on MMU
 582         select CPU_FEROCEON
 583         select PCI
 584         select ARCH_REQUIRE_GPIOLIB
 585         select GENERIC_CLOCKEVENTS
 586         select PLAT_ORION
 587         help
 588           Support for the following Marvell Orion 5x series SoCs:
 589           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 590           Orion-2 (5281), Orion-1-90 (6183).
 591
 592 config ARCH_MMP
 593         bool "Marvell PXA168/910/MMP2"
 594         depends on MMU
 595         select ARCH_REQUIRE_GPIOLIB
 596         select CLKDEV_LOOKUP
 597         select GENERIC_CLOCKEVENTS
 598         select HAVE_SCHED_CLOCK
 599         select TICK_ONESHOT
 600         select PLAT_PXA
 601         select SPARSE_IRQ
 602         select GENERIC_ALLOCATOR
 603         help
 604           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 605
 606 config ARCH_KS8695
 607         bool "Micrel/Kendin KS8695"
 608         select CPU_ARM922T
 609         select ARCH_REQUIRE_GPIOLIB
 610         select ARCH_USES_GETTIMEOFFSET
 611         select NEED_MACH_MEMORY_H
 612         help
 613           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 614           System-on-Chip devices.
 615
 616 config ARCH_W90X900
 617         bool "Nuvoton W90X900 CPU"
 618         select CPU_ARM926T
 619         select ARCH_REQUIRE_GPIOLIB
 620         select CLKDEV_LOOKUP
 621         select CLKSRC_MMIO
 622         select GENERIC_CLOCKEVENTS
 623         help
 624           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 625           At present, the w90x900 has been renamed nuc900, regarding
 626           the ARM series product line, you can login the following
 627           link address to know more.
 628
 629           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 630                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 631
 632 config ARCH_TEGRA
 633         bool "NVIDIA Tegra"
 634         select CLKDEV_LOOKUP
 635         select CLKSRC_MMIO
 636         select GENERIC_CLOCKEVENTS
 637         select GENERIC_GPIO
 638         select HAVE_CLK
 639         select HAVE_SCHED_CLOCK
 640         select HAVE_SMP
 641         select MIGHT_HAVE_CACHE_L2X0
 642         select ARCH_HAS_CPUFREQ
 643         help
 644           This enables support for NVIDIA Tegra based systems (Tegra APX,
 645           Tegra 6xx and Tegra 2 series).
 646
 647 config ARCH_PICOXCELL
 648         bool "Picochip picoXcell"
 649         select ARCH_REQUIRE_GPIOLIB
 650         select ARM_PATCH_PHYS_VIRT
 651         select ARM_VIC
 652         select CPU_V6K
 653         select DW_APB_TIMER
 654         select GENERIC_CLOCKEVENTS
 655         select GENERIC_GPIO
 656         select HAVE_SCHED_CLOCK
 657         select HAVE_TCM
 658         select NO_IOPORT
 659         select USE_OF
 660         help
 661           This enables support for systems based on the Picochip picoXcell
 662           family of Femtocell devices.  The picoxcell support requires device tree
 663           for all boards.
 664
 665 config ARCH_PNX4008
 666         bool "Philips Nexperia PNX4008 Mobile"
 667         select CPU_ARM926T
 668         select CLKDEV_LOOKUP
 669         select ARCH_USES_GETTIMEOFFSET
 670         help
 671           This enables support for Philips PNX4008 mobile platform.
 672
 673 config ARCH_PXA
 674         bool "PXA2xx/PXA3xx-based"
 675         depends on MMU
 676         select ARCH_MTD_XIP
 677         select ARCH_HAS_CPUFREQ
 678         select CLKDEV_LOOKUP
 679         select CLKSRC_MMIO
 680         select ARCH_REQUIRE_GPIOLIB
 681         select GENERIC_CLOCKEVENTS
 682         select HAVE_SCHED_CLOCK
 683         select TICK_ONESHOT
 684         select PLAT_PXA
 685         select SPARSE_IRQ
 686         select AUTO_ZRELADDR
 687         select MULTI_IRQ_HANDLER
 688         select ARM_CPU_SUSPEND if PM
 689         select HAVE_IDE
 690         help
 691           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 692
 693 config ARCH_MSM
 694         bool "Qualcomm MSM"
 695         select HAVE_CLK
 696         select GENERIC_CLOCKEVENTS
 697         select ARCH_REQUIRE_GPIOLIB
 698         select CLKDEV_LOOKUP
 699         help
 700           Support for Qualcomm MSM/QSD based systems.  This runs on the
 701           apps processor of the MSM/QSD and depends on a shared memory
 702           interface to the modem processor which runs the baseband
 703           stack and controls some vital subsystems
 704           (clock and power control, etc).
 705
 706 config ARCH_SHMOBILE
 707         bool "Renesas SH-Mobile / R-Mobile"
 708         select HAVE_CLK
 709         select CLKDEV_LOOKUP
 710         select HAVE_MACH_CLKDEV
 711         select HAVE_SMP
 712         select GENERIC_CLOCKEVENTS
 713         select MIGHT_HAVE_CACHE_L2X0
 714         select NO_IOPORT
 715         select SPARSE_IRQ
 716         select MULTI_IRQ_HANDLER
 717         select PM_GENERIC_DOMAINS if PM
 718         select NEED_MACH_MEMORY_H
 719         help
 720           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 721
 722 config ARCH_RPC
 723         bool "RiscPC"
 724         select ARCH_ACORN
 725         select FIQ
 726         select TIMER_ACORN
 727         select ARCH_MAY_HAVE_PC_FDC
 728         select HAVE_PATA_PLATFORM
 729         select ISA_DMA_API
 730         select NO_IOPORT
 731         select ARCH_SPARSEMEM_ENABLE
 732         select ARCH_USES_GETTIMEOFFSET
 733         select HAVE_IDE
 734         select NEED_MACH_MEMORY_H
 735         help
 736           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 737           CD-ROM interface, serial and parallel port, and the floppy drive.
 738
 739 config ARCH_SA1100
 740         bool "SA1100-based"
 741         select CLKSRC_MMIO
 742         select CPU_SA1100
 743         select ISA
 744         select ARCH_SPARSEMEM_ENABLE
 745         select ARCH_MTD_XIP
 746         select ARCH_HAS_CPUFREQ
 747         select CPU_FREQ
 748         select GENERIC_CLOCKEVENTS
 749         select HAVE_CLK
 750         select HAVE_SCHED_CLOCK
 751         select TICK_ONESHOT
 752         select ARCH_REQUIRE_GPIOLIB
 753         select HAVE_IDE
 754         select NEED_MACH_MEMORY_H
 755         help
 756           Support for StrongARM 11x0 based boards.
 757
 758 config ARCH_S3C2410
 759         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 760         select GENERIC_GPIO
 761         select ARCH_HAS_CPUFREQ
 762         select HAVE_CLK
 763         select CLKDEV_LOOKUP
 764         select ARCH_USES_GETTIMEOFFSET
 765         select HAVE_S3C2410_I2C if I2C
 766         help
 767           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 768           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 769           the Samsung SMDK2410 development board (and derivatives).
 770
 771           Note, the S3C2416 and the S3C2450 are so close that they even share
 772           the same SoC ID code. This means that there is no separate machine
 773           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 774
 775 config ARCH_S3C64XX
 776         bool "Samsung S3C64XX"
 777         select PLAT_SAMSUNG
 778         select CPU_V6
 779         select ARM_VIC
 780         select HAVE_CLK
 781         select HAVE_TCM
 782         select CLKDEV_LOOKUP
 783         select NO_IOPORT
 784         select ARCH_USES_GETTIMEOFFSET
 785         select ARCH_HAS_CPUFREQ
 786         select ARCH_REQUIRE_GPIOLIB
 787         select SAMSUNG_CLKSRC
 788         select SAMSUNG_IRQ_VIC_TIMER
 789         select S3C_GPIO_TRACK
 790         select S3C_DEV_NAND
 791         select USB_ARCH_HAS_OHCI
 792         select SAMSUNG_GPIOLIB_4BIT
 793         select HAVE_S3C2410_I2C if I2C
 794         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 795         help
 796           Samsung S3C64XX series based systems
 797
 798 config ARCH_S5P64X0
 799         bool "Samsung S5P6440 S5P6450"
 800         select CPU_V6
 801         select GENERIC_GPIO
 802         select HAVE_CLK
 803         select CLKDEV_LOOKUP
 804         select CLKSRC_MMIO
 805         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 806         select GENERIC_CLOCKEVENTS
 807         select HAVE_SCHED_CLOCK
 808         select HAVE_S3C2410_I2C if I2C
 809         select HAVE_S3C_RTC if RTC_CLASS
 810         help
 811           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 812           SMDK6450.
 813
 814 config ARCH_S5PC100
 815         bool "Samsung S5PC100"
 816         select GENERIC_GPIO
 817         select HAVE_CLK
 818         select CLKDEV_LOOKUP
 819         select CPU_V7
 820         select ARM_L1_CACHE_SHIFT_6
 821         select ARCH_USES_GETTIMEOFFSET
 822         select HAVE_S3C2410_I2C if I2C
 823         select HAVE_S3C_RTC if RTC_CLASS
 824         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 825         help
 826           Samsung S5PC100 series based systems
 827
 828 config ARCH_S5PV210
 829         bool "Samsung S5PV210/S5PC110"
 830         select CPU_V7
 831         select ARCH_SPARSEMEM_ENABLE
 832         select ARCH_HAS_HOLES_MEMORYMODEL
 833         select GENERIC_GPIO
 834         select HAVE_CLK
 835         select CLKDEV_LOOKUP
 836         select CLKSRC_MMIO
 837         select ARM_L1_CACHE_SHIFT_6
 838         select ARCH_HAS_CPUFREQ
 839         select GENERIC_CLOCKEVENTS
 840         select HAVE_SCHED_CLOCK
 841         select HAVE_S3C2410_I2C if I2C
 842         select HAVE_S3C_RTC if RTC_CLASS
 843         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 844         select NEED_MACH_MEMORY_H
 845         help
 846           Samsung S5PV210/S5PC110 series based systems
 847
 848 config ARCH_EXYNOS
 849         bool "SAMSUNG EXYNOS"
 850         select CPU_V7
 851         select ARCH_SPARSEMEM_ENABLE
 852         select ARCH_HAS_HOLES_MEMORYMODEL
 853         select GENERIC_GPIO
 854         select HAVE_CLK
 855         select CLKDEV_LOOKUP
 856         select ARCH_HAS_CPUFREQ
 857         select GENERIC_CLOCKEVENTS
 858         select HAVE_S3C_RTC if RTC_CLASS
 859         select HAVE_S3C2410_I2C if I2C
 860         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 861         select NEED_MACH_MEMORY_H
 862         help
 863           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 864
 865 config ARCH_SHARK
 866         bool "Shark"
 867         select CPU_SA110
 868         select ISA
 869         select ISA_DMA
 870         select ZONE_DMA
 871         select PCI
 872         select ARCH_USES_GETTIMEOFFSET
 873         select NEED_MACH_MEMORY_H
 874         help
 875           Support for the StrongARM based Digital DNARD machine, also known
 876           as "Shark" (<http://www.shark-linux.de/shark.html>).
 877
 878 config ARCH_TCC_926
 879         bool "Telechips TCC ARM926-based systems"
 880         select CLKSRC_MMIO
 881         select CPU_ARM926T
 882         select HAVE_CLK
 883         select CLKDEV_LOOKUP
 884         select GENERIC_CLOCKEVENTS
 885         help
 886           Support for Telechips TCC ARM926-based systems.
 887
 888 config ARCH_U300
 889         bool "ST-Ericsson U300 Series"
 890         depends on MMU
 891         select CLKSRC_MMIO
 892         select CPU_ARM926T
 893         select HAVE_SCHED_CLOCK
 894         select HAVE_TCM
 895         select ARM_AMBA
 896         select ARM_PATCH_PHYS_VIRT
 897         select ARM_VIC
 898         select GENERIC_CLOCKEVENTS
 899         select CLKDEV_LOOKUP
 900         select HAVE_MACH_CLKDEV
 901         select GENERIC_GPIO
 902         select ARCH_REQUIRE_GPIOLIB
 903         select NEED_MACH_MEMORY_H
 904         help
 905           Support for ST-Ericsson U300 series mobile platforms.
 906
 907 config ARCH_U8500
 908         bool "ST-Ericsson U8500 Series"
 909         select CPU_V7
 910         select ARM_AMBA
 911         select GENERIC_CLOCKEVENTS
 912         select CLKDEV_LOOKUP
 913         select ARCH_REQUIRE_GPIOLIB
 914         select ARCH_HAS_CPUFREQ
 915         select HAVE_SMP
 916         select MIGHT_HAVE_CACHE_L2X0
 917         help
 918           Support for ST-Ericsson's Ux500 architecture
 919
 920 config ARCH_NOMADIK
 921         bool "STMicroelectronics Nomadik"
 922         select ARM_AMBA
 923         select ARM_VIC
 924         select CPU_ARM926T
 925         select CLKDEV_LOOKUP
 926         select GENERIC_CLOCKEVENTS
 927         select MIGHT_HAVE_CACHE_L2X0
 928         select ARCH_REQUIRE_GPIOLIB
 929         help
 930           Support for the Nomadik platform by ST-Ericsson
 931
 932 config ARCH_DAVINCI
 933         bool "TI DaVinci"
 934         select GENERIC_CLOCKEVENTS
 935         select ARCH_REQUIRE_GPIOLIB
 936         select ZONE_DMA
 937         select HAVE_IDE
 938         select CLKDEV_LOOKUP
 939         select GENERIC_ALLOCATOR
 940         select GENERIC_IRQ_CHIP
 941         select ARCH_HAS_HOLES_MEMORYMODEL
 942         help
 943           Support for TI's DaVinci platform.
 944
 945 config ARCH_OMAP
 946         bool "TI OMAP"
 947         select HAVE_CLK
 948         select ARCH_REQUIRE_GPIOLIB
 949         select ARCH_HAS_CPUFREQ
 950         select CLKSRC_MMIO
 951         select GENERIC_CLOCKEVENTS
 952         select HAVE_SCHED_CLOCK
 953         select ARCH_HAS_HOLES_MEMORYMODEL
 954         help
 955           Support for TI's OMAP platform (OMAP1/2/3/4).
 956
 957 config PLAT_SPEAR
 958         bool "ST SPEAr"
 959         select ARM_AMBA
 960         select ARCH_REQUIRE_GPIOLIB
 961         select CLKDEV_LOOKUP
 962         select CLKSRC_MMIO
 963         select GENERIC_CLOCKEVENTS
 964         select HAVE_CLK
 965         help
 966           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 967
 968 config ARCH_VT8500
 969         bool "VIA/WonderMedia 85xx"
 970         select CPU_ARM926T
 971         select GENERIC_GPIO
 972         select ARCH_HAS_CPUFREQ
 973         select GENERIC_CLOCKEVENTS
 974         select ARCH_REQUIRE_GPIOLIB
 975         select HAVE_PWM
 976         help
 977           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 978
 979 config ARCH_ZYNQ
 980         bool "Xilinx Zynq ARM Cortex A9 Platform"
 981         select CPU_V7
 982         select GENERIC_CLOCKEVENTS
 983         select CLKDEV_LOOKUP
 984         select ARM_GIC
 985         select ARM_AMBA
 986         select ICST
 987         select MIGHT_HAVE_CACHE_L2X0
 988         select USE_OF
 989         help
 990           Support for Xilinx Zynq ARM Cortex A9 Platform
 991 endchoice
 992
 993 #
 994 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 995 # Kconfigs may be included either alphabetically (according to the
 996 # plat- suffix) or along side the corresponding mach-* source.
 997 #
 998 source "arch/arm/mach-at91/Kconfig"
 999
1000 source "arch/arm/mach-bcmring/Kconfig"
1001
1002 source "arch/arm/mach-clps711x/Kconfig"
1003
1004 source "arch/arm/mach-cns3xxx/Kconfig"
1005
1006 source "arch/arm/mach-davinci/Kconfig"
1007
1008 source "arch/arm/mach-dove/Kconfig"
1009
1010 source "arch/arm/mach-ep93xx/Kconfig"
1011
1012 source "arch/arm/mach-footbridge/Kconfig"
1013
1014 source "arch/arm/mach-gemini/Kconfig"
1015
1016 source "arch/arm/mach-h720x/Kconfig"
1017
1018 source "arch/arm/mach-integrator/Kconfig"
1019
1020 source "arch/arm/mach-iop32x/Kconfig"
1021
1022 source "arch/arm/mach-iop33x/Kconfig"
1023
1024 source "arch/arm/mach-iop13xx/Kconfig"
1025
1026 source "arch/arm/mach-ixp4xx/Kconfig"
1027
1028 source "arch/arm/mach-ixp2000/Kconfig"
1029
1030 source "arch/arm/mach-ixp23xx/Kconfig"
1031
1032 source "arch/arm/mach-kirkwood/Kconfig"
1033
1034 source "arch/arm/mach-ks8695/Kconfig"
1035
1036 source "arch/arm/mach-lpc32xx/Kconfig"
1037
1038 source "arch/arm/mach-msm/Kconfig"
1039
1040 source "arch/arm/mach-mv78xx0/Kconfig"
1041
1042 source "arch/arm/plat-mxc/Kconfig"
1043
1044 source "arch/arm/mach-mxs/Kconfig"
1045
1046 source "arch/arm/mach-netx/Kconfig"
1047
1048 source "arch/arm/mach-nomadik/Kconfig"
1049 source "arch/arm/plat-nomadik/Kconfig"
1050
1051 source "arch/arm/plat-omap/Kconfig"
1052
1053 source "arch/arm/mach-omap1/Kconfig"
1054
1055 source "arch/arm/mach-omap2/Kconfig"
1056
1057 source "arch/arm/mach-orion5x/Kconfig"
1058
1059 source "arch/arm/mach-pxa/Kconfig"
1060 source "arch/arm/plat-pxa/Kconfig"
1061
1062 source "arch/arm/mach-mmp/Kconfig"
1063
1064 source "arch/arm/mach-realview/Kconfig"
1065
1066 source "arch/arm/mach-sa1100/Kconfig"
1067
1068 source "arch/arm/plat-samsung/Kconfig"
1069 source "arch/arm/plat-s3c24xx/Kconfig"
1070 source "arch/arm/plat-s5p/Kconfig"
1071
1072 source "arch/arm/plat-spear/Kconfig"
1073
1074 source "arch/arm/plat-tcc/Kconfig"
1075
1076 if ARCH_S3C2410
1077 source "arch/arm/mach-s3c2410/Kconfig"
1078 source "arch/arm/mach-s3c2412/Kconfig"
1079 source "arch/arm/mach-s3c2416/Kconfig"
1080 source "arch/arm/mach-s3c2440/Kconfig"
1081 source "arch/arm/mach-s3c2443/Kconfig"
1082 endif
1083
1084 if ARCH_S3C64XX
1085 source "arch/arm/mach-s3c64xx/Kconfig"
1086 endif
1087
1088 source "arch/arm/mach-s5p64x0/Kconfig"
1089
1090 source "arch/arm/mach-s5pc100/Kconfig"
1091
1092 source "arch/arm/mach-s5pv210/Kconfig"
1093
1094 source "arch/arm/mach-exynos/Kconfig"
1095
1096 source "arch/arm/mach-shmobile/Kconfig"
1097
1098 source "arch/arm/mach-tegra/Kconfig"
1099
1100 source "arch/arm/mach-u300/Kconfig"
1101
1102 source "arch/arm/mach-ux500/Kconfig"
1103
1104 source "arch/arm/mach-versatile/Kconfig"
1105
1106 source "arch/arm/mach-vexpress/Kconfig"
1107 source "arch/arm/plat-versatile/Kconfig"
1108
1109 source "arch/arm/mach-vt8500/Kconfig"
1110
1111 source "arch/arm/mach-w90x900/Kconfig"
1112
1113 # Definitions to make life easier
1114 config ARCH_ACORN
1115         bool
1116
1117 config PLAT_IOP
1118         bool
1119         select GENERIC_CLOCKEVENTS
1120         select HAVE_SCHED_CLOCK
1121
1122 config PLAT_ORION
1123         bool
1124         select CLKSRC_MMIO
1125         select GENERIC_IRQ_CHIP
1126         select HAVE_SCHED_CLOCK
1127
1128 config PLAT_PXA
1129         bool
1130
1131 config PLAT_VERSATILE
1132         bool
1133
1134 config ARM_TIMER_SP804
1135         bool
1136         select CLKSRC_MMIO
1137
1138 source arch/arm/mm/Kconfig
1139
1140 config IWMMXT
1141         bool "Enable iWMMXt support"
1142         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1143         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1144         help
1145           Enable support for iWMMXt context switching at run time if
1146           running on a CPU that supports it.
1147
1148 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1149 config XSCALE_PMU
1150         bool
1151         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1152         default y
1153
1154 config CPU_HAS_PMU
1155         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1156                    (!ARCH_OMAP3 || OMAP3_EMU)
1157         default y
1158         bool
1159
1160 config MULTI_IRQ_HANDLER
1161         bool
1162         help
1163           Allow each machine to specify it's own IRQ handler at run time.
1164
1165 if !MMU
1166 source "arch/arm/Kconfig-nommu"
1167 endif
1168
1169 config ARM_ERRATA_411920
1170         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1171         depends on CPU_V6 || CPU_V6K
1172         help
1173           Invalidation of the Instruction Cache operation can
1174           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1175           It does not affect the MPCore. This option enables the ARM Ltd.
1176           recommended workaround.
1177
1178 config ARM_ERRATA_430973
1179         bool "ARM errata: Stale prediction on replaced interworking branch"
1180         depends on CPU_V7
1181         help
1182           This option enables the workaround for the 430973 Cortex-A8
1183           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1184           interworking branch is replaced with another code sequence at the
1185           same virtual address, whether due to self-modifying code or virtual
1186           to physical address re-mapping, Cortex-A8 does not recover from the
1187           stale interworking branch prediction. This results in Cortex-A8
1188           executing the new code sequence in the incorrect ARM or Thumb state.
1189           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1190           and also flushes the branch target cache at every context switch.
1191           Note that setting specific bits in the ACTLR register may not be
1192           available in non-secure mode.
1193
1194 config ARM_ERRATA_458693
1195         bool "ARM errata: Processor deadlock when a false hazard is created"
1196         depends on CPU_V7
1197         help
1198           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1199           erratum. For very specific sequences of memory operations, it is
1200           possible for a hazard condition intended for a cache line to instead
1201           be incorrectly associated with a different cache line. This false
1202           hazard might then cause a processor deadlock. The workaround enables
1203           the L1 caching of the NEON accesses and disables the PLD instruction
1204           in the ACTLR register. Note that setting specific bits in the ACTLR
1205           register may not be available in non-secure mode.
1206
1207 config ARM_ERRATA_460075
1208         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1209         depends on CPU_V7
1210         help
1211           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1212           erratum. Any asynchronous access to the L2 cache may encounter a
1213           situation in which recent store transactions to the L2 cache are lost
1214           and overwritten with stale memory contents from external memory. The
1215           workaround disables the write-allocate mode for the L2 cache via the
1216           ACTLR register. Note that setting specific bits in the ACTLR register
1217           may not be available in non-secure mode.
1218
1219 config ARM_ERRATA_742230
1220         bool "ARM errata: DMB operation may be faulty"
1221         depends on CPU_V7 && SMP
1222         help
1223           This option enables the workaround for the 742230 Cortex-A9
1224           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1225           between two write operations may not ensure the correct visibility
1226           ordering of the two writes. This workaround sets a specific bit in
1227           the diagnostic register of the Cortex-A9 which causes the DMB
1228           instruction to behave as a DSB, ensuring the correct behaviour of
1229           the two writes.
1230
1231 config ARM_ERRATA_742231
1232         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1233         depends on CPU_V7 && SMP
1234         help
1235           This option enables the workaround for the 742231 Cortex-A9
1236           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1237           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1238           accessing some data located in the same cache line, may get corrupted
1239           data due to bad handling of the address hazard when the line gets
1240           replaced from one of the CPUs at the same time as another CPU is
1241           accessing it. This workaround sets specific bits in the diagnostic
1242           register of the Cortex-A9 which reduces the linefill issuing
1243           capabilities of the processor.
1244
1245 config PL310_ERRATA_588369
1246         bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1247         depends on CACHE_L2X0
1248         help
1249            The PL310 L2 cache controller implements three types of Clean &
1250            Invalidate maintenance operations: by Physical Address
1251            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1252            They are architecturally defined to behave as the execution of a
1253            clean operation followed immediately by an invalidate operation,
1254            both performing to the same memory location. This functionality
1255            is not correctly implemented in PL310 as clean lines are not
1256            invalidated as a result of these operations.
1257
1258 config ARM_ERRATA_720789
1259         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1260         depends on CPU_V7 && SMP
1261         help
1262           This option enables the workaround for the 720789 Cortex-A9 (prior to
1263           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1264           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1265           As a consequence of this erratum, some TLB entries which should be
1266           invalidated are not, resulting in an incoherency in the system page
1267           tables. The workaround changes the TLB flushing routines to invalidate
1268           entries regardless of the ASID.
1269
1270 config PL310_ERRATA_727915
1271         bool "Background Clean & Invalidate by Way operation can cause data corruption"
1272         depends on CACHE_L2X0
1273         help
1274           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1275           operation (offset 0x7FC). This operation runs in background so that
1276           PL310 can handle normal accesses while it is in progress. Under very
1277           rare circumstances, due to this erratum, write data can be lost when
1278           PL310 treats a cacheable write transaction during a Clean &
1279           Invalidate by Way operation.
1280
1281 config ARM_ERRATA_743622
1282         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1283         depends on CPU_V7
1284         help
1285           This option enables the workaround for the 743622 Cortex-A9
1286           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1287           optimisation in the Cortex-A9 Store Buffer may lead to data
1288           corruption. This workaround sets a specific bit in the diagnostic
1289           register of the Cortex-A9 which disables the Store Buffer
1290           optimisation, preventing the defect from occurring. This has no
1291           visible impact on the overall performance or power consumption of the
1292           processor.
1293
1294 config ARM_ERRATA_751472
1295         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1296         depends on CPU_V7 && SMP
1297         help
1298           This option enables the workaround for the 751472 Cortex-A9 (prior
1299           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1300           completion of a following broadcasted operation if the second
1301           operation is received by a CPU before the ICIALLUIS has completed,
1302           potentially leading to corrupted entries in the cache or TLB.
1303
1304 config ARM_ERRATA_753970
1305         bool "ARM errata: cache sync operation may be faulty"
1306         depends on CACHE_PL310
1307         help
1308           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1309
1310           Under some condition the effect of cache sync operation on
1311           the store buffer still remains when the operation completes.
1312           This means that the store buffer is always asked to drain and
1313           this prevents it from merging any further writes. The workaround
1314           is to replace the normal offset of cache sync operation (0x730)
1315           by another offset targeting an unmapped PL310 register 0x740.
1316           This has the same effect as the cache sync operation: store buffer
1317           drain and waiting for all buffers empty.
1318
1319 config ARM_ERRATA_754322
1320         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1321         depends on CPU_V7
1322         help
1323           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1324           r3p*) erratum. A speculative memory access may cause a page table walk
1325           which starts prior to an ASID switch but completes afterwards. This
1326           can populate the micro-TLB with a stale entry which may be hit with
1327           the new ASID. This workaround places two dsb instructions in the mm
1328           switching code so that no page table walks can cross the ASID switch.
1329
1330 config ARM_ERRATA_754327
1331         bool "ARM errata: no automatic Store Buffer drain"
1332         depends on CPU_V7 && SMP
1333         help
1334           This option enables the workaround for the 754327 Cortex-A9 (prior to
1335           r2p0) erratum. The Store Buffer does not have any automatic draining
1336           mechanism and therefore a livelock may occur if an external agent
1337           continuously polls a memory location waiting to observe an update.
1338           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1339           written polling loops from denying visibility of updates to memory.
1340
1341 config ARM_ERRATA_364296
1342         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1343         depends on CPU_V6 && !SMP
1344         help
1345           This options enables the workaround for the 364296 ARM1136
1346           r0p2 erratum (possible cache data corruption with
1347           hit-under-miss enabled). It sets the undocumented bit 31 in
1348           the auxiliary control register and the FI bit in the control
1349           register, thus disabling hit-under-miss without putting the
1350           processor into full low interrupt latency mode. ARM11MPCore
1351           is not affected.
1352
1353 config ARM_ERRATA_764369
1354         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1355         depends on CPU_V7 && SMP
1356         help
1357           This option enables the workaround for erratum 764369
1358           affecting Cortex-A9 MPCore with two or more processors (all
1359           current revisions). Under certain timing circumstances, a data
1360           cache line maintenance operation by MVA targeting an Inner
1361           Shareable memory region may fail to proceed up to either the
1362           Point of Coherency or to the Point of Unification of the
1363           system. This workaround adds a DSB instruction before the
1364           relevant cache maintenance functions and sets a specific bit
1365           in the diagnostic control register of the SCU.
1366
1367 endmenu
1368
1369 source "arch/arm/common/Kconfig"
1370
1371 menu "Bus support"
1372
1373 config ARM_AMBA
1374         bool
1375
1376 config ISA
1377         bool
1378         help
1379           Find out whether you have ISA slots on your motherboard.  ISA is the
1380           name of a bus system, i.e. the way the CPU talks to the other stuff
1381           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1382           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1383           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1384
1385 # Select ISA DMA controller support
1386 config ISA_DMA
1387         bool
1388         select ISA_DMA_API
1389
1390 # Select ISA DMA interface
1391 config ISA_DMA_API
1392         bool
1393
1394 config PCI
1395         bool "PCI support" if MIGHT_HAVE_PCI
1396         help
1397           Find out whether you have a PCI motherboard. PCI is the name of a
1398           bus system, i.e. the way the CPU talks to the other stuff inside
1399           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1400           VESA. If you have PCI, say Y, otherwise N.
1401
1402 config PCI_DOMAINS
1403         bool
1404         depends on PCI
1405
1406 config PCI_NANOENGINE
1407         bool "BSE nanoEngine PCI support"
1408         depends on SA1100_NANOENGINE
1409         help
1410           Enable PCI on the BSE nanoEngine board.
1411
1412 config PCI_SYSCALL
1413         def_bool PCI
1414
1415 # Select the host bridge type
1416 config PCI_HOST_VIA82C505
1417         bool
1418         depends on PCI && ARCH_SHARK
1419         default y
1420
1421 config PCI_HOST_ITE8152
1422         bool
1423         depends on PCI && MACH_ARMCORE
1424         default y
1425         select DMABOUNCE
1426
1427 source "drivers/pci/Kconfig"
1428
1429 source "drivers/pcmcia/Kconfig"
1430
1431 endmenu
1432
1433 menu "Kernel Features"
1434
1435 source "kernel/time/Kconfig"
1436
1437 config HAVE_SMP
1438         bool
1439         help
1440           This option should be selected by machines which have an SMP-
1441           capable CPU.
1442
1443           The only effect of this option is to make the SMP-related
1444           options available to the user for configuration.
1445
1446 config SMP
1447         bool "Symmetric Multi-Processing"
1448         depends on CPU_V6K || CPU_V7
1449         depends on GENERIC_CLOCKEVENTS
1450         depends on HAVE_SMP
1451         depends on MMU
1452         select USE_GENERIC_SMP_HELPERS
1453         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1454         help
1455           This enables support for systems with more than one CPU. If you have
1456           a system with only one CPU, like most personal computers, say N. If
1457           you have a system with more than one CPU, say Y.
1458
1459           If you say N here, the kernel will run on single and multiprocessor
1460           machines, but will use only one CPU of a multiprocessor machine. If
1461           you say Y here, the kernel will run on many, but not all, single
1462           processor machines. On a single processor machine, the kernel will
1463           run faster if you say N here.
1464
1465           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1466           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1467           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1468
1469           If you don't know what to do here, say N.
1470
1471 config SMP_ON_UP
1472         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1473         depends on EXPERIMENTAL
1474         depends on SMP && !XIP_KERNEL
1475         default y
1476         help
1477           SMP kernels contain instructions which fail on non-SMP processors.
1478           Enabling this option allows the kernel to modify itself to make
1479           these instructions safe.  Disabling it allows about 1K of space
1480           savings.
1481
1482           If you don't know what to do here, say Y.
1483
1484 config ARM_CPU_TOPOLOGY
1485         bool "Support cpu topology definition"
1486         depends on SMP && CPU_V7
1487         default y
1488         help
1489           Support ARM cpu topology definition. The MPIDR register defines
1490           affinity between processors which is then used to describe the cpu
1491           topology of an ARM System.
1492
1493 config SCHED_MC
1494         bool "Multi-core scheduler support"
1495         depends on ARM_CPU_TOPOLOGY
1496         help
1497           Multi-core scheduler support improves the CPU scheduler's decision
1498           making when dealing with multi-core CPU chips at a cost of slightly
1499           increased overhead in some places. If unsure say N here.
1500
1501 config SCHED_SMT
1502         bool "SMT scheduler support"
1503         depends on ARM_CPU_TOPOLOGY
1504         help
1505           Improves the CPU scheduler's decision making when dealing with
1506           MultiThreading at a cost of slightly increased overhead in some
1507           places. If unsure say N here.
1508
1509 config HAVE_ARM_SCU
1510         bool
1511         help
1512           This option enables support for the ARM system coherency unit
1513
1514 config HAVE_ARM_TWD
1515         bool
1516         depends on SMP
1517         select TICK_ONESHOT
1518         help
1519           This options enables support for the ARM timer and watchdog unit
1520
1521 choice
1522         prompt "Memory split"
1523         default VMSPLIT_3G
1524         help
1525           Select the desired split between kernel and user memory.
1526
1527           If you are not absolutely sure what you are doing, leave this
1528           option alone!
1529
1530         config VMSPLIT_3G
1531                 bool "3G/1G user/kernel split"
1532         config VMSPLIT_2G
1533                 bool "2G/2G user/kernel split"
1534         config VMSPLIT_1G
1535                 bool "1G/3G user/kernel split"
1536 endchoice
1537
1538 config PAGE_OFFSET
1539         hex
1540         default 0x40000000 if VMSPLIT_1G
1541         default 0x80000000 if VMSPLIT_2G
1542         default 0xC0000000
1543
1544 config NR_CPUS
1545         int "Maximum number of CPUs (2-32)"
1546         range 2 32
1547         depends on SMP
1548         default "4"
1549
1550 config HOTPLUG_CPU
1551         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1552         depends on SMP && HOTPLUG && EXPERIMENTAL
1553         help
1554           Say Y here to experiment with turning CPUs off and on.  CPUs
1555           can be controlled through /sys/devices/system/cpu.
1556
1557 config LOCAL_TIMERS
1558         bool "Use local timer interrupts"
1559         depends on SMP
1560         default y
1561         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1562         help
1563           Enable support for local timers on SMP platforms, rather then the
1564           legacy IPI broadcast method.  Local timers allows the system
1565           accounting to be spread across the timer interval, preventing a
1566           "thundering herd" at every timer tick.
1567
1568 source kernel/Kconfig.preempt
1569
1570 config HZ
1571         int
1572         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1573                 ARCH_S5PV210 || ARCH_EXYNOS4
1574         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1575         default AT91_TIMER_HZ if ARCH_AT91
1576         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1577         default 100
1578
1579 config THUMB2_KERNEL
1580         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1581         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1582         select AEABI
1583         select ARM_ASM_UNIFIED
1584         select ARM_UNWIND
1585         help
1586           By enabling this option, the kernel will be compiled in
1587           Thumb-2 mode. A compiler/assembler that understand the unified
1588           ARM-Thumb syntax is needed.
1589
1590           If unsure, say N.
1591
1592 config THUMB2_AVOID_R_ARM_THM_JUMP11
1593         bool "Work around buggy Thumb-2 short branch relocations in gas"
1594         depends on THUMB2_KERNEL && MODULES
1595         default y
1596         help
1597           Various binutils versions can resolve Thumb-2 branches to
1598           locally-defined, preemptible global symbols as short-range "b.n"
1599           branch instructions.
1600
1601           This is a problem, because there's no guarantee the final
1602           destination of the symbol, or any candidate locations for a
1603           trampoline, are within range of the branch.  For this reason, the
1604           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1605           relocation in modules at all, and it makes little sense to add
1606           support.
1607
1608           The symptom is that the kernel fails with an "unsupported
1609           relocation" error when loading some modules.
1610
1611           Until fixed tools are available, passing
1612           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1613           code which hits this problem, at the cost of a bit of extra runtime
1614           stack usage in some cases.
1615
1616           The problem is described in more detail at:
1617               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1618
1619           Only Thumb-2 kernels are affected.
1620
1621           Unless you are sure your tools don't have this problem, say Y.
1622
1623 config ARM_ASM_UNIFIED
1624         bool
1625
1626 config AEABI
1627         bool "Use the ARM EABI to compile the kernel"
1628         help
1629           This option allows for the kernel to be compiled using the latest
1630           ARM ABI (aka EABI).  This is only useful if you are using a user
1631           space environment that is also compiled with EABI.
1632
1633           Since there are major incompatibilities between the legacy ABI and
1634           EABI, especially with regard to structure member alignment, this
1635           option also changes the kernel syscall calling convention to
1636           disambiguate both ABIs and allow for backward compatibility support
1637           (selected with CONFIG_OABI_COMPAT).
1638
1639           To use this you need GCC version 4.0.0 or later.
1640
1641 config OABI_COMPAT
1642         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1643         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1644         default y
1645         help
1646           This option preserves the old syscall interface along with the
1647           new (ARM EABI) one. It also provides a compatibility layer to
1648           intercept syscalls that have structure arguments which layout
1649           in memory differs between the legacy ABI and the new ARM EABI
1650           (only for non "thumb" binaries). This option adds a tiny
1651           overhead to all syscalls and produces a slightly larger kernel.
1652           If you know you'll be using only pure EABI user space then you
1653           can say N here. If this option is not selected and you attempt
1654           to execute a legacy ABI binary then the result will be
1655           UNPREDICTABLE (in fact it can be predicted that it won't work
1656           at all). If in doubt say Y.
1657
1658 config ARCH_HAS_HOLES_MEMORYMODEL
1659         bool
1660
1661 config ARCH_SPARSEMEM_ENABLE
1662         bool
1663
1664 config ARCH_SPARSEMEM_DEFAULT
1665         def_bool ARCH_SPARSEMEM_ENABLE
1666
1667 config ARCH_SELECT_MEMORY_MODEL
1668         def_bool ARCH_SPARSEMEM_ENABLE
1669
1670 config HAVE_ARCH_PFN_VALID
1671         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1672
1673 config HIGHMEM
1674         bool "High Memory Support"
1675         depends on MMU
1676         help
1677           The address space of ARM processors is only 4 Gigabytes large
1678           and it has to accommodate user address space, kernel address
1679           space as well as some memory mapped IO. That means that, if you
1680           have a large amount of physical memory and/or IO, not all of the
1681           memory can be "permanently mapped" by the kernel. The physical
1682           memory that is not permanently mapped is called "high memory".
1683
1684           Depending on the selected kernel/user memory split, minimum
1685           vmalloc space and actual amount of RAM, you may not need this
1686           option which should result in a slightly faster kernel.
1687
1688           If unsure, say n.
1689
1690 config HIGHPTE
1691         bool "Allocate 2nd-level pagetables from highmem"
1692         depends on HIGHMEM
1693
1694 config HW_PERF_EVENTS
1695         bool "Enable hardware performance counter support for perf events"
1696         depends on PERF_EVENTS && CPU_HAS_PMU
1697         default y
1698         help
1699           Enable hardware performance counter support for perf events. If
1700           disabled, perf events will use software events only.
1701
1702 source "mm/Kconfig"
1703
1704 config FORCE_MAX_ZONEORDER
1705         int "Maximum zone order" if ARCH_SHMOBILE
1706         range 11 64 if ARCH_SHMOBILE
1707         default "9" if SA1111
1708         default "11"
1709         help
1710           The kernel memory allocator divides physically contiguous memory
1711           blocks into "zones", where each zone is a power of two number of
1712           pages.  This option selects the largest power of two that the kernel
1713           keeps in the memory allocator.  If you need to allocate very large
1714           blocks of physically contiguous memory, then you may need to
1715           increase this value.
1716
1717           This config option is actually maximum order plus one. For example,
1718           a value of 11 means that the largest free memory block is 2^10 pages.
1719
1720 config LEDS
1721         bool "Timer and CPU usage LEDs"
1722         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1723                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1724                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1725                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1726                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1727                    ARCH_AT91 || ARCH_DAVINCI || \
1728                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1729         help
1730           If you say Y here, the LEDs on your machine will be used
1731           to provide useful information about your current system status.
1732
1733           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1734           be able to select which LEDs are active using the options below. If
1735           you are compiling a kernel for the EBSA-110 or the LART however, the
1736           red LED will simply flash regularly to indicate that the system is
1737           still functional. It is safe to say Y here if you have a CATS
1738           system, but the driver will do nothing.
1739
1740 config LEDS_TIMER
1741         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1742                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1743                             || MACH_OMAP_PERSEUS2
1744         depends on LEDS
1745         depends on !GENERIC_CLOCKEVENTS
1746         default y if ARCH_EBSA110
1747         help
1748           If you say Y here, one of the system LEDs (the green one on the
1749           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1750           will flash regularly to indicate that the system is still
1751           operational. This is mainly useful to kernel hackers who are
1752           debugging unstable kernels.
1753
1754           The LART uses the same LED for both Timer LED and CPU usage LED
1755           functions. You may choose to use both, but the Timer LED function
1756           will overrule the CPU usage LED.
1757
1758 config LEDS_CPU
1759         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1760                         !ARCH_OMAP) \
1761                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1762                         || MACH_OMAP_PERSEUS2
1763         depends on LEDS
1764         help
1765           If you say Y here, the red LED will be used to give a good real
1766           time indication of CPU usage, by lighting whenever the idle task
1767           is not currently executing.
1768
1769           The LART uses the same LED for both Timer LED and CPU usage LED
1770           functions. You may choose to use both, but the Timer LED function
1771           will overrule the CPU usage LED.
1772
1773 config ALIGNMENT_TRAP
1774         bool
1775         depends on CPU_CP15_MMU
1776         default y if !ARCH_EBSA110
1777         select HAVE_PROC_CPU if PROC_FS
1778         help
1779           ARM processors cannot fetch/store information which is not
1780           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1781           address divisible by 4. On 32-bit ARM processors, these non-aligned
1782           fetch/store instructions will be emulated in software if you say
1783           here, which has a severe performance impact. This is necessary for
1784           correct operation of some network protocols. With an IP-only
1785           configuration it is safe to say N, otherwise say Y.
1786
1787 config UACCESS_WITH_MEMCPY
1788         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1789         depends on MMU && EXPERIMENTAL
1790         default y if CPU_FEROCEON
1791         help
1792           Implement faster copy_to_user and clear_user methods for CPU
1793           cores where a 8-word STM instruction give significantly higher
1794           memory write throughput than a sequence of individual 32bit stores.
1795
1796           A possible side effect is a slight increase in scheduling latency
1797           between threads sharing the same address space if they invoke
1798           such copy operations with large buffers.
1799
1800           However, if the CPU data cache is using a write-allocate mode,
1801           this option is unlikely to provide any performance gain.
1802
1803 config SECCOMP
1804         bool
1805         prompt "Enable seccomp to safely compute untrusted bytecode"
1806         ---help---
1807           This kernel feature is useful for number crunching applications
1808           that may need to compute untrusted bytecode during their
1809           execution. By using pipes or other transports made available to
1810           the process as file descriptors supporting the read/write
1811           syscalls, it's possible to isolate those applications in
1812           their own address space using seccomp. Once seccomp is
1813           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1814           and the task is only allowed to execute a few safe syscalls
1815           defined by each seccomp mode.
1816
1817 config CC_STACKPROTECTOR
1818         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1819         depends on EXPERIMENTAL
1820         help
1821           This option turns on the -fstack-protector GCC feature. This
1822           feature puts, at the beginning of functions, a canary value on
1823           the stack just before the return address, and validates
1824           the value just before actually returning.  Stack based buffer
1825           overflows (that need to overwrite this return address) now also
1826           overwrite the canary, which gets detected and the attack is then
1827           neutralized via a kernel panic.
1828           This feature requires gcc version 4.2 or above.
1829
1830 config DEPRECATED_PARAM_STRUCT
1831         bool "Provide old way to pass kernel parameters"
1832         help
1833           This was deprecated in 2001 and announced to live on for 5 years.
1834           Some old boot loaders still use this way.
1835
1836 endmenu
1837
1838 menu "Boot options"
1839
1840 config USE_OF
1841         bool "Flattened Device Tree support"
1842         select OF
1843         select OF_EARLY_FLATTREE
1844         select IRQ_DOMAIN
1845         help
1846           Include support for flattened device tree machine descriptions.
1847
1848 # Compressed boot loader in ROM.  Yes, we really want to ask about
1849 # TEXT and BSS so we preserve their values in the config files.
1850 config ZBOOT_ROM_TEXT
1851         hex "Compressed ROM boot loader base address"
1852         default "0"
1853         help
1854           The physical address at which the ROM-able zImage is to be
1855           placed in the target.  Platforms which normally make use of
1856           ROM-able zImage formats normally set this to a suitable
1857           value in their defconfig file.
1858
1859           If ZBOOT_ROM is not enabled, this has no effect.
1860
1861 config ZBOOT_ROM_BSS
1862         hex "Compressed ROM boot loader BSS address"
1863         default "0"
1864         help
1865           The base address of an area of read/write memory in the target
1866           for the ROM-able zImage which must be available while the
1867           decompressor is running. It must be large enough to hold the
1868           entire decompressed kernel plus an additional 128 KiB.
1869           Platforms which normally make use of ROM-able zImage formats
1870           normally set this to a suitable value in their defconfig file.
1871
1872           If ZBOOT_ROM is not enabled, this has no effect.
1873
1874 config ZBOOT_ROM
1875         bool "Compressed boot loader in ROM/flash"
1876         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1877         help
1878           Say Y here if you intend to execute your compressed kernel image
1879           (zImage) directly from ROM or flash.  If unsure, say N.
1880
1881 choice
1882         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1883         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1884         default ZBOOT_ROM_NONE
1885         help
1886           Include experimental SD/MMC loading code in the ROM-able zImage.
1887           With this enabled it is possible to write the the ROM-able zImage
1888           kernel image to an MMC or SD card and boot the kernel straight
1889           from the reset vector. At reset the processor Mask ROM will load
1890           the first part of the the ROM-able zImage which in turn loads the
1891           rest the kernel image to RAM.
1892
1893 config ZBOOT_ROM_NONE
1894         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1895         help
1896           Do not load image from SD or MMC
1897
1898 config ZBOOT_ROM_MMCIF
1899         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1900         help
1901           Load image from MMCIF hardware block.
1902
1903 config ZBOOT_ROM_SH_MOBILE_SDHI
1904         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1905         help
1906           Load image from SDHI hardware block
1907
1908 endchoice
1909
1910 config ARM_APPENDED_DTB
1911         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1912         depends on OF && !ZBOOT_ROM && EXPERIMENTAL
1913         help
1914           With this option, the boot code will look for a device tree binary
1915           (DTB) appended to zImage
1916           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1917
1918           This is meant as a backward compatibility convenience for those
1919           systems with a bootloader that can't be upgraded to accommodate
1920           the documented boot protocol using a device tree.
1921
1922           Beware that there is very little in terms of protection against
1923           this option being confused by leftover garbage in memory that might
1924           look like a DTB header after a reboot if no actual DTB is appended
1925           to zImage.  Do not leave this option active in a production kernel
1926           if you don't intend to always append a DTB.  Proper passing of the
1927           location into r2 of a bootloader provided DTB is always preferable
1928           to this option.
1929
1930 config ARM_ATAG_DTB_COMPAT
1931         bool "Supplement the appended DTB with traditional ATAG information"
1932         depends on ARM_APPENDED_DTB
1933         help
1934           Some old bootloaders can't be updated to a DTB capable one, yet
1935           they provide ATAGs with memory configuration, the ramdisk address,
1936           the kernel cmdline string, etc.  Such information is dynamically
1937           provided by the bootloader and can't always be stored in a static
1938           DTB.  To allow a device tree enabled kernel to be used with such
1939           bootloaders, this option allows zImage to extract the information
1940           from the ATAG list and store it at run time into the appended DTB.
1941
1942 config CMDLINE
1943         string "Default kernel command string"
1944         default ""
1945         help
1946           On some architectures (EBSA110 and CATS), there is currently no way
1947           for the boot loader to pass arguments to the kernel. For these
1948           architectures, you should supply some command-line options at build
1949           time by entering them here. As a minimum, you should specify the
1950           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1951
1952 choice
1953         prompt "Kernel command line type" if CMDLINE != ""
1954         default CMDLINE_FROM_BOOTLOADER
1955
1956 config CMDLINE_FROM_BOOTLOADER
1957         bool "Use bootloader kernel arguments if available"
1958         help
1959           Uses the command-line options passed by the boot loader. If
1960           the boot loader doesn't provide any, the default kernel command
1961           string provided in CMDLINE will be used.
1962
1963 config CMDLINE_EXTEND
1964         bool "Extend bootloader kernel arguments"
1965         help
1966           The command-line arguments provided by the boot loader will be
1967           appended to the default kernel command string.
1968
1969 config CMDLINE_FORCE
1970         bool "Always use the default kernel command string"
1971         help
1972           Always use the default kernel command string, even if the boot
1973           loader passes other arguments to the kernel.
1974           This is useful if you cannot or don't want to change the
1975           command-line options your boot loader passes to the kernel.
1976 endchoice
1977
1978 config XIP_KERNEL
1979         bool "Kernel Execute-In-Place from ROM"
1980         depends on !ZBOOT_ROM
1981         help
1982           Execute-In-Place allows the kernel to run from non-volatile storage
1983           directly addressable by the CPU, such as NOR flash. This saves RAM
1984           space since the text section of the kernel is not loaded from flash
1985           to RAM.  Read-write sections, such as the data section and stack,
1986           are still copied to RAM.  The XIP kernel is not compressed since
1987           it has to run directly from flash, so it will take more space to
1988           store it.  The flash address used to link the kernel object files,
1989           and for storing it, is configuration dependent. Therefore, if you
1990           say Y here, you must know the proper physical address where to
1991           store the kernel image depending on your own flash memory usage.
1992
1993           Also note that the make target becomes "make xipImage" rather than
1994           "make zImage" or "make Image".  The final kernel binary to put in
1995           ROM memory will be arch/arm/boot/xipImage.
1996
1997           If unsure, say N.
1998
1999 config XIP_PHYS_ADDR
2000         hex "XIP Kernel Physical Location"
2001         depends on XIP_KERNEL
2002         default "0x00080000"
2003         help
2004           This is the physical address in your flash memory the kernel will
2005           be linked for and stored to.  This address is dependent on your
2006           own flash usage.
2007
2008 config KEXEC
2009         bool "Kexec system call (EXPERIMENTAL)"
2010         depends on EXPERIMENTAL
2011         help
2012           kexec is a system call that implements the ability to shutdown your
2013           current kernel, and to start another kernel.  It is like a reboot
2014           but it is independent of the system firmware.   And like a reboot
2015           you can start any kernel with it, not just Linux.
2016
2017           It is an ongoing process to be certain the hardware in a machine
2018           is properly shutdown, so do not be surprised if this code does not
2019           initially work for you.  It may help to enable device hotplugging
2020           support.
2021
2022 config ATAGS_PROC
2023         bool "Export atags in procfs"
2024         depends on KEXEC
2025         default y
2026         help
2027           Should the atags used to boot the kernel be exported in an "atags"
2028           file in procfs. Useful with kexec.
2029
2030 config CRASH_DUMP
2031         bool "Build kdump crash kernel (EXPERIMENTAL)"
2032         depends on EXPERIMENTAL
2033         help
2034           Generate crash dump after being started by kexec. This should
2035           be normally only set in special crash dump kernels which are
2036           loaded in the main kernel with kexec-tools into a specially
2037           reserved region and then later executed after a crash by
2038           kdump/kexec. The crash dump kernel must be compiled to a
2039           memory address not used by the main kernel
2040
2041           For more details see Documentation/kdump/kdump.txt
2042
2043 config AUTO_ZRELADDR
2044         bool "Auto calculation of the decompressed kernel image address"
2045         depends on !ZBOOT_ROM && !ARCH_U300
2046         help
2047           ZRELADDR is the physical address where the decompressed kernel
2048           image will be placed. If AUTO_ZRELADDR is selected, the address
2049           will be determined at run-time by masking the current IP with
2050           0xf8000000. This assumes the zImage being placed in the first 128MB
2051           from start of memory.
2052
2053 endmenu
2054
2055 menu "CPU Power Management"
2056
2057 if ARCH_HAS_CPUFREQ
2058
2059 source "drivers/cpufreq/Kconfig"
2060
2061 config CPU_FREQ_IMX
2062         tristate "CPUfreq driver for i.MX CPUs"
2063         depends on ARCH_MXC && CPU_FREQ
2064         help
2065           This enables the CPUfreq driver for i.MX CPUs.
2066
2067 config CPU_FREQ_SA1100
2068         bool
2069
2070 config CPU_FREQ_SA1110
2071         bool
2072
2073 config CPU_FREQ_INTEGRATOR
2074         tristate "CPUfreq driver for ARM Integrator CPUs"
2075         depends on ARCH_INTEGRATOR && CPU_FREQ
2076         default y
2077         help
2078           This enables the CPUfreq driver for ARM Integrator CPUs.
2079
2080           For details, take a look at <file:Documentation/cpu-freq>.
2081
2082           If in doubt, say Y.
2083
2084 config CPU_FREQ_PXA
2085         bool
2086         depends on CPU_FREQ && ARCH_PXA && PXA25x
2087         default y
2088         select CPU_FREQ_TABLE
2089         select CPU_FREQ_DEFAULT_GOV_USERSPACE
2090
2091 config CPU_FREQ_S3C
2092         bool
2093         help
2094           Internal configuration node for common cpufreq on Samsung SoC
2095
2096 config CPU_FREQ_S3C24XX
2097         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2098         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
2099         select CPU_FREQ_S3C
2100         help
2101           This enables the CPUfreq driver for the Samsung S3C24XX family
2102           of CPUs.
2103
2104           For details, take a look at <file:Documentation/cpu-freq>.
2105
2106           If in doubt, say N.
2107
2108 config CPU_FREQ_S3C24XX_PLL
2109         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2110         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
2111         help
2112           Compile in support for changing the PLL frequency from the
2113           S3C24XX series CPUfreq driver. The PLL takes time to settle
2114           after a frequency change, so by default it is not enabled.
2115
2116           This also means that the PLL tables for the selected CPU(s) will
2117           be built which may increase the size of the kernel image.
2118
2119 config CPU_FREQ_S3C24XX_DEBUG
2120         bool "Debug CPUfreq Samsung driver core"
2121         depends on CPU_FREQ_S3C24XX
2122         help
2123           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2124
2125 config CPU_FREQ_S3C24XX_IODEBUG
2126         bool "Debug CPUfreq Samsung driver IO timing"
2127         depends on CPU_FREQ_S3C24XX
2128         help
2129           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2130
2131 config CPU_FREQ_S3C24XX_DEBUGFS
2132         bool "Export debugfs for CPUFreq"
2133         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2134         help
2135           Export status information via debugfs.
2136
2137 endif
2138
2139 source "drivers/cpuidle/Kconfig"
2140
2141 endmenu
2142
2143 menu "Floating point emulation"
2144
2145 comment "At least one emulation must be selected"
2146
2147 config FPE_NWFPE
2148         bool "NWFPE math emulation"
2149         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2150         ---help---
2151           Say Y to include the NWFPE floating point emulator in the kernel.
2152           This is necessary to run most binaries. Linux does not currently
2153           support floating point hardware so you need to say Y here even if
2154           your machine has an FPA or floating point co-processor podule.
2155
2156           You may say N here if you are going to load the Acorn FPEmulator
2157           early in the bootup.
2158
2159 config FPE_NWFPE_XP
2160         bool "Support extended precision"
2161         depends on FPE_NWFPE
2162         help
2163           Say Y to include 80-bit support in the kernel floating-point
2164           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2165           Note that gcc does not generate 80-bit operations by default,
2166           so in most cases this option only enlarges the size of the
2167           floating point emulator without any good reason.
2168
2169           You almost surely want to say N here.
2170
2171 config FPE_FASTFPE
2172         bool "FastFPE math emulation (EXPERIMENTAL)"
2173         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2174         ---help---
2175           Say Y here to include the FAST floating point emulator in the kernel.
2176           This is an experimental much faster emulator which now also has full
2177           precision for the mantissa.  It does not support any exceptions.
2178           It is very simple, and approximately 3-6 times faster than NWFPE.
2179
2180           It should be sufficient for most programs.  It may be not suitable
2181           for scientific calculations, but you have to check this for yourself.
2182           If you do not feel you need a faster FP emulation you should better
2183           choose NWFPE.
2184
2185 config VFP
2186         bool "VFP-format floating point maths"
2187         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2188         help
2189           Say Y to include VFP support code in the kernel. This is needed
2190           if your hardware includes a VFP unit.
2191
2192           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2193           release notes and additional status information.
2194
2195           Say N if your target does not have VFP hardware.
2196
2197 config VFPv3
2198         bool
2199         depends on VFP
2200         default y if CPU_V7
2201
2202 config NEON
2203         bool "Advanced SIMD (NEON) Extension support"
2204         depends on VFPv3 && CPU_V7
2205         help
2206           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2207           Extension.
2208
2209 endmenu
2210
2211 menu "Userspace binary formats"
2212
2213 source "fs/Kconfig.binfmt"
2214
2215 config ARTHUR
2216         tristate "RISC OS personality"
2217         depends on !AEABI
2218         help
2219           Say Y here to include the kernel code necessary if you want to run
2220           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2221           experimental; if this sounds frightening, say N and sleep in peace.
2222           You can also say M here to compile this support as a module (which
2223           will be called arthur).
2224
2225 endmenu
2226
2227 menu "Power management options"
2228
2229 source "kernel/power/Kconfig"
2230
2231 config ARCH_SUSPEND_POSSIBLE
2232         depends on !ARCH_S5PC100
2233         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2234                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2235         def_bool y
2236
2237 config ARM_CPU_SUSPEND
2238         def_bool PM_SLEEP
2239
2240 endmenu
2241
2242 source "net/Kconfig"
2243
2244 source "drivers/Kconfig"
2245
2246 source "fs/Kconfig"
2247
2248 source "arch/arm/Kconfig.debug"
2249
2250 source "security/Kconfig"
2251
2252 source "crypto/Kconfig"
2253
2254 source "lib/Kconfig"