Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394...
[deliverable/linux.git] / arch / arm / Kconfig
1 config ARM
2 bool
3 default y
4 select HAVE_AOUT
5 select HAVE_DMA_API_DEBUG
6 select HAVE_IDE
7 select HAVE_MEMBLOCK
8 select RTC_LIB
9 select SYS_SUPPORTS_APM_EMULATION
10 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
12 select HAVE_ARCH_KGDB
13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
14 select HAVE_KRETPROBES if (HAVE_KPROBES)
15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
19 select HAVE_GENERIC_DMA_COHERENT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
22 select HAVE_KERNEL_LZMA
23 select HAVE_IRQ_WORK
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
26 select HAVE_REGS_AND_STACK_ACCESS_API
27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
28 select HAVE_C_RECORDMCOUNT
29 help
30 The ARM series is a line of low-power-consumption RISC chip designs
31 licensed by ARM Ltd and targeted at embedded applications and
32 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
33 manufactured, but legacy ARM-based PC hardware remains popular in
34 Europe. There is an ARM Linux project with a web page at
35 <http://www.arm.linux.org.uk/>.
36
37 config HAVE_PWM
38 bool
39
40 config MIGHT_HAVE_PCI
41 bool
42
43 config SYS_SUPPORTS_APM_EMULATION
44 bool
45
46 config HAVE_SCHED_CLOCK
47 bool
48
49 config GENERIC_GPIO
50 bool
51
52 config ARCH_USES_GETTIMEOFFSET
53 bool
54 default n
55
56 config GENERIC_CLOCKEVENTS
57 bool
58
59 config GENERIC_CLOCKEVENTS_BROADCAST
60 bool
61 depends on GENERIC_CLOCKEVENTS
62 default y if SMP
63
64 config HAVE_TCM
65 bool
66 select GENERIC_ALLOCATOR
67
68 config HAVE_PROC_CPU
69 bool
70
71 config NO_IOPORT
72 bool
73
74 config EISA
75 bool
76 ---help---
77 The Extended Industry Standard Architecture (EISA) bus was
78 developed as an open alternative to the IBM MicroChannel bus.
79
80 The EISA bus provided some of the features of the IBM MicroChannel
81 bus while maintaining backward compatibility with cards made for
82 the older ISA bus. The EISA bus saw limited use between 1988 and
83 1995 when it was made obsolete by the PCI bus.
84
85 Say Y here if you are building a kernel for an EISA-based machine.
86
87 Otherwise, say N.
88
89 config SBUS
90 bool
91
92 config MCA
93 bool
94 help
95 MicroChannel Architecture is found in some IBM PS/2 machines and
96 laptops. It is a bus system similar to PCI or ISA. See
97 <file:Documentation/mca.txt> (and especially the web page given
98 there) before attempting to build an MCA bus kernel.
99
100 config GENERIC_HARDIRQS
101 bool
102 default y
103
104 config STACKTRACE_SUPPORT
105 bool
106 default y
107
108 config HAVE_LATENCYTOP_SUPPORT
109 bool
110 depends on !SMP
111 default y
112
113 config LOCKDEP_SUPPORT
114 bool
115 default y
116
117 config TRACE_IRQFLAGS_SUPPORT
118 bool
119 default y
120
121 config HARDIRQS_SW_RESEND
122 bool
123 default y
124
125 config GENERIC_IRQ_PROBE
126 bool
127 default y
128
129 config GENERIC_LOCKBREAK
130 bool
131 default y
132 depends on SMP && PREEMPT
133
134 config RWSEM_GENERIC_SPINLOCK
135 bool
136 default y
137
138 config RWSEM_XCHGADD_ALGORITHM
139 bool
140
141 config ARCH_HAS_ILOG2_U32
142 bool
143
144 config ARCH_HAS_ILOG2_U64
145 bool
146
147 config ARCH_HAS_CPUFREQ
148 bool
149 help
150 Internal node to signify that the ARCH has CPUFREQ support
151 and that the relevant menu configurations are displayed for
152 it.
153
154 config ARCH_HAS_CPU_IDLE_WAIT
155 def_bool y
156
157 config GENERIC_HWEIGHT
158 bool
159 default y
160
161 config GENERIC_CALIBRATE_DELAY
162 bool
163 default y
164
165 config ARCH_MAY_HAVE_PC_FDC
166 bool
167
168 config ZONE_DMA
169 bool
170
171 config NEED_DMA_MAP_STATE
172 def_bool y
173
174 config GENERIC_ISA_DMA
175 bool
176
177 config FIQ
178 bool
179
180 config ARCH_MTD_XIP
181 bool
182
183 config GENERIC_HARDIRQS_NO__DO_IRQ
184 def_bool y
185
186 config ARM_L1_CACHE_SHIFT_6
187 bool
188 help
189 Setting ARM L1 cache line size to 64 Bytes.
190
191 config VECTORS_BASE
192 hex
193 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
194 default DRAM_BASE if REMAP_VECTORS_TO_RAM
195 default 0x00000000
196 help
197 The base address of exception vectors.
198
199 source "init/Kconfig"
200
201 source "kernel/Kconfig.freezer"
202
203 menu "System Type"
204
205 config MMU
206 bool "MMU-based Paged Memory Management Support"
207 default y
208 help
209 Select if you want MMU-based virtualised addressing space
210 support by paged memory management. If unsure, say 'Y'.
211
212 #
213 # The "ARM system type" choice list is ordered alphabetically by option
214 # text. Please add new entries in the option alphabetic order.
215 #
216 choice
217 prompt "ARM system type"
218 default ARCH_VERSATILE
219
220 config ARCH_AAEC2000
221 bool "Agilent AAEC-2000 based"
222 select CPU_ARM920T
223 select ARM_AMBA
224 select HAVE_CLK
225 select ARCH_USES_GETTIMEOFFSET
226 help
227 This enables support for systems based on the Agilent AAEC-2000
228
229 config ARCH_INTEGRATOR
230 bool "ARM Ltd. Integrator family"
231 select ARM_AMBA
232 select ARCH_HAS_CPUFREQ
233 select CLKDEV_LOOKUP
234 select ICST
235 select GENERIC_CLOCKEVENTS
236 select PLAT_VERSATILE
237 help
238 Support for ARM's Integrator platform.
239
240 config ARCH_REALVIEW
241 bool "ARM Ltd. RealView family"
242 select ARM_AMBA
243 select CLKDEV_LOOKUP
244 select HAVE_SCHED_CLOCK
245 select ICST
246 select GENERIC_CLOCKEVENTS
247 select ARCH_WANT_OPTIONAL_GPIOLIB
248 select PLAT_VERSATILE
249 select ARM_TIMER_SP804
250 select GPIO_PL061 if GPIOLIB
251 help
252 This enables support for ARM Ltd RealView boards.
253
254 config ARCH_VERSATILE
255 bool "ARM Ltd. Versatile family"
256 select ARM_AMBA
257 select ARM_VIC
258 select CLKDEV_LOOKUP
259 select HAVE_SCHED_CLOCK
260 select ICST
261 select GENERIC_CLOCKEVENTS
262 select ARCH_WANT_OPTIONAL_GPIOLIB
263 select PLAT_VERSATILE
264 select ARM_TIMER_SP804
265 help
266 This enables support for ARM Ltd Versatile board.
267
268 config ARCH_VEXPRESS
269 bool "ARM Ltd. Versatile Express family"
270 select ARCH_WANT_OPTIONAL_GPIOLIB
271 select ARM_AMBA
272 select ARM_TIMER_SP804
273 select CLKDEV_LOOKUP
274 select GENERIC_CLOCKEVENTS
275 select HAVE_CLK
276 select HAVE_SCHED_CLOCK
277 select ICST
278 select PLAT_VERSATILE
279 help
280 This enables support for the ARM Ltd Versatile Express boards.
281
282 config ARCH_AT91
283 bool "Atmel AT91"
284 select ARCH_REQUIRE_GPIOLIB
285 select HAVE_CLK
286 help
287 This enables support for systems based on the Atmel AT91RM9200,
288 AT91SAM9 and AT91CAP9 processors.
289
290 config ARCH_BCMRING
291 bool "Broadcom BCMRING"
292 depends on MMU
293 select CPU_V6
294 select ARM_AMBA
295 select CLKDEV_LOOKUP
296 select GENERIC_CLOCKEVENTS
297 select ARCH_WANT_OPTIONAL_GPIOLIB
298 help
299 Support for Broadcom's BCMRing platform.
300
301 config ARCH_CLPS711X
302 bool "Cirrus Logic CLPS711x/EP721x-based"
303 select CPU_ARM720T
304 select ARCH_USES_GETTIMEOFFSET
305 help
306 Support for Cirrus Logic 711x/721x based boards.
307
308 config ARCH_CNS3XXX
309 bool "Cavium Networks CNS3XXX family"
310 select CPU_V6
311 select GENERIC_CLOCKEVENTS
312 select ARM_GIC
313 select MIGHT_HAVE_PCI
314 select PCI_DOMAINS if PCI
315 help
316 Support for Cavium Networks CNS3XXX platform.
317
318 config ARCH_GEMINI
319 bool "Cortina Systems Gemini"
320 select CPU_FA526
321 select ARCH_REQUIRE_GPIOLIB
322 select ARCH_USES_GETTIMEOFFSET
323 help
324 Support for the Cortina Systems Gemini family SoCs
325
326 config ARCH_EBSA110
327 bool "EBSA-110"
328 select CPU_SA110
329 select ISA
330 select NO_IOPORT
331 select ARCH_USES_GETTIMEOFFSET
332 help
333 This is an evaluation board for the StrongARM processor available
334 from Digital. It has limited hardware on-board, including an
335 Ethernet interface, two PCMCIA sockets, two serial ports and a
336 parallel port.
337
338 config ARCH_EP93XX
339 bool "EP93xx-based"
340 select CPU_ARM920T
341 select ARM_AMBA
342 select ARM_VIC
343 select CLKDEV_LOOKUP
344 select ARCH_REQUIRE_GPIOLIB
345 select ARCH_HAS_HOLES_MEMORYMODEL
346 select ARCH_USES_GETTIMEOFFSET
347 help
348 This enables support for the Cirrus EP93xx series of CPUs.
349
350 config ARCH_FOOTBRIDGE
351 bool "FootBridge"
352 select CPU_SA110
353 select FOOTBRIDGE
354 select ARCH_USES_GETTIMEOFFSET
355 help
356 Support for systems based on the DC21285 companion chip
357 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
358
359 config ARCH_MXC
360 bool "Freescale MXC/iMX-based"
361 select GENERIC_CLOCKEVENTS
362 select ARCH_REQUIRE_GPIOLIB
363 select CLKDEV_LOOKUP
364 help
365 Support for Freescale MXC/iMX-based family of processors
366
367 config ARCH_MXS
368 bool "Freescale MXS-based"
369 select GENERIC_CLOCKEVENTS
370 select ARCH_REQUIRE_GPIOLIB
371 select COMMON_CLKDEV
372 help
373 Support for Freescale MXS-based family of processors
374
375 config ARCH_STMP3XXX
376 bool "Freescale STMP3xxx"
377 select CPU_ARM926T
378 select CLKDEV_LOOKUP
379 select ARCH_REQUIRE_GPIOLIB
380 select GENERIC_CLOCKEVENTS
381 select USB_ARCH_HAS_EHCI
382 help
383 Support for systems based on the Freescale 3xxx CPUs.
384
385 config ARCH_NETX
386 bool "Hilscher NetX based"
387 select CPU_ARM926T
388 select ARM_VIC
389 select GENERIC_CLOCKEVENTS
390 help
391 This enables support for systems based on the Hilscher NetX Soc
392
393 config ARCH_H720X
394 bool "Hynix HMS720x-based"
395 select CPU_ARM720T
396 select ISA_DMA_API
397 select ARCH_USES_GETTIMEOFFSET
398 help
399 This enables support for systems based on the Hynix HMS720x
400
401 config ARCH_IOP13XX
402 bool "IOP13xx-based"
403 depends on MMU
404 select CPU_XSC3
405 select PLAT_IOP
406 select PCI
407 select ARCH_SUPPORTS_MSI
408 select VMSPLIT_1G
409 help
410 Support for Intel's IOP13XX (XScale) family of processors.
411
412 config ARCH_IOP32X
413 bool "IOP32x-based"
414 depends on MMU
415 select CPU_XSCALE
416 select PLAT_IOP
417 select PCI
418 select ARCH_REQUIRE_GPIOLIB
419 help
420 Support for Intel's 80219 and IOP32X (XScale) family of
421 processors.
422
423 config ARCH_IOP33X
424 bool "IOP33x-based"
425 depends on MMU
426 select CPU_XSCALE
427 select PLAT_IOP
428 select PCI
429 select ARCH_REQUIRE_GPIOLIB
430 help
431 Support for Intel's IOP33X (XScale) family of processors.
432
433 config ARCH_IXP23XX
434 bool "IXP23XX-based"
435 depends on MMU
436 select CPU_XSC3
437 select PCI
438 select ARCH_USES_GETTIMEOFFSET
439 help
440 Support for Intel's IXP23xx (XScale) family of processors.
441
442 config ARCH_IXP2000
443 bool "IXP2400/2800-based"
444 depends on MMU
445 select CPU_XSCALE
446 select PCI
447 select ARCH_USES_GETTIMEOFFSET
448 help
449 Support for Intel's IXP2400/2800 (XScale) family of processors.
450
451 config ARCH_IXP4XX
452 bool "IXP4xx-based"
453 depends on MMU
454 select CPU_XSCALE
455 select GENERIC_GPIO
456 select GENERIC_CLOCKEVENTS
457 select HAVE_SCHED_CLOCK
458 select MIGHT_HAVE_PCI
459 select DMABOUNCE if PCI
460 help
461 Support for Intel's IXP4XX (XScale) family of processors.
462
463 config ARCH_DOVE
464 bool "Marvell Dove"
465 select PCI
466 select ARCH_REQUIRE_GPIOLIB
467 select GENERIC_CLOCKEVENTS
468 select PLAT_ORION
469 help
470 Support for the Marvell Dove SoC 88AP510
471
472 config ARCH_KIRKWOOD
473 bool "Marvell Kirkwood"
474 select CPU_FEROCEON
475 select PCI
476 select ARCH_REQUIRE_GPIOLIB
477 select GENERIC_CLOCKEVENTS
478 select PLAT_ORION
479 help
480 Support for the following Marvell Kirkwood series SoCs:
481 88F6180, 88F6192 and 88F6281.
482
483 config ARCH_LOKI
484 bool "Marvell Loki (88RC8480)"
485 select CPU_FEROCEON
486 select GENERIC_CLOCKEVENTS
487 select PLAT_ORION
488 help
489 Support for the Marvell Loki (88RC8480) SoC.
490
491 config ARCH_LPC32XX
492 bool "NXP LPC32XX"
493 select CPU_ARM926T
494 select ARCH_REQUIRE_GPIOLIB
495 select HAVE_IDE
496 select ARM_AMBA
497 select USB_ARCH_HAS_OHCI
498 select CLKDEV_LOOKUP
499 select GENERIC_TIME
500 select GENERIC_CLOCKEVENTS
501 help
502 Support for the NXP LPC32XX family of processors
503
504 config ARCH_MV78XX0
505 bool "Marvell MV78xx0"
506 select CPU_FEROCEON
507 select PCI
508 select ARCH_REQUIRE_GPIOLIB
509 select GENERIC_CLOCKEVENTS
510 select PLAT_ORION
511 help
512 Support for the following Marvell MV78xx0 series SoCs:
513 MV781x0, MV782x0.
514
515 config ARCH_ORION5X
516 bool "Marvell Orion"
517 depends on MMU
518 select CPU_FEROCEON
519 select PCI
520 select ARCH_REQUIRE_GPIOLIB
521 select GENERIC_CLOCKEVENTS
522 select PLAT_ORION
523 help
524 Support for the following Marvell Orion 5x series SoCs:
525 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
526 Orion-2 (5281), Orion-1-90 (6183).
527
528 config ARCH_MMP
529 bool "Marvell PXA168/910/MMP2"
530 depends on MMU
531 select ARCH_REQUIRE_GPIOLIB
532 select CLKDEV_LOOKUP
533 select GENERIC_CLOCKEVENTS
534 select HAVE_SCHED_CLOCK
535 select TICK_ONESHOT
536 select PLAT_PXA
537 select SPARSE_IRQ
538 help
539 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
540
541 config ARCH_KS8695
542 bool "Micrel/Kendin KS8695"
543 select CPU_ARM922T
544 select ARCH_REQUIRE_GPIOLIB
545 select ARCH_USES_GETTIMEOFFSET
546 help
547 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
548 System-on-Chip devices.
549
550 config ARCH_NS9XXX
551 bool "NetSilicon NS9xxx"
552 select CPU_ARM926T
553 select GENERIC_GPIO
554 select GENERIC_CLOCKEVENTS
555 select HAVE_CLK
556 help
557 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
558 System.
559
560 <http://www.digi.com/products/microprocessors/index.jsp>
561
562 config ARCH_W90X900
563 bool "Nuvoton W90X900 CPU"
564 select CPU_ARM926T
565 select ARCH_REQUIRE_GPIOLIB
566 select CLKDEV_LOOKUP
567 select GENERIC_CLOCKEVENTS
568 help
569 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
570 At present, the w90x900 has been renamed nuc900, regarding
571 the ARM series product line, you can login the following
572 link address to know more.
573
574 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
575 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
576
577 config ARCH_NUC93X
578 bool "Nuvoton NUC93X CPU"
579 select CPU_ARM926T
580 select CLKDEV_LOOKUP
581 help
582 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
583 low-power and high performance MPEG-4/JPEG multimedia controller chip.
584
585 config ARCH_TEGRA
586 bool "NVIDIA Tegra"
587 select CLKDEV_LOOKUP
588 select GENERIC_TIME
589 select GENERIC_CLOCKEVENTS
590 select GENERIC_GPIO
591 select HAVE_CLK
592 select HAVE_SCHED_CLOCK
593 select ARCH_HAS_BARRIERS if CACHE_L2X0
594 select ARCH_HAS_CPUFREQ
595 help
596 This enables support for NVIDIA Tegra based systems (Tegra APX,
597 Tegra 6xx and Tegra 2 series).
598
599 config ARCH_PNX4008
600 bool "Philips Nexperia PNX4008 Mobile"
601 select CPU_ARM926T
602 select CLKDEV_LOOKUP
603 select ARCH_USES_GETTIMEOFFSET
604 help
605 This enables support for Philips PNX4008 mobile platform.
606
607 config ARCH_PXA
608 bool "PXA2xx/PXA3xx-based"
609 depends on MMU
610 select ARCH_MTD_XIP
611 select ARCH_HAS_CPUFREQ
612 select CLKDEV_LOOKUP
613 select ARCH_REQUIRE_GPIOLIB
614 select GENERIC_CLOCKEVENTS
615 select HAVE_SCHED_CLOCK
616 select TICK_ONESHOT
617 select PLAT_PXA
618 select SPARSE_IRQ
619 help
620 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
621
622 config ARCH_MSM
623 bool "Qualcomm MSM"
624 select HAVE_CLK
625 select GENERIC_CLOCKEVENTS
626 select ARCH_REQUIRE_GPIOLIB
627 help
628 Support for Qualcomm MSM/QSD based systems. This runs on the
629 apps processor of the MSM/QSD and depends on a shared memory
630 interface to the modem processor which runs the baseband
631 stack and controls some vital subsystems
632 (clock and power control, etc).
633
634 config ARCH_SHMOBILE
635 bool "Renesas SH-Mobile / R-Mobile"
636 select HAVE_CLK
637 select CLKDEV_LOOKUP
638 select GENERIC_CLOCKEVENTS
639 select NO_IOPORT
640 select SPARSE_IRQ
641 select MULTI_IRQ_HANDLER
642 help
643 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
644
645 config ARCH_RPC
646 bool "RiscPC"
647 select ARCH_ACORN
648 select FIQ
649 select TIMER_ACORN
650 select ARCH_MAY_HAVE_PC_FDC
651 select HAVE_PATA_PLATFORM
652 select ISA_DMA_API
653 select NO_IOPORT
654 select ARCH_SPARSEMEM_ENABLE
655 select ARCH_USES_GETTIMEOFFSET
656 help
657 On the Acorn Risc-PC, Linux can support the internal IDE disk and
658 CD-ROM interface, serial and parallel port, and the floppy drive.
659
660 config ARCH_SA1100
661 bool "SA1100-based"
662 select CPU_SA1100
663 select ISA
664 select ARCH_SPARSEMEM_ENABLE
665 select ARCH_MTD_XIP
666 select ARCH_HAS_CPUFREQ
667 select CPU_FREQ
668 select GENERIC_CLOCKEVENTS
669 select HAVE_CLK
670 select HAVE_SCHED_CLOCK
671 select TICK_ONESHOT
672 select ARCH_REQUIRE_GPIOLIB
673 help
674 Support for StrongARM 11x0 based boards.
675
676 config ARCH_S3C2410
677 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
678 select GENERIC_GPIO
679 select ARCH_HAS_CPUFREQ
680 select HAVE_CLK
681 select ARCH_USES_GETTIMEOFFSET
682 select HAVE_S3C2410_I2C if I2C
683 help
684 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
685 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
686 the Samsung SMDK2410 development board (and derivatives).
687
688 Note, the S3C2416 and the S3C2450 are so close that they even share
689 the same SoC ID code. This means that there is no seperate machine
690 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
691
692 config ARCH_S3C64XX
693 bool "Samsung S3C64XX"
694 select PLAT_SAMSUNG
695 select CPU_V6
696 select ARM_VIC
697 select HAVE_CLK
698 select NO_IOPORT
699 select ARCH_USES_GETTIMEOFFSET
700 select ARCH_HAS_CPUFREQ
701 select ARCH_REQUIRE_GPIOLIB
702 select SAMSUNG_CLKSRC
703 select SAMSUNG_IRQ_VIC_TIMER
704 select SAMSUNG_IRQ_UART
705 select S3C_GPIO_TRACK
706 select S3C_GPIO_PULL_UPDOWN
707 select S3C_GPIO_CFG_S3C24XX
708 select S3C_GPIO_CFG_S3C64XX
709 select S3C_DEV_NAND
710 select USB_ARCH_HAS_OHCI
711 select SAMSUNG_GPIOLIB_4BIT
712 select HAVE_S3C2410_I2C if I2C
713 select HAVE_S3C2410_WATCHDOG if WATCHDOG
714 help
715 Samsung S3C64XX series based systems
716
717 config ARCH_S5P64X0
718 bool "Samsung S5P6440 S5P6450"
719 select CPU_V6
720 select GENERIC_GPIO
721 select HAVE_CLK
722 select HAVE_S3C2410_WATCHDOG if WATCHDOG
723 select ARCH_USES_GETTIMEOFFSET
724 select HAVE_S3C2410_I2C if I2C
725 select HAVE_S3C_RTC if RTC_CLASS
726 help
727 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
728 SMDK6450.
729
730 config ARCH_S5P6442
731 bool "Samsung S5P6442"
732 select CPU_V6
733 select GENERIC_GPIO
734 select HAVE_CLK
735 select ARCH_USES_GETTIMEOFFSET
736 select HAVE_S3C2410_WATCHDOG if WATCHDOG
737 help
738 Samsung S5P6442 CPU based systems
739
740 config ARCH_S5PC100
741 bool "Samsung S5PC100"
742 select GENERIC_GPIO
743 select HAVE_CLK
744 select CPU_V7
745 select ARM_L1_CACHE_SHIFT_6
746 select ARCH_USES_GETTIMEOFFSET
747 select HAVE_S3C2410_I2C if I2C
748 select HAVE_S3C_RTC if RTC_CLASS
749 select HAVE_S3C2410_WATCHDOG if WATCHDOG
750 help
751 Samsung S5PC100 series based systems
752
753 config ARCH_S5PV210
754 bool "Samsung S5PV210/S5PC110"
755 select CPU_V7
756 select ARCH_SPARSEMEM_ENABLE
757 select GENERIC_GPIO
758 select HAVE_CLK
759 select ARM_L1_CACHE_SHIFT_6
760 select ARCH_HAS_CPUFREQ
761 select ARCH_USES_GETTIMEOFFSET
762 select HAVE_S3C2410_I2C if I2C
763 select HAVE_S3C_RTC if RTC_CLASS
764 select HAVE_S3C2410_WATCHDOG if WATCHDOG
765 help
766 Samsung S5PV210/S5PC110 series based systems
767
768 config ARCH_S5PV310
769 bool "Samsung S5PV310/S5PC210"
770 select CPU_V7
771 select ARCH_SPARSEMEM_ENABLE
772 select GENERIC_GPIO
773 select HAVE_CLK
774 select GENERIC_CLOCKEVENTS
775 select HAVE_S3C_RTC if RTC_CLASS
776 select HAVE_S3C2410_I2C if I2C
777 select HAVE_S3C2410_WATCHDOG if WATCHDOG
778 help
779 Samsung S5PV310 series based systems
780
781 config ARCH_SHARK
782 bool "Shark"
783 select CPU_SA110
784 select ISA
785 select ISA_DMA
786 select ZONE_DMA
787 select PCI
788 select ARCH_USES_GETTIMEOFFSET
789 help
790 Support for the StrongARM based Digital DNARD machine, also known
791 as "Shark" (<http://www.shark-linux.de/shark.html>).
792
793 config ARCH_TCC_926
794 bool "Telechips TCC ARM926-based systems"
795 select CPU_ARM926T
796 select HAVE_CLK
797 select CLKDEV_LOOKUP
798 select GENERIC_CLOCKEVENTS
799 help
800 Support for Telechips TCC ARM926-based systems.
801
802 config ARCH_LH7A40X
803 bool "Sharp LH7A40X"
804 select CPU_ARM922T
805 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
806 select ARCH_USES_GETTIMEOFFSET
807 help
808 Say Y here for systems based on one of the Sharp LH7A40X
809 System on a Chip processors. These CPUs include an ARM922T
810 core with a wide array of integrated devices for
811 hand-held and low-power applications.
812
813 config ARCH_U300
814 bool "ST-Ericsson U300 Series"
815 depends on MMU
816 select CPU_ARM926T
817 select HAVE_SCHED_CLOCK
818 select HAVE_TCM
819 select ARM_AMBA
820 select ARM_VIC
821 select GENERIC_CLOCKEVENTS
822 select CLKDEV_LOOKUP
823 select GENERIC_GPIO
824 help
825 Support for ST-Ericsson U300 series mobile platforms.
826
827 config ARCH_U8500
828 bool "ST-Ericsson U8500 Series"
829 select CPU_V7
830 select ARM_AMBA
831 select GENERIC_CLOCKEVENTS
832 select CLKDEV_LOOKUP
833 select ARCH_REQUIRE_GPIOLIB
834 select ARCH_HAS_CPUFREQ
835 help
836 Support for ST-Ericsson's Ux500 architecture
837
838 config ARCH_NOMADIK
839 bool "STMicroelectronics Nomadik"
840 select ARM_AMBA
841 select ARM_VIC
842 select CPU_ARM926T
843 select CLKDEV_LOOKUP
844 select GENERIC_CLOCKEVENTS
845 select ARCH_REQUIRE_GPIOLIB
846 help
847 Support for the Nomadik platform by ST-Ericsson
848
849 config ARCH_DAVINCI
850 bool "TI DaVinci"
851 select GENERIC_CLOCKEVENTS
852 select ARCH_REQUIRE_GPIOLIB
853 select ZONE_DMA
854 select HAVE_IDE
855 select CLKDEV_LOOKUP
856 select GENERIC_ALLOCATOR
857 select ARCH_HAS_HOLES_MEMORYMODEL
858 help
859 Support for TI's DaVinci platform.
860
861 config ARCH_OMAP
862 bool "TI OMAP"
863 select HAVE_CLK
864 select ARCH_REQUIRE_GPIOLIB
865 select ARCH_HAS_CPUFREQ
866 select GENERIC_CLOCKEVENTS
867 select HAVE_SCHED_CLOCK
868 select ARCH_HAS_HOLES_MEMORYMODEL
869 help
870 Support for TI's OMAP platform (OMAP1/2/3/4).
871
872 config PLAT_SPEAR
873 bool "ST SPEAr"
874 select ARM_AMBA
875 select ARCH_REQUIRE_GPIOLIB
876 select CLKDEV_LOOKUP
877 select GENERIC_CLOCKEVENTS
878 select HAVE_CLK
879 help
880 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
881
882 endchoice
883
884 #
885 # This is sorted alphabetically by mach-* pathname. However, plat-*
886 # Kconfigs may be included either alphabetically (according to the
887 # plat- suffix) or along side the corresponding mach-* source.
888 #
889 source "arch/arm/mach-aaec2000/Kconfig"
890
891 source "arch/arm/mach-at91/Kconfig"
892
893 source "arch/arm/mach-bcmring/Kconfig"
894
895 source "arch/arm/mach-clps711x/Kconfig"
896
897 source "arch/arm/mach-cns3xxx/Kconfig"
898
899 source "arch/arm/mach-davinci/Kconfig"
900
901 source "arch/arm/mach-dove/Kconfig"
902
903 source "arch/arm/mach-ep93xx/Kconfig"
904
905 source "arch/arm/mach-footbridge/Kconfig"
906
907 source "arch/arm/mach-gemini/Kconfig"
908
909 source "arch/arm/mach-h720x/Kconfig"
910
911 source "arch/arm/mach-integrator/Kconfig"
912
913 source "arch/arm/mach-iop32x/Kconfig"
914
915 source "arch/arm/mach-iop33x/Kconfig"
916
917 source "arch/arm/mach-iop13xx/Kconfig"
918
919 source "arch/arm/mach-ixp4xx/Kconfig"
920
921 source "arch/arm/mach-ixp2000/Kconfig"
922
923 source "arch/arm/mach-ixp23xx/Kconfig"
924
925 source "arch/arm/mach-kirkwood/Kconfig"
926
927 source "arch/arm/mach-ks8695/Kconfig"
928
929 source "arch/arm/mach-lh7a40x/Kconfig"
930
931 source "arch/arm/mach-loki/Kconfig"
932
933 source "arch/arm/mach-lpc32xx/Kconfig"
934
935 source "arch/arm/mach-msm/Kconfig"
936
937 source "arch/arm/mach-mv78xx0/Kconfig"
938
939 source "arch/arm/plat-mxc/Kconfig"
940
941 source "arch/arm/mach-mxs/Kconfig"
942
943 source "arch/arm/mach-netx/Kconfig"
944
945 source "arch/arm/mach-nomadik/Kconfig"
946 source "arch/arm/plat-nomadik/Kconfig"
947
948 source "arch/arm/mach-ns9xxx/Kconfig"
949
950 source "arch/arm/mach-nuc93x/Kconfig"
951
952 source "arch/arm/plat-omap/Kconfig"
953
954 source "arch/arm/mach-omap1/Kconfig"
955
956 source "arch/arm/mach-omap2/Kconfig"
957
958 source "arch/arm/mach-orion5x/Kconfig"
959
960 source "arch/arm/mach-pxa/Kconfig"
961 source "arch/arm/plat-pxa/Kconfig"
962
963 source "arch/arm/mach-mmp/Kconfig"
964
965 source "arch/arm/mach-realview/Kconfig"
966
967 source "arch/arm/mach-sa1100/Kconfig"
968
969 source "arch/arm/plat-samsung/Kconfig"
970 source "arch/arm/plat-s3c24xx/Kconfig"
971 source "arch/arm/plat-s5p/Kconfig"
972
973 source "arch/arm/plat-spear/Kconfig"
974
975 source "arch/arm/plat-tcc/Kconfig"
976
977 if ARCH_S3C2410
978 source "arch/arm/mach-s3c2400/Kconfig"
979 source "arch/arm/mach-s3c2410/Kconfig"
980 source "arch/arm/mach-s3c2412/Kconfig"
981 source "arch/arm/mach-s3c2416/Kconfig"
982 source "arch/arm/mach-s3c2440/Kconfig"
983 source "arch/arm/mach-s3c2443/Kconfig"
984 endif
985
986 if ARCH_S3C64XX
987 source "arch/arm/mach-s3c64xx/Kconfig"
988 endif
989
990 source "arch/arm/mach-s5p64x0/Kconfig"
991
992 source "arch/arm/mach-s5p6442/Kconfig"
993
994 source "arch/arm/mach-s5pc100/Kconfig"
995
996 source "arch/arm/mach-s5pv210/Kconfig"
997
998 source "arch/arm/mach-s5pv310/Kconfig"
999
1000 source "arch/arm/mach-shmobile/Kconfig"
1001
1002 source "arch/arm/plat-stmp3xxx/Kconfig"
1003
1004 source "arch/arm/mach-tegra/Kconfig"
1005
1006 source "arch/arm/mach-u300/Kconfig"
1007
1008 source "arch/arm/mach-ux500/Kconfig"
1009
1010 source "arch/arm/mach-versatile/Kconfig"
1011
1012 source "arch/arm/mach-vexpress/Kconfig"
1013
1014 source "arch/arm/mach-w90x900/Kconfig"
1015
1016 # Definitions to make life easier
1017 config ARCH_ACORN
1018 bool
1019
1020 config PLAT_IOP
1021 bool
1022 select GENERIC_CLOCKEVENTS
1023 select HAVE_SCHED_CLOCK
1024
1025 config PLAT_ORION
1026 bool
1027 select HAVE_SCHED_CLOCK
1028
1029 config PLAT_PXA
1030 bool
1031
1032 config PLAT_VERSATILE
1033 bool
1034
1035 config ARM_TIMER_SP804
1036 bool
1037
1038 source arch/arm/mm/Kconfig
1039
1040 config IWMMXT
1041 bool "Enable iWMMXt support"
1042 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1043 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1044 help
1045 Enable support for iWMMXt context switching at run time if
1046 running on a CPU that supports it.
1047
1048 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1049 config XSCALE_PMU
1050 bool
1051 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1052 default y
1053
1054 config CPU_HAS_PMU
1055 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1056 (!ARCH_OMAP3 || OMAP3_EMU)
1057 default y
1058 bool
1059
1060 config MULTI_IRQ_HANDLER
1061 bool
1062 help
1063 Allow each machine to specify it's own IRQ handler at run time.
1064
1065 if !MMU
1066 source "arch/arm/Kconfig-nommu"
1067 endif
1068
1069 config ARM_ERRATA_411920
1070 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1071 depends on CPU_V6
1072 help
1073 Invalidation of the Instruction Cache operation can
1074 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1075 It does not affect the MPCore. This option enables the ARM Ltd.
1076 recommended workaround.
1077
1078 config ARM_ERRATA_430973
1079 bool "ARM errata: Stale prediction on replaced interworking branch"
1080 depends on CPU_V7
1081 help
1082 This option enables the workaround for the 430973 Cortex-A8
1083 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1084 interworking branch is replaced with another code sequence at the
1085 same virtual address, whether due to self-modifying code or virtual
1086 to physical address re-mapping, Cortex-A8 does not recover from the
1087 stale interworking branch prediction. This results in Cortex-A8
1088 executing the new code sequence in the incorrect ARM or Thumb state.
1089 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1090 and also flushes the branch target cache at every context switch.
1091 Note that setting specific bits in the ACTLR register may not be
1092 available in non-secure mode.
1093
1094 config ARM_ERRATA_458693
1095 bool "ARM errata: Processor deadlock when a false hazard is created"
1096 depends on CPU_V7
1097 help
1098 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1099 erratum. For very specific sequences of memory operations, it is
1100 possible for a hazard condition intended for a cache line to instead
1101 be incorrectly associated with a different cache line. This false
1102 hazard might then cause a processor deadlock. The workaround enables
1103 the L1 caching of the NEON accesses and disables the PLD instruction
1104 in the ACTLR register. Note that setting specific bits in the ACTLR
1105 register may not be available in non-secure mode.
1106
1107 config ARM_ERRATA_460075
1108 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1109 depends on CPU_V7
1110 help
1111 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1112 erratum. Any asynchronous access to the L2 cache may encounter a
1113 situation in which recent store transactions to the L2 cache are lost
1114 and overwritten with stale memory contents from external memory. The
1115 workaround disables the write-allocate mode for the L2 cache via the
1116 ACTLR register. Note that setting specific bits in the ACTLR register
1117 may not be available in non-secure mode.
1118
1119 config ARM_ERRATA_742230
1120 bool "ARM errata: DMB operation may be faulty"
1121 depends on CPU_V7 && SMP
1122 help
1123 This option enables the workaround for the 742230 Cortex-A9
1124 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1125 between two write operations may not ensure the correct visibility
1126 ordering of the two writes. This workaround sets a specific bit in
1127 the diagnostic register of the Cortex-A9 which causes the DMB
1128 instruction to behave as a DSB, ensuring the correct behaviour of
1129 the two writes.
1130
1131 config ARM_ERRATA_742231
1132 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1133 depends on CPU_V7 && SMP
1134 help
1135 This option enables the workaround for the 742231 Cortex-A9
1136 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1137 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1138 accessing some data located in the same cache line, may get corrupted
1139 data due to bad handling of the address hazard when the line gets
1140 replaced from one of the CPUs at the same time as another CPU is
1141 accessing it. This workaround sets specific bits in the diagnostic
1142 register of the Cortex-A9 which reduces the linefill issuing
1143 capabilities of the processor.
1144
1145 config PL310_ERRATA_588369
1146 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1147 depends on CACHE_L2X0 && ARCH_OMAP4
1148 help
1149 The PL310 L2 cache controller implements three types of Clean &
1150 Invalidate maintenance operations: by Physical Address
1151 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1152 They are architecturally defined to behave as the execution of a
1153 clean operation followed immediately by an invalidate operation,
1154 both performing to the same memory location. This functionality
1155 is not correctly implemented in PL310 as clean lines are not
1156 invalidated as a result of these operations. Note that this errata
1157 uses Texas Instrument's secure monitor api.
1158
1159 config ARM_ERRATA_720789
1160 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1161 depends on CPU_V7 && SMP
1162 help
1163 This option enables the workaround for the 720789 Cortex-A9 (prior to
1164 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1165 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1166 As a consequence of this erratum, some TLB entries which should be
1167 invalidated are not, resulting in an incoherency in the system page
1168 tables. The workaround changes the TLB flushing routines to invalidate
1169 entries regardless of the ASID.
1170
1171 config ARM_ERRATA_743622
1172 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1173 depends on CPU_V7
1174 help
1175 This option enables the workaround for the 743622 Cortex-A9
1176 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1177 optimisation in the Cortex-A9 Store Buffer may lead to data
1178 corruption. This workaround sets a specific bit in the diagnostic
1179 register of the Cortex-A9 which disables the Store Buffer
1180 optimisation, preventing the defect from occurring. This has no
1181 visible impact on the overall performance or power consumption of the
1182 processor.
1183
1184 endmenu
1185
1186 source "arch/arm/common/Kconfig"
1187
1188 menu "Bus support"
1189
1190 config ARM_AMBA
1191 bool
1192
1193 config ISA
1194 bool
1195 help
1196 Find out whether you have ISA slots on your motherboard. ISA is the
1197 name of a bus system, i.e. the way the CPU talks to the other stuff
1198 inside your box. Other bus systems are PCI, EISA, MicroChannel
1199 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1200 newer boards don't support it. If you have ISA, say Y, otherwise N.
1201
1202 # Select ISA DMA controller support
1203 config ISA_DMA
1204 bool
1205 select ISA_DMA_API
1206
1207 # Select ISA DMA interface
1208 config ISA_DMA_API
1209 bool
1210
1211 config PCI
1212 bool "PCI support" if MIGHT_HAVE_PCI
1213 help
1214 Find out whether you have a PCI motherboard. PCI is the name of a
1215 bus system, i.e. the way the CPU talks to the other stuff inside
1216 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1217 VESA. If you have PCI, say Y, otherwise N.
1218
1219 config PCI_DOMAINS
1220 bool
1221 depends on PCI
1222
1223 config PCI_NANOENGINE
1224 bool "BSE nanoEngine PCI support"
1225 depends on SA1100_NANOENGINE
1226 help
1227 Enable PCI on the BSE nanoEngine board.
1228
1229 config PCI_SYSCALL
1230 def_bool PCI
1231
1232 # Select the host bridge type
1233 config PCI_HOST_VIA82C505
1234 bool
1235 depends on PCI && ARCH_SHARK
1236 default y
1237
1238 config PCI_HOST_ITE8152
1239 bool
1240 depends on PCI && MACH_ARMCORE
1241 default y
1242 select DMABOUNCE
1243
1244 source "drivers/pci/Kconfig"
1245
1246 source "drivers/pcmcia/Kconfig"
1247
1248 endmenu
1249
1250 menu "Kernel Features"
1251
1252 source "kernel/time/Kconfig"
1253
1254 config SMP
1255 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1256 depends on EXPERIMENTAL
1257 depends on GENERIC_CLOCKEVENTS
1258 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1259 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1260 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1261 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1262 select USE_GENERIC_SMP_HELPERS
1263 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1264 help
1265 This enables support for systems with more than one CPU. If you have
1266 a system with only one CPU, like most personal computers, say N. If
1267 you have a system with more than one CPU, say Y.
1268
1269 If you say N here, the kernel will run on single and multiprocessor
1270 machines, but will use only one CPU of a multiprocessor machine. If
1271 you say Y here, the kernel will run on many, but not all, single
1272 processor machines. On a single processor machine, the kernel will
1273 run faster if you say N here.
1274
1275 See also <file:Documentation/i386/IO-APIC.txt>,
1276 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1277 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1278
1279 If you don't know what to do here, say N.
1280
1281 config SMP_ON_UP
1282 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1283 depends on EXPERIMENTAL
1284 depends on SMP && !XIP
1285 default y
1286 help
1287 SMP kernels contain instructions which fail on non-SMP processors.
1288 Enabling this option allows the kernel to modify itself to make
1289 these instructions safe. Disabling it allows about 1K of space
1290 savings.
1291
1292 If you don't know what to do here, say Y.
1293
1294 config HAVE_ARM_SCU
1295 bool
1296 depends on SMP
1297 help
1298 This option enables support for the ARM system coherency unit
1299
1300 config HAVE_ARM_TWD
1301 bool
1302 depends on SMP
1303 select TICK_ONESHOT
1304 help
1305 This options enables support for the ARM timer and watchdog unit
1306
1307 choice
1308 prompt "Memory split"
1309 default VMSPLIT_3G
1310 help
1311 Select the desired split between kernel and user memory.
1312
1313 If you are not absolutely sure what you are doing, leave this
1314 option alone!
1315
1316 config VMSPLIT_3G
1317 bool "3G/1G user/kernel split"
1318 config VMSPLIT_2G
1319 bool "2G/2G user/kernel split"
1320 config VMSPLIT_1G
1321 bool "1G/3G user/kernel split"
1322 endchoice
1323
1324 config PAGE_OFFSET
1325 hex
1326 default 0x40000000 if VMSPLIT_1G
1327 default 0x80000000 if VMSPLIT_2G
1328 default 0xC0000000
1329
1330 config NR_CPUS
1331 int "Maximum number of CPUs (2-32)"
1332 range 2 32
1333 depends on SMP
1334 default "4"
1335
1336 config HOTPLUG_CPU
1337 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1338 depends on SMP && HOTPLUG && EXPERIMENTAL
1339 depends on !ARCH_MSM
1340 help
1341 Say Y here to experiment with turning CPUs off and on. CPUs
1342 can be controlled through /sys/devices/system/cpu.
1343
1344 config LOCAL_TIMERS
1345 bool "Use local timer interrupts"
1346 depends on SMP
1347 default y
1348 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
1349 help
1350 Enable support for local timers on SMP platforms, rather then the
1351 legacy IPI broadcast method. Local timers allows the system
1352 accounting to be spread across the timer interval, preventing a
1353 "thundering herd" at every timer tick.
1354
1355 source kernel/Kconfig.preempt
1356
1357 config HZ
1358 int
1359 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1360 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1361 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1362 default AT91_TIMER_HZ if ARCH_AT91
1363 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1364 default 100
1365
1366 config THUMB2_KERNEL
1367 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1368 depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
1369 select AEABI
1370 select ARM_ASM_UNIFIED
1371 help
1372 By enabling this option, the kernel will be compiled in
1373 Thumb-2 mode. A compiler/assembler that understand the unified
1374 ARM-Thumb syntax is needed.
1375
1376 If unsure, say N.
1377
1378 config ARM_ASM_UNIFIED
1379 bool
1380
1381 config AEABI
1382 bool "Use the ARM EABI to compile the kernel"
1383 help
1384 This option allows for the kernel to be compiled using the latest
1385 ARM ABI (aka EABI). This is only useful if you are using a user
1386 space environment that is also compiled with EABI.
1387
1388 Since there are major incompatibilities between the legacy ABI and
1389 EABI, especially with regard to structure member alignment, this
1390 option also changes the kernel syscall calling convention to
1391 disambiguate both ABIs and allow for backward compatibility support
1392 (selected with CONFIG_OABI_COMPAT).
1393
1394 To use this you need GCC version 4.0.0 or later.
1395
1396 config OABI_COMPAT
1397 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1398 depends on AEABI && EXPERIMENTAL
1399 default y
1400 help
1401 This option preserves the old syscall interface along with the
1402 new (ARM EABI) one. It also provides a compatibility layer to
1403 intercept syscalls that have structure arguments which layout
1404 in memory differs between the legacy ABI and the new ARM EABI
1405 (only for non "thumb" binaries). This option adds a tiny
1406 overhead to all syscalls and produces a slightly larger kernel.
1407 If you know you'll be using only pure EABI user space then you
1408 can say N here. If this option is not selected and you attempt
1409 to execute a legacy ABI binary then the result will be
1410 UNPREDICTABLE (in fact it can be predicted that it won't work
1411 at all). If in doubt say Y.
1412
1413 config ARCH_HAS_HOLES_MEMORYMODEL
1414 bool
1415
1416 config ARCH_SPARSEMEM_ENABLE
1417 bool
1418
1419 config ARCH_SPARSEMEM_DEFAULT
1420 def_bool ARCH_SPARSEMEM_ENABLE
1421
1422 config ARCH_SELECT_MEMORY_MODEL
1423 def_bool ARCH_SPARSEMEM_ENABLE
1424
1425 config HIGHMEM
1426 bool "High Memory Support (EXPERIMENTAL)"
1427 depends on MMU && EXPERIMENTAL
1428 help
1429 The address space of ARM processors is only 4 Gigabytes large
1430 and it has to accommodate user address space, kernel address
1431 space as well as some memory mapped IO. That means that, if you
1432 have a large amount of physical memory and/or IO, not all of the
1433 memory can be "permanently mapped" by the kernel. The physical
1434 memory that is not permanently mapped is called "high memory".
1435
1436 Depending on the selected kernel/user memory split, minimum
1437 vmalloc space and actual amount of RAM, you may not need this
1438 option which should result in a slightly faster kernel.
1439
1440 If unsure, say n.
1441
1442 config HIGHPTE
1443 bool "Allocate 2nd-level pagetables from highmem"
1444 depends on HIGHMEM
1445 depends on !OUTER_CACHE
1446
1447 config HW_PERF_EVENTS
1448 bool "Enable hardware performance counter support for perf events"
1449 depends on PERF_EVENTS && CPU_HAS_PMU
1450 default y
1451 help
1452 Enable hardware performance counter support for perf events. If
1453 disabled, perf events will use software events only.
1454
1455 config SPARSE_IRQ
1456 def_bool n
1457 help
1458 This enables support for sparse irqs. This is useful in general
1459 as most CPUs have a fairly sparse array of IRQ vectors, which
1460 the irq_desc then maps directly on to. Systems with a high
1461 number of off-chip IRQs will want to treat this as
1462 experimental until they have been independently verified.
1463
1464 source "mm/Kconfig"
1465
1466 config FORCE_MAX_ZONEORDER
1467 int "Maximum zone order" if ARCH_SHMOBILE
1468 range 11 64 if ARCH_SHMOBILE
1469 default "9" if SA1111
1470 default "11"
1471 help
1472 The kernel memory allocator divides physically contiguous memory
1473 blocks into "zones", where each zone is a power of two number of
1474 pages. This option selects the largest power of two that the kernel
1475 keeps in the memory allocator. If you need to allocate very large
1476 blocks of physically contiguous memory, then you may need to
1477 increase this value.
1478
1479 This config option is actually maximum order plus one. For example,
1480 a value of 11 means that the largest free memory block is 2^10 pages.
1481
1482 config LEDS
1483 bool "Timer and CPU usage LEDs"
1484 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1485 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1486 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1487 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1488 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1489 ARCH_AT91 || ARCH_DAVINCI || \
1490 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1491 help
1492 If you say Y here, the LEDs on your machine will be used
1493 to provide useful information about your current system status.
1494
1495 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1496 be able to select which LEDs are active using the options below. If
1497 you are compiling a kernel for the EBSA-110 or the LART however, the
1498 red LED will simply flash regularly to indicate that the system is
1499 still functional. It is safe to say Y here if you have a CATS
1500 system, but the driver will do nothing.
1501
1502 config LEDS_TIMER
1503 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1504 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1505 || MACH_OMAP_PERSEUS2
1506 depends on LEDS
1507 depends on !GENERIC_CLOCKEVENTS
1508 default y if ARCH_EBSA110
1509 help
1510 If you say Y here, one of the system LEDs (the green one on the
1511 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1512 will flash regularly to indicate that the system is still
1513 operational. This is mainly useful to kernel hackers who are
1514 debugging unstable kernels.
1515
1516 The LART uses the same LED for both Timer LED and CPU usage LED
1517 functions. You may choose to use both, but the Timer LED function
1518 will overrule the CPU usage LED.
1519
1520 config LEDS_CPU
1521 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1522 !ARCH_OMAP) \
1523 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1524 || MACH_OMAP_PERSEUS2
1525 depends on LEDS
1526 help
1527 If you say Y here, the red LED will be used to give a good real
1528 time indication of CPU usage, by lighting whenever the idle task
1529 is not currently executing.
1530
1531 The LART uses the same LED for both Timer LED and CPU usage LED
1532 functions. You may choose to use both, but the Timer LED function
1533 will overrule the CPU usage LED.
1534
1535 config ALIGNMENT_TRAP
1536 bool
1537 depends on CPU_CP15_MMU
1538 default y if !ARCH_EBSA110
1539 select HAVE_PROC_CPU if PROC_FS
1540 help
1541 ARM processors cannot fetch/store information which is not
1542 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1543 address divisible by 4. On 32-bit ARM processors, these non-aligned
1544 fetch/store instructions will be emulated in software if you say
1545 here, which has a severe performance impact. This is necessary for
1546 correct operation of some network protocols. With an IP-only
1547 configuration it is safe to say N, otherwise say Y.
1548
1549 config UACCESS_WITH_MEMCPY
1550 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1551 depends on MMU && EXPERIMENTAL
1552 default y if CPU_FEROCEON
1553 help
1554 Implement faster copy_to_user and clear_user methods for CPU
1555 cores where a 8-word STM instruction give significantly higher
1556 memory write throughput than a sequence of individual 32bit stores.
1557
1558 A possible side effect is a slight increase in scheduling latency
1559 between threads sharing the same address space if they invoke
1560 such copy operations with large buffers.
1561
1562 However, if the CPU data cache is using a write-allocate mode,
1563 this option is unlikely to provide any performance gain.
1564
1565 config SECCOMP
1566 bool
1567 prompt "Enable seccomp to safely compute untrusted bytecode"
1568 ---help---
1569 This kernel feature is useful for number crunching applications
1570 that may need to compute untrusted bytecode during their
1571 execution. By using pipes or other transports made available to
1572 the process as file descriptors supporting the read/write
1573 syscalls, it's possible to isolate those applications in
1574 their own address space using seccomp. Once seccomp is
1575 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1576 and the task is only allowed to execute a few safe syscalls
1577 defined by each seccomp mode.
1578
1579 config CC_STACKPROTECTOR
1580 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1581 depends on EXPERIMENTAL
1582 help
1583 This option turns on the -fstack-protector GCC feature. This
1584 feature puts, at the beginning of functions, a canary value on
1585 the stack just before the return address, and validates
1586 the value just before actually returning. Stack based buffer
1587 overflows (that need to overwrite this return address) now also
1588 overwrite the canary, which gets detected and the attack is then
1589 neutralized via a kernel panic.
1590 This feature requires gcc version 4.2 or above.
1591
1592 config DEPRECATED_PARAM_STRUCT
1593 bool "Provide old way to pass kernel parameters"
1594 help
1595 This was deprecated in 2001 and announced to live on for 5 years.
1596 Some old boot loaders still use this way.
1597
1598 endmenu
1599
1600 menu "Boot options"
1601
1602 # Compressed boot loader in ROM. Yes, we really want to ask about
1603 # TEXT and BSS so we preserve their values in the config files.
1604 config ZBOOT_ROM_TEXT
1605 hex "Compressed ROM boot loader base address"
1606 default "0"
1607 help
1608 The physical address at which the ROM-able zImage is to be
1609 placed in the target. Platforms which normally make use of
1610 ROM-able zImage formats normally set this to a suitable
1611 value in their defconfig file.
1612
1613 If ZBOOT_ROM is not enabled, this has no effect.
1614
1615 config ZBOOT_ROM_BSS
1616 hex "Compressed ROM boot loader BSS address"
1617 default "0"
1618 help
1619 The base address of an area of read/write memory in the target
1620 for the ROM-able zImage which must be available while the
1621 decompressor is running. It must be large enough to hold the
1622 entire decompressed kernel plus an additional 128 KiB.
1623 Platforms which normally make use of ROM-able zImage formats
1624 normally set this to a suitable value in their defconfig file.
1625
1626 If ZBOOT_ROM is not enabled, this has no effect.
1627
1628 config ZBOOT_ROM
1629 bool "Compressed boot loader in ROM/flash"
1630 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1631 help
1632 Say Y here if you intend to execute your compressed kernel image
1633 (zImage) directly from ROM or flash. If unsure, say N.
1634
1635 config CMDLINE
1636 string "Default kernel command string"
1637 default ""
1638 help
1639 On some architectures (EBSA110 and CATS), there is currently no way
1640 for the boot loader to pass arguments to the kernel. For these
1641 architectures, you should supply some command-line options at build
1642 time by entering them here. As a minimum, you should specify the
1643 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1644
1645 config CMDLINE_FORCE
1646 bool "Always use the default kernel command string"
1647 depends on CMDLINE != ""
1648 help
1649 Always use the default kernel command string, even if the boot
1650 loader passes other arguments to the kernel.
1651 This is useful if you cannot or don't want to change the
1652 command-line options your boot loader passes to the kernel.
1653
1654 If unsure, say N.
1655
1656 config XIP_KERNEL
1657 bool "Kernel Execute-In-Place from ROM"
1658 depends on !ZBOOT_ROM
1659 help
1660 Execute-In-Place allows the kernel to run from non-volatile storage
1661 directly addressable by the CPU, such as NOR flash. This saves RAM
1662 space since the text section of the kernel is not loaded from flash
1663 to RAM. Read-write sections, such as the data section and stack,
1664 are still copied to RAM. The XIP kernel is not compressed since
1665 it has to run directly from flash, so it will take more space to
1666 store it. The flash address used to link the kernel object files,
1667 and for storing it, is configuration dependent. Therefore, if you
1668 say Y here, you must know the proper physical address where to
1669 store the kernel image depending on your own flash memory usage.
1670
1671 Also note that the make target becomes "make xipImage" rather than
1672 "make zImage" or "make Image". The final kernel binary to put in
1673 ROM memory will be arch/arm/boot/xipImage.
1674
1675 If unsure, say N.
1676
1677 config XIP_PHYS_ADDR
1678 hex "XIP Kernel Physical Location"
1679 depends on XIP_KERNEL
1680 default "0x00080000"
1681 help
1682 This is the physical address in your flash memory the kernel will
1683 be linked for and stored to. This address is dependent on your
1684 own flash usage.
1685
1686 config KEXEC
1687 bool "Kexec system call (EXPERIMENTAL)"
1688 depends on EXPERIMENTAL
1689 help
1690 kexec is a system call that implements the ability to shutdown your
1691 current kernel, and to start another kernel. It is like a reboot
1692 but it is independent of the system firmware. And like a reboot
1693 you can start any kernel with it, not just Linux.
1694
1695 It is an ongoing process to be certain the hardware in a machine
1696 is properly shutdown, so do not be surprised if this code does not
1697 initially work for you. It may help to enable device hotplugging
1698 support.
1699
1700 config ATAGS_PROC
1701 bool "Export atags in procfs"
1702 depends on KEXEC
1703 default y
1704 help
1705 Should the atags used to boot the kernel be exported in an "atags"
1706 file in procfs. Useful with kexec.
1707
1708 config CRASH_DUMP
1709 bool "Build kdump crash kernel (EXPERIMENTAL)"
1710 depends on EXPERIMENTAL
1711 help
1712 Generate crash dump after being started by kexec. This should
1713 be normally only set in special crash dump kernels which are
1714 loaded in the main kernel with kexec-tools into a specially
1715 reserved region and then later executed after a crash by
1716 kdump/kexec. The crash dump kernel must be compiled to a
1717 memory address not used by the main kernel
1718
1719 For more details see Documentation/kdump/kdump.txt
1720
1721 config AUTO_ZRELADDR
1722 bool "Auto calculation of the decompressed kernel image address"
1723 depends on !ZBOOT_ROM && !ARCH_U300
1724 help
1725 ZRELADDR is the physical address where the decompressed kernel
1726 image will be placed. If AUTO_ZRELADDR is selected, the address
1727 will be determined at run-time by masking the current IP with
1728 0xf8000000. This assumes the zImage being placed in the first 128MB
1729 from start of memory.
1730
1731 endmenu
1732
1733 menu "CPU Power Management"
1734
1735 if ARCH_HAS_CPUFREQ
1736
1737 source "drivers/cpufreq/Kconfig"
1738
1739 config CPU_FREQ_IMX
1740 tristate "CPUfreq driver for i.MX CPUs"
1741 depends on ARCH_MXC && CPU_FREQ
1742 help
1743 This enables the CPUfreq driver for i.MX CPUs.
1744
1745 config CPU_FREQ_SA1100
1746 bool
1747
1748 config CPU_FREQ_SA1110
1749 bool
1750
1751 config CPU_FREQ_INTEGRATOR
1752 tristate "CPUfreq driver for ARM Integrator CPUs"
1753 depends on ARCH_INTEGRATOR && CPU_FREQ
1754 default y
1755 help
1756 This enables the CPUfreq driver for ARM Integrator CPUs.
1757
1758 For details, take a look at <file:Documentation/cpu-freq>.
1759
1760 If in doubt, say Y.
1761
1762 config CPU_FREQ_PXA
1763 bool
1764 depends on CPU_FREQ && ARCH_PXA && PXA25x
1765 default y
1766 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1767
1768 config CPU_FREQ_S3C64XX
1769 bool "CPUfreq support for Samsung S3C64XX CPUs"
1770 depends on CPU_FREQ && CPU_S3C6410
1771
1772 config CPU_FREQ_S3C
1773 bool
1774 help
1775 Internal configuration node for common cpufreq on Samsung SoC
1776
1777 config CPU_FREQ_S3C24XX
1778 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1779 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1780 select CPU_FREQ_S3C
1781 help
1782 This enables the CPUfreq driver for the Samsung S3C24XX family
1783 of CPUs.
1784
1785 For details, take a look at <file:Documentation/cpu-freq>.
1786
1787 If in doubt, say N.
1788
1789 config CPU_FREQ_S3C24XX_PLL
1790 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1791 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1792 help
1793 Compile in support for changing the PLL frequency from the
1794 S3C24XX series CPUfreq driver. The PLL takes time to settle
1795 after a frequency change, so by default it is not enabled.
1796
1797 This also means that the PLL tables for the selected CPU(s) will
1798 be built which may increase the size of the kernel image.
1799
1800 config CPU_FREQ_S3C24XX_DEBUG
1801 bool "Debug CPUfreq Samsung driver core"
1802 depends on CPU_FREQ_S3C24XX
1803 help
1804 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1805
1806 config CPU_FREQ_S3C24XX_IODEBUG
1807 bool "Debug CPUfreq Samsung driver IO timing"
1808 depends on CPU_FREQ_S3C24XX
1809 help
1810 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1811
1812 config CPU_FREQ_S3C24XX_DEBUGFS
1813 bool "Export debugfs for CPUFreq"
1814 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1815 help
1816 Export status information via debugfs.
1817
1818 endif
1819
1820 source "drivers/cpuidle/Kconfig"
1821
1822 endmenu
1823
1824 menu "Floating point emulation"
1825
1826 comment "At least one emulation must be selected"
1827
1828 config FPE_NWFPE
1829 bool "NWFPE math emulation"
1830 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1831 ---help---
1832 Say Y to include the NWFPE floating point emulator in the kernel.
1833 This is necessary to run most binaries. Linux does not currently
1834 support floating point hardware so you need to say Y here even if
1835 your machine has an FPA or floating point co-processor podule.
1836
1837 You may say N here if you are going to load the Acorn FPEmulator
1838 early in the bootup.
1839
1840 config FPE_NWFPE_XP
1841 bool "Support extended precision"
1842 depends on FPE_NWFPE
1843 help
1844 Say Y to include 80-bit support in the kernel floating-point
1845 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1846 Note that gcc does not generate 80-bit operations by default,
1847 so in most cases this option only enlarges the size of the
1848 floating point emulator without any good reason.
1849
1850 You almost surely want to say N here.
1851
1852 config FPE_FASTFPE
1853 bool "FastFPE math emulation (EXPERIMENTAL)"
1854 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1855 ---help---
1856 Say Y here to include the FAST floating point emulator in the kernel.
1857 This is an experimental much faster emulator which now also has full
1858 precision for the mantissa. It does not support any exceptions.
1859 It is very simple, and approximately 3-6 times faster than NWFPE.
1860
1861 It should be sufficient for most programs. It may be not suitable
1862 for scientific calculations, but you have to check this for yourself.
1863 If you do not feel you need a faster FP emulation you should better
1864 choose NWFPE.
1865
1866 config VFP
1867 bool "VFP-format floating point maths"
1868 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1869 help
1870 Say Y to include VFP support code in the kernel. This is needed
1871 if your hardware includes a VFP unit.
1872
1873 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1874 release notes and additional status information.
1875
1876 Say N if your target does not have VFP hardware.
1877
1878 config VFPv3
1879 bool
1880 depends on VFP
1881 default y if CPU_V7
1882
1883 config NEON
1884 bool "Advanced SIMD (NEON) Extension support"
1885 depends on VFPv3 && CPU_V7
1886 help
1887 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1888 Extension.
1889
1890 endmenu
1891
1892 menu "Userspace binary formats"
1893
1894 source "fs/Kconfig.binfmt"
1895
1896 config ARTHUR
1897 tristate "RISC OS personality"
1898 depends on !AEABI
1899 help
1900 Say Y here to include the kernel code necessary if you want to run
1901 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1902 experimental; if this sounds frightening, say N and sleep in peace.
1903 You can also say M here to compile this support as a module (which
1904 will be called arthur).
1905
1906 endmenu
1907
1908 menu "Power management options"
1909
1910 source "kernel/power/Kconfig"
1911
1912 config ARCH_SUSPEND_POSSIBLE
1913 def_bool y
1914
1915 endmenu
1916
1917 source "net/Kconfig"
1918
1919 source "drivers/Kconfig"
1920
1921 source "fs/Kconfig"
1922
1923 source "arch/arm/Kconfig.debug"
1924
1925 source "security/Kconfig"
1926
1927 source "crypto/Kconfig"
1928
1929 source "lib/Kconfig"
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