arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         select GENERIC_IRQ_SHOW
  32         help
  33           The ARM series is a line of low-power-consumption RISC chip designs
  34           licensed by ARM Ltd and targeted at embedded applications and
  35           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  36           manufactured, but legacy ARM-based PC hardware remains popular in
  37           Europe.  There is an ARM Linux project with a web page at
  38           <http://www.arm.linux.org.uk/>.
  39
  40 config HAVE_PWM
  41         bool
  42
  43 config MIGHT_HAVE_PCI
  44         bool
  45
  46 config SYS_SUPPORTS_APM_EMULATION
  47         bool
  48
  49 config HAVE_SCHED_CLOCK
  50         bool
  51
  52 config GENERIC_GPIO
  53         bool
  54
  55 config ARCH_USES_GETTIMEOFFSET
  56         bool
  57         default n
  58
  59 config GENERIC_CLOCKEVENTS
  60         bool
  61
  62 config GENERIC_CLOCKEVENTS_BROADCAST
  63         bool
  64         depends on GENERIC_CLOCKEVENTS
  65         default y if SMP
  66
  67 config KTIME_SCALAR
  68         bool
  69         default y
  70
  71 config HAVE_TCM
  72         bool
  73         select GENERIC_ALLOCATOR
  74
  75 config HAVE_PROC_CPU
  76         bool
  77
  78 config NO_IOPORT
  79         bool
  80
  81 config EISA
  82         bool
  83         ---help---
  84           The Extended Industry Standard Architecture (EISA) bus was
  85           developed as an open alternative to the IBM MicroChannel bus.
  86
  87           The EISA bus provided some of the features of the IBM MicroChannel
  88           bus while maintaining backward compatibility with cards made for
  89           the older ISA bus.  The EISA bus saw limited use between 1988 and
  90           1995 when it was made obsolete by the PCI bus.
  91
  92           Say Y here if you are building a kernel for an EISA-based machine.
  93
  94           Otherwise, say N.
  95
  96 config SBUS
  97         bool
  98
  99 config MCA
 100         bool
 101         help
 102           MicroChannel Architecture is found in some IBM PS/2 machines and
 103           laptops.  It is a bus system similar to PCI or ISA. See
 104           <file:Documentation/mca.txt> (and especially the web page given
 105           there) before attempting to build an MCA bus kernel.
 106
 107 config STACKTRACE_SUPPORT
 108         bool
 109         default y
 110
 111 config HAVE_LATENCYTOP_SUPPORT
 112         bool
 113         depends on !SMP
 114         default y
 115
 116 config LOCKDEP_SUPPORT
 117         bool
 118         default y
 119
 120 config TRACE_IRQFLAGS_SUPPORT
 121         bool
 122         default y
 123
 124 config HARDIRQS_SW_RESEND
 125         bool
 126         default y
 127
 128 config GENERIC_IRQ_PROBE
 129         bool
 130         default y
 131
 132 config GENERIC_LOCKBREAK
 133         bool
 134         default y
 135         depends on SMP && PREEMPT
 136
 137 config RWSEM_GENERIC_SPINLOCK
 138         bool
 139         default y
 140
 141 config RWSEM_XCHGADD_ALGORITHM
 142         bool
 143
 144 config ARCH_HAS_ILOG2_U32
 145         bool
 146
 147 config ARCH_HAS_ILOG2_U64
 148         bool
 149
 150 config ARCH_HAS_CPUFREQ
 151         bool
 152         help
 153           Internal node to signify that the ARCH has CPUFREQ support
 154           and that the relevant menu configurations are displayed for
 155           it.
 156
 157 config ARCH_HAS_CPU_IDLE_WAIT
 158        def_bool y
 159
 160 config GENERIC_HWEIGHT
 161         bool
 162         default y
 163
 164 config GENERIC_CALIBRATE_DELAY
 165         bool
 166         default y
 167
 168 config ARCH_MAY_HAVE_PC_FDC
 169         bool
 170
 171 config ZONE_DMA
 172         bool
 173
 174 config NEED_DMA_MAP_STATE
 175        def_bool y
 176
 177 config GENERIC_ISA_DMA
 178         bool
 179
 180 config FIQ
 181         bool
 182
 183 config ARCH_MTD_XIP
 184         bool
 185
 186 config VECTORS_BASE
 187         hex
 188         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 189         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 190         default 0x00000000
 191         help
 192           The base address of exception vectors.
 193
 194 config ARM_PATCH_PHYS_VIRT
 195         bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
 196         depends on EXPERIMENTAL
 197         depends on !XIP_KERNEL && MMU
 198         depends on !ARCH_REALVIEW || !SPARSEMEM
 199         help
 200           Patch phys-to-virt and virt-to-phys translation functions at
 201           boot and module load time according to the position of the
 202           kernel in system memory.
 203
 204           This can only be used with non-XIP MMU kernels where the base
 205           of physical memory is at a 16MB boundary, or theoretically 64K
 206           for the MSM machine class.
 207
 208 config ARM_PATCH_PHYS_VIRT_16BIT
 209         def_bool y
 210         depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
 211         help
 212           This option extends the physical to virtual translation patching
 213           to allow physical memory down to a theoretical minimum of 64K
 214           boundaries.
 215
 216 source "init/Kconfig"
 217
 218 source "kernel/Kconfig.freezer"
 219
 220 menu "System Type"
 221
 222 config MMU
 223         bool "MMU-based Paged Memory Management Support"
 224         default y
 225         help
 226           Select if you want MMU-based virtualised addressing space
 227           support by paged memory management. If unsure, say 'Y'.
 228
 229 #
 230 # The "ARM system type" choice list is ordered alphabetically by option
 231 # text.  Please add new entries in the option alphabetic order.
 232 #
 233 choice
 234         prompt "ARM system type"
 235         default ARCH_VERSATILE
 236
 237 config ARCH_INTEGRATOR
 238         bool "ARM Ltd. Integrator family"
 239         select ARM_AMBA
 240         select ARCH_HAS_CPUFREQ
 241         select CLKDEV_LOOKUP
 242         select ICST
 243         select GENERIC_CLOCKEVENTS
 244         select PLAT_VERSATILE
 245         select PLAT_VERSATILE_FPGA_IRQ
 246         help
 247           Support for ARM's Integrator platform.
 248
 249 config ARCH_REALVIEW
 250         bool "ARM Ltd. RealView family"
 251         select ARM_AMBA
 252         select CLKDEV_LOOKUP
 253         select ICST
 254         select GENERIC_CLOCKEVENTS
 255         select ARCH_WANT_OPTIONAL_GPIOLIB
 256         select PLAT_VERSATILE
 257         select PLAT_VERSATILE_CLCD
 258         select ARM_TIMER_SP804
 259         select GPIO_PL061 if GPIOLIB
 260         help
 261           This enables support for ARM Ltd RealView boards.
 262
 263 config ARCH_VERSATILE
 264         bool "ARM Ltd. Versatile family"
 265         select ARM_AMBA
 266         select ARM_VIC
 267         select CLKDEV_LOOKUP
 268         select ICST
 269         select GENERIC_CLOCKEVENTS
 270         select ARCH_WANT_OPTIONAL_GPIOLIB
 271         select PLAT_VERSATILE
 272         select PLAT_VERSATILE_CLCD
 273         select PLAT_VERSATILE_FPGA_IRQ
 274         select ARM_TIMER_SP804
 275         help
 276           This enables support for ARM Ltd Versatile board.
 277
 278 config ARCH_VEXPRESS
 279         bool "ARM Ltd. Versatile Express family"
 280         select ARCH_WANT_OPTIONAL_GPIOLIB
 281         select ARM_AMBA
 282         select ARM_TIMER_SP804
 283         select CLKDEV_LOOKUP
 284         select GENERIC_CLOCKEVENTS
 285         select HAVE_CLK
 286         select HAVE_PATA_PLATFORM
 287         select ICST
 288         select PLAT_VERSATILE
 289         select PLAT_VERSATILE_CLCD
 290         help
 291           This enables support for the ARM Ltd Versatile Express boards.
 292
 293 config ARCH_AT91
 294         bool "Atmel AT91"
 295         select ARCH_REQUIRE_GPIOLIB
 296         select HAVE_CLK
 297         select CLKDEV_LOOKUP
 298         select ARM_PATCH_PHYS_VIRT if MMU
 299         help
 300           This enables support for systems based on the Atmel AT91RM9200,
 301           AT91SAM9 and AT91CAP9 processors.
 302
 303 config ARCH_BCMRING
 304         bool "Broadcom BCMRING"
 305         depends on MMU
 306         select CPU_V6
 307         select ARM_AMBA
 308         select ARM_TIMER_SP804
 309         select CLKDEV_LOOKUP
 310         select GENERIC_CLOCKEVENTS
 311         select ARCH_WANT_OPTIONAL_GPIOLIB
 312         help
 313           Support for Broadcom's BCMRing platform.
 314
 315 config ARCH_CLPS711X
 316         bool "Cirrus Logic CLPS711x/EP721x-based"
 317         select CPU_ARM720T
 318         select ARCH_USES_GETTIMEOFFSET
 319         help
 320           Support for Cirrus Logic 711x/721x based boards.
 321
 322 config ARCH_CNS3XXX
 323         bool "Cavium Networks CNS3XXX family"
 324         select CPU_V6
 325         select GENERIC_CLOCKEVENTS
 326         select ARM_GIC
 327         select MIGHT_HAVE_PCI
 328         select PCI_DOMAINS if PCI
 329         help
 330           Support for Cavium Networks CNS3XXX platform.
 331
 332 config ARCH_GEMINI
 333         bool "Cortina Systems Gemini"
 334         select CPU_FA526
 335         select ARCH_REQUIRE_GPIOLIB
 336         select ARCH_USES_GETTIMEOFFSET
 337         help
 338           Support for the Cortina Systems Gemini family SoCs
 339
 340 config ARCH_EBSA110
 341         bool "EBSA-110"
 342         select CPU_SA110
 343         select ISA
 344         select NO_IOPORT
 345         select ARCH_USES_GETTIMEOFFSET
 346         help
 347           This is an evaluation board for the StrongARM processor available
 348           from Digital. It has limited hardware on-board, including an
 349           Ethernet interface, two PCMCIA sockets, two serial ports and a
 350           parallel port.
 351
 352 config ARCH_EP93XX
 353         bool "EP93xx-based"
 354         select CPU_ARM920T
 355         select ARM_AMBA
 356         select ARM_VIC
 357         select CLKDEV_LOOKUP
 358         select ARCH_REQUIRE_GPIOLIB
 359         select ARCH_HAS_HOLES_MEMORYMODEL
 360         select ARCH_USES_GETTIMEOFFSET
 361         help
 362           This enables support for the Cirrus EP93xx series of CPUs.
 363
 364 config ARCH_FOOTBRIDGE
 365         bool "FootBridge"
 366         select CPU_SA110
 367         select FOOTBRIDGE
 368         select GENERIC_CLOCKEVENTS
 369         help
 370           Support for systems based on the DC21285 companion chip
 371           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 372
 373 config ARCH_MXC
 374         bool "Freescale MXC/iMX-based"
 375         select GENERIC_CLOCKEVENTS
 376         select ARCH_REQUIRE_GPIOLIB
 377         select CLKDEV_LOOKUP
 378         select CLKSRC_MMIO
 379         select HAVE_SCHED_CLOCK
 380         help
 381           Support for Freescale MXC/iMX-based family of processors
 382
 383 config ARCH_MXS
 384         bool "Freescale MXS-based"
 385         select GENERIC_CLOCKEVENTS
 386         select ARCH_REQUIRE_GPIOLIB
 387         select CLKDEV_LOOKUP
 388         select CLKSRC_MMIO
 389         help
 390           Support for Freescale MXS-based family of processors
 391
 392 config ARCH_NETX
 393         bool "Hilscher NetX based"
 394         select CLKSRC_MMIO
 395         select CPU_ARM926T
 396         select ARM_VIC
 397         select GENERIC_CLOCKEVENTS
 398         help
 399           This enables support for systems based on the Hilscher NetX Soc
 400
 401 config ARCH_H720X
 402         bool "Hynix HMS720x-based"
 403         select CPU_ARM720T
 404         select ISA_DMA_API
 405         select ARCH_USES_GETTIMEOFFSET
 406         help
 407           This enables support for systems based on the Hynix HMS720x
 408
 409 config ARCH_IOP13XX
 410         bool "IOP13xx-based"
 411         depends on MMU
 412         select CPU_XSC3
 413         select PLAT_IOP
 414         select PCI
 415         select ARCH_SUPPORTS_MSI
 416         select VMSPLIT_1G
 417         help
 418           Support for Intel's IOP13XX (XScale) family of processors.
 419
 420 config ARCH_IOP32X
 421         bool "IOP32x-based"
 422         depends on MMU
 423         select CPU_XSCALE
 424         select PLAT_IOP
 425         select PCI
 426         select ARCH_REQUIRE_GPIOLIB
 427         help
 428           Support for Intel's 80219 and IOP32X (XScale) family of
 429           processors.
 430
 431 config ARCH_IOP33X
 432         bool "IOP33x-based"
 433         depends on MMU
 434         select CPU_XSCALE
 435         select PLAT_IOP
 436         select PCI
 437         select ARCH_REQUIRE_GPIOLIB
 438         help
 439           Support for Intel's IOP33X (XScale) family of processors.
 440
 441 config ARCH_IXP23XX
 442         bool "IXP23XX-based"
 443         depends on MMU
 444         select CPU_XSC3
 445         select PCI
 446         select ARCH_USES_GETTIMEOFFSET
 447         help
 448           Support for Intel's IXP23xx (XScale) family of processors.
 449
 450 config ARCH_IXP2000
 451         bool "IXP2400/2800-based"
 452         depends on MMU
 453         select CPU_XSCALE
 454         select PCI
 455         select ARCH_USES_GETTIMEOFFSET
 456         help
 457           Support for Intel's IXP2400/2800 (XScale) family of processors.
 458
 459 config ARCH_IXP4XX
 460         bool "IXP4xx-based"
 461         depends on MMU
 462         select CLKSRC_MMIO
 463         select CPU_XSCALE
 464         select GENERIC_GPIO
 465         select GENERIC_CLOCKEVENTS
 466         select HAVE_SCHED_CLOCK
 467         select MIGHT_HAVE_PCI
 468         select DMABOUNCE if PCI
 469         help
 470           Support for Intel's IXP4XX (XScale) family of processors.
 471
 472 config ARCH_DOVE
 473         bool "Marvell Dove"
 474         select CPU_V7
 475         select PCI
 476         select ARCH_REQUIRE_GPIOLIB
 477         select GENERIC_CLOCKEVENTS
 478         select PLAT_ORION
 479         help
 480           Support for the Marvell Dove SoC 88AP510
 481
 482 config ARCH_KIRKWOOD
 483         bool "Marvell Kirkwood"
 484         select CPU_FEROCEON
 485         select PCI
 486         select ARCH_REQUIRE_GPIOLIB
 487         select GENERIC_CLOCKEVENTS
 488         select PLAT_ORION
 489         help
 490           Support for the following Marvell Kirkwood series SoCs:
 491           88F6180, 88F6192 and 88F6281.
 492
 493 config ARCH_LOKI
 494         bool "Marvell Loki (88RC8480)"
 495         select CPU_FEROCEON
 496         select GENERIC_CLOCKEVENTS
 497         select PLAT_ORION
 498         help
 499           Support for the Marvell Loki (88RC8480) SoC.
 500
 501 config ARCH_LPC32XX
 502         bool "NXP LPC32XX"
 503         select CLKSRC_MMIO
 504         select CPU_ARM926T
 505         select ARCH_REQUIRE_GPIOLIB
 506         select HAVE_IDE
 507         select ARM_AMBA
 508         select USB_ARCH_HAS_OHCI
 509         select CLKDEV_LOOKUP
 510         select GENERIC_TIME
 511         select GENERIC_CLOCKEVENTS
 512         help
 513           Support for the NXP LPC32XX family of processors
 514
 515 config ARCH_MV78XX0
 516         bool "Marvell MV78xx0"
 517         select CPU_FEROCEON
 518         select PCI
 519         select ARCH_REQUIRE_GPIOLIB
 520         select GENERIC_CLOCKEVENTS
 521         select PLAT_ORION
 522         help
 523           Support for the following Marvell MV78xx0 series SoCs:
 524           MV781x0, MV782x0.
 525
 526 config ARCH_ORION5X
 527         bool "Marvell Orion"
 528         depends on MMU
 529         select CPU_FEROCEON
 530         select PCI
 531         select ARCH_REQUIRE_GPIOLIB
 532         select GENERIC_CLOCKEVENTS
 533         select PLAT_ORION
 534         help
 535           Support for the following Marvell Orion 5x series SoCs:
 536           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 537           Orion-2 (5281), Orion-1-90 (6183).
 538
 539 config ARCH_MMP
 540         bool "Marvell PXA168/910/MMP2"
 541         depends on MMU
 542         select ARCH_REQUIRE_GPIOLIB
 543         select CLKDEV_LOOKUP
 544         select GENERIC_CLOCKEVENTS
 545         select HAVE_SCHED_CLOCK
 546         select TICK_ONESHOT
 547         select PLAT_PXA
 548         select SPARSE_IRQ
 549         help
 550           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 551
 552 config ARCH_KS8695
 553         bool "Micrel/Kendin KS8695"
 554         select CPU_ARM922T
 555         select ARCH_REQUIRE_GPIOLIB
 556         select ARCH_USES_GETTIMEOFFSET
 557         help
 558           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 559           System-on-Chip devices.
 560
 561 config ARCH_W90X900
 562         bool "Nuvoton W90X900 CPU"
 563         select CPU_ARM926T
 564         select ARCH_REQUIRE_GPIOLIB
 565         select CLKDEV_LOOKUP
 566         select CLKSRC_MMIO
 567         select GENERIC_CLOCKEVENTS
 568         help
 569           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 570           At present, the w90x900 has been renamed nuc900, regarding
 571           the ARM series product line, you can login the following
 572           link address to know more.
 573
 574           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 575                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 576
 577 config ARCH_NUC93X
 578         bool "Nuvoton NUC93X CPU"
 579         select CPU_ARM926T
 580         select CLKDEV_LOOKUP
 581         help
 582           Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
 583           low-power and high performance MPEG-4/JPEG multimedia controller chip.
 584
 585 config ARCH_TEGRA
 586         bool "NVIDIA Tegra"
 587         select CLKDEV_LOOKUP
 588         select CLKSRC_MMIO
 589         select GENERIC_TIME
 590         select GENERIC_CLOCKEVENTS
 591         select GENERIC_GPIO
 592         select HAVE_CLK
 593         select HAVE_SCHED_CLOCK
 594         select ARCH_HAS_BARRIERS if CACHE_L2X0
 595         select ARCH_HAS_CPUFREQ
 596         help
 597           This enables support for NVIDIA Tegra based systems (Tegra APX,
 598           Tegra 6xx and Tegra 2 series).
 599
 600 config ARCH_PNX4008
 601         bool "Philips Nexperia PNX4008 Mobile"
 602         select CPU_ARM926T
 603         select CLKDEV_LOOKUP
 604         select ARCH_USES_GETTIMEOFFSET
 605         help
 606           This enables support for Philips PNX4008 mobile platform.
 607
 608 config ARCH_PXA
 609         bool "PXA2xx/PXA3xx-based"
 610         depends on MMU
 611         select ARCH_MTD_XIP
 612         select ARCH_HAS_CPUFREQ
 613         select CLKDEV_LOOKUP
 614         select CLKSRC_MMIO
 615         select ARCH_REQUIRE_GPIOLIB
 616         select GENERIC_CLOCKEVENTS
 617         select HAVE_SCHED_CLOCK
 618         select TICK_ONESHOT
 619         select PLAT_PXA
 620         select SPARSE_IRQ
 621         help
 622           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 623
 624 config ARCH_MSM
 625         bool "Qualcomm MSM"
 626         select HAVE_CLK
 627         select GENERIC_CLOCKEVENTS
 628         select ARCH_REQUIRE_GPIOLIB
 629         select CLKDEV_LOOKUP
 630         help
 631           Support for Qualcomm MSM/QSD based systems.  This runs on the
 632           apps processor of the MSM/QSD and depends on a shared memory
 633           interface to the modem processor which runs the baseband
 634           stack and controls some vital subsystems
 635           (clock and power control, etc).
 636
 637 config ARCH_SHMOBILE
 638         bool "Renesas SH-Mobile / R-Mobile"
 639         select HAVE_CLK
 640         select CLKDEV_LOOKUP
 641         select GENERIC_CLOCKEVENTS
 642         select NO_IOPORT
 643         select SPARSE_IRQ
 644         select MULTI_IRQ_HANDLER
 645         help
 646           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 647
 648 config ARCH_RPC
 649         bool "RiscPC"
 650         select ARCH_ACORN
 651         select FIQ
 652         select TIMER_ACORN
 653         select ARCH_MAY_HAVE_PC_FDC
 654         select HAVE_PATA_PLATFORM
 655         select ISA_DMA_API
 656         select NO_IOPORT
 657         select ARCH_SPARSEMEM_ENABLE
 658         select ARCH_USES_GETTIMEOFFSET
 659         help
 660           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 661           CD-ROM interface, serial and parallel port, and the floppy drive.
 662
 663 config ARCH_SA1100
 664         bool "SA1100-based"
 665         select CLKSRC_MMIO
 666         select CPU_SA1100
 667         select ISA
 668         select ARCH_SPARSEMEM_ENABLE
 669         select ARCH_MTD_XIP
 670         select ARCH_HAS_CPUFREQ
 671         select CPU_FREQ
 672         select GENERIC_CLOCKEVENTS
 673         select HAVE_CLK
 674         select HAVE_SCHED_CLOCK
 675         select TICK_ONESHOT
 676         select ARCH_REQUIRE_GPIOLIB
 677         help
 678           Support for StrongARM 11x0 based boards.
 679
 680 config ARCH_S3C2410
 681         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 682         select GENERIC_GPIO
 683         select ARCH_HAS_CPUFREQ
 684         select HAVE_CLK
 685         select CLKDEV_LOOKUP
 686         select ARCH_USES_GETTIMEOFFSET
 687         select HAVE_S3C2410_I2C if I2C
 688         help
 689           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 690           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 691           the Samsung SMDK2410 development board (and derivatives).
 692
 693           Note, the S3C2416 and the S3C2450 are so close that they even share
 694           the same SoC ID code. This means that there is no separate machine
 695           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 696
 697 config ARCH_S3C64XX
 698         bool "Samsung S3C64XX"
 699         select PLAT_SAMSUNG
 700         select CPU_V6
 701         select ARM_VIC
 702         select HAVE_CLK
 703         select CLKDEV_LOOKUP
 704         select NO_IOPORT
 705         select ARCH_USES_GETTIMEOFFSET
 706         select ARCH_HAS_CPUFREQ
 707         select ARCH_REQUIRE_GPIOLIB
 708         select SAMSUNG_CLKSRC
 709         select SAMSUNG_IRQ_VIC_TIMER
 710         select SAMSUNG_IRQ_UART
 711         select S3C_GPIO_TRACK
 712         select S3C_GPIO_PULL_UPDOWN
 713         select S3C_GPIO_CFG_S3C24XX
 714         select S3C_GPIO_CFG_S3C64XX
 715         select S3C_DEV_NAND
 716         select USB_ARCH_HAS_OHCI
 717         select SAMSUNG_GPIOLIB_4BIT
 718         select HAVE_S3C2410_I2C if I2C
 719         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 720         help
 721           Samsung S3C64XX series based systems
 722
 723 config ARCH_S5P64X0
 724         bool "Samsung S5P6440 S5P6450"
 725         select CPU_V6
 726         select GENERIC_GPIO
 727         select HAVE_CLK
 728         select CLKDEV_LOOKUP
 729         select CLKSRC_MMIO
 730         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 731         select GENERIC_CLOCKEVENTS
 732         select HAVE_SCHED_CLOCK
 733         select HAVE_S3C2410_I2C if I2C
 734         select HAVE_S3C_RTC if RTC_CLASS
 735         help
 736           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 737           SMDK6450.
 738
 739 config ARCH_S5PC100
 740         bool "Samsung S5PC100"
 741         select GENERIC_GPIO
 742         select HAVE_CLK
 743         select CLKDEV_LOOKUP
 744         select CPU_V7
 745         select ARM_L1_CACHE_SHIFT_6
 746         select ARCH_USES_GETTIMEOFFSET
 747         select HAVE_S3C2410_I2C if I2C
 748         select HAVE_S3C_RTC if RTC_CLASS
 749         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 750         help
 751           Samsung S5PC100 series based systems
 752
 753 config ARCH_S5PV210
 754         bool "Samsung S5PV210/S5PC110"
 755         select CPU_V7
 756         select ARCH_SPARSEMEM_ENABLE
 757         select GENERIC_GPIO
 758         select HAVE_CLK
 759         select CLKDEV_LOOKUP
 760         select CLKSRC_MMIO
 761         select ARM_L1_CACHE_SHIFT_6
 762         select ARCH_HAS_CPUFREQ
 763         select GENERIC_CLOCKEVENTS
 764         select HAVE_SCHED_CLOCK
 765         select HAVE_S3C2410_I2C if I2C
 766         select HAVE_S3C_RTC if RTC_CLASS
 767         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 768         help
 769           Samsung S5PV210/S5PC110 series based systems
 770
 771 config ARCH_EXYNOS4
 772         bool "Samsung EXYNOS4"
 773         select CPU_V7
 774         select ARCH_SPARSEMEM_ENABLE
 775         select GENERIC_GPIO
 776         select HAVE_CLK
 777         select CLKDEV_LOOKUP
 778         select ARCH_HAS_CPUFREQ
 779         select GENERIC_CLOCKEVENTS
 780         select HAVE_S3C_RTC if RTC_CLASS
 781         select HAVE_S3C2410_I2C if I2C
 782         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 783         help
 784           Samsung EXYNOS4 series based systems
 785
 786 config ARCH_SHARK
 787         bool "Shark"
 788         select CPU_SA110
 789         select ISA
 790         select ISA_DMA
 791         select ZONE_DMA
 792         select PCI
 793         select ARCH_USES_GETTIMEOFFSET
 794         help
 795           Support for the StrongARM based Digital DNARD machine, also known
 796           as "Shark" (<http://www.shark-linux.de/shark.html>).
 797
 798 config ARCH_TCC_926
 799         bool "Telechips TCC ARM926-based systems"
 800         select CLKSRC_MMIO
 801         select CPU_ARM926T
 802         select HAVE_CLK
 803         select CLKDEV_LOOKUP
 804         select GENERIC_CLOCKEVENTS
 805         help
 806           Support for Telechips TCC ARM926-based systems.
 807
 808 config ARCH_U300
 809         bool "ST-Ericsson U300 Series"
 810         depends on MMU
 811         select CLKSRC_MMIO
 812         select CPU_ARM926T
 813         select HAVE_SCHED_CLOCK
 814         select HAVE_TCM
 815         select ARM_AMBA
 816         select ARM_VIC
 817         select GENERIC_CLOCKEVENTS
 818         select CLKDEV_LOOKUP
 819         select GENERIC_GPIO
 820         help
 821           Support for ST-Ericsson U300 series mobile platforms.
 822
 823 config ARCH_U8500
 824         bool "ST-Ericsson U8500 Series"
 825         select CPU_V7
 826         select ARM_AMBA
 827         select GENERIC_CLOCKEVENTS
 828         select CLKDEV_LOOKUP
 829         select ARCH_REQUIRE_GPIOLIB
 830         select ARCH_HAS_CPUFREQ
 831         help
 832           Support for ST-Ericsson's Ux500 architecture
 833
 834 config ARCH_NOMADIK
 835         bool "STMicroelectronics Nomadik"
 836         select ARM_AMBA
 837         select ARM_VIC
 838         select CPU_ARM926T
 839         select CLKDEV_LOOKUP
 840         select GENERIC_CLOCKEVENTS
 841         select ARCH_REQUIRE_GPIOLIB
 842         help
 843           Support for the Nomadik platform by ST-Ericsson
 844
 845 config ARCH_DAVINCI
 846         bool "TI DaVinci"
 847         select GENERIC_CLOCKEVENTS
 848         select ARCH_REQUIRE_GPIOLIB
 849         select ZONE_DMA
 850         select HAVE_IDE
 851         select CLKDEV_LOOKUP
 852         select GENERIC_ALLOCATOR
 853         select GENERIC_IRQ_CHIP
 854         select ARCH_HAS_HOLES_MEMORYMODEL
 855         help
 856           Support for TI's DaVinci platform.
 857
 858 config ARCH_OMAP
 859         bool "TI OMAP"
 860         select HAVE_CLK
 861         select ARCH_REQUIRE_GPIOLIB
 862         select ARCH_HAS_CPUFREQ
 863         select GENERIC_CLOCKEVENTS
 864         select HAVE_SCHED_CLOCK
 865         select ARCH_HAS_HOLES_MEMORYMODEL
 866         help
 867           Support for TI's OMAP platform (OMAP1/2/3/4).
 868
 869 config PLAT_SPEAR
 870         bool "ST SPEAr"
 871         select ARM_AMBA
 872         select ARCH_REQUIRE_GPIOLIB
 873         select CLKDEV_LOOKUP
 874         select CLKSRC_MMIO
 875         select GENERIC_CLOCKEVENTS
 876         select HAVE_CLK
 877         help
 878           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 879
 880 config ARCH_VT8500
 881         bool "VIA/WonderMedia 85xx"
 882         select CPU_ARM926T
 883         select GENERIC_GPIO
 884         select ARCH_HAS_CPUFREQ
 885         select GENERIC_CLOCKEVENTS
 886         select ARCH_REQUIRE_GPIOLIB
 887         select HAVE_PWM
 888         help
 889           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 890 endchoice
 891
 892 #
 893 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 894 # Kconfigs may be included either alphabetically (according to the
 895 # plat- suffix) or along side the corresponding mach-* source.
 896 #
 897 source "arch/arm/mach-at91/Kconfig"
 898
 899 source "arch/arm/mach-bcmring/Kconfig"
 900
 901 source "arch/arm/mach-clps711x/Kconfig"
 902
 903 source "arch/arm/mach-cns3xxx/Kconfig"
 904
 905 source "arch/arm/mach-davinci/Kconfig"
 906
 907 source "arch/arm/mach-dove/Kconfig"
 908
 909 source "arch/arm/mach-ep93xx/Kconfig"
 910
 911 source "arch/arm/mach-footbridge/Kconfig"
 912
 913 source "arch/arm/mach-gemini/Kconfig"
 914
 915 source "arch/arm/mach-h720x/Kconfig"
 916
 917 source "arch/arm/mach-integrator/Kconfig"
 918
 919 source "arch/arm/mach-iop32x/Kconfig"
 920
 921 source "arch/arm/mach-iop33x/Kconfig"
 922
 923 source "arch/arm/mach-iop13xx/Kconfig"
 924
 925 source "arch/arm/mach-ixp4xx/Kconfig"
 926
 927 source "arch/arm/mach-ixp2000/Kconfig"
 928
 929 source "arch/arm/mach-ixp23xx/Kconfig"
 930
 931 source "arch/arm/mach-kirkwood/Kconfig"
 932
 933 source "arch/arm/mach-ks8695/Kconfig"
 934
 935 source "arch/arm/mach-loki/Kconfig"
 936
 937 source "arch/arm/mach-lpc32xx/Kconfig"
 938
 939 source "arch/arm/mach-msm/Kconfig"
 940
 941 source "arch/arm/mach-mv78xx0/Kconfig"
 942
 943 source "arch/arm/plat-mxc/Kconfig"
 944
 945 source "arch/arm/mach-mxs/Kconfig"
 946
 947 source "arch/arm/mach-netx/Kconfig"
 948
 949 source "arch/arm/mach-nomadik/Kconfig"
 950 source "arch/arm/plat-nomadik/Kconfig"
 951
 952 source "arch/arm/mach-nuc93x/Kconfig"
 953
 954 source "arch/arm/plat-omap/Kconfig"
 955
 956 source "arch/arm/mach-omap1/Kconfig"
 957
 958 source "arch/arm/mach-omap2/Kconfig"
 959
 960 source "arch/arm/mach-orion5x/Kconfig"
 961
 962 source "arch/arm/mach-pxa/Kconfig"
 963 source "arch/arm/plat-pxa/Kconfig"
 964
 965 source "arch/arm/mach-mmp/Kconfig"
 966
 967 source "arch/arm/mach-realview/Kconfig"
 968
 969 source "arch/arm/mach-sa1100/Kconfig"
 970
 971 source "arch/arm/plat-samsung/Kconfig"
 972 source "arch/arm/plat-s3c24xx/Kconfig"
 973 source "arch/arm/plat-s5p/Kconfig"
 974
 975 source "arch/arm/plat-spear/Kconfig"
 976
 977 source "arch/arm/plat-tcc/Kconfig"
 978
 979 if ARCH_S3C2410
 980 source "arch/arm/mach-s3c2400/Kconfig"
 981 source "arch/arm/mach-s3c2410/Kconfig"
 982 source "arch/arm/mach-s3c2412/Kconfig"
 983 source "arch/arm/mach-s3c2416/Kconfig"
 984 source "arch/arm/mach-s3c2440/Kconfig"
 985 source "arch/arm/mach-s3c2443/Kconfig"
 986 endif
 987
 988 if ARCH_S3C64XX
 989 source "arch/arm/mach-s3c64xx/Kconfig"
 990 endif
 991
 992 source "arch/arm/mach-s5p64x0/Kconfig"
 993
 994 source "arch/arm/mach-s5pc100/Kconfig"
 995
 996 source "arch/arm/mach-s5pv210/Kconfig"
 997
 998 source "arch/arm/mach-exynos4/Kconfig"
 999
1000 source "arch/arm/mach-shmobile/Kconfig"
1001
1002 source "arch/arm/mach-tegra/Kconfig"
1003
1004 source "arch/arm/mach-u300/Kconfig"
1005
1006 source "arch/arm/mach-ux500/Kconfig"
1007
1008 source "arch/arm/mach-versatile/Kconfig"
1009
1010 source "arch/arm/mach-vexpress/Kconfig"
1011 source "arch/arm/plat-versatile/Kconfig"
1012
1013 source "arch/arm/mach-vt8500/Kconfig"
1014
1015 source "arch/arm/mach-w90x900/Kconfig"
1016
1017 # Definitions to make life easier
1018 config ARCH_ACORN
1019         bool
1020
1021 config PLAT_IOP
1022         bool
1023         select GENERIC_CLOCKEVENTS
1024         select HAVE_SCHED_CLOCK
1025
1026 config PLAT_ORION
1027         bool
1028         select CLKSRC_MMIO
1029         select GENERIC_IRQ_CHIP
1030         select HAVE_SCHED_CLOCK
1031
1032 config PLAT_PXA
1033         bool
1034
1035 config PLAT_VERSATILE
1036         bool
1037
1038 config ARM_TIMER_SP804
1039         bool
1040         select CLKSRC_MMIO
1041
1042 source arch/arm/mm/Kconfig
1043
1044 config IWMMXT
1045         bool "Enable iWMMXt support"
1046         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1047         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1048         help
1049           Enable support for iWMMXt context switching at run time if
1050           running on a CPU that supports it.
1051
1052 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1053 config XSCALE_PMU
1054         bool
1055         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1056         default y
1057
1058 config CPU_HAS_PMU
1059         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1060                    (!ARCH_OMAP3 || OMAP3_EMU)
1061         default y
1062         bool
1063
1064 config MULTI_IRQ_HANDLER
1065         bool
1066         help
1067           Allow each machine to specify it's own IRQ handler at run time.
1068
1069 if !MMU
1070 source "arch/arm/Kconfig-nommu"
1071 endif
1072
1073 config ARM_ERRATA_411920
1074         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1075         depends on CPU_V6 || CPU_V6K
1076         help
1077           Invalidation of the Instruction Cache operation can
1078           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1079           It does not affect the MPCore. This option enables the ARM Ltd.
1080           recommended workaround.
1081
1082 config ARM_ERRATA_430973
1083         bool "ARM errata: Stale prediction on replaced interworking branch"
1084         depends on CPU_V7
1085         help
1086           This option enables the workaround for the 430973 Cortex-A8
1087           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1088           interworking branch is replaced with another code sequence at the
1089           same virtual address, whether due to self-modifying code or virtual
1090           to physical address re-mapping, Cortex-A8 does not recover from the
1091           stale interworking branch prediction. This results in Cortex-A8
1092           executing the new code sequence in the incorrect ARM or Thumb state.
1093           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1094           and also flushes the branch target cache at every context switch.
1095           Note that setting specific bits in the ACTLR register may not be
1096           available in non-secure mode.
1097
1098 config ARM_ERRATA_458693
1099         bool "ARM errata: Processor deadlock when a false hazard is created"
1100         depends on CPU_V7
1101         help
1102           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1103           erratum. For very specific sequences of memory operations, it is
1104           possible for a hazard condition intended for a cache line to instead
1105           be incorrectly associated with a different cache line. This false
1106           hazard might then cause a processor deadlock. The workaround enables
1107           the L1 caching of the NEON accesses and disables the PLD instruction
1108           in the ACTLR register. Note that setting specific bits in the ACTLR
1109           register may not be available in non-secure mode.
1110
1111 config ARM_ERRATA_460075
1112         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1113         depends on CPU_V7
1114         help
1115           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1116           erratum. Any asynchronous access to the L2 cache may encounter a
1117           situation in which recent store transactions to the L2 cache are lost
1118           and overwritten with stale memory contents from external memory. The
1119           workaround disables the write-allocate mode for the L2 cache via the
1120           ACTLR register. Note that setting specific bits in the ACTLR register
1121           may not be available in non-secure mode.
1122
1123 config ARM_ERRATA_742230
1124         bool "ARM errata: DMB operation may be faulty"
1125         depends on CPU_V7 && SMP
1126         help
1127           This option enables the workaround for the 742230 Cortex-A9
1128           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1129           between two write operations may not ensure the correct visibility
1130           ordering of the two writes. This workaround sets a specific bit in
1131           the diagnostic register of the Cortex-A9 which causes the DMB
1132           instruction to behave as a DSB, ensuring the correct behaviour of
1133           the two writes.
1134
1135 config ARM_ERRATA_742231
1136         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1137         depends on CPU_V7 && SMP
1138         help
1139           This option enables the workaround for the 742231 Cortex-A9
1140           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1141           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1142           accessing some data located in the same cache line, may get corrupted
1143           data due to bad handling of the address hazard when the line gets
1144           replaced from one of the CPUs at the same time as another CPU is
1145           accessing it. This workaround sets specific bits in the diagnostic
1146           register of the Cortex-A9 which reduces the linefill issuing
1147           capabilities of the processor.
1148
1149 config PL310_ERRATA_588369
1150         bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1151         depends on CACHE_L2X0
1152         help
1153            The PL310 L2 cache controller implements three types of Clean &
1154            Invalidate maintenance operations: by Physical Address
1155            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1156            They are architecturally defined to behave as the execution of a
1157            clean operation followed immediately by an invalidate operation,
1158            both performing to the same memory location. This functionality
1159            is not correctly implemented in PL310 as clean lines are not
1160            invalidated as a result of these operations.
1161
1162 config ARM_ERRATA_720789
1163         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1164         depends on CPU_V7 && SMP
1165         help
1166           This option enables the workaround for the 720789 Cortex-A9 (prior to
1167           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1168           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1169           As a consequence of this erratum, some TLB entries which should be
1170           invalidated are not, resulting in an incoherency in the system page
1171           tables. The workaround changes the TLB flushing routines to invalidate
1172           entries regardless of the ASID.
1173
1174 config PL310_ERRATA_727915
1175         bool "Background Clean & Invalidate by Way operation can cause data corruption"
1176         depends on CACHE_L2X0
1177         help
1178           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1179           operation (offset 0x7FC). This operation runs in background so that
1180           PL310 can handle normal accesses while it is in progress. Under very
1181           rare circumstances, due to this erratum, write data can be lost when
1182           PL310 treats a cacheable write transaction during a Clean &
1183           Invalidate by Way operation.
1184
1185 config ARM_ERRATA_743622
1186         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1187         depends on CPU_V7
1188         help
1189           This option enables the workaround for the 743622 Cortex-A9
1190           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1191           optimisation in the Cortex-A9 Store Buffer may lead to data
1192           corruption. This workaround sets a specific bit in the diagnostic
1193           register of the Cortex-A9 which disables the Store Buffer
1194           optimisation, preventing the defect from occurring. This has no
1195           visible impact on the overall performance or power consumption of the
1196           processor.
1197
1198 config ARM_ERRATA_751472
1199         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1200         depends on CPU_V7 && SMP
1201         help
1202           This option enables the workaround for the 751472 Cortex-A9 (prior
1203           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1204           completion of a following broadcasted operation if the second
1205           operation is received by a CPU before the ICIALLUIS has completed,
1206           potentially leading to corrupted entries in the cache or TLB.
1207
1208 config ARM_ERRATA_753970
1209         bool "ARM errata: cache sync operation may be faulty"
1210         depends on CACHE_PL310
1211         help
1212           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1213
1214           Under some condition the effect of cache sync operation on
1215           the store buffer still remains when the operation completes.
1216           This means that the store buffer is always asked to drain and
1217           this prevents it from merging any further writes. The workaround
1218           is to replace the normal offset of cache sync operation (0x730)
1219           by another offset targeting an unmapped PL310 register 0x740.
1220           This has the same effect as the cache sync operation: store buffer
1221           drain and waiting for all buffers empty.
1222
1223 config ARM_ERRATA_754322
1224         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1225         depends on CPU_V7
1226         help
1227           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1228           r3p*) erratum. A speculative memory access may cause a page table walk
1229           which starts prior to an ASID switch but completes afterwards. This
1230           can populate the micro-TLB with a stale entry which may be hit with
1231           the new ASID. This workaround places two dsb instructions in the mm
1232           switching code so that no page table walks can cross the ASID switch.
1233
1234 config ARM_ERRATA_754327
1235         bool "ARM errata: no automatic Store Buffer drain"
1236         depends on CPU_V7 && SMP
1237         help
1238           This option enables the workaround for the 754327 Cortex-A9 (prior to
1239           r2p0) erratum. The Store Buffer does not have any automatic draining
1240           mechanism and therefore a livelock may occur if an external agent
1241           continuously polls a memory location waiting to observe an update.
1242           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1243           written polling loops from denying visibility of updates to memory.
1244
1245 endmenu
1246
1247 source "arch/arm/common/Kconfig"
1248
1249 menu "Bus support"
1250
1251 config ARM_AMBA
1252         bool
1253
1254 config ISA
1255         bool
1256         help
1257           Find out whether you have ISA slots on your motherboard.  ISA is the
1258           name of a bus system, i.e. the way the CPU talks to the other stuff
1259           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1260           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1261           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1262
1263 # Select ISA DMA controller support
1264 config ISA_DMA
1265         bool
1266         select ISA_DMA_API
1267
1268 # Select ISA DMA interface
1269 config ISA_DMA_API
1270         bool
1271
1272 config PCI
1273         bool "PCI support" if MIGHT_HAVE_PCI
1274         help
1275           Find out whether you have a PCI motherboard. PCI is the name of a
1276           bus system, i.e. the way the CPU talks to the other stuff inside
1277           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1278           VESA. If you have PCI, say Y, otherwise N.
1279
1280 config PCI_DOMAINS
1281         bool
1282         depends on PCI
1283
1284 config PCI_NANOENGINE
1285         bool "BSE nanoEngine PCI support"
1286         depends on SA1100_NANOENGINE
1287         help
1288           Enable PCI on the BSE nanoEngine board.
1289
1290 config PCI_SYSCALL
1291         def_bool PCI
1292
1293 # Select the host bridge type
1294 config PCI_HOST_VIA82C505
1295         bool
1296         depends on PCI && ARCH_SHARK
1297         default y
1298
1299 config PCI_HOST_ITE8152
1300         bool
1301         depends on PCI && MACH_ARMCORE
1302         default y
1303         select DMABOUNCE
1304
1305 source "drivers/pci/Kconfig"
1306
1307 source "drivers/pcmcia/Kconfig"
1308
1309 endmenu
1310
1311 menu "Kernel Features"
1312
1313 source "kernel/time/Kconfig"
1314
1315 config SMP
1316         bool "Symmetric Multi-Processing"
1317         depends on CPU_V6K || CPU_V7
1318         depends on GENERIC_CLOCKEVENTS
1319         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1320                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1321                  ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1322                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1323         select USE_GENERIC_SMP_HELPERS
1324         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1325         help
1326           This enables support for systems with more than one CPU. If you have
1327           a system with only one CPU, like most personal computers, say N. If
1328           you have a system with more than one CPU, say Y.
1329
1330           If you say N here, the kernel will run on single and multiprocessor
1331           machines, but will use only one CPU of a multiprocessor machine. If
1332           you say Y here, the kernel will run on many, but not all, single
1333           processor machines. On a single processor machine, the kernel will
1334           run faster if you say N here.
1335
1336           See also <file:Documentation/i386/IO-APIC.txt>,
1337           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1338           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1339
1340           If you don't know what to do here, say N.
1341
1342 config SMP_ON_UP
1343         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1344         depends on EXPERIMENTAL
1345         depends on SMP && !XIP_KERNEL
1346         default y
1347         help
1348           SMP kernels contain instructions which fail on non-SMP processors.
1349           Enabling this option allows the kernel to modify itself to make
1350           these instructions safe.  Disabling it allows about 1K of space
1351           savings.
1352
1353           If you don't know what to do here, say Y.
1354
1355 config HAVE_ARM_SCU
1356         bool
1357         depends on SMP
1358         help
1359           This option enables support for the ARM system coherency unit
1360
1361 config HAVE_ARM_TWD
1362         bool
1363         depends on SMP
1364         select TICK_ONESHOT
1365         help
1366           This options enables support for the ARM timer and watchdog unit
1367
1368 choice
1369         prompt "Memory split"
1370         default VMSPLIT_3G
1371         help
1372           Select the desired split between kernel and user memory.
1373
1374           If you are not absolutely sure what you are doing, leave this
1375           option alone!
1376
1377         config VMSPLIT_3G
1378                 bool "3G/1G user/kernel split"
1379         config VMSPLIT_2G
1380                 bool "2G/2G user/kernel split"
1381         config VMSPLIT_1G
1382                 bool "1G/3G user/kernel split"
1383 endchoice
1384
1385 config PAGE_OFFSET
1386         hex
1387         default 0x40000000 if VMSPLIT_1G
1388         default 0x80000000 if VMSPLIT_2G
1389         default 0xC0000000
1390
1391 config NR_CPUS
1392         int "Maximum number of CPUs (2-32)"
1393         range 2 32
1394         depends on SMP
1395         default "4"
1396
1397 config HOTPLUG_CPU
1398         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1399         depends on SMP && HOTPLUG && EXPERIMENTAL
1400         help
1401           Say Y here to experiment with turning CPUs off and on.  CPUs
1402           can be controlled through /sys/devices/system/cpu.
1403
1404 config LOCAL_TIMERS
1405         bool "Use local timer interrupts"
1406         depends on SMP
1407         default y
1408         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1409         help
1410           Enable support for local timers on SMP platforms, rather then the
1411           legacy IPI broadcast method.  Local timers allows the system
1412           accounting to be spread across the timer interval, preventing a
1413           "thundering herd" at every timer tick.
1414
1415 source kernel/Kconfig.preempt
1416
1417 config HZ
1418         int
1419         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1420                 ARCH_S5PV210 || ARCH_EXYNOS4
1421         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1422         default AT91_TIMER_HZ if ARCH_AT91
1423         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1424         default 100
1425
1426 config THUMB2_KERNEL
1427         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1428         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1429         select AEABI
1430         select ARM_ASM_UNIFIED
1431         help
1432           By enabling this option, the kernel will be compiled in
1433           Thumb-2 mode. A compiler/assembler that understand the unified
1434           ARM-Thumb syntax is needed.
1435
1436           If unsure, say N.
1437
1438 config THUMB2_AVOID_R_ARM_THM_JUMP11
1439         bool "Work around buggy Thumb-2 short branch relocations in gas"
1440         depends on THUMB2_KERNEL && MODULES
1441         default y
1442         help
1443           Various binutils versions can resolve Thumb-2 branches to
1444           locally-defined, preemptible global symbols as short-range "b.n"
1445           branch instructions.
1446
1447           This is a problem, because there's no guarantee the final
1448           destination of the symbol, or any candidate locations for a
1449           trampoline, are within range of the branch.  For this reason, the
1450           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1451           relocation in modules at all, and it makes little sense to add
1452           support.
1453
1454           The symptom is that the kernel fails with an "unsupported
1455           relocation" error when loading some modules.
1456
1457           Until fixed tools are available, passing
1458           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1459           code which hits this problem, at the cost of a bit of extra runtime
1460           stack usage in some cases.
1461
1462           The problem is described in more detail at:
1463               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1464
1465           Only Thumb-2 kernels are affected.
1466
1467           Unless you are sure your tools don't have this problem, say Y.
1468
1469 config ARM_ASM_UNIFIED
1470         bool
1471
1472 config AEABI
1473         bool "Use the ARM EABI to compile the kernel"
1474         help
1475           This option allows for the kernel to be compiled using the latest
1476           ARM ABI (aka EABI).  This is only useful if you are using a user
1477           space environment that is also compiled with EABI.
1478
1479           Since there are major incompatibilities between the legacy ABI and
1480           EABI, especially with regard to structure member alignment, this
1481           option also changes the kernel syscall calling convention to
1482           disambiguate both ABIs and allow for backward compatibility support
1483           (selected with CONFIG_OABI_COMPAT).
1484
1485           To use this you need GCC version 4.0.0 or later.
1486
1487 config OABI_COMPAT
1488         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1489         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1490         default y
1491         help
1492           This option preserves the old syscall interface along with the
1493           new (ARM EABI) one. It also provides a compatibility layer to
1494           intercept syscalls that have structure arguments which layout
1495           in memory differs between the legacy ABI and the new ARM EABI
1496           (only for non "thumb" binaries). This option adds a tiny
1497           overhead to all syscalls and produces a slightly larger kernel.
1498           If you know you'll be using only pure EABI user space then you
1499           can say N here. If this option is not selected and you attempt
1500           to execute a legacy ABI binary then the result will be
1501           UNPREDICTABLE (in fact it can be predicted that it won't work
1502           at all). If in doubt say Y.
1503
1504 config ARCH_HAS_HOLES_MEMORYMODEL
1505         bool
1506
1507 config ARCH_SPARSEMEM_ENABLE
1508         bool
1509
1510 config ARCH_SPARSEMEM_DEFAULT
1511         def_bool ARCH_SPARSEMEM_ENABLE
1512
1513 config ARCH_SELECT_MEMORY_MODEL
1514         def_bool ARCH_SPARSEMEM_ENABLE
1515
1516 config HAVE_ARCH_PFN_VALID
1517         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1518
1519 config HIGHMEM
1520         bool "High Memory Support"
1521         depends on MMU
1522         help
1523           The address space of ARM processors is only 4 Gigabytes large
1524           and it has to accommodate user address space, kernel address
1525           space as well as some memory mapped IO. That means that, if you
1526           have a large amount of physical memory and/or IO, not all of the
1527           memory can be "permanently mapped" by the kernel. The physical
1528           memory that is not permanently mapped is called "high memory".
1529
1530           Depending on the selected kernel/user memory split, minimum
1531           vmalloc space and actual amount of RAM, you may not need this
1532           option which should result in a slightly faster kernel.
1533
1534           If unsure, say n.
1535
1536 config HIGHPTE
1537         bool "Allocate 2nd-level pagetables from highmem"
1538         depends on HIGHMEM
1539
1540 config HW_PERF_EVENTS
1541         bool "Enable hardware performance counter support for perf events"
1542         depends on PERF_EVENTS && CPU_HAS_PMU
1543         default y
1544         help
1545           Enable hardware performance counter support for perf events. If
1546           disabled, perf events will use software events only.
1547
1548 source "mm/Kconfig"
1549
1550 config FORCE_MAX_ZONEORDER
1551         int "Maximum zone order" if ARCH_SHMOBILE
1552         range 11 64 if ARCH_SHMOBILE
1553         default "9" if SA1111
1554         default "11"
1555         help
1556           The kernel memory allocator divides physically contiguous memory
1557           blocks into "zones", where each zone is a power of two number of
1558           pages.  This option selects the largest power of two that the kernel
1559           keeps in the memory allocator.  If you need to allocate very large
1560           blocks of physically contiguous memory, then you may need to
1561           increase this value.
1562
1563           This config option is actually maximum order plus one. For example,
1564           a value of 11 means that the largest free memory block is 2^10 pages.
1565
1566 config LEDS
1567         bool "Timer and CPU usage LEDs"
1568         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1569                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1570                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1571                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1572                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1573                    ARCH_AT91 || ARCH_DAVINCI || \
1574                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1575         help
1576           If you say Y here, the LEDs on your machine will be used
1577           to provide useful information about your current system status.
1578
1579           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1580           be able to select which LEDs are active using the options below. If
1581           you are compiling a kernel for the EBSA-110 or the LART however, the
1582           red LED will simply flash regularly to indicate that the system is
1583           still functional. It is safe to say Y here if you have a CATS
1584           system, but the driver will do nothing.
1585
1586 config LEDS_TIMER
1587         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1588                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1589                             || MACH_OMAP_PERSEUS2
1590         depends on LEDS
1591         depends on !GENERIC_CLOCKEVENTS
1592         default y if ARCH_EBSA110
1593         help
1594           If you say Y here, one of the system LEDs (the green one on the
1595           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1596           will flash regularly to indicate that the system is still
1597           operational. This is mainly useful to kernel hackers who are
1598           debugging unstable kernels.
1599
1600           The LART uses the same LED for both Timer LED and CPU usage LED
1601           functions. You may choose to use both, but the Timer LED function
1602           will overrule the CPU usage LED.
1603
1604 config LEDS_CPU
1605         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1606                         !ARCH_OMAP) \
1607                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1608                         || MACH_OMAP_PERSEUS2
1609         depends on LEDS
1610         help
1611           If you say Y here, the red LED will be used to give a good real
1612           time indication of CPU usage, by lighting whenever the idle task
1613           is not currently executing.
1614
1615           The LART uses the same LED for both Timer LED and CPU usage LED
1616           functions. You may choose to use both, but the Timer LED function
1617           will overrule the CPU usage LED.
1618
1619 config ALIGNMENT_TRAP
1620         bool
1621         depends on CPU_CP15_MMU
1622         default y if !ARCH_EBSA110
1623         select HAVE_PROC_CPU if PROC_FS
1624         help
1625           ARM processors cannot fetch/store information which is not
1626           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1627           address divisible by 4. On 32-bit ARM processors, these non-aligned
1628           fetch/store instructions will be emulated in software if you say
1629           here, which has a severe performance impact. This is necessary for
1630           correct operation of some network protocols. With an IP-only
1631           configuration it is safe to say N, otherwise say Y.
1632
1633 config UACCESS_WITH_MEMCPY
1634         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1635         depends on MMU && EXPERIMENTAL
1636         default y if CPU_FEROCEON
1637         help
1638           Implement faster copy_to_user and clear_user methods for CPU
1639           cores where a 8-word STM instruction give significantly higher
1640           memory write throughput than a sequence of individual 32bit stores.
1641
1642           A possible side effect is a slight increase in scheduling latency
1643           between threads sharing the same address space if they invoke
1644           such copy operations with large buffers.
1645
1646           However, if the CPU data cache is using a write-allocate mode,
1647           this option is unlikely to provide any performance gain.
1648
1649 config SECCOMP
1650         bool
1651         prompt "Enable seccomp to safely compute untrusted bytecode"
1652         ---help---
1653           This kernel feature is useful for number crunching applications
1654           that may need to compute untrusted bytecode during their
1655           execution. By using pipes or other transports made available to
1656           the process as file descriptors supporting the read/write
1657           syscalls, it's possible to isolate those applications in
1658           their own address space using seccomp. Once seccomp is
1659           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1660           and the task is only allowed to execute a few safe syscalls
1661           defined by each seccomp mode.
1662
1663 config CC_STACKPROTECTOR
1664         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1665         depends on EXPERIMENTAL
1666         help
1667           This option turns on the -fstack-protector GCC feature. This
1668           feature puts, at the beginning of functions, a canary value on
1669           the stack just before the return address, and validates
1670           the value just before actually returning.  Stack based buffer
1671           overflows (that need to overwrite this return address) now also
1672           overwrite the canary, which gets detected and the attack is then
1673           neutralized via a kernel panic.
1674           This feature requires gcc version 4.2 or above.
1675
1676 config DEPRECATED_PARAM_STRUCT
1677         bool "Provide old way to pass kernel parameters"
1678         help
1679           This was deprecated in 2001 and announced to live on for 5 years.
1680           Some old boot loaders still use this way.
1681
1682 endmenu
1683
1684 menu "Boot options"
1685
1686 config USE_OF
1687         bool "Flattened Device Tree support"
1688         select OF
1689         select OF_EARLY_FLATTREE
1690         help
1691           Include support for flattened device tree machine descriptions.
1692
1693 # Compressed boot loader in ROM.  Yes, we really want to ask about
1694 # TEXT and BSS so we preserve their values in the config files.
1695 config ZBOOT_ROM_TEXT
1696         hex "Compressed ROM boot loader base address"
1697         default "0"
1698         help
1699           The physical address at which the ROM-able zImage is to be
1700           placed in the target.  Platforms which normally make use of
1701           ROM-able zImage formats normally set this to a suitable
1702           value in their defconfig file.
1703
1704           If ZBOOT_ROM is not enabled, this has no effect.
1705
1706 config ZBOOT_ROM_BSS
1707         hex "Compressed ROM boot loader BSS address"
1708         default "0"
1709         help
1710           The base address of an area of read/write memory in the target
1711           for the ROM-able zImage which must be available while the
1712           decompressor is running. It must be large enough to hold the
1713           entire decompressed kernel plus an additional 128 KiB.
1714           Platforms which normally make use of ROM-able zImage formats
1715           normally set this to a suitable value in their defconfig file.
1716
1717           If ZBOOT_ROM is not enabled, this has no effect.
1718
1719 config ZBOOT_ROM
1720         bool "Compressed boot loader in ROM/flash"
1721         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1722         help
1723           Say Y here if you intend to execute your compressed kernel image
1724           (zImage) directly from ROM or flash.  If unsure, say N.
1725
1726 config ZBOOT_ROM_MMCIF
1727         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1728         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1729         help
1730           Say Y here to include experimental MMCIF loading code in the
1731           ROM-able zImage. With this enabled it is possible to write the
1732           the ROM-able zImage kernel image to an MMC card and boot the
1733           kernel straight from the reset vector. At reset the processor
1734           Mask ROM will load the first part of the the ROM-able zImage
1735           which in turn loads the rest the kernel image to RAM using the
1736           MMCIF hardware block.
1737
1738 config CMDLINE
1739         string "Default kernel command string"
1740         default ""
1741         help
1742           On some architectures (EBSA110 and CATS), there is currently no way
1743           for the boot loader to pass arguments to the kernel. For these
1744           architectures, you should supply some command-line options at build
1745           time by entering them here. As a minimum, you should specify the
1746           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1747
1748 choice
1749         prompt "Kernel command line type" if CMDLINE != ""
1750         default CMDLINE_FROM_BOOTLOADER
1751
1752 config CMDLINE_FROM_BOOTLOADER
1753         bool "Use bootloader kernel arguments if available"
1754         help
1755           Uses the command-line options passed by the boot loader. If
1756           the boot loader doesn't provide any, the default kernel command
1757           string provided in CMDLINE will be used.
1758
1759 config CMDLINE_EXTEND
1760         bool "Extend bootloader kernel arguments"
1761         help
1762           The command-line arguments provided by the boot loader will be
1763           appended to the default kernel command string.
1764
1765 config CMDLINE_FORCE
1766         bool "Always use the default kernel command string"
1767         help
1768           Always use the default kernel command string, even if the boot
1769           loader passes other arguments to the kernel.
1770           This is useful if you cannot or don't want to change the
1771           command-line options your boot loader passes to the kernel.
1772 endchoice
1773
1774 config XIP_KERNEL
1775         bool "Kernel Execute-In-Place from ROM"
1776         depends on !ZBOOT_ROM
1777         help
1778           Execute-In-Place allows the kernel to run from non-volatile storage
1779           directly addressable by the CPU, such as NOR flash. This saves RAM
1780           space since the text section of the kernel is not loaded from flash
1781           to RAM.  Read-write sections, such as the data section and stack,
1782           are still copied to RAM.  The XIP kernel is not compressed since
1783           it has to run directly from flash, so it will take more space to
1784           store it.  The flash address used to link the kernel object files,
1785           and for storing it, is configuration dependent. Therefore, if you
1786           say Y here, you must know the proper physical address where to
1787           store the kernel image depending on your own flash memory usage.
1788
1789           Also note that the make target becomes "make xipImage" rather than
1790           "make zImage" or "make Image".  The final kernel binary to put in
1791           ROM memory will be arch/arm/boot/xipImage.
1792
1793           If unsure, say N.
1794
1795 config XIP_PHYS_ADDR
1796         hex "XIP Kernel Physical Location"
1797         depends on XIP_KERNEL
1798         default "0x00080000"
1799         help
1800           This is the physical address in your flash memory the kernel will
1801           be linked for and stored to.  This address is dependent on your
1802           own flash usage.
1803
1804 config KEXEC
1805         bool "Kexec system call (EXPERIMENTAL)"
1806         depends on EXPERIMENTAL
1807         help
1808           kexec is a system call that implements the ability to shutdown your
1809           current kernel, and to start another kernel.  It is like a reboot
1810           but it is independent of the system firmware.   And like a reboot
1811           you can start any kernel with it, not just Linux.
1812
1813           It is an ongoing process to be certain the hardware in a machine
1814           is properly shutdown, so do not be surprised if this code does not
1815           initially work for you.  It may help to enable device hotplugging
1816           support.
1817
1818 config ATAGS_PROC
1819         bool "Export atags in procfs"
1820         depends on KEXEC
1821         default y
1822         help
1823           Should the atags used to boot the kernel be exported in an "atags"
1824           file in procfs. Useful with kexec.
1825
1826 config CRASH_DUMP
1827         bool "Build kdump crash kernel (EXPERIMENTAL)"
1828         depends on EXPERIMENTAL
1829         help
1830           Generate crash dump after being started by kexec. This should
1831           be normally only set in special crash dump kernels which are
1832           loaded in the main kernel with kexec-tools into a specially
1833           reserved region and then later executed after a crash by
1834           kdump/kexec. The crash dump kernel must be compiled to a
1835           memory address not used by the main kernel
1836
1837           For more details see Documentation/kdump/kdump.txt
1838
1839 config AUTO_ZRELADDR
1840         bool "Auto calculation of the decompressed kernel image address"
1841         depends on !ZBOOT_ROM && !ARCH_U300
1842         help
1843           ZRELADDR is the physical address where the decompressed kernel
1844           image will be placed. If AUTO_ZRELADDR is selected, the address
1845           will be determined at run-time by masking the current IP with
1846           0xf8000000. This assumes the zImage being placed in the first 128MB
1847           from start of memory.
1848
1849 endmenu
1850
1851 menu "CPU Power Management"
1852
1853 if ARCH_HAS_CPUFREQ
1854
1855 source "drivers/cpufreq/Kconfig"
1856
1857 config CPU_FREQ_IMX
1858         tristate "CPUfreq driver for i.MX CPUs"
1859         depends on ARCH_MXC && CPU_FREQ
1860         help
1861           This enables the CPUfreq driver for i.MX CPUs.
1862
1863 config CPU_FREQ_SA1100
1864         bool
1865
1866 config CPU_FREQ_SA1110
1867         bool
1868
1869 config CPU_FREQ_INTEGRATOR
1870         tristate "CPUfreq driver for ARM Integrator CPUs"
1871         depends on ARCH_INTEGRATOR && CPU_FREQ
1872         default y
1873         help
1874           This enables the CPUfreq driver for ARM Integrator CPUs.
1875
1876           For details, take a look at <file:Documentation/cpu-freq>.
1877
1878           If in doubt, say Y.
1879
1880 config CPU_FREQ_PXA
1881         bool
1882         depends on CPU_FREQ && ARCH_PXA && PXA25x
1883         default y
1884         select CPU_FREQ_DEFAULT_GOV_USERSPACE
1885
1886 config CPU_FREQ_S3C64XX
1887         bool "CPUfreq support for Samsung S3C64XX CPUs"
1888         depends on CPU_FREQ && CPU_S3C6410
1889
1890 config CPU_FREQ_S3C
1891         bool
1892         help
1893           Internal configuration node for common cpufreq on Samsung SoC
1894
1895 config CPU_FREQ_S3C24XX
1896         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1897         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1898         select CPU_FREQ_S3C
1899         help
1900           This enables the CPUfreq driver for the Samsung S3C24XX family
1901           of CPUs.
1902
1903           For details, take a look at <file:Documentation/cpu-freq>.
1904
1905           If in doubt, say N.
1906
1907 config CPU_FREQ_S3C24XX_PLL
1908         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1909         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1910         help
1911           Compile in support for changing the PLL frequency from the
1912           S3C24XX series CPUfreq driver. The PLL takes time to settle
1913           after a frequency change, so by default it is not enabled.
1914
1915           This also means that the PLL tables for the selected CPU(s) will
1916           be built which may increase the size of the kernel image.
1917
1918 config CPU_FREQ_S3C24XX_DEBUG
1919         bool "Debug CPUfreq Samsung driver core"
1920         depends on CPU_FREQ_S3C24XX
1921         help
1922           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1923
1924 config CPU_FREQ_S3C24XX_IODEBUG
1925         bool "Debug CPUfreq Samsung driver IO timing"
1926         depends on CPU_FREQ_S3C24XX
1927         help
1928           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1929
1930 config CPU_FREQ_S3C24XX_DEBUGFS
1931         bool "Export debugfs for CPUFreq"
1932         depends on CPU_FREQ_S3C24XX && DEBUG_FS
1933         help
1934           Export status information via debugfs.
1935
1936 endif
1937
1938 source "drivers/cpuidle/Kconfig"
1939
1940 endmenu
1941
1942 menu "Floating point emulation"
1943
1944 comment "At least one emulation must be selected"
1945
1946 config FPE_NWFPE
1947         bool "NWFPE math emulation"
1948         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1949         ---help---
1950           Say Y to include the NWFPE floating point emulator in the kernel.
1951           This is necessary to run most binaries. Linux does not currently
1952           support floating point hardware so you need to say Y here even if
1953           your machine has an FPA or floating point co-processor podule.
1954
1955           You may say N here if you are going to load the Acorn FPEmulator
1956           early in the bootup.
1957
1958 config FPE_NWFPE_XP
1959         bool "Support extended precision"
1960         depends on FPE_NWFPE
1961         help
1962           Say Y to include 80-bit support in the kernel floating-point
1963           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
1964           Note that gcc does not generate 80-bit operations by default,
1965           so in most cases this option only enlarges the size of the
1966           floating point emulator without any good reason.
1967
1968           You almost surely want to say N here.
1969
1970 config FPE_FASTFPE
1971         bool "FastFPE math emulation (EXPERIMENTAL)"
1972         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1973         ---help---
1974           Say Y here to include the FAST floating point emulator in the kernel.
1975           This is an experimental much faster emulator which now also has full
1976           precision for the mantissa.  It does not support any exceptions.
1977           It is very simple, and approximately 3-6 times faster than NWFPE.
1978
1979           It should be sufficient for most programs.  It may be not suitable
1980           for scientific calculations, but you have to check this for yourself.
1981           If you do not feel you need a faster FP emulation you should better
1982           choose NWFPE.
1983
1984 config VFP
1985         bool "VFP-format floating point maths"
1986         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1987         help
1988           Say Y to include VFP support code in the kernel. This is needed
1989           if your hardware includes a VFP unit.
1990
1991           Please see <file:Documentation/arm/VFP/release-notes.txt> for
1992           release notes and additional status information.
1993
1994           Say N if your target does not have VFP hardware.
1995
1996 config VFPv3
1997         bool
1998         depends on VFP
1999         default y if CPU_V7
2000
2001 config NEON
2002         bool "Advanced SIMD (NEON) Extension support"
2003         depends on VFPv3 && CPU_V7
2004         help
2005           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2006           Extension.
2007
2008 endmenu
2009
2010 menu "Userspace binary formats"
2011
2012 source "fs/Kconfig.binfmt"
2013
2014 config ARTHUR
2015         tristate "RISC OS personality"
2016         depends on !AEABI
2017         help
2018           Say Y here to include the kernel code necessary if you want to run
2019           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2020           experimental; if this sounds frightening, say N and sleep in peace.
2021           You can also say M here to compile this support as a module (which
2022           will be called arthur).
2023
2024 endmenu
2025
2026 menu "Power management options"
2027
2028 source "kernel/power/Kconfig"
2029
2030 config ARCH_SUSPEND_POSSIBLE
2031         depends on !ARCH_S5P64X0 && !ARCH_S5PC100
2032         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2033                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2034         def_bool y
2035
2036 endmenu
2037
2038 source "net/Kconfig"
2039
2040 source "drivers/Kconfig"
2041
2042 source "fs/Kconfig"
2043
2044 source "arch/arm/Kconfig.debug"
2045
2046 source "security/Kconfig"
2047
2048 source "crypto/Kconfig"
2049
2050 source "lib/Kconfig"